Wafer alignment method
By calculating the X-axis and Y-axis displacement of the wafer using a white light image sensor and adjusting the wafer position, the problem of low wafer alignment accuracy was solved, achieving high-precision alignment and reducing costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- CONTREL TECH CO LTD
- Filing Date
- 2024-12-05
- Publication Date
- 2026-06-09
Smart Images
Figure CN122180351A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to wafer alignment technology, and in particular to a wafer alignment method that can improve alignment accuracy. Background Technology
[0002] As chip dimensions shrink, chip alignment becomes increasingly difficult. Before placing the chip onto a circuit board (such as a glass substrate), alignment features of both the chip and the glass substrate must be obtained. Once alignment is confirmed, the chip is pressed onto the corresponding position on the glass substrate to complete the alignment. However, due to limitations in the materials and circuit paths of the chip and glass substrate, image sensors using visible light sources (such as white light) cannot effectively penetrate the chip or glass substrate to obtain clear images of the alignment features. Currently, this alignment is typically achieved using image sensors with special light sources (such as infrared light). However, the image resolution produced by infrared light sources is not ideal, resulting in blurred patterns or edges of the alignment features, making it difficult to achieve good alignment accuracy. Furthermore, image sensors using special light sources are more expensive than those using visible light sources, increasing equipment costs. Summary of the Invention
[0003] The main objective of this invention is to provide a wafer alignment method that can effectively improve alignment accuracy.
[0004] To achieve the above-mentioned main objectives, the wafer alignment method provided by the present invention includes the following steps: (a) obtaining a position compensation amount of a first alignment feature of a wafer relative to a second alignment feature of a pickup head; (b) aligning the second alignment feature of the pickup head with a third alignment feature of a glass substrate; and (c) compensating the position of the wafer according to the position compensation amount, so that the first alignment feature of the wafer aligns with the third alignment feature of the glass substrate.
[0005] As can be seen from the above, the wafer alignment method of the present invention uses the position compensation amount to adjust the position of the wafer, so that the wafer can be accurately and effectively aligned with the glass substrate, thereby improving the alignment accuracy.
[0006] Preferably, in step (a), the chip is first coarsely aligned, and then a white light image sensor is used to capture the first alignment feature of the chip and the second alignment feature of the pickup head from bottom to top, so as to obtain the position compensation amount.
[0007] Preferably, in step (a), a white light image sensor is used to capture a center point of the second alignment feature and an edge of the wafer from top to bottom, and the wafer is coarsely aligned based on their relative positions. After the coarse alignment of the wafer is completed, the wafer is picked up using the pickup head.
[0008] Preferably, in step (a), a white light image sensor is used to obtain an X-axis displacement and a Y-axis displacement of the first alignment feature relative to the second alignment feature, and the position compensation amount is obtained based on the X-axis displacement and the Y-axis displacement.
[0009] Preferably, in step (b), a white light image sensor is used to capture a center point of the second alignment feature and a center point of the third alignment feature from top to bottom, so that the second alignment feature is aligned with the third alignment feature.
[0010] Detailed descriptions of the wafer alignment method provided by this invention, including its construction, features, assembly, and usage, will be provided in the subsequent detailed description of embodiments. However, those skilled in the art will understand that these detailed descriptions and the specific embodiments listed for implementing this invention are merely illustrative and not intended to limit the scope of the patent application. Attached Figure Description
[0011] Figures 1A-1B This is a flowchart of the wafer alignment method of the present invention.
[0012] Figure 2 This is a schematic diagram of the wafer alignment method of the present invention, mainly illustrating the position compensation amount obtained based on the X-axis displacement and Y-axis displacement.
[0013] In the attached figures, the following labels are used:
[0014] S1.1~S1.3: Steps;
[0015] S3.1~S3.2: Steps;
[0016] 10: Chip;
[0017] 12: First alignment feature;
[0018] 14: Edge;
[0019] C1: Center point;
[0020] 20: Pick up the head;
[0021] 22: Second alignment feature;
[0022] C2: Center point;
[0023] ΔX: Displacement along the X-axis;
[0024] ΔY: Displacement along the Y-axis;
[0025] P: Position compensation amount;
[0026] 30: Glass substrate;
[0027] 32: Third alignment feature;
[0028] C3: Center point;
[0029] 40: White light image sensor;
[0030] 42: White light image sensor. Detailed Implementation
[0031] Throughout this specification, including the embodiments described below and the claims in the claims, directional terms are based on the directions shown in the drawings. In the embodiments and drawings described below, the same component reference numerals represent the same or similar components or their structural features.
[0032] Please see Figures 1A-1B The wafer alignment method of the present invention includes the following steps:
[0033] (a) such as Figure 1A In step S1, a position compensation amount P is obtained between a first alignment feature 12 of a wafer 10 and a second alignment feature 22 of a pickup head 20. The first alignment feature 12 is, for example, a circuit feature of the wafer 10, such as a specific right angle, notch, or pattern. The second alignment feature 22 is, for example, a specific pattern or structure of the pickup head 20.
[0034] In this step, such as Figure 1A In step S1.1, a white light image sensor 40 (for example, a CCD with a white light source is used, but not limited to it) is used to capture the center point C2 of the second alignment feature 22 and the edge 14 of the wafer 10 from the pickup head 20 downwards. The wafer 10 is coarsely aligned according to the relative position of the center point C2 of the second alignment feature 22 and the edge 14 of the wafer 10.
[0035] After the coarse alignment of chip 10 is completed, the pickup head 20 is pressed down to pick up chip 10 (e.g., Figure 1A Step 1.2 as shown is followed by using another white light image sensor 42 (here, a white light CCD is used as an example, but it is not limited to this) to capture the first alignment feature 12 of the chip 10 and the second alignment feature 22 of the pickup head 20 from bottom to top (e.g., ...). Figure 1A As shown in step S1.3), based on the relative positions of the center point C1 of the first alignment feature 12 and the center point C2 of the second alignment feature 22, the X-axis displacement ΔX and Y-axis displacement ΔY of the first alignment feature 12 relative to the second alignment feature 22 in planar space can be obtained, as follows: Figure 2 As shown, the position compensation amount P can be obtained based on the X-axis displacement ΔX and the Y-axis displacement ΔY.
[0036] (b) such as Figure 1BStep S2, as shown, aligns the second alignment feature 22 of the pickup head 20 with a third alignment feature 32 of a glass substrate 30. The third alignment feature 32 may be, for example, a specific structural pattern, notch, or circuit pattern on the glass substrate 30.
[0037] In this step, the white light image sensor 40 is used to capture the center point C2 of the second alignment feature 22 and the center point C3 of the third alignment feature 32 from top to bottom, so that the second alignment feature 22 is aligned with the third alignment feature 32.
[0038] (c) such as Figure 1B In step S3 shown, the position of the wafer 10 is compensated according to the position compensation amount P, so that the first alignment feature 12 of the wafer 10 is aligned with the third alignment feature 32 of the glass substrate 30.
[0039] In this step, the position of the wafer 10 is adjusted in the X-axis and Y-axis directions according to the position compensation amount P, so that the first alignment feature 12 of the wafer 10 is aligned with the third alignment feature 32 of the glass substrate 30 (e.g., ...). Figure 1B As shown in step S3.1), after confirming alignment, the wafer 10 can be pressed onto the glass substrate 30 using the pick-up head 20 (e.g., ...). Figure 1B The steps shown in step S3.2 are for subsequent processing.
[0040] As can be seen from the above, the wafer alignment method of the present invention can use the position compensation amount P obtained by the upper and lower white light image sensors 40, 42 to compensate the position of the wafer 10. During the alignment process, it is not limited by the material or circuit configuration of the glass substrate 30, so that the wafer 10 can be effectively and accurately aligned with the glass substrate 30, thereby improving the alignment accuracy.
Claims
1. A wafer alignment method, characterized in that, Includes the following steps: (a) Obtaining a positional compensation amount of a first alignment feature of a chip relative to a second alignment feature of a pickup head; (b) Aligning the second alignment feature of the pickup head with a third alignment feature of a glass substrate; as well as (c) The position of the wafer is compensated according to the position compensation amount, so that the first alignment feature of the wafer is aligned with the third alignment feature of the glass substrate.
2. The wafer alignment method as described in claim 1, characterized in that, In step (a), the wafer is first coarsely aligned, and then a white light image sensor is used to capture the first alignment feature of the wafer and the second alignment feature of the pickup head from bottom to top, thereby obtaining the position compensation amount.
3. The wafer alignment method as described in claim 2, characterized in that, In step (a), another white light image sensor is used to capture a center point of the second alignment feature and an edge of the wafer from top to bottom, and coarse alignment of the wafer is performed based on the relative position of the center point of the second alignment feature and the edge of the wafer.
4. The wafer alignment method as described in claim 2, characterized in that, The white light image sensor is used to obtain an X-axis displacement and a Y-axis displacement of the first alignment feature relative to the second alignment feature, and the position compensation amount is obtained based on the X-axis displacement and the Y-axis displacement.
5. The wafer alignment method as described in claim 1, characterized in that, In step (b), a white light image sensor is used to capture a center point of the second alignment feature and a center point of the third alignment feature from top to bottom, so that the second alignment feature is aligned with the third alignment feature.