A hot disc temperature control method based on PID algorithm

Abstract

The present application relates to the field of industrial control technology, specifically to a hot disc temperature control method based on PID algorithm, comprising the following steps: obtaining wafer surface instantaneous cooling slope according to semiconductor hot disc corresponding mechanical arm IO signal feedback node, extracting absolute value of wafer surface instantaneous cooling slope, combining thermal power output integral value, and obtaining wafer heat capacity mutation factor.In the present application, the control strategy has distinguishing ability in different error directions, keeps regular regulation in positive limit, freezes integral term and introduces asymmetric inhibition intervention state in negative limit, combines field temperature difference absolute value to calculate attenuation gain constant, makes control output change nonlinear adjustment trend with error, thereby inhibits overshoot phenomenon in cooling stage, keeps response speed in heating stage, and overall realizes cooperative regulation of temperature fluctuation, load change and disturbance influence, improves temperature control precision and response stability.

Description

Technical Field

[0001] This invention relates to the field of industrial control technology, and in particular to a hot plate temperature control method based on PID algorithm. Background Technology

[0002] Industrial control technology involves real-time monitoring, adjustment, and optimization control of various equipment, process parameters, and operating status in industrial production processes, covering multiple key aspects such as temperature control, pressure control, flow control, and position control.

[0003] Current industrial control technologies rely on the deviation between the set temperature and the feedback temperature for linear adjustment during temperature regulation. When operating conditions change, such as wafer placement or removal, the control output struggles to reflect sudden changes in thermal capacity, leading to temperature recovery lag or overshoot. Furthermore, during continuous heating, the control logic often operates with fixed parameters, lacking a phased adjustment mechanism for sudden load changes. This can easily result in insufficient power output or excessive accumulation within a short period. For example, during the high-load entry phase, the temperature drops significantly, but the control output continues to adjust gradually according to the conventional strategy, causing the temperature deviation to widen. In handling error direction, a symmetrical adjustment method is typically used, failing to distinguish between heating and cooling errors. This leads to the continuous accumulation of the integral term during the cooling phase, easily causing oscillations or control delays. Therefore, improvements are needed. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of existing technologies and propose a hot plate temperature control method based on PID algorithm.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: a hot plate temperature control method based on a PID algorithm, comprising the following steps:

[0006] Based on the feedback node of the robotic arm IO signal corresponding to the semiconductor hot plate, the instantaneous cooling slope of the wafer surface is obtained, the absolute value of the instantaneous cooling slope of the wafer surface is extracted, and combined with the integral value of the thermal power output, the wafer thermal capacity mutation factor is obtained.

[0007] The wafer thermal capacity mutation factor is compared with the load threshold node, the wafer thermal capacity mutation factor corresponding to the load threshold node is identified, a full-power full-load state is established, the wafer thermal capacity mutation factor associated with the full-power full-load state is extracted, and the full-load duration is calculated and generated.

[0008] The full load duration is counted down, and when it decreases to zero, a control loop restart state is generated. The set temperature is subtracted from the feedback temperature to obtain the field temperature difference value. The positive and negative limits are defined to obtain the polarity temperature error distribution range.

[0009] When the polarity temperature error distribution range falls into the positive limit, the conventional gain and integral accumulation process is triggered. When the polarity temperature error distribution range falls into the negative limit, the integral accumulation process is cut off and the integral term parameter is frozen, generating an asymmetric suppression intervention state. The absolute value of the field temperature difference corresponding to the asymmetric suppression intervention state is called to calculate and obtain the nonlinear adaptive control command.

[0010] Preferably, the step of obtaining the wafer thermal capacity mutation factor is as follows:

[0011] Based on the feedback node of the robot arm IO signal corresponding to the semiconductor hot plate, read the node status mark corresponding to the robot arm triggering time, lock the sampling time corresponding to the node status mark, extract the real-time surface temperature of the trigger point corresponding to the sampling time, retrieve the continuous accumulation record of thermal power output before the same sampling time, extract the final integral value of the continuous accumulation record of thermal power output corresponding to the node status mark, and pair them in order according to the same sampling time to obtain the corresponding value of the thermal power output integral of the real-time surface temperature of the trigger point.

[0012] Based on the corresponding value of the thermal power output integral of the real-time surface temperature at the trigger point, the continuous temperature records of the real-time surface temperature at the trigger point before and after the node state mark are extracted. The continuous temperature records are arranged in the order of sampling. The temperature change and time change at adjacent sampling times are calculated in turn. The instantaneous cooling slope of the wafer surface is formed by dividing the temperature change by the time change. The absolute value of the instantaneous cooling slope of the wafer surface is extracted. The thermal power output integral value in the corresponding value of the thermal power output integral of the real-time surface temperature at the trigger point is used as the denominator of the division operation to form the thermal capacity change division operation parameter.

[0013] The absolute value of the instantaneous cooling slope of the wafer surface in the thermal capacity mutation division operation parameters is used as the numerator, and the integral value of the thermal power output in the thermal capacity mutation division operation parameters is used as the denominator. The quotient value corresponding to each group of division operations is recorded to obtain the wafer thermal capacity mutation factor.

[0014] Preferably, the step of obtaining the full-power, full-load state is as follows:

[0015] Read the threshold value corresponding to the load threshold node, compare it item by item according to the output order of the wafer thermal capacity mutation factor, filter the wafer thermal capacity mutation factor that is greater than or equal to the load threshold node, record the sampling time, control channel number and power request status of the load threshold node, and write the full load trigger flag to the corresponding control channel according to the sampling time to form the threshold trigger full load heating command.

[0016] Lock the control channel number corresponding to the threshold-triggered full-load heating command, close the current control flow write entry corresponding to the control channel number, keep the adjustment value corresponding to the control channel number from updating, write the upper limit thermal power value to the power output port, continuously monitor the output hold status of the upper limit thermal power value, and establish a full-power full-load state.

[0017] Preferably, the step of obtaining the full load duration is as follows:

[0018] Extract the wafer thermal capacity mutation factor stored at the sampling time corresponding to the full-power full-load state, establish the wafer thermal capacity mutation factor associated with the full-power full-load state, read the numerical terms corresponding to the wafer thermal capacity mutation factor associated with the full-power full-load state, write the numerical terms into the undetermined terms of the time algebraic equation according to the preset parameter positions, search the root value solution set of the time algebraic equation term by term, filter out the root values ​​that do not satisfy the duration direction, retain the node constants that satisfy the duration direction, and perform output conversion according to the time length corresponding to the node constants to obtain the full-load duration.

[0019] Preferably, the step of obtaining the restart status of the control loop is as follows:

[0020] Read the remaining duration register value corresponding to the full load duration, decrease the remaining duration register value period by period according to the control cycle, record the remaining duration register value after each decrease, continuously check whether the remaining duration register value has reached the zero value node, extract the transient error constant when the remaining duration register value reaches the zero value node, write the transient error constant into the integral storage location of the control integral term, remove the control loop stall flag, open the control loop input and output terminals, and form the control loop restart state.

[0021] Preferably, the step of obtaining the polarity temperature error distribution range is as follows:

[0022] The semiconductor hot plate set temperature corresponding to the restart state of the control loop is retrieved, and the feedback temperature corresponding to the restart state of the control loop is retrieved. The semiconductor hot plate set temperature is subtracted from the feedback temperature to form the on-site temperature difference value.

[0023] The on-site temperature difference values ​​greater than zero are assigned to the positive limit, the on-site temperature difference values ​​less than zero are assigned to the negative limit, and the on-site temperature difference values ​​equal to zero are marked as the dividing nodes between the positive and negative limits. The intervals are then sorted according to the assignment results of the positive and negative limits to obtain the polarity temperature error distribution interval.

[0024] Preferably, the step of obtaining the asymmetric inhibition intervention state is as follows:

[0025] The interval assignment markers corresponding to the polarity temperature error distribution intervals are read one by one. The interval assignment markers that fall into the positive limit are sent to the conventional gain execution channel, the integral accumulation execution channel is opened, the interval assignment markers that fall into the negative limit are sent to the integral truncation execution channel, the integral storage position is locked, and an asymmetric suppression intervention state is formed.

[0026] Preferably, the step of obtaining the nonlinear adaptive control command is as follows:

[0027] Read the absolute value of the on-site temperature difference corresponding to the asymmetric suppression intervention state, read the characteristic cooling temperature corresponding to the asymmetric suppression intervention state, call the normalization processing result corresponding to the wafer thermal capacity mutation factor, and calculate the attenuation gain constant.

[0028] The attenuation gain constant is written into the gain correction port, the freeze flag of the integral term parameter corresponding to the asymmetric suppression intervention state is kept valid, the thermal power adjustment amplitude is scaled according to the attenuation gain constant, and the corrected thermal power adjustment result is output according to the control cycle corresponding to the attenuation gain constant, forming a nonlinear adaptive control command.

[0029] Compared with the prior art, the advantages and positive effects of the present invention are as follows:

[0030] In this invention, during temperature control, the trigger time is locked through the robotic arm IO signal feedback node. The instantaneous cooling slope of the wafer surface is correlated with the integral value of the thermal power output. A wafer thermal capacity mutation factor is introduced to characterize the degree of thermal load change. This allows temperature control to no longer rely solely on temperature difference information but to be adjusted in conjunction with the dynamic characteristics of the thermal process. Furthermore, a load threshold node identifies the thermal capacity mutation state and establishes a full-power full-load state. The full-load duration is calculated using the thermal capacity mutation factor, enabling the heating process to maintain stable output during load mutation phases and avoiding temperature recovery lag due to short-term power shortages. Simultaneously, through… The timing of restarting the control loop by decrementing the count control determines the temperature difference between the set temperature and the feedback temperature, and divides the temperature error distribution range into polarity ranges. This enables the control strategy to distinguish between different error directions. It maintains normal adjustment at the positive limit, freezes the integral term at the negative limit, and introduces an asymmetric suppression intervention state. The attenuation gain constant is calculated based on the absolute value of the temperature difference, so that the control output shows a non-linear adjustment trend with the error. This suppresses overshoot during the cooling phase and maintains response speed during the heating phase. Overall, it achieves coordinated adjustment of temperature fluctuations, load changes, and disturbance effects, improving temperature control accuracy and response stability. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the steps of the present invention;

[0032] Figure 2This is a diagram of the asymmetric suppression intervention process based on the polarity temperature error distribution range;

[0033] Figure 3 A three-dimensional statistical distribution plot for calibrating the threshold of the wafer thermal capacity mutation factor;

[0034] Figure 4 This is a surface evolution diagram of the attenuation gain constant of the nonlinear adaptive control command. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0036] Please see Figure 1-4 This invention provides a technical solution: a hot plate temperature control method based on a PID algorithm, comprising the following steps:

[0037] Based on the feedback node of the robot arm's IO signal corresponding to the semiconductor hot plate, the instantaneous cooling slope of the wafer surface is obtained, the absolute value of the instantaneous cooling slope of the wafer surface is extracted, and combined with the integral value of the thermal power output, the wafer thermal capacity mutation factor is obtained.

[0038] The wafer thermal capacity mutation factor is compared with the load threshold node to identify the wafer thermal capacity mutation factor corresponding to the load threshold node, establish the full power full load state, extract the wafer thermal capacity mutation factor associated with the full power full load state, and calculate and generate the full load duration.

[0039] The full load duration is counted in descending order. When it decreases to zero, the control loop restart state is generated. The set temperature is subtracted from the feedback temperature to obtain the field temperature difference value. The positive and negative limits are defined to obtain the polarity temperature error distribution range.

[0040] When the polarity temperature error distribution range falls into the positive limit, the conventional gain and integral accumulation process is triggered. When the polarity temperature error distribution range falls into the negative limit, the integral accumulation process is cut off and the integral term parameter is frozen, generating an asymmetric suppression intervention state. The absolute value of the field temperature difference corresponding to the asymmetric suppression intervention state is called to calculate and obtain the nonlinear adaptive control command.

[0041] The steps for obtaining the wafer thermal capacity mutation factor are as follows:

[0042] Based on the feedback node of the robot arm IO signal corresponding to the semiconductor hot plate, read the node status mark corresponding to the robot arm triggering time, lock the sampling time corresponding to the node status mark, extract the real-time surface temperature of the trigger point corresponding to the sampling time, retrieve the continuous accumulation record of thermal power output before the same sampling time, extract the final integral value of the continuous accumulation record of thermal power output corresponding to the node status mark, and pair them in order according to the same sampling time to obtain the corresponding value of the thermal power output integral of the real-time surface temperature of the trigger point.

[0043] Based on the corresponding value of the thermal power output integral of the real-time surface temperature at the trigger point, extract the continuous temperature records of the real-time surface temperature at the trigger point before and after the node state mark. Arrange the continuous temperature records in the order of sampling. Calculate the temperature change and time change at adjacent sampling times in turn. Use the temperature change to divide the time change to form the instantaneous cooling slope of the wafer surface. Extract the absolute value of the instantaneous cooling slope of the wafer surface. Call the thermal power output integral value in the corresponding value of the thermal power output integral of the real-time surface temperature at the trigger point as the denominator of the division operation to form the thermal capacity sudden change division operation parameters.

[0044] The absolute value of the instantaneous cooling slope of the wafer surface in the thermal capacity mutation division operation parameters is used as the numerator, and the integral value of the thermal power output in the thermal capacity mutation division operation parameters is used as the denominator. The quotient value corresponding to each group of division operations is recorded to obtain the wafer thermal capacity mutation factor.

[0045] Specifically, based on the feedback node of the robotic arm's I / O signal corresponding to the semiconductor hot plate, the level state of a specific I / O port associated with the robotic arm's actions is continuously polled. This I / O port is pre-configured to generate an edge-triggered signal when the robotic arm picks up or places a wafer. For example, a jump from a low level of 0V to a high level of 5V represents the robotic arm placing the wafer on the hot plate, and vice versa for picking it up. When this preset level transition is detected, the event is immediately defined as a node state marker, and the current count value of the timer is read synchronously. This count value is locked as a unique sampling moment, for example, the timestamp is recorded as 1678886400.12345 seconds. Subsequently, using this sampling moment as an index, the temperature value that perfectly matches this sampling moment is accurately extracted from the annular buffer storing real-time readings of multiple temperature sensors on the hot plate surface. This temperature value is the real-time surface temperature at the trigger point. Access a dedicated memory area for recording the history of thermal power output. This area stores the percentage or wattage of power output by the PID controller in each control cycle since the start of the current wafer heating cycle. These records are stored in time series format. Then, starting from the beginning of this historical record, perform discrete integration on all thermal power output values ​​up to the locked sampling time. Specifically, multiply the power value of each sampling point by the sampling time interval, and then accumulate all products. The final result of this accumulation is the final integral value corresponding to the continuous accumulation record of thermal power output at the node status marker. Finally, create a data structure that binds the sampling time, the real-time surface temperature at the trigger point, and the calculated final integral value, organizing and storing them in the order of the sampling times to obtain the integral value of thermal power output corresponding to the real-time surface temperature at the trigger point.

[0046] Based on the integral value corresponding to the real-time surface temperature and thermal power output at the trigger point, the timestamp of the trigger moment is first extracted from the data structure of this value. A time window is then defined centered on this timestamp, for example, a 1-second interval from 500 milliseconds before to 500 milliseconds after the trigger moment. All continuous temperature records within this time window are extracted from the buffer storing complete historical temperature data. These records contain a series of timestamps and corresponding temperature readings. Subsequently, these extracted temperature records are sorted in ascending order according to the timestamps, forming an ordered time-temperature sequence. Next, this ordered sequence is traversed, and for each pair of adjacent sampling points, i.e., points... and points Calculate the temperature change between them respectively. and time change By performing division operations A series of instantaneous temperature change slopes are calculated, and the slope value that best represents the temperature drop characteristics when the wafer is removed is selected. Specifically, the slope calculated from the two adjacent sampling points that span the trigger time of the robot arm IO signal is selected as the instantaneous cooling slope of the wafer surface. Then, the absolute value of the instantaneous cooling slope of the wafer surface is calculated to eliminate its negative sign and retain only the magnitude of its rate of change. At the same time, the previously calculated and stored integral value of thermal power output is retrieved from the corresponding value of the real-time surface temperature thermal power output obtained in the first step, and this integral value is used as the denominator of the subsequent division operation. Finally, the calculated absolute value of the instantaneous cooling slope of the wafer surface and the retrieved integral value of thermal power output are combined into a data pair to form the parameters for the thermal capacity sudden change division operation.

[0047] The thermal capacity mutation division operation parameters are invoked. These parameters are a data pair containing the absolute value of the instantaneous cooling slope of the wafer surface and the integral value of the thermal power output. The absolute value of the instantaneous cooling slope of the wafer surface, representing the rate of temperature change, is designated as the numerator of the division operation, and the integral value of the thermal power output, representing the accumulated input energy, is designated as the denominator. A division operation is performed once for each set of thermal capacity mutation division operation parameters generated by a single wafer pick-up event. This calculation process is defined by the following formula: ;in, The final calculated wafer thermal capacity mutation factor is a dimensionless value or a value with specific physical units, used to quantify the degree of abrupt change in the thermal properties of the heat sink when the load (wafer) is removed. The instantaneous cooling slope of the wafer surface. This is the first temperature sampling moment after the robot arm's I / O signal is triggered. It is the last temperature sampling moment before triggering. and These are the wafer surface temperatures measured at these two times. This is the integral value of thermal power output, representing the total heat energy accumulated from the start of heating until the wafer is picked up. It is in the Instantaneous thermal power output value at each sampling time point The total number of sampling points from the start of heating to the trigger moment is recorded as the result of the division operation, i.e., the quotient value. This quotient value is then associated with and stored with the corresponding event timestamp and control channel information. This provides a basis for subsequent load identification and control strategy adjustment. After this series of calculations and recordings, the wafer thermal capacity mutation factor characterizing a single operation is finally obtained.

[0048] The steps to obtain the full power, full load status are as follows:

[0049] Read the threshold value corresponding to the load threshold node, compare it item by item according to the output order of the wafer thermal capacity mutation factor, filter the wafer thermal capacity mutation factor that is greater than or equal to the load threshold node, record the sampling time, control channel number and power request status of the load threshold node, and write the full load trigger flag to the corresponding control channel according to the sampling time to form the threshold trigger full load heating command.

[0050] Lock the control channel number corresponding to the over-threshold trigger full-load heating command, close the current control flow write entry corresponding to the control channel number, keep the adjustment value corresponding to the control channel number from updating, write the upper limit thermal power value to the power output port, continuously monitor the output hold status of the upper limit thermal power value, and establish a full-power full-load state.

[0051] Specifically, a load threshold pre-configured in non-volatile memory is read. This threshold is not a fixed empirical value, but rather derived through statistical analysis of wafer thermal capacity mutation factors calculated from at least 100 consecutive, anomaly-free wafer pick-up events during the initial operation phase of the device. The calculation process involves first calculating the average of these 100 wafer thermal capacity mutation factors, for example, an average of 0.045. Then, the standard deviation of these samples is calculated, for example, a standard deviation of 0.006. The load threshold is then set to the sum of the average plus 2.5 times the standard deviation, i.e., 0.045 + 2.5 * 0.006 = The threshold of 0.060 represents the statistical upper limit of the degree of thermal capacity mutation under normal operation. Subsequently, the system enters continuous monitoring mode. For each newly calculated wafer thermal capacity mutation factor, its value is compared with the load threshold of 0.060. This comparison operation is performed in real time within each control cycle. Once a value of a wafer thermal capacity mutation factor greater than or equal to 0.060 is detected, for example, a value of 0.068 is detected, it is determined that an event of exceeding the load threshold node has occurred. The precise sampling time of the event is immediately triggered, for example, 1678886410.54321 seconds, the corresponding hot plate control channel number, for example, heating zone 3, and the power request status calculated by the PID control loop at this moment, for example, 45.8%, as a data packet. Based on the sampling time and control channel number recorded in this data packet, a Boolean full load trigger flag with a value of 1 is written into the control logic of the corresponding control channel. The writing of this flag constitutes an over-threshold trigger full load heating command.

[0052] The control channel number corresponding to the over-threshold trigger full-load heating command is locked, for example, heating zone 3. An interrupt request is sent to the control state machine of that channel, forcing it to enter a predefined "emergency heating" mode. In this mode, the current control flow write entry corresponding to that control channel number is first closed. Specifically, a mutex or semaphore is set to prevent the conventional PID algorithm calculation result from being written to the power regulation register of that channel. This ensures that the regulation value calculated by the proportional, integral, and derivative components, such as a value representing 46.2% power output, is maintained in the state of the last valid update and no longer changes with temperature errors. Next, bypassing all conventional control logic, a set value representing the physical upper limit, i.e., the upper limit thermal power value, is directly written to the hardware driver of the power output port bound to that control channel. For example, if the power output is generated by a 16-bit pulse width modulation (PWM)... If the signal is controlled, its maximum value of 65535 is written to the corresponding PWM duty cycle register. If it is controlled by a digital-to-analog converter (DAC), the digital value corresponding to its full scale is written, such as 4095 for a 12-bit DAC. This operation forces the physical heating element to work at 100% of its design power. To confirm the execution of the instruction, the system will continuously monitor the feedback signal associated with the power output port, such as reading the actual output current through a series current sensor and checking whether the current value is between 95% and 105% of the expected full-power operating current range. For example, if the expected full-power current is 5.0A, the actual current must be between 4.75A and 5.25A. When the above control flow write entry is closed, the upper limit thermal power value is successfully written and maintained, and the hardware feedback confirms that the output state meets expectations, all these conditions are met, which marks the establishment of the full-power full-load state.

[0053] The steps to obtain the full load duration are as follows:

[0054] Extract the wafer thermal capacity mutation factor stored at the sampling time corresponding to the full-power full-load state, establish the wafer thermal capacity mutation factor associated with the full-power full-load state, read the numerical terms corresponding to the wafer thermal capacity mutation factor associated with the full-power full-load state, write the numerical terms into the undetermined terms of the time algebraic equation according to the preset parameter positions, search the root value solution set of the time algebraic equation term by term, filter out the root values ​​that do not satisfy the duration direction, retain the node constants that satisfy the duration direction, and output the conversion according to the time length corresponding to the node constants to obtain the full-load duration.

[0055] Specifically, the wafer thermal capacity mutation factor that caused the threshold exceedance is extracted at the sampling moment when the full-power load state is reached. This factor is defined as the full-power load state-related wafer thermal capacity mutation factor, for example, with a value of 0.068. This value is read and used as a known parameter, and substituted into a preset second-order polynomial time algebraic equation for calculating the heating compensation time. The form of this equation is: , where the coefficient , , It is obtained by performing numerous calibration experiments on the equipment under different loads and environmental conditions, and by performing least squares curve fitting on the "heat capacity mutation-recovery time" data points. For example, the coefficient obtained after calibration may be... , , These coefficients are stored in the device's configuration file, and the read wafer thermal capacity mutation factor value of 0.068 is used as... Substituting into the equation, we can calculate... The calculation result is approximately 1.198 seconds. This calculation process is logically equivalent to solving for... equation The root value solution set obtained in this example has only one positive real root, 1.198. This satisfies the physical constraint that the duration must be positive, i.e., it satisfies the duration direction. Therefore, this root value is retained as a node constant. Finally, the calculated time length is converted and verified before output. For example, it is converted into the basic time unit of the control system. If the control cycle is 10 milliseconds, then 1.198 seconds corresponds to about 120 control cycles. At the same time, it is checked whether the value is within the maximum allowable full-load heating time (e.g., 5 seconds) to prevent the equipment from overheating. After confirming that there is no error, this finally determined time value of 1.198 seconds is output as the full-load duration.

[0056] The steps for obtaining the control loop restart status are as follows:

[0057] Read the remaining duration register value corresponding to the full load duration, decrease the remaining duration register value cycle by cycle according to the control cycle, record the remaining duration register value after each decrease, continuously check whether the remaining duration register value has reached the zero value node, extract the transient error constant when the remaining duration register value reaches the zero value node, write the transient error constant into the integral storage location of the control integral term, remove the control loop stall flag, open the control loop input and output terminals, and form the control loop restart state.

[0058] Specifically, a value is read from a dedicated hardware or software register for the countdown. This value represents the previously calculated full-load duration, for example, 1.198 seconds. At the beginning of each control cycle, a timer interrupt service routine subtracts a fixed amount of time equal to the control cycle length from this remaining duration register value. For example, if the control cycle is 10 milliseconds (0.01 seconds), the subtraction is 0.01 each time. After each subtraction operation, the updated remaining duration register value (e.g., from 1.198 seconds to 1.188 seconds, then to 1.178 seconds, and so on) is stored back in the same register location. Simultaneously, this subtraction process is recorded in memory, forming a time series. Immediately after each subtraction, a comparison operation is performed to check if the remaining duration register value is less than or equal to zero. This check is continuous; as long as the value is greater than zero, the subtraction and check loop continues. When the remaining duration register value is detected to reach zero for the first time or become negative, a decision is made. When the full-load duration ends, the difference between the current set temperature and the feedback temperature is immediately captured. This difference is defined as the transient error constant. For example, if the set temperature is 250℃ and the feedback temperature at the end of full-load heating is 248.5℃, then the transient error constant is 1.5℃. Subsequently, this transient error constant of 1.5℃ is used as an initial value and directly written to the accumulator storage location of the integral term in the previously stalled PID control loop. This operation is equivalent to presetting a compensation value based on the actual system response for the integral term. Next, the mutex or semaphore previously set to prevent PID updates is released, that is, the control loop stall flag is removed, and the path for inputting sensor temperature data to the PID calculation module and the path for outputting PID calculation results to the power regulation module are re-enabled. After this series of operations is completed, the PID controller resumes its normal closed-loop regulation function from a preset, non-zero integral state, forming a control loop restart state.

[0059] The steps to obtain the polarity temperature error distribution range are as follows:

[0060] Retrieve the semiconductor hot plate set temperature corresponding to the control loop restart state, retrieve the feedback temperature corresponding to the control loop restart state, subtract the feedback temperature from the semiconductor hot plate set temperature to form the field temperature difference value.

[0061] The on-site temperature difference values ​​greater than zero are assigned to the positive limit, the on-site temperature difference values ​​less than zero are assigned to the negative limit, and the on-site temperature difference values ​​equal to zero are marked as the dividing nodes between the positive and negative limits. The intervals are then sorted according to the assignment results of the positive and negative limits to obtain the polarity temperature error distribution interval.

[0062] Specifically, the system retrieves the target set temperature of the semiconductor hot plate, stored in the system's global configuration variables, at the moment the control loop restarts. This value is preset by the process flow, for example, 250.0℃. Simultaneously, it retrieves the real-time feedback temperature value from the temperature sensor in the corresponding control area on the hot plate, after conversion and filtering by an analog-to-digital converter (ADC). This value reflects the actual temperature of the hot plate surface, for example, 249.2℃. A subtraction operation is performed between these two values: subtracting the feedback temperature of 249.2℃ from the semiconductor hot plate set temperature of 250.0℃, resulting in a value of 0.8℃. This value is defined as the field temperature difference value. This calculation is performed once in each control cycle to reflect the degree and direction of the system's deviation from the set point in real time.

[0063] The calculated on-site temperature difference value, for example, 0.8℃, is compared with zero. If the value is greater than zero, it indicates that the actual temperature is lower than the set temperature, requiring heating. Therefore, it is classified into a logical boundary marked "positive". If the calculated on-site temperature difference value is -0.5℃, since it is less than zero, it indicates that the actual temperature is higher than the set temperature, indicating overshoot. Heating needs to be stopped or reduced, so it is classified into a logical boundary marked "negative". In rare cases, if the on-site temperature difference value is exactly equal to zero, that is, the actual temperature is completely consistent with the set temperature, this state is marked as a special dividing node. This node logically belongs neither to the positive nor negative boundary, but serves as the critical point for the transition between the two. Subsequently, based on the result of this classification judgment, the on-site temperature difference values ​​generated in each control cycle are classified and organized, and each value is labeled "positive", "negative", or "zero". All consecutive temperature difference values ​​with the same label are considered as an interval. For example, the temperature difference value sequence generated by multiple consecutive control cycles is [0.8, 0.6, ... [0.3, 0.1, -0.2, -0.4], the first four values ​​form a positive range, and the last two values ​​form a negative range. By segmenting and labeling the continuous temperature difference data stream in this way, a set of temperature difference ranges with polarity labels is finally obtained. This set is the polarity temperature error distribution range.

[0064] The steps for obtaining the asymmetric inhibition intervention state are as follows:

[0065] Read the interval assignment markers corresponding to the polarity temperature error distribution intervals one by one, send the interval assignment markers that fall into the positive limit to the conventional gain execution channel, open the integral accumulation execution channel, send the interval assignment markers that fall into the negative limit to the integral truncation execution channel, lock the integral storage location, and form an asymmetric suppression intervention state.

[0066] Specifically, the interval assignment flags corresponding to the polarity temperature error distribution intervals are read item by item. In a loop-executing control program, the "positive" or "negative" label attached to the current field temperature difference value is checked. When the read interval assignment flag is "positive", the program jumps to the conventional PID control logic branch, which is the conventional gain execution channel. In this channel, the update operation of the integral term of the PID controller is enabled, that is, the integral accumulation execution channel is opened. Specifically, the current field temperature difference value is multiplied by the integral gain coefficient and the control cycle duration, and then this multiplication is accumulated into the register storing the integral term. At the same time, the proportional term and the derivative term also participate in the calculation normally. The three together determine the heating power. When the output of the program reads the interval assignment marker as "negative", the program jumps to the asymmetric suppression logic branch. This branch is the integral truncation execution channel. In this channel, by setting a Boolean flag, such as "INTEGRAL_HOLD", and setting its value to "true", write operations to the integral term register are prevented, thus truncating the integral accumulation process. The value of the integral term is locked at the value just before entering the negative limit, and does not decrease or accumulate as the negative error increases. This control strategy of freezing the integral term only when the error is negative and accumulating normally when the error is positive constitutes an asymmetric response mechanism. This state is the asymmetric suppression intervention state.

[0067] The steps for obtaining nonlinear adaptive control commands are as follows:

[0068] Read the absolute value of the on-site temperature difference corresponding to the asymmetric suppression intervention state, read the characteristic cooling temperature corresponding to the asymmetric suppression intervention state, call the normalized processing result corresponding to the wafer thermal capacity mutation factor, and calculate the attenuation gain constant. The calculation formula is as follows:

[0069] ;

[0070] in, For the first The attenuation gain constant for each control cycle This is the attenuation sensitivity coefficient. To control the cycle number, For the first The absolute value of the on-site temperature difference for each control cycle. For the first The characteristic cooling temperature of each control cycle The normalized heat capacity change index is calculated using the following formula: , The wafer thermal capacity mutation factor, This serves as the baseline factor for the sudden change in heat capacity.

[0071] Write the attenuation gain constant into the gain correction port, keep the freeze flag of the integral term parameter corresponding to the asymmetric suppression intervention state continuously effective, scale the thermal power adjustment range according to the attenuation gain constant, and output the corrected thermal power adjustment result according to the control cycle corresponding to the attenuation gain constant to form a nonlinear adaptive control command.

[0072] Specifically, in the formula for calculating the attenuation gain constant, an attenuation gain constant is dynamically calculated to nonlinearly adjust the output of the PID controller. This is done when the system experiences a sudden load change (due to...). Temperature overshoot caused by quantization (by) During quantization, an inverse proportional function structure is used to generate a scaling factor between 0 and 1 based on the severity of the perturbation and error. Among them, the squared terms The introduction of this feature amplifies the suppression effect of disturbances and errors on the gain, enabling the system to quickly and effectively reduce the control gain when facing a large overshoot risk, thereby suppressing temperature overshoot. Meanwhile, the "1+" structure in the denominator ensures the gain constant. It will not exceed 1, and under conditions of no disturbance or error, When the value approaches 1, the control returns to normal.

[0073] This is the attenuation sensitivity coefficient, which is used to adjust the attenuation gain constant. For internal items The sensitivity of the signal is a dimensionless parameter that needs to be tuned based on the dynamic response characteristics of the actual hot plate system. The process for setting its value is as follows: A series of step response tests are performed on the hot plate system, that is, after removing the wafer, the results are observed and recorded at different... Under this value, the temperature overshoot and settling time when the system recovers from full-power heating to the set temperature are initially settable. The initial value is 0.5. If a significant temperature overshoot is still observed (e.g., exceeding the set temperature by 2°C), the value is gradually increased. The value of the variable (e.g., increasing by 0.1 each time) can be adjusted to enhance the suppression effect; conversely, if the system response is too slow and takes a long time to stabilize, the value should be appropriately reduced. The value is obtained by analyzing multiple sets of collected data. Analyze the "value-overshoot-set-tolerance time" data and select a point that strikes a balance between overshoot and settling time. Values, for example, were found after testing the target hot plate, when When set to 0.1, the overshoot can be controlled within 0.5℃, and the stabilization time is less than 10 seconds, meeting the process requirements. Therefore, it is selected. .

[0074] The normalized thermal capacity change index quantifies the deviation of the thermal capacity change caused by a current load (wafer removal) event from the normal condition. It is obtained by first acquiring the wafer thermal capacity change factor calculated in the aforementioned steps. And retrieve a preset heat capacity mutation benchmark factor. Then perform the division operation. Among them, the heat capacity mutation benchmark factor This data was obtained through statistical analysis during the equipment commissioning phase. The specific method involved performing at least 100 standard wafer pick-up operations consecutively under stable process conditions, and calculating the wafer thermal capacity mutation factor corresponding to each operation. A sample set is formed, and then the average value of the sample set is calculated. This average value is then used as the benchmark factor for heat capacity mutation. Storage, for example, obtaining the wafer thermal capacity mutation factor of the current event through the aforementioned steps. The value was 0.068, while the baseline factor for heat capacity mutation was obtained through statistics of 100 normal operations. The set value is 0.045, then the calculated value is... .

[0075] For the first The absolute value of the on-site temperature difference for each control cycle is directly derived from the aforementioned step of "subtracting the feedback temperature from the semiconductor hot plate set temperature to form the on-site temperature difference value," and is updated in real time during each control cycle. It reflects the absolute magnitude of the deviation between the current system's actual temperature and the set temperature, expressed in degrees Celsius (°C). When entering the asymmetric suppression intervention state (i.e., the on-site temperature difference is negative), the absolute value of this negative temperature difference is read as... For example, in the first In one control cycle, if the set temperature is 250.0℃ and the feedback temperature is 250.5℃, then the on-site temperature difference is -0.5℃, and its absolute value is... That is, 0.5℃.

[0076] For the first The characteristic cooling temperature per control cycle is the characteristic temperature drop of the heat sink due to natural heat dissipation within a single control cycle, expressed in degrees Celsius (°C). This definition ensures its consistency with... The dimensions are consistent, thus making the ratio As a dimensionless quantity, it is obtained as follows: During the system calibration phase, the hot plate is heated to a typical operating set temperature (e.g., 250°C) and stabilized. Then, the heating power output is completely turned off. From this point onwards, the sampling period of the control system (e.g., ...) is used. The system continuously records temperature readings (in milliseconds), calculates the temperature drop within each sampling period, and uses the average of these drops as the characteristic cooling temperature. The temperature is stored in the system parameters. For example, if the temperature drops from 250.00℃ to 249.90℃ within the first 50 milliseconds after power is off, the temperature drop in that cycle is 0.1℃. Repeat the measurement multiple times and take the average value to obtain the characteristic cooling temperature. The setting value is 0.1℃.

[0077] Calculations based on parameters:

[0078] In the For each control cycle, based on the parameter acquisition steps described above, the specific values ​​of each parameter are obtained:

[0079] Attenuation sensitivity coefficient ,

[0080] Wafer thermal capacity mutation factor ,

[0081] Thermal capacity mutation benchmark factor ,

[0082] Absolute value of on-site temperature difference ℃,

[0083] Characteristic cooling temperature ℃.

[0084] First, calculate the normalized heat capacity change index. :

[0085] ;

[0086] Then, substitute all parameters into the formula for calculating the attenuation gain constant:

[0087] ;

[0088] ;

[0089] This result indicates that, in the current control cycle, the calculated attenuation gain constant... The value is approximately 0.149, a dimensionless value much less than 1. This means that the controller's output gain will be significantly reduced to about 14.9% of its original value. The magnitude of this value reflects the suppression strength; the closer the value is to 0, the stronger the suppression effect, and vice versa. The current result of 0.149 indicates that due to the detection of a significant thermal capacity mutation event and the resulting temperature overshoot, the system determines that strong intervention is required. This involves rapidly suppressing further temperature rise by significantly reducing the adjustment range of the heating power to prevent it from deviating significantly from the set value.

[0090] The calculated attenuation gain constant, for example 0.149, is written to a dedicated gain correction port register in the PID controller parameter structure. Simultaneously, the integral term parameter freeze flag (INTEGRAL_HOLD) set when entering the asymmetric suppression intervention state is maintained at "true". In the PID calculation of the current control cycle, the control algorithm first reads this freeze flag to confirm that the integral term does not participate in accumulation and directly uses its frozen value. Then, the algorithm reads the gain correction port value of 0.149 and scales the thermal power adjustment amplitude accordingly. Specifically... The proportional and derivative outputs calculated by the conventional PID algorithm are added together to obtain a dynamic adjustment value. This dynamic adjustment value is then multiplied by the attenuation gain constant 0.149. Finally, this scaled dynamic adjustment value is added to the frozen integral term value to obtain the final power output value. This power output value obtained after nonlinear scaling and integral freezing is the corrected thermal power adjustment result based on the control cycle output corresponding to the attenuation gain constant. This result, as a specific value, such as representing the PWM setpoint with a 25% duty cycle, is written into the register of the power drive hardware to form a nonlinear adaptive control instruction.

[0091] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention in any other way. Any person skilled in the art may make changes or modifications to the above-disclosed technical content to create equivalent embodiments that can be applied to other fields. However, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the protection scope of the present invention.

Claims

1. A method for controlling the temperature of a hot plate based on a PID algorithm, characterized in that, Includes the following steps: Based on the feedback node of the robotic arm IO signal corresponding to the semiconductor hot plate, the instantaneous cooling slope of the wafer surface is obtained, the absolute value of the instantaneous cooling slope of the wafer surface is extracted, and combined with the integral value of the thermal power output, the wafer thermal capacity mutation factor is obtained. The wafer thermal capacity mutation factor is compared with the load threshold node, the wafer thermal capacity mutation factor corresponding to the load threshold node is identified, a full-power full-load state is established, the wafer thermal capacity mutation factor associated with the full-power full-load state is extracted, and the full-load duration is calculated and generated. The full load duration is counted down, and when it decreases to zero, a control loop restart state is generated. The set temperature is subtracted from the feedback temperature to obtain the field temperature difference value. The positive and negative limits are defined to obtain the polarity temperature error distribution range. When the polarity temperature error distribution range falls into the positive limit, the conventional gain and integral accumulation process is triggered. When the polarity temperature error distribution range falls into the negative limit, the integral accumulation process is cut off and the integral term parameter is frozen, generating an asymmetric suppression intervention state. The absolute value of the field temperature difference corresponding to the asymmetric suppression intervention state is called to calculate and obtain the nonlinear adaptive control command.

2. The hot plate temperature control method based on PID algorithm according to claim 1, characterized in that, The steps for obtaining the wafer thermal capacity mutation factor are as follows: Based on the feedback node of the robot arm IO signal corresponding to the semiconductor hot plate, read the node status mark corresponding to the robot arm triggering time, lock the sampling time corresponding to the node status mark, extract the real-time surface temperature of the trigger point corresponding to the sampling time, retrieve the continuous accumulation record of thermal power output before the same sampling time, extract the final integral value of the continuous accumulation record of thermal power output corresponding to the node status mark, and pair them in order according to the same sampling time to obtain the corresponding value of the thermal power output integral of the real-time surface temperature of the trigger point. Based on the corresponding value of the thermal power output integral of the real-time surface temperature at the trigger point, the continuous temperature records of the real-time surface temperature at the trigger point before and after the node state mark are extracted. The continuous temperature records are arranged in the order of sampling. The temperature change and time change at adjacent sampling times are calculated in turn. The instantaneous cooling slope of the wafer surface is formed by dividing the temperature change by the time change. The absolute value of the instantaneous cooling slope of the wafer surface is extracted. The thermal power output integral value in the corresponding value of the thermal power output integral of the real-time surface temperature at the trigger point is used as the denominator of the division operation to form the thermal capacity change division operation parameter. The absolute value of the instantaneous cooling slope of the wafer surface in the thermal capacity mutation division operation parameters is used as the numerator, and the integral value of the thermal power output in the thermal capacity mutation division operation parameters is used as the denominator. The quotient value corresponding to each group of division operations is recorded to obtain the wafer thermal capacity mutation factor.

3. The hot plate temperature control method based on PID algorithm according to claim 1, characterized in that, The steps for obtaining the full-power, full-load state are as follows: Read the threshold value corresponding to the load threshold node, compare it item by item according to the output order of the wafer thermal capacity mutation factor, filter the wafer thermal capacity mutation factor that is greater than or equal to the load threshold node, record the sampling time, control channel number and power request status of the load threshold node, and write the full load trigger flag to the corresponding control channel according to the sampling time to form the threshold trigger full load heating command. Lock the control channel number corresponding to the threshold-triggered full-load heating command, close the current control flow write entry corresponding to the control channel number, keep the adjustment value corresponding to the control channel number from updating, write the upper limit thermal power value to the power output port, continuously monitor the output hold status of the upper limit thermal power value, and establish a full-power full-load state.

4. The hot plate temperature control method based on PID algorithm according to claim 1, characterized in that, The steps for obtaining the full load duration are as follows: Extract the wafer thermal capacity mutation factor stored at the sampling time corresponding to the full-power full-load state, establish the wafer thermal capacity mutation factor associated with the full-power full-load state, read the numerical terms corresponding to the wafer thermal capacity mutation factor associated with the full-power full-load state, write the numerical terms into the undetermined terms of the time algebraic equation according to the preset parameter positions, search the root value solution set of the time algebraic equation term by term, filter out the root values ​​that do not satisfy the duration direction, retain the node constants that satisfy the duration direction, and perform output conversion according to the time length corresponding to the node constants to obtain the full-load duration.

5. The hot plate temperature control method based on PID algorithm according to claim 1, characterized in that, The steps for obtaining the restart status of the control loop are as follows: Read the remaining duration register value corresponding to the full load duration, decrease the remaining duration register value period by period according to the control cycle, record the remaining duration register value after each decrease, continuously check whether the remaining duration register value has reached the zero value node, extract the transient error constant when the remaining duration register value reaches the zero value node, write the transient error constant into the integral storage location of the control integral term, remove the control loop stall flag, open the control loop input and output terminals, and form the control loop restart state.

6. The hot plate temperature control method based on PID algorithm according to claim 1, characterized in that, The steps for obtaining the polarity temperature error distribution range are as follows: The semiconductor hot plate set temperature corresponding to the restart state of the control loop is retrieved, and the feedback temperature corresponding to the restart state of the control loop is retrieved. The semiconductor hot plate set temperature is subtracted from the feedback temperature to form the on-site temperature difference value. The on-site temperature difference values ​​greater than zero are assigned to the positive limit, the on-site temperature difference values ​​less than zero are assigned to the negative limit, and the on-site temperature difference values ​​equal to zero are marked as the dividing nodes between the positive and negative limits. The intervals are then sorted according to the assignment results of the positive and negative limits to obtain the polarity temperature error distribution interval.

7. The hot plate temperature control method based on PID algorithm according to claim 1, characterized in that, The steps for obtaining the asymmetric inhibition intervention state are as follows: The interval assignment markers corresponding to the polarity temperature error distribution intervals are read one by one. The interval assignment markers that fall into the positive limit are sent to the conventional gain execution channel, the integral accumulation execution channel is opened, the interval assignment markers that fall into the negative limit are sent to the integral truncation execution channel, the integral storage position is locked, and an asymmetric suppression intervention state is formed.

8. The hot plate temperature control method based on PID algorithm according to claim 1, characterized in that, The steps for obtaining the nonlinear adaptive control command are as follows: Read the absolute value of the on-site temperature difference corresponding to the asymmetric suppression intervention state, read the characteristic cooling temperature corresponding to the asymmetric suppression intervention state, call the normalization processing result corresponding to the wafer thermal capacity mutation factor, and calculate the attenuation gain constant. The attenuation gain constant is written into the gain correction port, the freeze flag of the integral term parameter corresponding to the asymmetric suppression intervention state is kept valid, the thermal power adjustment amplitude is scaled according to the attenuation gain constant, and the corrected thermal power adjustment result is output according to the control cycle corresponding to the attenuation gain constant, forming a nonlinear adaptive control command.

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