Code generation method and device of parameterization unit, computer device, readable storage medium and program product

Abstract

The application relates to a code generation method and device of a parameterized unit, computer equipment, a readable storage medium and a program product. The method comprises the following steps: acquiring requirement information for designing the parameterized unit; performing semantic analysis and function reasoning on the requirement information to determine code editing description; writing function code corresponding to a function module in a logic unit corresponding to the code editing description to generate initial editing code corresponding to the code editing description; performing instantiation processing on the initial editing code to convert the initial editing code into a structured graph; verifying a spatial relationship between graph objects corresponding to each function module in the structured graph, and correcting the initial editing code when an exception occurs to obtain target editing code. Therefore, efficient code generation is achieved, the code generation efficiency and reliability are improved, and the manual intervention and design cost are reduced.

Description

Technical Field

[0001] This application relates to the field of integrated circuit design technology, and in particular to a method, apparatus, computer device, readable storage medium, and program product for generating code for parameterized units. Background Technology

[0002] As integrated circuit process nodes continue to evolve and the design complexity of integrated circuits increases exponentially, the parameterization unit, as a core intelligent module connecting circuit logic and physical layout, is becoming increasingly important in achieving design automation, ensuring process compliance, and improving chip performance.

[0003] However, the creation and maintenance of existing parameterized units rely heavily on professional script programming and deep set feature tree editing, which leads to increasingly prominent problems such as tight coupling between logic and set implementation, high difficulty in modification, and high susceptibility to errors. These issues have become core technical problems restricting the efficiency of integrated circuit design iteration and the speed of process migration. Summary of the Invention

[0004] Based on this, a method, apparatus, computer device, readable storage medium, and program product for generating parameterized units are provided, which can improve code generation efficiency and reliability and reduce manual intervention and design costs.

[0005] Firstly, this application provides a method for generating code for parameterized units, including:

[0006] Obtain requirement information, including the design of parameterized units;

[0007] Semantic analysis and functional reasoning are performed on the requirement information to determine the code editing description; wherein, the code editing description is used to describe the execution steps required to implement at least one functional module corresponding to the requirement information;

[0008] Write the functional code corresponding to the functional module into the logical unit corresponding to the code editing description, and generate the initial editing code corresponding to the code editing description;

[0009] The initial editing code is instantiated to convert it into a structured graph; the structured graph includes the graphical object corresponding to the instance processing of each functional module.

[0010] The spatial relationships between the graphical objects corresponding to each functional module in the structured graph are verified, and in case of anomalies, the initial editing code is corrected to obtain the target editing code.

[0011] In one embodiment, the steps of performing semantic analysis and functional reasoning on the requirements information to determine the code editing description include:

[0012] Input the requirement information into the preset large language model;

[0013] Based on a large language model, semantic analysis is performed on the requirement information to obtain key information corresponding to the requirement information; among which, the key information is the key information annotated with the requirement information input by the user.

[0014] Based on the pre-defined annotations and key information in the large language model, functional reasoning is performed on the requirement information, and a code editing description is output.

[0015] In one embodiment, the step of writing functional code corresponding to a functional module into the logical unit corresponding to the code editing description and generating initial editing code corresponding to the code editing description includes:

[0016] Each functional module in the code editing description is parsed and converted into a logical unit executable by the target programming language;

[0017] Based on the original parameters of the parameterized unit referenced in the code editing description, the functional code corresponding to the logic unit is dynamically generated;

[0018] Based on the context of the code editing description, the functional code is written into the logical node position in the corresponding logical unit of the code editing description to obtain the initial editing code.

[0019] In one embodiment, the step of instantiating the initial edit code to convert it into a structured graph includes:

[0020] The initial edited code is run using preset test cases to obtain test parameter values; the test cases include test cases for each functional module corresponding to the requirement information;

[0021] Calculate the coordinate information corresponding to each functional module in the initial edit code based on the test parameter values;

[0022] The structured graph is determined by creating a graphical object based on the coordinate information corresponding to each functional module.

[0023] In one embodiment, the steps of verifying the spatial relationships between the graphic images corresponding to each functional module in the structured graph, and correcting the initial editing code to obtain the target editing code in case of anomalies, include:

[0024] The presence of abnormal states in the structured graph is determined based on the positional relationships and connection logic of the various graphic objects in the structured graph; the structured graph includes multiple graphic objects, each of which corresponds to a functional module in the initial editing code;

[0025] If an abnormal state exists in the structured graph, semantic parsing is performed on the structured graph to identify the target abnormal features in the structured graph; where the target abnormal features are the abnormal feature content described semantically.

[0026] Determine the correction parameters for correcting the target's abnormal features;

[0027] Based on the correction parameters, the functional code in the target logic unit in the initial edit code is corrected to obtain the target edit code; where the target logic unit is the logic unit in which the target abnormal feature appears.

[0028] In one embodiment, the step of determining the correction parameters for correcting the target anomaly features includes:

[0029] Map the target anomaly features from the semantic space to the geometric transformation operation in the code space, and determine the anomaly geometric parameters corresponding to the target anomaly features;

[0030] Based on the abnormal geometric parameters, the target displacement amount that restores the target abnormal features is determined, and the correction parameters are obtained.

[0031] Secondly, this application also provides a code generation apparatus for parameterized units, comprising:

[0032] The acquisition module is used to acquire requirement information, including the design of parameterized units;

[0033] A determination module is used to perform semantic analysis and functional reasoning on the requirement information to determine the code editing description; wherein, the code editing description is used to describe the execution steps required to implement at least one functional module corresponding to the requirement information;

[0034] The writing module is used to write the functional code corresponding to the functional module into the logical unit corresponding to the code editing description, and generate the initial editing code corresponding to the code editing description.

[0035] The processing module is used to instantiate the initial editing code and convert it into a structured graph; the structured graph includes the graphical object corresponding to the instance processing of each functional module.

[0036] The verification and correction module is used to verify the spatial relationships between the graphic objects corresponding to each functional module in the structured graph, and to correct the initial editing code in case of an anomaly, so as to obtain the target editing code.

[0037] Thirdly, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the code generation method for the parameterized unit of the first aspect.

[0038] Fourthly, this application also provides a readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the code generation method for the parameterized unit of the first aspect.

[0039] Fifthly, this application also provides a program product, including a computer program that, when executed by a processor, implements the steps of the code generation method for the parameterized unit of the first aspect.

[0040] The aforementioned method, apparatus, computer device, readable storage medium, and program product for generating code for parameterized units achieve efficient code generation by: acquiring requirement information for designing the parameterized unit; performing semantic analysis and functional reasoning on the requirement information to determine a code editing description; wherein the code editing description describes the execution steps required to implement at least one functional module corresponding to the requirement information; writing functional code corresponding to the functional module into the logical unit corresponding to the code editing description to generate initial editing code corresponding to the code editing description; instantiating the initial editing code to convert it into a structured graph; wherein the structured graph includes graphical objects corresponding to the instantiation of each functional module; verifying the spatial relationships between the graphical objects corresponding to each functional module in the structured graph, and correcting the initial editing code in case of anomalies to obtain the target editing code. Thus, by acquiring requirement information, performing semantic analysis and functional reasoning to determine the code editing description, generating initial editing code, instantiating it into a structured graph, verifying and correcting spatial relationships, efficient code generation is achieved, improving code generation efficiency and reliability, and reducing manual intervention and design costs. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 A flowchart illustrating the first embodiment of the code generation method for parameterized units;

[0043] Figure 2 A flowchart illustrating the second embodiment of the code generation method for parameterized units;

[0044] Figure 3 A flowchart illustrating the third embodiment of the code generation method for parameterized units;

[0045] Figure 4A flowchart illustrating the fourth embodiment of the code generation method for parameterized units;

[0046] Figure 5 A flowchart illustrating the fifth embodiment of the code generation method for parameterized units;

[0047] Figure 6 A schematic diagram of a scenario for code generation methods for parameterized units;

[0048] Figure 7 This is a schematic diagram of another scenario for code generation methods for parameterized units;

[0049] Figure 8 A schematic diagram of the structure of a code generation device for a parameterized unit in one embodiment;

[0050] Figure 9 This is a schematic diagram of the internal structure of a computer device in one embodiment. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0052] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0053] Traditional parametric cell editing processes suffer from inefficiency, poor reliability, and high costs. Specifically, the process heavily relies on manual trial and error and iteration, leading to low development efficiency; the quality of design results is affected by the engineer's individual experience and programming skills, making reliability difficult to guarantee; furthermore, the demand for multi-skilled personnel drives up R&D costs.

[0054] Furthermore, when using large language models for code generation, the lack of high-quality code datasets for specific process libraries makes it difficult for the models to learn parameterized rules; and the inherent sequential text generation characteristics of large language models make them lack spatial awareness of layout, unable to intuitively understand hierarchical occlusion, design rule checks of spacing and alignment constraints, which may result in the generated code being physically unusable.

[0055] For example, at the 28nm process node, engineers need to add gate bias functionality to the parameterization unit of an NMOS transistor. Engineers start with existing code templates and develop the design through a cycle of editing plan generation, code modification, layout instantiation, and verification. Furthermore, when using a large language model, the generated code syntax is correct, but after instantiation, the spacing between the metal layer and the polysilicon layer in the layout is verified to violate design rule checks. Due to the lack of a real-time spatial relationship verification mechanism, the error is manually identified and corrected by engineers, a process that needs to be repeated multiple times, extending the design cycle.

[0056] If the above problems are not addressed, the editing process of parameterized units will remain inefficient, the number of design iterations will increase, and chip design schedules may be delayed; design reliability will be reduced, potential design rule errors will be introduced, and the risk of tape-out failure will be increased; at the same time, high-end human resources will be excessively consumed in basic code debugging, hindering the improvement of design automation levels, and thus affecting the overall development of the semiconductor industry.

[0057] It should be noted that a parameterized unit is a program script that can automatically generate an integrated circuit physical layout that conforms to specific design rules based on preset input parameters. The parameterized unit is the core module for realizing layout design automation and improving design reusability.

[0058] Based on this, this embodiment proposes a code generation method for parameterized units. In one embodiment, such as... Figure 1 As shown, the method includes steps 11 to 15, wherein:

[0059] Step 11: Obtain the requirements information, including the design of the parameterized unit.

[0060] The requirements information may include specific requirements and specifications for designing or modifying the parametric unit. The requirements information is usually presented in the form of natural language text and may include descriptive information on functions, performance, geometric dimensions, and topology.

[0061] As one implementation method, the requirement information may include a capacitor code template designed by the user or designer for the parameterized unit, as well as editing requirements for modifying or editing the capacitor code template. These editing requirements may be descriptive text describing the user's modifications or adjustments to the functions and structure of the capacitor code template corresponding to the parameterized unit. After determining the first requirement information, including the capacitor code template and editing requirements, the capacitor code template can be further modified according to the editing requirements to obtain the parameterized unit code corresponding to the first requirement information.

[0062] As another implementation, the requirement information can include design information for the parametric unit. This requirement information can consist solely of design information for the parametric unit, which can be descriptive information regarding functionality, performance, geometry, and topology during the design process. After determining the second requirement information, which includes design information, the parametric unit can be further designed based on this information to obtain the parametric unit code corresponding to the second requirement information.

[0063] For example, requirement information can be manually entered by the user through a text input interface, such as typing a detailed description of the parameterized unit in a text box. Alternatively, requirement information can be obtained by importing a configuration file in a preset format, such as reading structured design parameters from an XML or JSON file.

[0064] Furthermore, this requirement information can also be converted into a textual description of the user's voice commands using speech recognition technology.

[0065] Step 12: Perform semantic analysis and functional reasoning on the requirement information to determine the code editing description.

[0066] The code editing description can be used to describe the execution steps required to implement at least one functional module corresponding to the requirement information.

[0067] Here, the code editing description can be the result of functional reasoning after semantic analysis of the requirement information. The code editing description, in a structured manner, describes the execution steps and parameters required to implement at least one functional module corresponding to the requirement information. The code editing description is used to describe the execution steps required to implement at least one functional module corresponding to the requirement information.

[0068] It should be noted that semantic analysis of requirement information enables a deeper understanding of it. Specifically, by identifying keywords, phrases, and syntactic structures, key information related to the design intent can be extracted. Furthermore, based on semantic analysis, the functional modules required to implement the key information corresponding to the requirement information, as well as the interrelationships and execution logic between these modules, can be derived from the key information identified in the requirement information.

[0069] In one implementation, key terms and phrases can be extracted from the requirements information based on preset keyword matching rules and a syntax analyzer. Functional mapping can then be performed based on this information to generate code editing descriptions. For example, when the requirements information includes "create inverter," the key information of "create" and "inverter" can be identified, and the corresponding functional modules can be inferred based on this key information.

[0070] As another implementation method, a template-based approach can be used to populate specific parameters or functional descriptions from the requirements information into a predefined code editing description template to construct a preliminary code editing description.

[0071] Step 13: Write the functional code corresponding to the required functional module into the logical unit corresponding to the code editing description, and generate the initial editing code corresponding to the code editing description.

[0072] The initial edit code can refer to the preliminary code version generated after writing functional code into the corresponding logical unit according to the code editing description.

[0073] Here, a functional module refers to an independent functional unit that constitutes a parametric unit. Each functional module is responsible for implementing a specific design task and can be used to generate a specific layout structure.

[0074] It should be noted that a logical unit can refer to the smallest parsable and executable code block or program structure in a code editing description, which can be used to carry the specific implementation logic of a functional module. Functional code can refer to the programming language code written in the logical unit to implement a specific functional module, such as SKILL, Python, etc.

[0075] In one implementation, a library of functional code snippets can be maintained. Based on the functional modules identified in the code editing description, a matching functional code snippet is retrieved from the library and selected, then inserted into the corresponding logic unit. For example, for the functional module "create inverter", the system can select a SKILL code snippet from the library to generate the inverter layout.

[0076] As another implementation method, a rule-based code generator can be used to dynamically generate functional code based on the rules and parameters defined in the code editing description and write it into the logic unit.

[0077] Step 14: Instantiate the initial editing code to convert it into a structured graph.

[0078] The structured graph can include the graphical object corresponding to each functional module instance.

[0079] It should be noted that a structured graph can be a representation of the design logic and physical layout of parametric units obtained through instantiation. A structured graph can include multiple graphical objects, each of which corresponds to a functional module.

[0080] Here, a graphical object refers to a visual element in a structured graph that represents a functional module. It can display information such as the shape, size, position, and connection relationships of the functional module.

[0081] It should be further explained that the instantiation process can transform the initial edited code into a visual, structured graph. This is usually done by running the functional code in the logical unit corresponding to each functional module and parsing the results after running to generate a graphical representation of the physical or logical layout of each functional module in the initial edited code.

[0082] One implementation approach involves parsing the initial code and drawing rectangles and corresponding execution paths based on the geometric instructions defined in the code, creating corresponding graphical objects in the graphics rendering engine. For example, if the code defines the size and position of a transistor, a graphical representation of that transistor can be drawn on the graphical interface.

[0083] As another implementation, the initial editing code can be executed in a simulation environment, and intermediate geometric data or layout information generated during the code execution can be captured. Then, based on this data, at least one graphic object corresponding to at least one functional module in the structured graph can be generated to obtain the structured graph.

[0084] Step 15: Verify the spatial relationships between the graphic objects corresponding to each functional module in the structured graph, and correct the initial editing code in case of an anomaly to obtain the target editing code.

[0085] The target edit code can refer to the final code version obtained by correcting the initial edit code after anomalies are found during spatial relationship verification. The target edit code can be a layout that meets design requirements and is free of physical defects.

[0086] It should be noted that verifying the spatial relationships between the graphic objects corresponding to each functional module in the structured graph can be done by confirming the relative positions of each graphic object in the structured graph, the spacing between every two graphic objects, whether different graphic objects are aligned, and the connection logic corresponding to the functional modules, so as to ensure that the target editing code corresponding to the structured graph conforms to the design rules and expected layout.

[0087] In one implementation, a series of design rules can be preset, such as minimum spacing and alignment constraints. Then, a geometric algorithm is used to check whether each graphic object in the structured graph violates these rules. For example, it checks whether the spacing between two adjacent transistors is less than the minimum value specified by the process. If the spacing between two adjacent transistors is less than the specified minimum value, an anomaly is detected. In the case of an anomaly, the logic unit or parameter that caused the anomaly in the initial code editing can be modified according to a preset correction strategy.

[0088] As another implementation method, when an abnormal spatial relationship is detected, the user can be prompted to make manual corrections. The user can adjust the initial editing code based on the graphical feedback until the spatial relationship between the graphical objects meets the requirements.

[0089] As a specific implementation method, this embodiment will be described. Suppose that user A needs to design a parameterized unit to generate a layout containing two N-type metal-oxide-semiconductor field-effect transistors (NMOS) and one P-type metal-oxide-semiconductor field-effect transistor (PMOS) connected in series, and requires that the width of the NMOS be W1 and the width of the PMOS be W2.

[0090] First, obtain the requirement information input by user A. For example, user A inputs through the text interface: "Generate a parameterized cell containing two NMOS and one PMOS in series, with the NMOS width being W1 and the PMOS width being W2."

[0091] Next, semantic analysis and functional reasoning were performed on the requirement information to identify key information such as "NMOS", "PMOS", "series", "width W1", and "width W2". Functional reasoning based on this key information determined that three functional modules were needed: "NMOS module 1", "NMOS module 2", and "PMOS module 1". The topology of NMOS module 1 connected in series with NMOS module 2 and then connected to PMOS module 1, as well as their respective width parameters, were deduced. From this, a code editing description was generated, for example: "1. NMOS1 (W=W1); 2. NMOS2 (W1); 3. PMOS1 (W=W2)".

[0092] Subsequently, the functional code corresponding to the functional module is written into the logic unit corresponding to the code editing description, generating the initial editing code. Specifically, according to the code editing description, SKILL code for creating an NMOS layout is generated for "NMOS Module 1," and its width parameter is set to W1; code for creating an NMOS layout is generated for "NMOS Module 2," and its width parameter is set to W1, while considering its series connection with NMOS Module 1; code for creating a PMOS layout is generated for "PMOS Module 1," and its width parameter is set to W2, while considering its connection with NMOS Module 2. These functional codes are written into the corresponding logic units, collectively constituting the initial editing code.

[0093] Then, the initial editing code is instantiated to convert it into a structured graph. Specifically, the initial editing code can be executed to generate graphical objects of NMOS Module 1, NMOS Module 2, and PMOS Module 1 on the graphical interface based on the geometric information defined in the code. The graphical objects can be drawn according to the size and relative position specified in the code to form a visual layout.

[0094] Finally, the spatial relationships between the graphic objects corresponding to each functional module in the structured graphic are verified. Specifically, the spacing, alignment, and connections between the graphic objects of NMOS module 1, NMOS module 2, and PMOS module 1 are checked to ensure they conform to the preset process design rules. For example, it may be found that the spacing between the metal interconnects between NMOS module 2 and PMOS module 1 is too small, constituting a violation of the design rules. If this anomaly is detected, the abnormal characteristics of the structured graphic can be identified, and it can be determined that the spacing between them needs to be increased to repair the structured graphic.

[0095] Furthermore, based on the correction parameters, the code lines controlling the position of NMOS module 2 or PMOS module 1 in the initial editing code can be automatically modified. For example, the X coordinate of the position of NMOS module 2 or PMOS module 1 can be adjusted, or a spacing adjustment function can be inserted between the positions of NMOS module 2 or PMOS module 1, thereby obtaining the target editing code.

[0096] The aforementioned method for generating parameterized unit code significantly improves efficiency and reliability in the field of semiconductor electronic design automation by introducing an automated, closed-loop parameterized unit code generation process. In the example above, user A's requirements can be automatically fulfilled by the system, from semantic understanding and functional code generation to layout instantiation and error correction. This contrasts sharply with the inefficient model in existing technologies where engineers need to manually write large amounts of code, repeatedly perform layout instantiation, and conduct manual DRC checks.

[0097] Specifically, in existing technologies, engineers need to manually write SKILL or Python code to define the geometry, size, and interconnections of NMOS and PMOS according to requirements, and repeatedly run the code to generate the layout, and then perform DRC checks using EDA tools. Once a DRC error is found, engineers need to manually modify the code, regenerate the layout, and check again, which is time-consuming and error-prone.

[0098] This embodiment achieves automated conversion from natural language description to structured code editing description by performing semantic analysis and functional reasoning on the requirement information, reducing the need for manual understanding and planning. Secondly, by instantiating the initial editing code into a structured graph and automating the verification of spatial relationships between graphical objects, it compensates for the shortcomings of existing large language models in terms of physical layout spatial perception. Furthermore, by verifying the geometric structured graph, it enables error correction of the editing code. For example, in the above example, the system can automatically detect abnormal spacing between NMOS module 2 and PMOS module 1 and automatically correct the initial editing code, avoiding the tedious process of manual inspection and modification in traditional methods.

[0099] Therefore, the method in this embodiment not only improves the development efficiency of parameterized units and reduces the reliance on engineers' experience, but also achieves error correction of edited code by verifying the structured graphics of the geometry, ensuring the physical implementation usability of the generated layout, thereby significantly improving the reliability of the design results.

[0100] In some of the embodiments described above in this application, semantic analysis and functional reasoning of requirement information are proposed to determine the code editing description. However, in practice, requirement information is often presented in natural language, which may have problems such as non-standard expression, semantic ambiguity, or large amount of information. This makes it difficult for traditional analysis methods to accurately and efficiently extract key information and perform effective functional reasoning, thereby affecting the quality and efficiency of subsequent code editing description generation.

[0101] Based on this, this embodiment further proposes a method for generating code for parameterized units, such as... Figure 2 As shown, in an exemplary embodiment, a refined version of step 12 specifically includes steps 121 to 123, wherein:

[0102] Step 121: Input the requirement information into the preset large language model.

[0103] It should be noted that large language models can understand, generate, and process natural language. Their powerful natural language processing capabilities can be leveraged to perform preliminary understanding and processing of complex and diverse requirement information. For example, requirement information can be directly input as a text string into the large language model's Application Programming Interface (API) or a locally deployed model.

[0104] In addition, the requirement information can be preprocessed, such as removing irrelevant characters, word segmentation, and part-of-speech tagging, and then the processed information can be input into the large language model to improve the accuracy of understanding the requirement information.

[0105] Step 122: Based on the large language model, perform semantic analysis on the requirement information to obtain the key information corresponding to the requirement information.

[0106] Among them, key information refers to the key information that is annotated with the user's input requirements.

[0107] Here, key information refers to elements in the requirements information that are crucial to the parametric unit design, such as functional requirements, constraints, inputs and outputs.

[0108] It should be noted that semantic analysis of requirement information can be performed based on a large language model to understand the meaning and intent of the textual content. Through semantic understanding mechanisms, the large language model can identify and extract key information and annotate it, thus structuring the key information in the requirement information. For example, the large language model can be prompted to perform a named entity recognition task, identifying entities (e.g., "gear", "motor", "size") and their attributes (e.g., "diameter 100mm", "speed 1000rpm") in the requirement information, and marking the identified entities and attributes as key information. Alternatively, the large language model can also perform a relation extraction task, identifying the relationships between key information (e.g., "gear drives motor"), and incorporating these relationships into the labeled key information.

[0109] Step 123: Based on the pre-defined annotation information and key information in the large language model, perform functional reasoning on the requirement information and output the code editing description.

[0110] The preset annotation information can include domain knowledge, design patterns, and code templates.

[0111] In one implementation, the functional modules and their execution steps required to fulfill the requirements can be inferred based on identified key information and pre-defined knowledge. Specifically, the large language model can combine pre-defined knowledge and extracted key information to generate code editing descriptions that describe the execution steps of the functional modules.

[0112] For example, large language models can be trained or fine-tuned to map key information to predefined functional modules and operation sequences, thereby generating code editing descriptions. Pre-defined annotation information can serve as the contextual knowledge base of the large language model. As another example, large language models can leverage their generative capabilities to directly generate pseudocode or structured text describing the execution steps of functional modules, based on key information and pre-defined programming standards or API documentation, serving as code editing descriptions.

[0113] This application embodiment inputs user-expressed requirements in natural language into a pre-defined large language model. Leveraging the powerful natural language understanding capabilities of the large language model, it performs in-depth semantic analysis of the requirements, accurately identifying and extracting key information corresponding to the requirements. Subsequently, the large language model combines pre-defined annotation information and the extracted key information to perform intelligent functional reasoning, transforming abstract requirements into structured code editing descriptions. This enables the system to efficiently and accurately convert high-level design requirements into executable code specifications, overcoming the limitations of traditional methods in handling complex and ambiguous natural language requirements. It provides clear and precise input for subsequent initial code generation, significantly improving the automation level and accuracy of parametric unit code generation.

[0114] The above technical solutions can effectively handle complex, ambiguous, or information-rich requirements in natural language form. The powerful natural language understanding capabilities of the large language model can accurately identify and extract key information from the requirements, and combine this with pre-defined annotation information for intelligent functional reasoning, thereby generating high-quality code editing descriptions. This significantly improves the accuracy and automation of the conversion from user requirements to code editing descriptions, reduces human intervention and comprehension bias, and ultimately enhances the overall efficiency and reliability of parameterized unit code generation.

[0115] In some of the above implementations, a step is proposed to write functional code corresponding to the functional module into the logical unit corresponding to the code editing description to generate initial editing code. However, in practical applications, how can we ensure that the generated functional code can accurately adapt to the original parameters of different parameterized units and can be precisely written based on the context environment located by the code editing description, so as to avoid inflexibility and potential errors in the code generation process?

[0116] Based on this, this embodiment further proposes a method for generating code for parameterized units, such as... Figure 3 As shown, in an exemplary embodiment, step 13, writing the functional code corresponding to the functional module into the logical unit corresponding to the code editing description, and generating the initial editing code corresponding to the code editing description includes steps 131 to 133, wherein:

[0117] Step 131: Parse and convert each functional module in the code editing description into a logical unit executable by the target programming language.

[0118] Here, high-level, abstract code editing descriptions are transformed into specific code structures that can be understood and executed by a particular programming language, ensuring that the generated code can be seamlessly integrated into the target development environment.

[0119] For example, compiler front-end technologies, such as lexical analyzers and parsers, can be used to convert the description text into an abstract syntax tree (AST), and then intermediate representations of a specific language can be generated by traversing the AST or the target language code can be generated directly. Alternatively, predefined templates and rule engines can be used to map the functional modules in the code editing description to the corresponding functions, classes or code snippets in the target programming language.

[0120] Step 132: Dynamically generate the functional code corresponding to the logic unit based on the original parameters of the parameterized unit referenced in the code editing description.

[0121] It should be noted that, in order to make the generated code highly flexible and configurable, and able to automatically adjust according to different design requirements, this avoids generating static, general code that may not be suitable for specific parameters.

[0122] For example, a code template engine can be used to generate functional code with specific parameters by filling in parameter values; or, metaprogramming techniques can be used to build or modify the code structure at runtime based on parameter values ​​to adapt to various configurations of parameterized units.

[0123] Step 133: Based on the context environment located by the code editing description, write the functional code into the logical node position in the corresponding logical unit of the code editing description to obtain the initial editing code.

[0124] Understandably, ensuring that the generated code can be accurately inserted into the correct position in the target code structure guarantees the integrity and correctness of the code, and avoids compilation errors or runtime logic problems caused by improper code insertion.

[0125] For example, code analysis tools, such as Language Server Protocol (LSP) servers, can be used to identify the insertion point or logical node specified in the code editing description, and then the functional code can be inserted into that location; alternatively, an AST operation library can be used to locate specific nodes in the parsed code structure and inject code to obtain the initial edit code.

[0126] This approach, by parsing abstract code editing descriptions into executable logical units in the target programming language, lays the foundation for subsequent code generation. Functional code is dynamically generated based on the original parameters of the parameterized units, ensuring code customization and flexibility. Based on the context defined by the code editing description, this dynamically generated functional code is precisely written to specific logical node positions within the logical units. This ensures that the generated initial edit code is not only syntactically correct but also functionally perfectly suited to the specific needs of the parameterized units and seamlessly integrated with the existing code structure. This significantly improves the automation and accuracy of code generation, providing high-quality input for subsequent instantiation and structured graphical verification.

[0127] Through the above technical solution, this application can achieve highly automated and customized code generation. This significantly improves the accuracy and flexibility of the generated code, reduces manual intervention and potential errors, especially when dealing with parameterized units with different parameter configurations. It ensures that the generated initial edit code is not only syntactically correct but also fully meets the design requirements in terms of functionality, thus providing a high-quality foundation for subsequent instantiation and verification.

[0128] In the above implementation, a method for generating code for parameterized units is proposed. If the method fails to accurately map the functional modules in the code into graphical objects with reasonable spatial layout during the process of converting the initial edited code into a structured graph, the generated structured graph may not be able to intuitively reflect the logical structure of the code, which will affect the subsequent verification of the spatial relationship of the graphical objects. It may even misjudge the code as having anomalies due to unreasonable graphical layout, thereby reducing the efficiency and accuracy of code generation and correction.

[0129] Based on this, this embodiment further proposes a method for generating code for parameterized units, such as... Figure 4 As shown, in an exemplary embodiment, step 14, which instantiates the initial edit code to convert it into a structured graph, includes steps 141 to 143, wherein:

[0130] Step 141: Run the initially edited code using preset test cases to obtain test parameter values.

[0131] The test cases include test cases for each functional module corresponding to the requirements information.

[0132] It should be noted that by actually running the initial edited code, we obtain the behavioral data of each functional module in the code under specific input conditions, that is, the test parameter values. Here, the test parameter values ​​can ensure that the graphical representation can reflect the actual running state and logic of the code.

[0133] In one implementation, a simulated runtime environment can be constructed, with pre-defined test cases as input, to execute the initial edited code. During code execution, key data generated by each functional module during execution, such as input / output values, internal state variables, and execution paths, can be collected through methods such as instrumentation, logging, or debugger capture, to obtain test parameter values.

[0134] In another implementation, a sandbox mechanism can be used to run the initial edited code in an isolated environment. Specifically, for each functional module, dedicated test cases can be designed to cover the typical inputs and boundary conditions of that functional module. After the run is complete, the sandbox's run report or output results are parsed to extract values ​​related to the functional module's behavior as test parameter values.

[0135] Step 142: Calculate the coordinate information corresponding to each functional module in the initial edit code based on the test parameter values.

[0136] It should be noted that by using test parameter values ​​to determine the position of each functional module in the structured graph, the coordinate information can be dynamically calculated, making the graph layout closer to the actual logic and data flow of the code, and avoiding the confusion and inaccuracy that may be caused by static or random layout.

[0137] As one implementation method, coordinates can be calculated based on data dependencies or execution order in the test parameter values. For example, if the output of one functional module is the input of another functional module, the two modules can be placed graphically in adjacent positions or with a clear connection.

[0138] Specifically, coordinates can be optimized using layout algorithms such as force-directed layout and hierarchical layout, combined with parameter values, to ensure that related modules are spatially close while unrelated modules maintain a certain distance. Alternatively, coordinates can be assigned based on the magnitude or importance of test parameter values. For example, functional modules that process large amounts of data can be assigned a larger graphical area or placed in the center, while auxiliary modules can be placed at the edge. Here, coordinate information calculation can be combined with grid layout or relative positioning strategies to ensure the neatness and readability of the graphics.

[0139] Step 143: Based on the coordinate information corresponding to each functional module, and based on the coordinate information, create a graphic object to determine the structured graphic.

[0140] Here, by transforming each functional module and its calculated coordinate information into specific graphic objects, and arranging them according to the coordinate information corresponding to each image object, an intuitive and understandable graphic representation is formed for observation and subsequent spatial relationship verification.

[0141] As one implementation method, graphical rendering libraries or graphical user interface toolkits can be used to create graphical objects. Each functional module can be represented as a graphical element such as a rectangle, circle, or icon, and its position, size, color, and other attributes can be set according to coordinate information and the type of functional module.

[0142] For example, the names or key parameters of functional modules can be displayed inside or next to the graphic object. Alternatively, predefined graphic templates can be used to create graphic objects. Different graphic styles and layout rules are preset for different types of functional modules (e.g., data input modules, processing modules, output modules). After receiving coordinate information, the appropriate template can be selected, and the position and size of the graphic object can be adjusted according to the coordinate information to ultimately combine them into a complete structured graphic.

[0143] Therefore, by introducing dynamic instantiation and visualization mechanisms, the problem of the disconnect between graphical representation and actual code logic is effectively solved. Specifically, the initially edited code is placed in a controlled runtime environment, and pre-defined test cases are used to run the code. The test cases are adaptively designed for each functional module based on the original requirements information, and can comprehensively simulate the actual execution of the code. In this way, key data generated by each functional module during execution can be captured, namely test parameter values. These test parameter values ​​not only reflect the input and output of the functional module, but may also contain its internal state or execution path information, thus providing realistic and dynamic data support for subsequent graphical layout.

[0144] Based on these dynamically acquired test parameter values, the coordinate information corresponding to each functional module in the initial edited code is precisely calculated. This calculation is not a simple static mapping, but fully considers the data flow, control flow, or logical relationships between functional modules. For example, if the test parameter values ​​reveal a close data interaction between two functional modules, they will tend to be placed in spatially adjacent positions or identified by specific connecting lines when calculating coordinates. This dynamic calculation ensures that the generated coordinate information can reflect the internal logical structure of the code and the actual relationships between functional modules to the greatest extent possible.

[0145] Based on each functional module and its corresponding coordinate information, specific graphical objects are created and laid out according to the calculated coordinates to form a complete structured graph. Each graphical object intuitively represents a functional module, and its position in the graph and its relative relationship with other graphical objects are directly derived from the actual execution data and logical connections of the code. This makes the generated structured graph no longer a simple static representation of the code, but an intuitive visualization of its dynamic behavior and logical structure. Subsequent verification of the spatial relationships of graphical objects in the structured graph will be more accurate and effective because the graph itself has embedded the code's execution logic, thus enabling more reliable discovery of potential anomalies in the code and providing precise evidence for correction.

[0146] The following example illustrates how to instantiate initial edit code and convert it into a structured graph. First, a lightweight virtual machine or container environment can be launched as the platform for running pre-defined test cases. For each functional module in the initial edit code—for example, a module for data filtering, a module for data transformation, and a module for data storage—a series of test cases can be prepared. For instance, for the data filtering module, test cases could include inputs such as normal data flow, abnormal data formats, and empty data to obtain test parameter values ​​such as output data volume and processing time. For the data transformation module, test cases could verify the conversion results between different data types. After obtaining these test parameter values, the system can use a data flow-based layout algorithm to dynamically calculate the coordinate information of each functional module. For example, if the output of the data filtering module is directly used as the input of the data transformation module, and the output of the data transformation module is used as the input of the data storage module, the system can arrange these three modules sequentially from left to right or from top to bottom on the graph based on this data dependency. The specific coordinate values ​​can be fine-tuned based on the amount or complexity of data processed by each module. For example, modules processing large amounts of data can occupy more graphical space. A front-end visualization framework, such as the JavaScript-based D3.js library or ECharts library, can be used to create graphical objects based on the calculated coordinate information. Each functional module can be represented as a rectangle with a module name and key parameters. The position of the rectangle is determined by its coordinate information, while the connecting lines between rectangles can represent data flow or control flow. For example, an arrow line leading from the rectangle of the data filtering module to the rectangle of the data transformation module indicates that data flows from the former to the latter. In this way, a structured graph that is intuitive and reflects the actual operating logic of the code is defined.

[0147] Through the above technical solution, this application can transform the abstract logic of the initial edited code into an intuitive structured graph, significantly improving code readability and understandability. By using preset test cases to run the initial edited code and dynamically calculating the coordinate information of functional modules based on the obtained test parameter values, it ensures that the generated graphical objects and their spatial relationships can truly reflect the actual running state and internal logic of the code. This avoids the problem of the graph being disconnected from the code logic that may be caused by traditional static analysis or manual layout, making the subsequent verification of the spatial relationships of graphical objects in the structured graph more accurate and efficient. When an anomaly is detected, since the graphical layout is generated based on the actual running data of the code, the problem can be located more accurately, thus providing a more reliable and intuitive basis for correcting the initial edited code, ultimately improving the overall efficiency and accuracy of parameterized unit code generation and correction.

[0148] In some of the above implementations, during the code generation process of parameterized units, the layout and connections of functional modules can be visually displayed by instantiating the initial edited code into a structured graph. However, if only the syntactic correctness of the code or the initial graph generation is relied upon, it may be impossible to detect abnormal spatial relationships or connection logic errors between functional modules, such as module overlap, broken connections, or layouts that do not conform to design specifications. These problems will directly affect the correctness and usability of the final generated code.

[0149] Based on this, this embodiment further proposes a method for generating code for parameterized units, such as... Figure 5 As shown, in one embodiment, step 15, which verifies the spatial relationship between the graphic images corresponding to each functional module in the structured graph, and corrects the initial editing code in case of an anomaly to obtain the target editing code, includes steps 151 to 154, wherein:

[0150] Step 151: Determine whether there is an abnormal state in the structured graph based on the positional relationships and connection logic of each graphic object in the structured graph.

[0151] The structured graphics consist of multiple graphic objects, each corresponding to a functional module in the initial editing code.

[0152] Here, the presence of abnormal states in the structured graph is determined based on the positional relationships and connection logic of the various graphic objects. Potential design flaws or logical errors can be discovered by analyzing the graphical representation. Specifically, a pre-defined rule engine or expert system can be used to check the geometric attributes such as distance, relative position, and alignment between graphic objects, and to make judgments based on connection logic such as the start and end points and intersections of connecting lines. For example, if two graphic objects that should not overlap overlap, or if a connecting line is not correctly connected to a port, it is judged as abnormal.

[0153] Furthermore, machine learning models can be used to learn and identify anomalous patterns by training on a large amount of correct and anomalous structured graphics data. For example, convolutional neural networks can be used to analyze the image features of graphics, or graph neural networks can be used to analyze the topological structure and attributes of graphic objects, thereby determining whether an anomalous state exists.

[0154] Step 152: If the structured graph has an abnormal state, perform semantic parsing on the structured graph to identify the target abnormal features in the structured graph.

[0155] Among them, the target anomaly features are the semantically described anomaly features.

[0156] If an abnormal state exists in the structured graph, semantic parsing is performed on the structured graph to identify the target abnormal features in the structured graph. The abnormality at the graph level can be transformed into an understandable and correctable semantic description.

[0157] Specifically, matching can be performed using a predefined library of anomaly patterns. For example, if overlapping graphical objects A and B are detected, the semantic parser identifies it as the target anomaly feature "module A overlaps with module B". If connection line C is detected as not connected to any port, it is identified as "connection line C is disconnected".

[0158] In addition, natural language processing techniques can be used to transform the geometric and topological information of graphical anomalies into structured text descriptions, and then key semantic anomaly features can be extracted through rules or pre-trained models. For example, "the distance between the center points of graphical object 100 and graphical object 200 is less than the sum of their radii" can be interpreted as "functional module 100 and functional module 200 collide".

[0159] Step 153: Determine the correction parameters for correcting the target anomaly features.

[0160] When an anomaly occurs in a structured graph, specific operational instructions or values ​​can be calculated based on the identified semantic anomaly features to guide code correction. Specifically, this can be achieved using a pre-defined correction strategy library. For example, for the anomaly feature of "module overlap," the correction strategy might be "move one of the overlapping modules a minimum distance along a specific direction to eliminate the overlap," thereby calculating the corresponding displacement as a correction parameter.

[0161] Furthermore, optimization algorithms can be used to calculate correction parameters that minimize the degree of anomalies while satisfying design constraints. For example, in cases where multiple modules are poorly laid out, force-directed placement algorithms or genetic algorithms can be used to calculate the optimal module position adjustment parameters.

[0162] In one implementation, the step of determining correction parameters for correcting target anomaly features includes:

[0163] (1) Map the target abnormal features from the semantic space to the geometric transformation operation in the code space, and determine the abnormal geometric parameters corresponding to the target abnormal features.

[0164] After identifying the target anomaly features in the structured graph, these features can be mapped from the semantic space to geometric transformation operations in the code space. Here, the identified anomaly features, described by high-level semantics, can be converted into executable instructions in the low-level code that modify the geometric properties of the graph objects. For example, an anomaly semantically described as "graph object A overlaps with graph object B" can be mapped to performing a "translation" operation on one of the graph objects.

[0165] It should be noted that target anomaly features in the semantic space can be mapped to the code space through a predefined rule base, a machine learning-based model, or an ontological reasoning mechanism, so as to associate specific semantic anomaly patterns with corresponding code geometric transformation operations.

[0166] Simultaneously, it is also possible to determine the corresponding anomalous geometric parameters of target anomalies in post-holiday drawing. Specifically, after identifying the target anomaly and determining the corresponding geometric transformation operation, the specific geometric attributes of the anomaly can be quantified. For example, if the anomaly is an overlap between two graphic objects, the anomalous geometric parameters could be the width and height of the overlapping area, or the distance between the center points of the two graphic objects.

[0167] In one implementation, abnormal geometric parameters can be obtained by performing geometric analysis on structured graphics, such as calculating the bounding box, center point coordinates, and connection point coordinates of graphic objects.

[0168] (2) Based on the abnormal geometric parameters, determine the target displacement to restore the target abnormal features and obtain the correction parameters.

[0169] Based on the determined abnormal geometric parameters, the specific geometric adjustments that can be made to the graphic object to correct the abnormal feature can be calculated using these quantified parameters. For example, if the abnormal geometric parameters indicate that graphic object A is 5 units to the left of its expected position, then the target displacement is to move graphic object A 5 units to the right, thus obtaining the correction parameters.

[0170] The correction parameters can refer to encapsulating the calculated target displacement and other possible geometric transformation information into a specific value or instruction set. The correction parameters can be directly used to guide the modification of the geometric attributes or layout logic of the corresponding functional modules in the initial editing code.

[0171] In the above embodiments, by introducing a mapping mechanism from semantic space to code space, the problem of how to accurately derive code correction parameters from high-level exception descriptions is solved.

[0172] Specifically, when an abnormal state is detected and target anomalous features are identified in a structured graph, the semantic-level anomalous features are transformed into executable geometric transformation operations at the code level. This bridges the gap between visual representation and underlying code, accurately determining the anomalous geometric parameters associated with the target anomalous feature. These parameters quantify the degree and nature of the target anomalous feature, such as specific overlap distances or misalignments. Based on the quantified anomalous geometric parameters, the target displacement required to restore the target anomalous feature to its normal state is further calculated.

[0173] The target displacements are integrated into correction parameters, which are directly used to modify the geometric properties or layout logic of the corresponding functional modules in the initial edit code. This ensures that the correction of the initial edit code is based on precise geometric calculations, not fuzzy judgments, significantly improving the automation and accuracy of code correction. This allows the generated parametric unit code to accurately reflect the design intent and avoids potential functional errors caused by abnormal spatial relationships.

[0174] Step 154: Based on the correction parameters, correct the functional code in the target logic unit of the initial edit code to obtain the target edit code.

[0175] Among them, the target logical unit is the logical unit in which the target abnormal characteristics appear.

[0176] One approach is to use code generation templates or code conversion rules to modify the functional code of the target logic unit in the initial edit code based on correction parameters, thereby obtaining the target edit code. For example, if the correction parameter indicates "increase the X coordinate of functional module 100 by 10 units", then the coordinate definition statement corresponding to functional module 100 in the initial edit code can be found, and its X coordinate value can be modified.

[0177] As another implementation method, the initial edit code can be parsed into an abstract syntax tree through abstract syntax tree operations. Then, nodes on the abstract syntax tree can be modified according to the correction parameters, and the modified abstract syntax tree can be regenerated as the target edit code.

[0178] During the code generation process for parameterized units, the initial edit code can be instantiated into a structured graph, which visually represents the layout and connections of functional modules. To ensure the correctness of the design intent represented by this graph, the positional relationships and connection logic of each graphic object in the structured graph can be further verified. By analyzing the geometric relationships (such as distance and overlap) between graphic objects and the topology of connecting lines, the system can identify potential abnormal states, such as module layout conflicts or connection errors. Once an anomaly is detected, semantic parsing of the structured graph can be performed immediately, transforming the graphical anomaly into specific, understandable target anomaly features, such as "module overlap" or "connection break."

[0179] Subsequently, based on the semantic target anomaly characteristics, the corresponding correction parameters for instructions on how to adjust the position or connection of graphical objects can be intelligently determined. Based on the correction parameters, the target logic unit corresponding to the initial editing code can be accurately located, and the functional code in the target logic unit can be corrected. This generates target editing code that meets the design requirements and has no spatial or logical anomalies. In this way, design defects that are difficult to find through code syntax checks alone can be effectively compensated for, ensuring the integrity and correctness from requirements to code.

[0180] The following is a specific example to illustrate this embodiment. Please refer to it. Figure 6 , Figure 6 This is a schematic diagram illustrating a scenario for a code generation method for a parameterized unit provided in this embodiment. Specifically, taking the addition of a protective ring around the M3 layer of a MIM (Metal-Insulator-Metal) capacitor parameterized unit as an example, it demonstrates the automated implementation process from natural language requirements to finally generating code.

[0181] First, requirement information can be obtained, which may include design requirements input in natural language. and MIM capacitor code template Among them, design requirements The design requirement, which is to "add the parameter add_start_d_rings to add a protective ring to the outer ring of the capacitor on the M3 layer", clarifies the object to be modified, the new parameter to be added, and the target structure.

[0182] After obtaining the user's design requirements for the parameterized unit, semantic analysis and functional reasoning can be performed on these requirements to generate a structured code editing description, i.e., a code editing plan. Specifically, a large language model, fine-tuned from the integrated circuit design code corpus, analyzes the input text to identify the operation object as the MIM capacitor parameterized unit, the parameters to be added, and the design goal as building a guard ring around the outer ring of the capacitor on the M3 layer. Furthermore, functional reasoning can be performed based on predefined annotation rules to output a code editing description containing specific functional modules and execution steps. Specifically, the code editing plan includes: 1. Creating a closed guard ring consisting of four rectangles on the M3 layer; 2. Execution steps include calculating the geometric dimensions and position of the guard ring, calling the layout to generate the application programming interface to create the graphics, and ensuring that the guard ring and internal devices meet the minimum spacing design rules and have no overlap.

[0183] After determining the code editing description, the code generation phase can begin. Initial editing code is generated based on the description. The coding agent receives the description and the original unit code, and first parses the functional modules in the description into executable logical units in the target programming language. Then, the agent dynamically generates specific functional code corresponding to the functional modules, including mathematical expressions for calculating coordinates and code that calls layouts such as `rect(size=(guard_ring_l, guard_ring_w), layer=m3)` to generate application programming interfaces. Finally, the agent inserts this functional code into the appropriate logical nodes of the original code in a syntactically correct and logically compatible manner, forming the initial editing code containing the `add_guarding_ring` control switch.

[0184] After generating the initial editing code, it can be instantiated and converted into a structured graph. Please refer to [link / reference]. Figure 7 , Figure 7 This is a schematic diagram of a scenario for the structured graph in the code generation method for a parameterized unit provided in this embodiment. Specifically, a test case set containing newly added functional parameters is constructed, for example, including structured graphs such as guarding_ring_top_bar, rect_m3, rect_m3_1, and rect_m4_r. By calling the application programming interface of the layout tool and passing in the test parameters, the coordinates are dynamically calculated and the corresponding layers and graphic objects are created, generating a complete structured layout instance in memory.

[0185] After determining the structured graphic, spatial relationships are verified, and the code is automatically corrected when anomalies are detected. Specifically, design rule checks can be performed on the generated layout instance to detect the anomaly where "the bar on the guard ring overlaps with the device, violating design rules." Through semantic parsing, the target anomaly feature is identified as "graphic overlap," which is then mapped to the code space. The root cause of the negative spacing due to coordinate calculation errors is analyzed, and the correction parameters required to eliminate the overlap (e.g., displacement move (m3_spacing - read_sspec)) are automatically calculated. The corresponding logic unit in the initial edit code is located and corrected, thus obtaining the target edit code.

[0186] Finally, the instantiation and verification steps are iteratively executed until the generated structured graph completely passes all rule checks. The resulting target edit code is then the final parametric unit code that meets the original design requirements, has been verified, and can be directly deployed to production. This embodiment fully demonstrates the closed-loop process from requirements understanding, intelligent reasoning, code generation, instance verification to automatic correction, reflecting the effectiveness and practicality of this method in improving design automation and ensuring code correctness.

[0187] Therefore, through the above technical solution, this application can effectively identify and correct potential design defects caused by abnormal spatial relationships or connection logic of functional modules during the parameterized unit code generation process. Compared with relying solely on code syntax checking, this application, by instantiating the code into a structured graph and visually verifying it, can intuitively discover problems that are difficult to detect directly at the code level, such as module overlap and broken connections. By converting graphical anomalies into semantic descriptions and further calculating correction parameters to automatically correct the initial edit code, the accuracy and reliability of code generation are greatly improved, avoiding subsequent debugging costs and errors caused by design defects. This ensures that the final generated target edit code is not only syntactically correct, but also meets design expectations in terms of the layout and connection logic of functional modules, thereby improving the automation level and quality of parameterized unit design.

[0188] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0189] Based on the same inventive concept, this application also provides a code generation apparatus for parameterized units to implement the code generation method for parameterized units described above. The solution provided by this apparatus is similar to the implementation described in the above method; therefore, the specific limitations in one or more embodiments of the code generation apparatus for parameterized units provided below can be found in the limitations of the code generation method for parameterized units described above, and will not be repeated here.

[0190] In one exemplary embodiment, such as Figure 8 As shown, a code generation device for a parameterized unit is provided, comprising: an acquisition module, a determination module, a writing module, a processing module, and a verification and correction module, wherein:

[0191] The acquisition module is used to acquire requirement information, including the design of parameterized units;

[0192] A determination module is used to perform semantic analysis and functional reasoning on the requirement information to determine the code editing description; wherein, the code editing description is used to describe the execution steps required to implement at least one functional module corresponding to the requirement information;

[0193] The writing module is used to write the functional code corresponding to the functional module into the logical unit corresponding to the code editing description, and generate the initial editing code corresponding to the code editing description.

[0194] The processing module is used to instantiate the initial editing code and convert it into a structured graph; the structured graph includes the graphical object corresponding to the instance processing of each functional module.

[0195] The verification and correction module is used to verify the spatial relationships between the graphic objects corresponding to each functional module in the structured graph, and to correct the initial editing code in case of an anomaly, so as to obtain the target editing code.

[0196] In one embodiment, the determining module includes: an input unit, an analysis unit, and a reasoning unit, wherein:

[0197] The input unit is used to input the requirement information into a pre-defined large language model;

[0198] The analysis unit is used to perform semantic analysis on the requirement information based on a large language model to obtain key information corresponding to the requirement information; among which, the key information is the key information annotated on the requirement information input by the user.

[0199] The reasoning unit is used to perform functional reasoning on the requirement information based on the pre-defined annotation information and key information in the large language model, and output the code editing description.

[0200] In one embodiment, the writing module includes a parsing unit, a generating unit, and a writing unit, wherein:

[0201] The parsing unit is used to parse each functional module in the code editing description and convert it into a logical unit that can be executed in the target programming language;

[0202] The generation unit is used to dynamically generate the functional code corresponding to the logic unit based on the original parameters of the parameterized unit referenced in the code editing description.

[0203] The writing unit is used to write functional code into the logical node position in the corresponding logical unit of the code editing description based on the context environment located by the code editing description, so as to obtain the initial editing code.

[0204] In one embodiment, the processing module includes a running unit, a computing unit, and a creation unit, wherein:

[0205] The execution unit is used to run the initially edited code using preset test cases to obtain test parameter values; the test cases include test cases for each functional module corresponding to the requirement information;

[0206] The calculation unit is used to calculate the coordinate information corresponding to each functional module in the initial edit code based on the test parameter values;

[0207] Create a unit to create a graphical object based on the coordinate information corresponding to each functional module, thereby determining the structured graphics.

[0208] In one embodiment, the verification correction module includes an anomaly determination unit, an anomaly location unit, a correction parameter determination unit, and a correction unit, wherein:

[0209] The anomaly determination unit is used to determine whether there is an abnormal state in the structured graph based on the positional relationship and connection logic of each graphic object in the structured graph; wherein, the structured graph includes multiple graphic objects, and each graphic object corresponds to a functional module in the initial editing code;

[0210] An anomaly localization unit is used to perform semantic parsing on a structured graph if an anomaly exists, in order to identify target anomaly features in the structured graph; wherein, the target anomaly features are the semantically described anomaly feature content.

[0211] The correction parameter determination unit is used to determine the correction parameters for correcting the target anomaly features;

[0212] The correction unit is used to correct the functional code in the target logic unit in the initial edit code according to the correction parameters, so as to obtain the target edit code; wherein, the target logic unit is the logic unit in which the target abnormal feature appears.

[0213] The core innovation of this embodiment lies in solving the key problem of large language models lacking spatial awareness by combining the spatial relationship verification of structured graphics with the code correction mechanism in a closed-loop manner. Specifically, the verification and correction module can automatically detect anomalies in the spatial relationships between graphic objects in the structured graphics and correct the initial edited code based on these anomalies, achieving real-time closed-loop error correction between geometry and code.

[0214] In practical applications, the device first receives user-input requirements, such as functional and structural requirements for parameterized units, through an acquisition module. A determination module performs semantic analysis and functional reasoning on the requirements information, generating a code editing description that describes the execution steps of the functional modules. A writing module writes functional code into the corresponding logical units based on the code editing description, generating initial editing code. A processing module instantiates the initial editing code into a structured graph, displaying the graphical objects corresponding to each functional module. A verification and correction module verifies the spatial relationships between these graphical objects; if any anomalies are found in spacing, alignment, or connections, the initial editing code is automatically corrected to ensure that the final generated target editing code produces a physical layout that conforms to the design rules.

[0215] Each module in the code generation device of the aforementioned parameterization unit can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0216] In one exemplary embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 9 As shown, this computer device includes a processor, memory, input / output interfaces (I / O), and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides the environment for the operating system and computer programs stored in the non-volatile storage media. The database stores matrix data. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communicating with external terminals via a network connection. When executed by the processor, the computer program implements a code generation method for parameterized units.

[0217] The core innovation of this embodiment lies in integrating the code generation method for parameterized units into a computer device. This enables the processor to automatically execute the entire process, from requirement information acquisition, semantic analysis, functional reasoning, code editing description determination, initial code generation, instantiation, and spatial relationship verification and correction. This significantly improves the automation level and reliability of parameterized unit development. Specifically, the device performs deep semantic analysis of requirement information using a pre-set large language model. Combined with dynamic code generation and a geometry-code closed-loop verification mechanism, it effectively overcomes the shortcomings of traditional manual development models, such as reliance on engineer experience, error-proneness, and time consumption. For example, in the spatial relationship verification stage, the processor can automatically detect design rule violations in the structured graph and accurately correct them based on abnormal features mapped to the code space, avoiding the tedious process of repeated manual debugging. Because the device achieves end-to-end automated conversion from natural language requirements to physical layout, it significantly reduces the reliance on multi-skilled personnel in parameterized unit development while ensuring the physical implementation usability of the generated layout.

[0218] Through the above technical solution, this application achieves highly efficient automation in parametric unit development, significantly shortening the design cycle and reducing R&D costs. As a specific implementation, this computer device can be deployed in an electronic design automation workstation to provide chip design engineers with real-time parametric unit generation services. In actual operation, after the user inputs requirement information, the processor dynamically generates a code editing description based on semantic analysis results and converts the initial editing code into a structured graph through instantiation processing. If an anomaly in the spatial relationship between graphical objects is detected, the processor automatically determines correction parameters and iteratively optimizes the initial editing code until a target editing code conforming to the process design rules is generated. Overall, this device, through the collaborative optimization of hardware and software, fundamentally solves the technical problems of low efficiency, poor reliability, and high cost in the parametric unit development process, providing reliable technical support for chip design under advanced semiconductor process nodes.

[0219] Those skilled in the art will understand that Figure 9 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0220] In one embodiment, a readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the steps performed by the code generation method of the parameterized unit described above.

[0221] In one embodiment, a program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0222] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0223] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0224] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for generating code for a parameterized unit, characterized in that, The method includes: Obtain requirement information, including the design of parameterized units; Semantic analysis and functional reasoning are performed on the requirement information to determine the code editing description; wherein the code editing description is used to describe the execution steps required to implement at least one functional module corresponding to the requirement information; Write the functional code corresponding to the functional module into the logical unit corresponding to the code editing description to generate the initial editing code corresponding to the code editing description; The initial editing code is instantiated to convert it into a structured graph; wherein the structured graph includes a graphical object corresponding to the instantiation of each functional module; The spatial relationships between the graphical objects corresponding to each functional module in the structured graph are verified, and in case of an anomaly, the initial editing code is corrected to obtain the target editing code.

2. The method according to claim 1, characterized in that, The steps of performing semantic analysis and functional reasoning on the requirement information to determine the code editing description include: Input the required information into a preset large language model; Based on the large language model, semantic analysis is performed on the requirement information to obtain key information corresponding to the requirement information; wherein, the key information is the key information that annotates the requirement information input by the user. Based on the preset annotation information in the large language model and the key information, functional reasoning is performed on the requirement information, and the code editing description is output.

3. The method according to claim 1, characterized in that, The step of writing the functional code corresponding to the functional module into the logical unit corresponding to the code editing description, and generating the initial editing code corresponding to the code editing description, includes: Each functional module in the code editing description is parsed and converted into a logical unit executable in the target programming language; Based on the original parameters of the parameterized unit referenced in the code editing description, the functional code corresponding to the logic unit is dynamically generated; Based on the context of the code editing description, the functional code is written into the logical node position in the logical unit corresponding to the code editing description to obtain the initial editing code.

4. The method according to claim 1, characterized in that, The step of instantiating the initial edit code to convert it into a structured graph includes: The initial edited code is run using preset test cases to obtain test parameter values; wherein, the test cases include test cases for each of the functional modules corresponding to the requirement information; Calculate the coordinate information corresponding to each functional module in the initial edit code based on the test parameter values; The structured graph is determined by creating a graphical object based on the coordinate information corresponding to each functional module.

5. The method according to claim 1, characterized in that, The steps of verifying the spatial relationships between the graphic images corresponding to each functional module in the structured graph, and correcting the initial editing code to obtain the target editing code in case of anomalies, include: The presence of an abnormal state in the structured graph is determined based on the positional relationships and connection logic of the various graphical objects in the structured graph; wherein, the structured graph includes multiple graphical objects, and each graphical object corresponds to a functional module in the initial editing code; If the structured graph has an abnormal state, then semantic parsing is performed on the structured graph to identify target abnormal features in the structured graph; wherein, the target abnormal features are semantically described abnormal feature content; Determine the correction parameters for correcting the target anomaly features; Based on the correction parameters, the functional code in the target logic unit of the initial edit code is corrected to obtain the target edit code; wherein, the target logic unit is the logic unit in which the target abnormal feature appears.

6. The method according to claim 5, characterized in that, The step of determining the correction parameters for correcting the target anomaly features includes: The target anomaly features are mapped from the semantic space to the code space by a geometric transformation operation, and the anomaly geometric parameters corresponding to the target anomaly features are determined. Based on the abnormal geometric parameters, the target displacement amount for restoring the target abnormal features is determined, and the correction parameters are obtained.

7. A code generation device for a parameterized unit, characterized in that, The code generation device for the parameterization unit includes: The acquisition module is used to acquire requirement information, including the design of parameterized units; A determination module is used to perform semantic analysis and functional reasoning on the requirement information to determine the code editing description; wherein the code editing description is used to describe the execution steps required to implement at least one functional module corresponding to the requirement information; The writing module is used to write the functional code corresponding to the functional module into the logical unit corresponding to the code editing description, and generate the initial editing code corresponding to the code editing description; The processing module is used to instantiate the initial editing code to convert it into a structured graph; wherein the structured graph includes a graphical object corresponding to the instantiation of each functional module; The verification and correction module is used to verify the spatial relationship between the graphic objects corresponding to each functional module in the structured graph, and to correct the initial editing code in case of an anomaly, so as to obtain the target editing code.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.

9. A readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

10. A program product comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

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