A timing-driven global placement method based on path entropy and average path length

By introducing a weight model based on path entropy and average path length, and dynamically adjusting the weights of pin pairs, the problems of path relaxation distribution differences and neglect of physical adjustability in existing methods are solved, achieving more efficient temporal convergence and resource utilization.

CN122197797APending Publication Date: 2026-06-12SOUTHWEAT UNIV OF SCI & TECH

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SOUTHWEAT UNIV OF SCI & TECH
Filing Date
2026-03-31
Publication Date
2026-06-12

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Abstract

The application discloses a timing-driven global placement method based on path entropy and average path length, and relates to the technical field of electronic design automation. The method comprises the following steps: extracting a current critical timing path set, and identifying pin pairs appearing in all critical paths; determining the critical path set appearing for each pin pair, obtaining a total weight, and finally obtaining the weight of the pin pair based on path entropy; calculating the average number of nodes of the associated critical path for each pin pair; obtaining the comprehensive weight of the pin pair based on the average path node number of the pin pair and according to a balance factor; applying the obtained comprehensive weight of the pin pair to a pin attraction term in a layout optimization objective function; guiding the position adjustment of a circuit unit in a layout iteration process; judging whether the timing of the critical path meets a convergence condition, and if yes, entering a layout legalization stage and outputting a final integrated circuit physical layout result, and if not, continuing iteration. The application effectively improves the timing convergence capability.
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Description

Technical Field

[0001] This invention relates to the field of electronic design automation technology, and more specifically to a time-driven global layout method based on path entropy and average path length. Background Technology

[0002] In an era of rapid development in integrated circuit technology, timing convergence has become a crucial and increasingly challenging objective in the physical design process of very large-scale integrated circuits (VLSI), determining whether the chip can achieve the expected performance after tape-out. To improve the success rate of timing convergence, timing-driven design methods have been introduced into the placement stage. The core idea is to use timing information as a guiding factor for placement optimization, thereby providing greater optimization space for subsequent processes. This concept has given rise to various timing-driven global placement methods, which are mainly divided into two categories: network-based optimization methods and path-based optimization methods. Among them, path-based timing-driven placement methods are considered to have greater potential for timing optimization because they can consider critical timing paths in real time during the placement process. Existing path-based optimization methods generally suffer from the following technical shortcomings: The differences in relaxation distribution between paths are ignored. In actual design, the same pin pair is very likely to appear in multiple critical timing paths, and the relaxation of these paths differs significantly. Existing methods ignore this difference, which leads to the amplification of the importance of some relatively less critical paths, causing optimization misdirection and wasting optimization resources.

[0003] The impact of path length on optimization feasibility is not considered. Current path-based timing optimization methods only focus on relaxation as a timing metric, neglecting the "physical tunability" represented by the number of cells in the path. For paths dominated by a large number of logic gate delays, location optimization often fails to improve the timing of this path, while existing methods still invest significant computational resources in optimizing such paths, leading to wasted computational resources and even introducing interference.

[0004] The lack of a path feature fusion mechanism is a significant drawback. Existing methods have not yet developed a systematic mechanism to dynamically balance the slack concentration and adjustability of paths, resulting in insufficient generalization ability of optimization strategies across different topologies. These shortcomings limit the temporal convergence performance of path-based optimization methods in complex, high-density design scenarios.

[0005] Therefore, proposing a time-driven global layout method based on path entropy and average path length to address the difficulties in existing technologies is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0006] In view of this, the present invention provides a time-driven global layout method based on path entropy and average path length to solve the technical problems existing in the prior art.

[0007] To achieve the above objectives, the present invention provides the following technical solution: A time-driven global layout method based on path entropy and average path length includes the following steps: S1. In the timing iteration, the current set of critical timing paths is extracted using static timing analysis tools, and pin pairs appearing in all critical paths are identified. S2. For each pin pair, determine the set of critical paths that appear, calculate the normalized weight of each path in the critical path set and sum them to obtain the total weight, then calculate the normalized path entropy of the pin pair based on the normalized weight and the number of paths, and finally combine the total weight, hyperparameters and normalized path entropy to obtain the weight of the pin pair based on path entropy. S3. For each pin pair, calculate the average number of nodes in the associated critical path, and then obtain the weight suppression term based on the number of nodes for the pin pair by using the exponential decay function, combined with the average number of nodes, sensitivity adjustment coefficient, node threshold and lower limit of weight minimum value. S4. Based on the average number of path nodes of the pin pair, calculate the normalized balance factor using the Sigmoid function. Then, based on the balance factor, perform a weighted fusion of the weights of the pin pair based on path entropy and the weights based on the number of nodes to obtain the comprehensive weight of the pin pair. S5. Apply the obtained pin pair weights to the pin attraction term in the layout optimization objective function. S6. During the layout iteration process, the pin pair comprehensive weights are recalculated based on the current critical path in each round, and the overall objective function for layout optimization is updated step by step to guide the adjustment of circuit unit positions. S7. Determine whether the timing of the critical path meets the convergence condition. If it does, proceed to the layout legalization stage and output the final physical layout result of the integrated circuit. If it does not meet the condition, return to S1 to continue the iteration.

[0008] Optionally, the formula for calculating the normalized weight of each path in the critical path set in S2 is: ; in, For path The degree of relaxation, The minimum slack among all critical paths. For path Normalized weights.

[0009] Optionally, the formula for calculating the total weight in S2 is: ; in, For pin pairs Total weight, For pin pairs The set of critical paths that appear For a single critical path in the set, For path Normalized weights.

[0010] Optionally, the formula for calculating the normalized path entropy of the pin pair in S2 is: ; in, For pin pairs Normalized path entropy, The numerical stability coefficient, For pin pairs The number of critical paths traversed For pin pairs Total weight, For pin pairs The set of critical paths that appear For a single critical path in the set, For path Normalized weights.

[0011] Optionally, the formula for calculating the pin pair weights based on path entropy in S2 is as follows: ; in, For pin pairs Weights based on path entropy, This is a hyperparameter with a value range of [0,1], used to control the degree of path entropy suppression. For pin pairs Normalized path entropy, For pin pairs The total weight.

[0012] Optionally, the formula for calculating the average number of path nodes for a pin pair in S3 is: ; in, For pin pairs Average number of path nodes For pin pairs The number of critical paths traversed For path The number of nodes in the system.

[0013] Optionally, the formula for calculating the weight suppression term based on the number of nodes in S3 is as follows: ; in, For pin pairs Weight suppression terms based on the number of nodes, This represents the sensitivity adjustment coefficient of the node number suppression function. To distinguish between the node thresholds of the dominant connection path and the logically dominant path, This is the lower bound of the minimum weight. For pin pairs The average number of path nodes.

[0014] Optionally, the formula for calculating the normalized equilibrium factor in S4 is: ; in, For pin pairs The normalized balance factor has a value range of [0,1]. This is the sensitivity adjustment parameter for the balance factor. For pin pairs Average number of path nodes This is the threshold for the number of nodes.

[0015] Optionally, the formula for calculating the overall weight of pin pairs in S4 is as follows: ; in, For pin pairs The overall weight, As the normalized balance factor, For the weighted suppression term based on the number of nodes, The weights are based on path entropy.

[0016] Optionally, the pin pair synthesis weights obtained in S5 are applied to the calculation formula of the pin attraction term in the layout optimization objective function as follows: ; in, For pin attraction value, For the set of pin pairs in all critical paths, For pin pairs The overall weight, ( , ), ( , ) are pins pins The physical coordinates.

[0017] As can be seen from the above technical solution, compared with the prior art, the present invention discloses a time-driven global layout method based on path entropy and average path length, the beneficial effects of which are: 1) During the global layout phase, a set of critical paths is extracted through static timing analysis, and the pin pairs appearing in the critical paths are structurally identified to establish a mapping relationship between paths and pin pairs. 2) Introduce the path entropy metric to measure the concentration of slack distribution of a pin pair in its associated path set, so as to reflect the dominance of the critical path for the pin pair and serve as an important component of the guiding weight. 3) Introduce the average number of path nodes index to evaluate the physical adjustability of the path, and suppress pin pair weights on paths with a large number of units and rigid structures through an exponential decay function to avoid ineffective optimization. 4) Construct a dynamic fusion mechanism with the Sigmoid function as the core, and adaptively adjust the ratio of path entropy weight and node number weight according to the average number of logical nodes in the path to enhance the model's adaptability under different circuit structures. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0019] Figure 1 The flowchart shows a time-driven global layout method based on path entropy and average path length provided by the present invention. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] See Figure 1 As shown, this invention discloses a time-driven global layout method based on path entropy and average path length, comprising the following steps: S1. In the timing iteration, the current set of critical timing paths is extracted using static timing analysis tools, and pin pairs appearing in all critical paths are identified. Specifically, the set of current key timing paths is extracted using the static timing analysis tool OpenTimer.

[0022] S2. For each pin pair, determine the set of critical paths that appear, calculate the normalized weight of each path in the critical path set and sum them to obtain the total weight, then calculate the normalized path entropy of the pin pair based on the normalized weight and the number of paths, and finally combine the total weight, hyperparameters and normalized path entropy to obtain the weight of the pin pair based on path entropy. S3. For each pin pair, calculate the average number of nodes in the associated critical path, and then obtain the weight suppression term based on the number of nodes for the pin pair by using the exponential decay function, combined with the average number of nodes, sensitivity adjustment coefficient, node threshold and lower limit of weight minimum value. S4. Based on the average number of path nodes of the pin pair, calculate the normalized balance factor using the Sigmoid function. Then, based on the balance factor, perform a weighted fusion of the weights of the pin pair based on path entropy and the weights based on the number of nodes to obtain the comprehensive weight of the pin pair. S5. Apply the obtained pin pair weights to the pin attraction term in the layout optimization objective function. S6. During the layout iteration process, the pin pair comprehensive weights are recalculated based on the current critical path in each round, and the overall objective function for layout optimization is updated step by step to guide the adjustment of circuit unit positions. S7. Determine whether the timing of the critical path meets the convergence condition. If it does, proceed to the layout legalization stage and output the final physical layout result of the integrated circuit. If it does not meet the condition, return to S1 to continue the iteration.

[0023] Furthermore, the formula for calculating the normalized weight of each path in the critical path set in S2 is as follows: ; in, For path The degree of relaxation, The minimum slack across all critical paths. For path Normalized weights.

[0024] Furthermore, the formula for calculating the total weight in S2 is: ; in, For pin pairs Total weight, For pin pairs The set of critical paths that appear For a single critical path in the set, For path Normalized weights.

[0025] Furthermore, the formula for calculating the normalized path entropy of the pin pair in S2 is: ; in, For pin pairs Normalized path entropy, The numerical stability coefficient, For pin pairs The number of critical paths traversed For pin pairs Total weight, For pin pairs The set of critical paths that appear For a single critical path in the set, For path Normalized weights.

[0026] Furthermore, the formula for calculating the pin pair weights based on path entropy in S2 is as follows: ; in, For pin pairs Weights based on path entropy, This is a hyperparameter with a value range of [0,1], used to control the degree of path entropy suppression. For pin pairs Normalized path entropy, For pin pairs The total weight.

[0027] Furthermore, the formula for calculating the average number of path nodes for a pin pair in S3 is as follows: ; in, For pin pairs Average number of path nodes For pin pairs The number of critical paths traversed For path The number of nodes in the system.

[0028] Furthermore, the formula for calculating the weight suppression term based on the number of nodes in S3 is as follows: ; in, For pin pairs Weight suppression terms based on the number of nodes, This represents the sensitivity adjustment coefficient of the node number suppression function. To distinguish between the node thresholds of the dominant connection path and the logically dominant path, This is the lower bound of the minimum weight. For pin pairs The average number of path nodes.

[0029] Furthermore, the formula for calculating the normalized equilibrium factor in S4 is: ; in, For pin pairs The normalized balance factor has a value range of [0,1]. This is the sensitivity adjustment parameter for the balance factor. For pin pairs Average number of path nodes This is the threshold for the number of nodes.

[0030] Furthermore, the formula for calculating the overall weight of the pin pair in S4 is as follows: ; in, For pin pairs The overall weight, As the normalized balance factor, For the weighted suppression term based on the number of nodes, The weights are based on path entropy.

[0031] Furthermore, the pin pair comprehensive weights obtained in S5 are applied to the calculation formula of the pin attraction term in the layout optimization objective function as follows: ; in, For pin attraction value, For the set of pin pairs in all critical paths, For pin pairs The overall weight, ( , ), ( , ) are pins pins The physical coordinates.

[0032] In a specific embodiment: 1. Static time series analysis and critical path extraction During timing iteration, the current set of critical timing paths is extracted using the static timing analysis tool OpenTimer, and pin pairs appearing in all critical paths are further identified.

[0033] 2. Calculate the path entropy for each pin pair.

[0034] For pin pairs It may appear on one or more critical paths. Setting this pin to the set of critical paths that have appeared is... For the paths in this set (Right now For example, the corresponding normalized weights are: ; in, Representing a path The degree of relaxation, This represents the minimum slack among all critical paths. Emphasis on the path The importance of pin pairs The total weight is obtained by summing the weights of all the paths traversed. : ; in, For pin pairs Total weight, For pin pairs The set of critical paths that appear For a single critical path in the set, For path Normalized weights.

[0035] For pin pairs The path entropy is calculated using the following formula: ; in, For pin pairs Normalized path entropy, For pin pairs The number of critical paths traversed It is the numerical stability coefficient; As a normalization factor, it is used to ensure that the path entropy is within the normal range. Within the range; normalized path entropy The degree of relaxation concentration in pin pairs was captured: lower values ​​indicate that relaxation is dominated by a few critical paths, while higher values ​​indicate that relaxation is more evenly distributed across the pin pair. Finally, the weight calculation formula guided by path entropy is: ; in, For pin pairs Weights based on path entropy, This is a hyperparameter with a value range of [0,1], used to control the degree of path entropy suppression. For pin pairs Normalized path entropy, For pin pairs The total weight.

[0036] The weight calculation process for other pin pairs guided by path entropy is the same as above. This formula enhances timing-driven layout by focusing optimization efforts on structurally important and time-critical pin pairs.

[0037] 3. Calculate the average number of path nodes for each pin pair.

[0038] To characterize the optimizability of the critical path, this invention introduces the average number of nodes as a metric for evaluating physical tunability. Specifically, for any pin pair... If it appears in multiple critical paths, then the average number of nodes in these paths is calculated. This serves as a measure of the structural complexity of the path associated with that pin. The formula for calculating the average number of nodes is as follows: ; in, For pin pairs Average number of path nodes For pin pairs The number of critical paths traversed For path The number of nodes in the path. This metric reflects the latency-dominated pattern of the path: larger... This typically means that path delay is dominated by cell delay. Such paths are usually structurally rigid, and adjusting the physical location of cells along the path has limited effect on timing improvement; conversely, smaller... This indicates that the path is dominated by the delay of the connector, and the timing can be significantly improved by spatial proximity, showing greater optimization potential.

[0039] To reflect the physical adjustability of the path in weight modeling, this invention further defines a weight suppression term based on the number of nodes. Its form is an exponentially decaying function: ; in, For pin pairs Weight suppression terms based on the number of nodes, For pin pairs Average number of path nodes The sensitivity adjustment coefficient of the node number suppression function controls the decay rate, and its value is... ; The node threshold used to distinguish between the dominant connection path and the logical dominant path has a value of [value missing]. ; To set a minimum lower bound for the weights and ensure numerical stability, its value is... .

[0040] This design effectively suppresses the attraction of pin pairs to paths with a large number of nodes, avoiding the allocation of optimization resources to paths with high structural rigidity and poor optimization performance. At the same time, this mechanism encourages optimized pin pairs to be close together on paths with a small number of nodes and high responsiveness, improving the physical practicality and timing convergence efficiency of the overall layout optimization.

[0041] 4. Feature fusion modeling of pin weights

[0042] Although path entropy and average number of nodes describe the importance of the critical path from the perspectives of relaxation and physical adjustability, respectively, in actual circuits, the dominance of these two characteristics varies depending on the design structure. Using a fixed weighting method cannot achieve optimal optimization results under different topologies.

[0043] To address this, this invention proposes a dynamic feature fusion mechanism. This mechanism adaptively adjusts the contributions of a balancing factor to two metrics: path entropy and average number of path nodes, thereby achieving more universal pin pair weight modeling. Specifically, for each pin pair... Based on the average number of logical nodes in its associated paths Calculate a normalized equilibrium factor This factor in Within the range, this represents the proportion of the node number suppression term in the final weight. Its definition is as follows: ; in, For pin pairs The normalized balance factor has a value range of [0,1]. For pin pairs Average number of path nodes The sensitivity adjustment parameter for the balance factor controls the steepness of the transition curve, and its value is... ; The set threshold number of nodes is used to distinguish path characteristics with high and low structural rigidity; its value is... .

[0044] This function exhibits Sigmoid curve characteristics: when When smaller, Approaching 0 indicates that the pin pair weights should rely more on path entropy (suitable for paths dominated by connection delay); while when When it is large, Approaching 1, the weights are primarily controlled by a node count suppression term (suitable for paths dominated by cell delay). Ultimately, the combined weights of the pin pairs... It is expressed as follows: ; in, For pin pairs The overall weight, As the normalized balance factor, For the weighted suppression term based on the number of nodes, The weights are based on path entropy.

[0045] Through this fusion mechanism, the method proposed in this invention can adaptively adjust the modeling method of pin attraction based on the structural characteristics of different paths, thereby maintaining the stability and effectiveness of timing optimization in diverse designs and enhancing the generalization ability of the model.

[0046] 5. Pin pair weighting embedding layout optimization objective function

[0047] Calculate the pin pair weights The pin attraction term applied to the layout optimization objective function takes the following form: ; in, For pin attraction value, For the set of pin pairs in all critical paths, For pin pairs The overall weight, ( , ), ( , ) are pins pins The physical coordinates.

[0048] This feature encourages critical path pins to be close together in physical space, thereby shortening the delay path and improving timing performance.

[0049] 6. Optimization and Iterative Updates

[0050] During the layout iteration process, the pin pair weights are recalculated based on the current critical path in each round, and the overall objective function is updated step by step to guide the continuous adjustment of cell positions to converge to a better timing state.

[0051] 7. Convergence judgment and layout legalization

[0052] Once the critical path timing meets the convergence condition (such as TNS / WNS convergence, or reaching the maximum number of iterations), the layout legalization stage begins, and the final physical layout result is output.

[0053] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0054] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A time-driven global layout method based on path entropy and average path length, characterized in that, Includes the following steps: S1. In the timing iteration, the current set of critical timing paths is extracted using static timing analysis tools, and pin pairs appearing in all critical paths are identified. S2. For each pin pair, determine the set of critical paths that appear, calculate the normalized weight of each path in the critical path set and sum them to obtain the total weight, then calculate the normalized path entropy of the pin pair based on the normalized weight and the number of paths, and finally combine the total weight, hyperparameters and normalized path entropy to obtain the weight of the pin pair based on path entropy. S3. For each pin pair, calculate the average number of nodes in the associated critical path, and then obtain the weight suppression term based on the number of nodes for the pin pair by using the exponential decay function, combined with the average number of nodes, sensitivity adjustment coefficient, node threshold and lower limit of weight minimum value. S4. Based on the average number of path nodes of the pin pair, calculate the normalized balance factor using the Sigmoid function. Then, based on the balance factor, perform a weighted fusion of the weights of the pin pair based on path entropy and the weights based on the number of nodes to obtain the comprehensive weight of the pin pair. S5. Apply the obtained pin pair weights to the pin attraction term in the layout optimization objective function. S6. During the layout iteration process, the pin pair comprehensive weights are recalculated based on the current critical path in each round, and the overall objective function for layout optimization is updated step by step to guide the adjustment of circuit unit positions. S7. Determine whether the timing of the critical path meets the convergence condition. If it does, proceed to the layout legalization stage and output the final physical layout result of the integrated circuit. If it does not meet the condition, return to S1 to continue the iteration.

2. The time-driven global layout method based on path entropy and average path length according to claim 1, characterized in that, The formula for calculating the normalized weights of each path in the critical path set in S2 is: ; in, For path The degree of relaxation, The minimum slack across all critical paths. For path Normalized weights.

3. The time-driven global layout method based on path entropy and average path length according to claim 2, characterized in that, The formula for calculating the total weight in S2 is: ; in, For pin pairs Total weight, For pin pairs The set of critical paths that appear For a single critical path in the set, For path Normalized weights.

4. The time-driven global layout method based on path entropy and average path length according to claim 3, characterized in that, The formula for calculating the normalized path entropy of a pin pair in S2 is: ; in, For pin pairs Normalized path entropy, The numerical stability coefficient, For pin pairs The number of critical paths traversed For pin pairs Total weight, For pin pairs The set of critical paths that appear For a single critical path in the set, For path Normalized weights.

5. The time-driven global layout method based on path entropy and average path length according to claim 4, characterized in that, The formula for calculating the pin pair weights based on path entropy in S2 is as follows: ; in, For pin pairs Weights based on path entropy, This is a hyperparameter with a value range of [0,1], used to control the degree of path entropy suppression. For pin pairs Normalized path entropy, For pin pairs The total weight.

6. The time-driven global layout method based on path entropy and average path length according to claim 1, characterized in that, The formula for calculating the average number of path nodes for a pin pair in S3 is: ; in, For pin pairs Average number of path nodes For pin pairs The number of critical paths traversed For path The number of nodes in the system.

7. The time-driven global layout method based on path entropy and average path length according to claim 6, characterized in that, The formula for calculating the weight suppression term based on the number of nodes in S3 is as follows: ; in, For pin pairs Weight suppression terms based on the number of nodes, This represents the sensitivity adjustment coefficient of the node number suppression function. To distinguish between the node thresholds of the dominant connection path and the logically dominant path, This is the lower bound of the minimum weight. For pin pairs The average number of path nodes.

8. The time-driven global layout method based on path entropy and average path length according to claim 7, characterized in that, The formula for calculating the normalized equilibrium factor in S4 is: ; in, For pin pairs The normalized balance factor has a value range of [0,1]. This is the sensitivity adjustment parameter for the balance factor. For pin pairs Average number of path nodes This is the threshold for the number of nodes.

9. A time-driven global layout method based on path entropy and average path length according to claim 8, characterized in that, The formula for calculating the overall weight of pin pairs in S4 is as follows: ; in, For pin pairs The overall weight, As the normalized balance factor, For the weighted suppression term based on the number of nodes, The weights are based on path entropy.

10. A time-driven global layout method based on path entropy and average path length according to claim 1, characterized in that, The pin pair weights obtained in S5 are used in the calculation formula of the pin attraction term in the layout optimization objective function: ; in, For pin attraction value, For the set of pin pairs in all critical paths, For pin pairs The overall weight, ( , ), ( , ) are pins pins The physical coordinates.