A process for resolving pcb si failure

Abstract

The application discloses a kind of processes for solving PCBSI failure, including the following operating steps: S1, the PCB substrate suitable for the material quality of PCB plate production is selected to carry out the pressing production of PCB plate;S2, after the pressing of PCB plate is completed, the PCB plate is drilled;S3, after the drilling of PCB plate is completed, the PCB plate is electroplated;S4, after the electroplating of PCB plate is completed, the outer layer circuit of PCB plate is carried out, and the application relates to the field of PCB test technology.The process for solving PCBSI failure finds out relevant factors according to SI failure principle, finds out the strong influence factor of correlation by designing test, wherein HCL concentration is the strongest influence factor, and the remaining conditions also cooperate with the best pressing heating rate, press pressure, press cooling rate, degumming process type, current density, electroplating time, etching pressure, oxidizing agent concentration, etching speed, etching tank temperature, HCL concentration %, to solve the process problem of SI failure, and improve the success rate of test.

Description

Technical Field

[0001] This invention relates to the field of PCB testing technology, specifically a process for solving PCBSI failure. Background Technology

[0002] PCB (Printed Circuit Board) is a crucial component in the electronics industry. Almost every electronic device, from small items like watches and calculators to large ones like computers, communication devices, and military weapon systems, relies on PCBs for the electrical interconnection of integrated circuits and other electronic components. The design and manufacturing quality of PCBs directly impacts the overall product quality and cost, and can even determine the success or failure of a business competition.

[0003] With the development of the electronics industry, the demand for PCBs (Printed Circuit Boards) is increasing. In the PCB design process, the functions of products are becoming more and more powerful, the integration is becoming higher and higher, the signal speed is becoming faster and faster, and the product development cycle is becoming shorter and shorter. As electronic products continue to become smaller, more precise, and faster, PCB design not only has to complete the circuit connection of various components, but also has to consider the various challenges brought about by high speed and high density.

[0004] Early involvement of PCB engineers in the product development process is crucial and necessary to reduce subsequent rework. The production of printed circuit boards involves the production of SI test boards, which are mainly used by customers to verify the supplier's capabilities. Traditional SI test board production processes, due to the lack of optimized process conditions, are prone to SI test failures, thus failing to meet customer requirements. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a process for resolving PCB SI failure. This process solves the problem that the traditional SI test board production process, due to the lack of optimized process conditions, easily leads to final SI test failure, thus failing to meet customer requirements.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a process for resolving PCBSI failure, comprising the following steps: S1. Select a PCB substrate suitable for PCB board manufacturing materials for PCB board lamination. Set the lamination heating rate to 1.5±0.1℃ / min, press pressure to 350psi, and press cooling rate to 3.0±0.1℃ / min. S2. After the PCB board is laminated, drill holes in the PCB board. S3. After drilling is completed on the PCB board, electroplating is performed on the PCB board. S4. After the PCB board is electroplated, the outer layer circuitry is processed on the PCB board, with the following parameters: etching pressure 2.0 kg / cm2, oxidant concentration 20%, etching speed 2.0 m / min, etching tank temperature 52℃, and HCl concentration 2.5%.

[0007] Furthermore, in step S1, during the pressing process, a hot riveting machine is first used to combine the inner circuit board and PP, and then a vacuum press is used to press multiple inner circuit boards and PP together into a multilayer PCB board under high temperature and high pressure.

[0008] Furthermore, in step S2, before drilling the PCB board, the inner and outer layer circuits are made to be connected through the holes.

[0009] Furthermore, in S3, the PCB board is first de-adhesive-removed before electroplating, and then the PCB board is electroplated. The electroplating parameters are used to control the copper thickness and the number of electroplating layers, with an electroplating current density of 1.5 ASF and an electroplating time of 60 min.

[0010] Furthermore, the adhesive removal process involves using a Plasma adhesive removal device and a potassium permanganate adhesive removal device together to remove adhesive from the PCB board.

[0011] Furthermore, in step S4, after electroplating is completed, the outer layer circuitry of the PCB board is fabricated, and the PCB board is subjected to solder mask treatment.

[0012] Furthermore, after solder mask treatment, the PCB board is cut into single or multiple PCB boards for shipment.

[0013] Furthermore, in step S4, after the PCB board is formed, circuit testing is performed on the formed PCB board according to the test conditions preset by the SI testing equipment.

[0014] Furthermore, the rate of change of signal loss is monitored at a fixed frequency to determine whether the PCB board passes the SI test.

[0015] Furthermore, after the PCB board testing is completed, the PCB board that has successfully passed the test undergoes surface treatment and visual inspection.

[0016] Compared with existing technologies, this invention solves the process problems of SI failure by identifying relevant factors based on the SI failure principle and designing experiments to find highly relevant influencing factors, thereby improving the success rate of testing and effectively reducing the cost waste caused by SI test failure. Attached Figure Description

[0017] Figure 1 The flowchart shows the process for solving PCBSI failure according to the present invention. Figure 2This is a flowchart illustrating the process for resolving PCBSI failure according to the present invention. Figure 3 This is a schematic diagram showing the press heating rate, press pressure, and press cooling rate during the pressing process of this invention; Figure 4 This is a schematic diagram of the electroplating time and current density during the electroplating process of the present invention; Figure 5 This is a schematic diagram showing the etching pressure, oxidant concentration, etching rate, etching tank temperature, and HCl concentration (%) during the outer layer circuitry process of this invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] Please see Figure 1 and Figure 2 This invention provides a technical solution: a process for solving PCBSI failure, comprising the following steps: S1. Select a PCB substrate suitable for PCB board manufacturing materials for PCB board lamination and manufacturing.

[0020] S2. After the PCB board is laminated, drill holes in the PCB board.

[0021] S3. After drilling is completed on the PCB board, electroplating is performed on the PCB board.

[0022] Please see Figure 5 S4. After the PCB board is electroplated, the outer layer circuit is processed on the PCB board, wherein the etching pressure is 2.0 kg / cm2, the oxidant concentration is 20%, the etching speed is 2.0 m / min, the etching tank temperature is 52℃, and the HCl concentration is 2.5%.

[0023] Please see Figure 3 After the inner layer circuitry of the PCB is completed, the PCB is laminated; the lamination heating rate is set to 1.5±0.1℃ / min, the press pressure is 350psi, and the press cooling rate is 3.0±0.1℃ / min.

[0024] In S1, during the lamination process, a hot riveting machine is first used to combine the inner circuit board and PP, and then a vacuum press is used to press multiple inner circuit boards and PP into a multilayer PCB board under high temperature and high pressure.

[0025] In S2, before drilling holes in the PCB board, the inner and outer layer circuits are made conductive through the holes.

[0026] In S3, the PCB board is first de-adhesive-removed before electroplating, and then the electroplating process is carried out on the PCB board. The electroplating parameters are used to control the copper thickness and the number of electroplating layers.

[0027] Please see Figure 4 For the adhesive removal process, a Plasma adhesive removal device and a potassium permanganate adhesive removal device were used together to remove adhesive from the PCB board. The Plasma and potassium permanganate devices were used with a current density of 1.5 ASF and an electroplating time of 60 min.

[0028] Based on the SI failure principle, relevant factors were identified, and strong influencing factors were found through experimental design. Among them, HCl concentration was the strongest influencing factor. Other conditions were also optimized, including the pressing heating rate, press pressure, press cooling rate, descaling process type, current density, electroplating time, etching pressure, oxidant concentration, etching speed, etching tank temperature, and HCl concentration, in order to solve the process problems of SI failure and improve the success rate of testing.

[0029] In S4, after electroplating, the outer layer circuitry of the PCB is fabricated, and the PCB is then treated with solder mask.

[0030] After solder mask treatment, the PCB board is cut into single or multiple PCB boards for shipment.

[0031] In S4, after the PCB board is formed, circuit testing is performed on the formed PCB board according to the test conditions preset by the SI test equipment.

[0032] The rate of change of signal loss at a fixed frequency is monitored to determine whether the PCB board passes the SI test.

[0033] After the PCB board testing is completed, the PCB boards that have successfully passed the test are subjected to surface treatment and visual inspection.

[0034] Based on the failure mechanism of SI, 11 relevant influencing factors were identified and experimental studies were conducted: The 11 relevant influencing factors in this experiment Using project number A as the PCB board manufacturing type, and to prevent differences in experimental results due to differences in type and process, 22 experimental groups were designed to verify the above 11 relevant influencing factors. The above 11 test groups each have two conditions A and B, and 10 SI tests are conducted for each of the two conditions A and B. Each SI test group contains 10 samples. The experimental design materials of project number A have an SI signal loss of ≥-5dB at 5G frequency. Scoring principle: 1 group of SI tests with 10 samples receives 1 point, otherwise 0 points. 10 groups of SI tests receive a total of 10 points. The results of 11 experimental groups are then used to calculate the total score. During operation, a suitable PCB substrate is selected for PCB board lamination. After lamination, holes are drilled in the PCB board. Following drilling, electroplating is performed. After electroplating, the outer layer circuitry is fabricated using the following settings: etching pressure 2.0 kg / cm², oxidant concentration 20%, etching speed 2.0 m / min, etching bath temperature 52℃, and HCl concentration 2.5%. After the inner layer circuitry is fabricated, the PCB board is laminated again. The lamination heating rate is set to 1.5 ± 0.1℃ / min, and the press pressure is 350 psi. The press cooling rate is 3.0±0.1℃ / min. During pressing, a hot riveting machine is first used to combine the inner layer circuit boards and PP, and then a vacuum press is used to press multiple inner layer circuit boards and PP into a multilayer PCB board under high temperature and high pressure. Before drilling the PCB board, the inner and outer layer circuits are made to be connected through the holes. Before electroplating, the PCB board is de-adhesive-removed, and then the PCB board is electroplated. The electroplating parameters are used to control the copper thickness and the number of plating layers. For the adhesive removal work, a Plasma adhesive removal device and a potassium permanganate adhesive removal device are used together to remove the adhesive from the PCB board. The current density of Plasma and potassium permanganate is 1.5. ASF plating time 60 min. Based on the SI failure principle, relevant factors were identified, and strong influencing factors were found through experimental design. Among them, HCl concentration was the strongest influencing factor. Other conditions were also optimized, including the pressing heating rate, press pressure, press cooling rate, desmearing process type, current density, plating time, etching pressure, oxidant concentration, etching speed, etching tank temperature, and HCl concentration%, in order to solve the process problems of SI failure and improve the success rate of the test.

[0035] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.

[0036] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A process for resolving PCBSI failure, characterized in that: The following steps are included: S1. Select a PCB substrate suitable for PCB board manufacturing materials for PCB board lamination. Set the lamination heating rate to 1.5±0.1℃ / min, press pressure to 350psi, and press cooling rate to 3.0±0.1℃ / min. S2. After the PCB board is laminated, drill holes in the PCB board. S3. After drilling is completed on the PCB board, electroplating is performed on the PCB board. S4. After the PCB board is electroplated, the outer layer circuitry is processed on the PCB board, with the following parameters: etching pressure 2.0 kg / cm2, oxidant concentration 20%, etching speed 2.0 m / min, etching tank temperature 52℃, and HCl concentration 2.5%.

2. The process for solving PCBSI failure according to claim 1, characterized in that: In step S1, during the pressing process, a hot riveting machine is first used to combine the inner circuit board and PP, and then a vacuum press is used to press multiple inner circuit boards and PP into a multilayer PCB board under high temperature and high pressure.

3. The process for solving PCBSI failure according to claim 1, characterized in that: In step S2, before drilling holes in the PCB board, the inner and outer layer circuits are made to be connected through holes.

4. The process for resolving PCBSI failure according to claim 1, characterized in that: In step S3, the PCB board is first de-adhesive-removed before electroplating, and then the PCB board is electroplated. The electroplating parameters are used to control the copper thickness and the number of electroplating layers, with an electroplating current density of 1.5 ASF and an electroplating time of 60 min.

5. The process for solving PCBSI failure according to claim 4, characterized in that: For the adhesive removal process, Plasma adhesive removal equipment and potassium permanganate adhesive removal equipment are used together to remove adhesive from the PCB board.

6. The process for resolving PCBSI failure according to claim 1, characterized in that: In step S4, after electroplating is completed, the outer layer circuit of the PCB board is fabricated, and the PCB board is subjected to solder mask treatment.

7. The process for solving PCBSI failure according to claim 6, characterized in that: After solder mask treatment, the PCB board is cut into single or multiple PCB boards for shipment.

8. The process for solving PCBSI failure according to claim 7, characterized in that: In step S4, after the PCB board is formed, circuit testing is performed on the formed PCB board according to the test conditions preset by the SI testing equipment.

9. The process for solving PCBSI failure according to claim 8, characterized in that: The rate of change of signal loss at a fixed frequency is monitored to determine whether the PCB board passes the SI test.

10. A process for resolving PCBSI failure according to claim 8, characterized in that: After the PCB board testing is completed, the PCB boards that have successfully passed the test are subjected to surface treatment and visual inspection.

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