Mask and method of manufacturing a mask

By controlling the surface roughness and maximum height of the mask layer, the problem of shape deviation of the vapor deposition layer caused by the undulation between the display substrate and the mask was solved, thereby improving the accuracy and uniformity of the vapor deposition layer.

CN122249581APending Publication Date: 2026-06-19DAI NIPPON PRINTING CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
DAI NIPPON PRINTING CO LTD
Filing Date
2024-11-15
Publication Date
2026-06-19

AI Technical Summary

Technical Problem

The minute undulations between the display substrate and the mask cause the shape of the vapor-deposited layer to deviate from the ideal shape, which is difficult to solve effectively with existing technologies.

Method used

By employing a mask layer design, the surface roughness and maximum height of the substrate and mask layer are controlled within a specific range. By adjusting the ratio of line and surface roughness, the shape deviation of the vapor-deposited layer is suppressed.

Benefits of technology

It effectively suppressed the shape deviation of the vapor-deposited layer and improved the precision and uniformity of the vapor-deposited layer.

✦ Generated by Eureka AI based on patent content.

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Abstract

A mask may include a substrate and a mask layer. The substrate includes a first surface, a second surface opposite to the first surface, and at least one first opening extending from the first surface to the second surface. The mask layer includes a first surface facing the second surface and a second surface opposite to the first surface. The mask layer may include two or more first regions overlapping the first opening when viewed from above, and second regions located between and outside the two or more first regions when viewed from above. The two or more first regions may each include two or more second openings extending from the first surface to the second surface. The second surface of the first region has a first arithmetic mean roughness (Ra1) related to line roughness and a first arithmetic mean roughness (Sa1) and a first maximum height (Sz1) related to surface roughness. The first arithmetic mean roughness (Ra1) may be 50 nm or less. The first maximum height (Sz1) may be 1000 nm or less. The ratio of the first arithmetic mean roughness (Sa1) to the first arithmetic mean roughness (Ra1), i.e., Sa1 / Ra1, may be 1.82 or less.
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Description

Technical Field

[0001] Embodiments of this disclosure relate to masks and methods of manufacturing masks. Background Technology

[0002] Vapor deposition is a known method for forming precise patterns. In vapor deposition, firstly, a mask with openings is assembled with a display substrate. Then, a vapor-deposited material is deposited onto the display substrate through the openings in the mask. As a result, a vapor-deposited layer containing the vapor-deposited material is formed on the display substrate in a pattern corresponding to the pattern of the openings in the mask. Vapor deposition is used, for example, as a method for forming pixels in an organic EL display device.

[0003] For example, Patent Document 1 discloses a mask comprising a mask substrate having two or more openings and an outer frame substrate supporting the mask substrate. Patent Document 1 proposes using a thin mask substrate. By making the mask substrate thin, highly precise vapor deposition is achieved.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2013-163864 Summary of the Invention

[0007] The problem that the invention aims to solve

[0008] When fine undulations are generated on the surface of a mask opposite the display substrate, a gap is created between the display substrate and the mask due to these undulations. If the vapor-deposited material enters the gap, the shape of the vapor-deposited layer deviates from the ideal shape. For example, the outline of the vapor-deposited layer locally deviates from the ideal line. For example, the thickness of the vapor-deposited layer in the outline portion locally deviates from the ideal thickness.

[0009] Methods for solving problems

[0010] One embodiment of the mask disclosed herein may include a substrate and a mask layer. The substrate includes a first surface, a second surface opposite to the first surface, and at least one first opening extending from the first surface to the second surface. The mask layer includes a first surface facing the second surface and a second surface opposite to the first surface. The mask layer may include two or more first regions overlapping the first opening when viewed from above, and second regions located between and outside the two or more first regions when viewed from above. Each of the two or more first regions may include two or more second openings extending from the first surface to the second surface. The second surface of the first region has a first arithmetic mean roughness (Ra1) related to line roughness and a first arithmetic mean roughness (Sa1) and a first maximum height (Sz1) related to surface roughness. The first arithmetic mean roughness (Ra1) may be 50 nm or less. The first maximum height (Sz1) may be 1000 nm or less. The ratio of the first arithmetic mean roughness (Sa1) to the first arithmetic mean roughness (Ra1), i.e., Sa1 / Ra1, can be 1.82 or less.

[0011] Invention Effects

[0012] According to embodiments of this disclosure, it is possible to suppress deviations of the shape of the vapor-deposited layer from the desired shape. Attached Figure Description

[0013] Figure 1 This is a top view showing an example of an organic device.

[0014] Figure 2 This is a diagram showing an example of a vapor deposition apparatus equipped with a mask.

[0015] Figure 3A This is a top view showing an example of the incident surface of the mask.

[0016] Figure 3B This is a top view showing an example of the incident surface of the mask.

[0017] Figure 4 This is a top view showing an example of the exit surface of a mask.

[0018] Figure 5 yes Figure 3A A cross-sectional view of the mask along the VV line.

[0019] Figure 6 This is a cross-sectional view showing an example of the first region.

[0020] Figure 7 This is a cross-sectional view showing an example of the twenty-first region.

[0021] Figure 8 This is a top view showing an example of a vapor-deposited layer with an ideal shape.

[0022] Figure 9 yes Figure 8 A cross-sectional view of the vapor-deposited layer along the IX-IX rays.

[0023] Figure 10 This is a top view showing an example of a vapor-deposited layer with a shape that deviates from the ideal shape.

[0024] Figure 11 yes Figure 10 A cross-sectional view of the vapor-deposited layer along line XI-XI.

[0025] Figure 12 This is a top view showing the measurement area of ​​the mask layer.

[0026] Figure 13 This is a top view showing the specific measurement location in the determination of line roughness.

[0027] Figure 14 This is a top view showing the specific measurement location in the surface roughness measurement.

[0028] Figure 15 This is a cross-sectional view showing an example of the process for forming the intermediate layer.

[0029] Figure 16 This is a cross-sectional view showing an example of the process of forming an insulating layer.

[0030] Figure 17A This is a cross-sectional view showing an example of the process of processing the insulating layer.

[0031] Figure 17B This is a top view showing an example of the process of processing the insulating layer.

[0032] Figure 18 This is a cross-sectional view showing an example of the process of forming a metal layer.

[0033] Figure 19 This is a cross-sectional view showing an example of a process for grinding the second metal surface of a metal layer.

[0034] Figure 20 This is a cross-sectional view showing an example of the process of removing the insulating layer.

[0035] Figure 21 This is a cross-sectional view showing an example of the process of forming a protective layer and a resist layer.

[0036] Figure 22 This is a cross-sectional view showing an example of a process for processing a substrate.

[0037] Figure 23 This is a cross-sectional view showing an example of the process of removing the protective layer.

[0038] Figure 24 This is a cross-sectional view showing an example of the vapor deposition process.

[0039] Figure 25 This is a diagram illustrating the evaluation method for shadows.

[0040] Figure 26 This is a cross-sectional view showing an example of a separation process.

[0041] Figure 27 This is a cross-sectional view showing an example of the separation process in the comparison method.

[0042] Figure 28 This is a cross-sectional view showing an example of the mask in the first modified example.

[0043] Figure 29 This is a cross-sectional view showing an example of the twenty-first region in the first modified example.

[0044] Figure 30A This is a cross-sectional view showing an example of the process of processing the insulating layer in the first modified example.

[0045] Figure 30B This is a top view showing an example of the process of processing the insulating layer in the first modified example.

[0046] Figure 31 This is a cross-sectional view showing an example of the process of forming a metal layer in the first modified example.

[0047] Figure 32 This is a cross-sectional view showing an example of the process of grinding the second metal surface of the metal layer in the first modified example.

[0048] Figure 33 This is a cross-sectional view showing an example of the process of forming a protective layer in the first modified example.

[0049] Figure 34 This is a cross-sectional view showing an example of the mask in the second variation.

[0050] Figure 35 This is a cross-sectional view showing an example of the mask in the third variation.

[0051] Figure 36 This is a diagram illustrating an example of a device equipped with organic components.

[0052] Figure 37 This is a table showing the measurement results of the surface roughness of the first region in Example 1.

[0053] Figure 38This is a table showing the measurement results of the surface roughness of the second region in Example 1.

[0054] Figure 39 This is a table showing the evaluation results from Examples 1 to 11.

[0055] Figure 40 This is an example of an image showing a vapor-deposited layer.

[0056] Figure 41 This is an example of an image showing a vapor-deposited layer. Detailed Implementation

[0057] In this specification and accompanying drawings, unless otherwise specified, the terms “substrate,” “sheet,” “film,” etc., which refer to the material that forms the basis of a certain structure, are not distinguished from each other merely based on different names.

[0058] In this specification and the accompanying drawings, unless otherwise specified, terms such as “parallel” and “orthogonal”, values ​​of length and angle, etc., relating to the determination of shape, geometric conditions and their degree, are not limited to the strict meaning, but are interpreted to include the range of degrees to which the same function can be expected.

[0059] In this specification and accompanying drawings, unless otherwise specified, the terms "above" or "below," "upper side" or "lower side," or "above" or "below" of a component or region relative to other components or regions include cases where the component is in direct contact with the other component. Furthermore, it also includes cases where another component is present between the component and the other component, i.e., cases where there is indirect contact. Additionally, unless otherwise specified, the terms "above," "upper side," or "above," or "below," "lower side," or "below" may be used with the up / down direction reversed.

[0060] In this specification, when multiple candidate upper limits and multiple candidate lower limits are listed for a certain parameter, the numerical range of the parameter can be constructed by combining any candidate upper limit with any candidate lower limit. For example, consider the following case: "Parameter B is, for example, above A1, above A2, or above A3. Parameter B is, for example, below A4, below A5, or below A6." In this case, the numerical range of parameter B can be above A1 and below A4, above A1 and below A5, above A1 and below A6, above A2 and below A4, above A2 and below A5, above A2 and below A6, above A3 and below A4, above A3 and below A5, or above A3 and below A6.

[0061] In this specification and accompanying drawings, unless otherwise specified, the state of "opposite" between the faces of element A and element B includes not only the case where the faces of element A and element B are connected, but also the case where element C is located between the faces of element A and element B. That is, the term "opposite" is used to indicate the orientation of the two faces.

[0062] In this specification and accompanying drawings, unless otherwise specified, the same or similar reference numerals are used to refer to the same parts or parts having the same function, and sometimes repeated descriptions are omitted. Additionally, for ease of explanation, the dimensional ratios in the drawings may differ from the actual ratios, and sometimes a component may be omitted from the drawings.

[0063] In this specification and accompanying drawings, unless otherwise specified, one embodiment of this specification can be combined with other examples without contradiction. Furthermore, other examples can also be combined with each other without contradiction.

[0064] Unless otherwise specified in this specification and the accompanying drawings, where more than two steps or processes are disclosed regarding manufacturing methods, other undisclosed steps or processes may be performed between the disclosed steps or processes. Furthermore, the order of the disclosed steps or processes is arbitrary as long as it does not create contradictions.

[0065] In one embodiment of this specification, an example of using a mask to form an organic layer or electrodes on a substrate during the manufacture of an organic EL display device will be described. However, the application of the mask is not particularly limited, and this embodiment can be applied to masks used for various purposes. For example, the mask of this embodiment can also be used to form electrodes for devices used to display or project images or videos for representing virtual reality (VR) or augmented reality (AR). Furthermore, the mask of this embodiment can also be used to form electrodes for display devices other than organic EL display devices, such as electrodes for liquid crystal display devices. Additionally, the mask of this embodiment can also be used to form components of devices other than display devices, such as electrodes for pressure sensors.

[0066] The first aspect of this disclosure is a mask that has: A substrate, the substrate comprising a first surface, a second surface located opposite to the first surface, and at least one first opening extending from the first surface to the second surface; and A mask layer, the mask layer comprising a first surface facing the second surface of the substrate and a second surface located on the opposite side of the first surface. The aforementioned mask layer includes two or more first regions that overlap with the aforementioned first opening when viewed from above, and a second region located between and outside the aforementioned two or more first regions when viewed from above. The aforementioned two or more first regions each include two or more second openings that extend from the aforementioned first surface to the aforementioned second surface. The second surface of the first region described above has a first arithmetic mean roughness (Ra1) related to line roughness, a first arithmetic mean roughness (Sa1) related to surface roughness, and a first maximum height (Sz1). The first arithmetic mean roughness (Ra1) mentioned above is below 50 nm. The aforementioned first maximum height (Sz1) is below 1000nm. The ratio of the first arithmetic mean roughness (Sa1) to the first arithmetic mean roughness (Ra1), i.e., Sa1 / Ra1, is 1.82 or less.

[0067] The second aspect of this disclosure can include the following in the mask of the first aspect: The second surface of the second region has a second arithmetic mean roughness (Ra2) related to line roughness, and the first arithmetic mean roughness (Ra1) may be different from the second arithmetic mean roughness (Ra2).

[0068] The third aspect of this disclosure can have the following characteristics in the mask of the second aspect described above: The first arithmetic mean roughness (Ra1) can be greater than the second arithmetic mean roughness (Ra2).

[0069] The fourth aspect of this disclosure may include the following aspect in the mask of any of the first to third aspects described above: The second surface of the second region has a second arithmetic mean roughness (Sa2) related to surface roughness, and the first arithmetic mean roughness (Sa1) may be different from the second arithmetic mean roughness (Sa2).

[0070] The fifth aspect of this disclosure can have the following characteristics in the mask of the fourth aspect described above: The first arithmetic mean roughness (Sa1) can be greater than the second arithmetic mean roughness (Sa2).

[0071] The sixth aspect of this disclosure may include the following in the mask of any of the first to fifth aspects described above: The second surface of the second region has a second maximum height (Sz2) related to surface roughness, and the first maximum height (Sz1) may be different from the second maximum height (Sz2).

[0072] The seventh method of this disclosure can have the following configuration in the mask of the sixth method described above: The first maximum height (Sz1) can be smaller than the second maximum height (Sz2).

[0073] The eighth aspect of this disclosure may include the following in the mask of any of the first to seventh aspects described above: The in-plane direction of the second surface may include an x-direction and a y-direction orthogonal to the x-direction; the first arithmetic mean roughness (Ra1) may be the average of the arithmetic mean roughness of the second surface of the first region in the x-direction and the arithmetic mean roughness of the second surface of the first region in the y-direction; and the ratio of the difference between the arithmetic mean roughness of the second surface of the first region in the x-direction and the arithmetic mean roughness of the second surface of the first region in the y-direction to the first arithmetic mean roughness (Ra1) may be 0.50 or less.

[0074] The ninth aspect of this disclosure may include the following features in the mask of any of the first to eighth aspects described above: The first region may include a metal layer.

[0075] The tenth aspect of this disclosure may include the following features in the mask of the ninth aspect described above: The second region may include a metal layer.

[0076] The eleventh aspect of this disclosure may include the following features in the mask of the ninth aspect described above: The second region may include an insulating layer.

[0077] The twelfth aspect of this disclosure may include the following configuration within the mask of the eleventh aspect described above: The insulating layer may comprise silicon oxide.

[0078] The thirteenth aspect of this disclosure may include the following in any of the first to twelfth aspects of the mask described above: The mask may include a metal-containing intermediate layer located between the mask layer and the substrate.

[0079] The fourteenth aspect of this disclosure may include the following features in the mask of any of the first to thirteenth aspects described above. The substrate may comprise silicon or a silicon compound.

[0080] The fifteenth aspect of this disclosure is a method for manufacturing a mask, comprising: A substrate preparation process, wherein a substrate comprising a first substrate surface and a second substrate surface located on the opposite side of the first substrate surface is prepared; An insulating layer forming process, wherein an insulating layer is formed comprising an insulating first surface facing the second surface of the substrate and an insulating second surface located on the opposite side of the insulating first surface, and comprising at least two island portions. A metal layer forming process, wherein a metal layer comprising a first metal surface facing the second surface of the substrate and a second metal surface located on the opposite side of the first metal surface is formed between the two or more island portions; The grinding process includes grinding the second surface of the aforementioned metal. The insulation layer removal process includes removing two or more of the aforementioned island portions; and The substrate processing step includes forming a first opening on the substrate that overlaps with the metal layer when viewed from above. The aforementioned mask includes a mask layer comprising two or more first regions that overlap with the first opening when viewed from above and contain the aforementioned metal layer, and a second region that, when viewed from above, is located between and outside the two or more first regions and contains the aforementioned metal layer or the aforementioned insulating layer. The aforementioned mask layer includes a first surface facing the second surface of the aforementioned substrate and a second surface located on the opposite side of the first surface. The second surface of the first region described above has a first arithmetic mean roughness (Ra1) related to line roughness, a first arithmetic mean roughness (Sa1) related to surface roughness, and a first maximum height (Sz1). The first arithmetic mean roughness (Ra1) mentioned above is below 50 nm. The aforementioned first maximum height (Sz1) is below 1000nm. The ratio of the first arithmetic mean roughness (Sa1) to the first arithmetic mean roughness (Ra1), i.e., Sa1 / Ra1, is 1.82 or less.

[0081] The sixteenth aspect of this disclosure can include the following method in the mask manufacturing method of the fifteenth aspect described above. The grinding process may include a process of contacting the insulating second surface and the metal second surface with a slurry containing processing fluid and abrasive particles.

[0082] The seventeenth aspect of this disclosure may include the following aspect in the mask manufacturing method of the fifteenth or sixteenth aspect described above: The second surface of the second region has a second arithmetic mean roughness (Ra2) related to line roughness, and the first arithmetic mean roughness (Ra1) may be different from the second arithmetic mean roughness (Ra2).

[0083] The eighteenth aspect of this disclosure can include the following aspect in the mask manufacturing method of the seventeenth aspect: the first arithmetic mean roughness (Ra1) can be greater than the second arithmetic mean roughness (Ra2).

[0084] The nineteenth aspect of this disclosure can include the following aspect in the mask manufacturing method of any of the fifteenth to eighteenth aspects described above. In the metal layer forming process, the metal layer can also be formed on the outer side of the two or more island portions, and the second region can include the metal layer located on the outer side of the two or more first regions.

[0085] The twentieth aspect of this disclosure may include the following method in the mask manufacturing method of any of the fifteenth to nineteenth aspects described above. The insulating layer forming step may form the insulating layer comprising a frame portion defining the outline of two or more insulating openings and two or more island portions respectively located at the two or more insulating openings; the metal layer forming step may form the metal layer at the two or more insulating openings.

[0086] An embodiment of this disclosure will be described in detail with reference to the accompanying drawings. The embodiments shown below are examples of embodiments of this disclosure, and this disclosure is not limited to these embodiments.

[0087] An organic device 100 having an organic layer formed by using a mask will be described. The organic device 100 has an organic layer or electrode formed by using a mask. Figure 1 This is a cross-sectional view showing an example of an organic device 100.

[0088] Organic device 100 includes a substrate 110 and two or more elements 115 arranged in an in-plane direction along the substrate 110. The substrate 110 includes a first surface 111 and a second surface 112 located on the opposite side of the first surface 111. The elements 115 are located on the first surface 111. The elements 115 are, for example, pixels. The substrate 110 may include two or more types of elements 115. For example, the substrate 110 may include a first element 115A and a second element 115B. Although not shown, the substrate 110 may also include a third element. The first element 115A, the second element 115B, and the third element are, for example, red pixels, blue pixels, and green pixels.

[0089] Component 115 may include a first electrode 120, an organic layer 130 on the first electrode 120, and a second electrode 140 on the organic layer 130.

[0090] The organic device 100 may include an insulating layer 160 located between two adjacent first electrodes 120 when viewed from above. The insulating layer 160 may, for example, comprise polyimide. The insulating layer 160 may overlap with the ends of the first electrodes 120. "View from above" refers to viewing the object along the normal direction of the surface of a plate-like component such as a substrate 110.

[0091] The substrate 110 can be an insulating component. Materials used for the substrate 110 include, for example, rigid materials without flexibility such as silicon, quartz glass, Pyrex glass, and synthetic quartz sheets, or flexible materials such as resin films, optical resin sheets, and thin glass. The substrate 110 can have the same planar shape as a silicon wafer used in semiconductor manufacturing. For example, the substrate 110 can be circular when viewed from above. In this case, the substrate 110 can be processed using apparatus for performing semiconductor manufacturing processes. For example, the first electrode 120, insulating layer 160, etc., can be formed on the substrate 110 using apparatus for performing semiconductor manufacturing processes.

[0092] Element 115 is configured to perform a certain function by applying a voltage between the first electrode 120 and the second electrode 140, or by flowing current between the first electrode 120 and the second electrode 140. For example, if element 115 is a pixel of an organic EL display device, element 115 can emit light that constitutes an image.

[0093] The first electrode 120 comprises a conductive material. For example, the first electrode 120 comprises a metal, a conductive metal oxide, or other conductive inorganic materials. The first electrode 120 may comprise a transparent and conductive metal oxide such as indium tin oxide.

[0094] Organic layer 130 contains organic materials. When an electric current is applied to organic layer 130, organic layer 130 can perform a certain function. Applying an electric current means applying a voltage to organic layer 130 or allowing current to flow through organic layer 130. As organic layer 130, a light-emitting layer that emits light when an electric current is applied, or a layer that changes the transmittance or refractive index of light when an electric current is applied, etc., can be used. Organic layer 130 may contain organic semiconductor materials.

[0095] like Figure 1 As shown, organic layer 130 may include a first organic layer 130A and a second organic layer 130B. The first organic layer 130A is included in the first element 115A. The second organic layer 130B is included in the second element 115B. Although not shown, organic layer 130 may include a third organic layer included in a third element. The first organic layer 130A, the second organic layer 130B, and the third organic layer are, for example, a red light-emitting layer, a blue light-emitting layer, and a green light-emitting layer.

[0096] When a voltage is applied between the first electrode 120 and the second electrode 140, the organic layer 130 located between them is activated. If the organic layer 130 is a light-emitting layer, light is emitted from the organic layer 130, and the light is emitted to the outside from the side of the second electrode 140 or the side of the first electrode 120.

[0097] The organic layer 130 may further include a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, etc.

[0098] The second electrode 140 may comprise a conductive material such as a metal. Examples of materials that can be used for the second electrode 140 include platinum, gold, silver, copper, iron, tin, chromium, aluminum, indium, lithium, sodium, potassium, calcium, magnesium, carbon, and alloys thereof. Figure 1 As shown, the second electrode 140 can extend across two adjacent organic layers 130 when viewed from above.

[0099] Next, the method for forming an organic layer 130 on a substrate 110 using vapor deposition will be described. Figure 2 This is a diagram showing the vapor deposition apparatus 10. The vapor deposition apparatus 10 performs a vapor deposition process in which a vapor deposition material is deposited onto the object.

[0100] like Figure 2 As shown, the vapor deposition apparatus 10 may include a vapor deposition source 6, a heater 8, and a mask 20 inside. The vapor deposition apparatus 10 may also include an exhaust unit for creating a vacuum atmosphere inside the apparatus. The vapor deposition source 6 is, for example, a crucible. The vapor deposition source 6 contains vapor deposition materials 7, such as organic materials or metallic materials. The heater 8 heats the vapor deposition source 6, causing the vapor deposition material 7 to evaporate under a vacuum atmosphere.

[0101] The mask 20 includes an incident surface 201, an exit surface 202, and a second opening 43. The incident surface 201 is opposite to the vapor deposition source 6. The exit surface 202 is located on the opposite side of the incident surface 201. The exit surface 202 is opposite to the first surface 111 of the substrate 110. A portion of the vapor deposition material 7 entering the mask 20 from the exit surface 202 exits through the second opening 43 from the exit surface 202. The vapor deposition material 7 exiting from the exit surface 202 adheres to the first surface 111 of the substrate 110. The exit surface 202 of the mask 20 can be in contact with the first surface 111 of the substrate 110.

[0102] like Figure 2 As shown, the vapor deposition apparatus 10 may include a magnet 5 disposed on the second surface 112 side of the substrate 110. When the mask 20 contains a magnetic material, the magnet 5 can attract the mask 20 toward the substrate 110 by magnetic force. As a result, the gap between the mask 20 and the substrate 110 can be reduced or eliminated. Therefore, the generation of shadows during the vapor deposition process can be suppressed. In this application, shadow refers to the phenomenon that the thickness of the organic layer 130 formed near the wall of the second opening 43 is smaller than the thickness of the organic layer 130 formed at the center of the second opening 43. Shadows are caused by the vapor deposition material 7 adhering to the wall of the mask 20, the vapor deposition material 7 entering the gap between the mask 20 and the substrate 110, etc.

[0103] Next, the mask 20 will be described in detail. Figure 3A This is a top view showing an example of the incident surface 201 of the mask 20. Figure 4 This is a top view showing an example of the exit surface 202 of the mask 20. Figure 5 It is shown Figure 3A A cross-sectional view of mask 20 along the VV line.

[0104] like Figure 5 As shown, mask 20 includes a substrate 30 and a mask layer 40. Mask 20 may also include an intermediate layer 60.

[0105] The substrate 30 includes a first substrate surface 301, a second substrate surface 302, a first opening 31, and a first wall surface 32. The first substrate surface 301 can form an incident surface 201. The second substrate surface 302 is located on the opposite side of the first substrate surface 301. The first wall surface 32 is located between the first substrate surface 301 and the second substrate surface 302.

[0106] The first opening 31 extends from the first surface 301 of the substrate to the second surface 302 of the substrate. As shown in Figure 3, the substrate 30 may contain more than two first openings 31. The more than two first openings 31 may be arranged along a first direction D1 and a second direction D2. The second direction D2 may be orthogonal to the first direction D1. The first direction D1 and the second direction D2 are directions parallel to the first surface 301 of the substrate.

[0107] One first opening 31 can correspond to one screen of an organic EL display device. A mask 20 containing two or more first openings 31 can simultaneously form patterns of organic layers corresponding to two or more screens on the substrate 110. Figure 3A As shown, the first opening 31 can have a rectangular outline when viewed from above.

[0108] The first wall surface 32 faces the first opening 31. Figure 3A In the example shown, the first wall surface 32 extends along the normal direction of the first surface 301 of the substrate.

[0109] like Figure 3A As shown, the area of ​​the substrate 30 without the first opening 31 can be divided into an outer region 35 and an inner region 36. The inner region 36 is the area located between two adjacent first openings 31 when viewed from above. The outer region 35 is the area located between the outer edge 303 of the substrate 30 and the first opening 31 when viewed from above. Figure 3A As shown, the inner region 36 can extend along the first direction D1 and the second direction D2.

[0110] like Figure 3A and Figure 4As shown, the substrate 30 may include alignment marks 39. Alignment marks 39 are formed, for example, on the second surface 302 of the substrate. Alignment marks 39 may also be formed on the first surface 301 of the substrate. Alignment marks 39 are used, for example, to adjust the relative position of the substrate 110 with respect to the mask 20. When the substrate 110 has the property of allowing visible light to pass through, the alignment marks 39 can be visually identified through the substrate 110.

[0111] Alignment mark 39 may also be formed in a layer other than substrate 30.

[0112] Substrate 30 comprises silicon or a silicon compound. Substrate 30 is fabricated, for example, by processing a silicon wafer. Figure 3A As shown, the outer edge 303 of the substrate 30 may include a straight portion. The straight portion is also referred to as the orientation plane 30f.

[0113] Figure 3B This is a top view showing another example of the incident surface 201 of the mask 20. A notch 30c may be formed at the outer edge 303 of the substrate 30. The notch 30c is also referred to as a notch. The notch 30c may include two straight edges 30a and 30b. The edges 30a and 30b may extend from the outer edge 303 toward the center point of the mask 20 when viewed from above.

[0114] The orientation plane 30f and the notch 30c represent the crystal orientation of the silicon wafer constituting the substrate 30.

[0115] The mask 20 may have an x-direction Dx and a y-direction Dy. The x-direction Dx and the y-direction Dy are the in-plane directions of the incident surface 201 and the exit surface 202 of the mask 20. The x-direction Dx and the y-direction Dy are used as the directions for measuring surface roughness, as described later.

[0116] When the substrate 30 includes an orientation plane 30f or a notch 30c, the x-direction Dx is determined by the orientation plane 30f or the notch 30c. When the substrate 30 includes an orientation plane 30f, the x-direction Dx is the direction in which the straight portion of the orientation plane 30f extends. When the substrate 30 includes a notch 30c, the x-direction Dx is a direction orthogonal to the bisecting line that bisects the angle between edge 30a and edge 30b. The y-direction Dy is a direction orthogonal to the x-direction Dx. The x-direction Dx may be parallel to a first direction D1. The y-direction Dy may be parallel to a second direction D2.

[0117] In the absence of orientation plane 30f and notch 30c in the substrate 30, the x-direction Dx and y-direction Dy are determined to be directions parallel to the first direction D1 and the second direction D2.

[0118] The maximum dimension S1 of the substrate 30 when viewed from above is, for example, 100 mm or more, 150 mm or more, or 200 mm or more. Dimension S1 is, for example, less than 500 mm, less than 400 mm, or less than 300 mm.

[0119] The size S2 of the first opening 31 in the direction of the first opening 31 arrangement is, for example, 5mm or more, 10mm or more, or 20mm or more. The size S2 is, for example, less than 100mm, less than 50mm, or less than 30mm.

[0120] The interval S3 between two first openings 31 in the direction in which the first openings 31 are arranged is, for example, 0.1 mm or more, 0.5 mm or more, or 1.0 mm or more. The interval S3 is, for example, 20 mm or less, 15 mm or less, or 10 mm or less.

[0121] The thickness of the substrate 30 is defined as the maximum thickness T11 of the outer region 35. The thickness T11 is, for example, 50 μm or more, 100 μm or more, or 200 μm or more. The thickness T11 is, for example, 1000 μm or less, 800 μm or less, or 600 μm or less.

[0122] Next, the mask layer 40 will be described. The mask layer 40 includes a first surface 401, a second surface 402, and two or more second openings 43. The first surface 401 is opposite to the second surface 302 of the substrate. The second surface 402 is located on the opposite side of the first surface 401. The second surface 402 can form the exit surface 202 of the mask 20.

[0123] The second opening 43 extends from the first surface 401 to the second surface 402. Each second opening 43 corresponds to one vapor-deposited layer. The vapor-deposited layer is, for example, an organic layer 130. A group of two or more regularly arranged second openings 43 corresponds to one screen of an organic EL display device. For example... Figure 3A and Figure 4 As shown, a group of two or more regularly arranged second openings 43 can overlap with a first opening 31 when viewed from above. The two or more groups of second openings 43 are supported by a substrate 30.

[0124] The mask layer 40 can be divided into a first region 41 and a second region 42. The mask layer 40 includes two or more first regions 41. Each of the two or more first regions 41 includes two or more second openings 43. One first region 41 corresponds to one screen of an organic EL display device. One first region 41 may include a group of two or more regularly arranged second openings 43. When viewed from above, the two or more first regions 41 overlap with the first openings 31 of the substrate 30.

[0125] Two or more first regions 41 can be classified as inner first regions 411 and outer first regions 412. The inner first region 411 is the first region 41 located between two first regions 41 in the first direction D1 and between two first regions 41 in the second direction D2. The outer first region 412 is the first region 41 located outside the inner first region 411. The outer first region 412 is adjacent to only one first region 41 in either the first direction D1 or the second direction D2. "Outer" refers to the side furthest from the center point C1 of the mask 20 when viewed from above. "Inner" refers to the side closest to the center point C1 of the mask 20 when viewed from above.

[0126] The second region 42 is the region located between and outside two or more first regions 41 when viewed from above. For example... Figure 4 and Figure 5 As shown, the second region 42 may include a twenty-first region 421, a twenty-second region 422, a twenty-third region 423, and a twenty-fourth region 424. The twenty-first region 421 is the region of the mask layer 40 located between two adjacent first regions 41 in the first direction D1. The twenty-second region 422 is the region of the mask layer 40 located between two adjacent first regions 41 in the second direction D2. The twenty-third region 423 is the region of the mask layer 40 surrounded by the twenty-first region 421 and the twenty-second region 422. The twenty-fourth region 424 is the region of the mask layer 40 located between the outer first region 412 and the outer edge 403 of the mask layer 40.

[0127] Figure 6 This is a cross-sectional view showing an example of a first region 41. The first region 41 includes a second wall surface 44 facing the second opening 43. The first region 41 may include a metal layer 50. The first region 41 may also consist of only the metal layer 50.

[0128] The symbol R1 represents the size of the second opening 43 in the first surface 401. The symbol R2 represents the size of the second opening 43 in the second surface 402. Size R1 is also referred to as the first size. Size R2 is also referred to as the second size. The size of the vapor-deposited layer formed on the substrate 110 by the vapor deposition process using the mask 20 is determined according to the second size R2.

[0129] The first dimension R1 can be larger than the second dimension R2. In other words, the second dimension R2 can be smaller than the first dimension R1. As a result, it is possible to suppress the generation of shadows near the second wall surface 44. The first dimension R1 and the second dimension R2 are determined in the direction in which the second openings 43 are arranged.

[0130] like Figure 6As shown, the second wall 44 may include a conical surface 44a that extends away from the center of the second opening 43 as it moves from the second surface 402 toward the first surface 401. The second wall 44 includes the conical surface 44a, thereby enabling a dimension R1 to be larger than a dimension R2.

[0131] exist Figure 6 In this context, the symbol S8 represents the width of the conical surface 44a in the direction in which the second openings 43 are arranged. The width S8 may be 0.2 μm or more, 0.5 μm or more, or 1.0 μm or more. The width S8 may be 25 μm or less, 20 μm or less, or 10 μm or less.

[0132] exist Figure 6 In this context, the symbol θ1 represents the angle between the second wall 44 and the second surface 402. Angle θ1 can be, for example, 50° or more, 55° or more, or 60° or more. Angle θ1 can also be, for example, less than 90°, less than 85° or less.

[0133] The thickness T2 of the mask layer 40 in the first region 41 is less than the thickness T11 of the substrate 30. The thickness T2 is, for example, 25.0 μm or less, 10.0 μm or less, or 5.0 μm or less. As a result, the generation of shadows can be suppressed. Alternatively, the thickness T2 can be, for example, 0.5 μm or more, 1.0 μm or more, or 2.0 μm or more. As a result, defects such as pinholes or deformation in the first region 41 can be suppressed.

[0134] The interval S5 between the two second walls 44 in the direction in which the second openings 43 are arranged is, for example, 1.0 μm or more, 2.0 μm or more, or 3.0 μm or more. The interval S5 is, for example, 25.0 μm or less, 10.0 μm or less, or 5.0 μm or less.

[0135] The metal layer 50 may contain a metal. The metal may be a magnetic material or a non-magnetic material. Magnetic materials include, for example, nickel, iron, cobalt, and their alloys. Non-magnetic materials include, for example, copper, aluminum, titanium, chromium, and their alloys.

[0136] The first region 41 may include layers other than the metal layer 50. The first region 41 may be composed of layers other than the metal layer 50. For example, the first region 41 may include polysilicon, etc.

[0137] Figure 7 This is a cross-sectional view showing an example of a portion of the mask 20 corresponding to the twenty-first region 421 of the mask layer 40. The mask 20 includes a substrate 30 constituting the inner region 36 and a mask layer 40 constituting the twenty-first region 421. The mask 20 may include an intermediate layer 60 located between the substrate 30 and the mask layer 40.

[0138] Region 421 (21) may contain metal layer 50. Regions 422 (22), 423 (23), 424 (24), etc. (22) may also contain metal layer 50.

[0139] The intermediate layer 60 will be described. The intermediate layer 60 includes a layer that performs a certain function for the substrate 30 or the mask layer 40. For example, the intermediate layer 60 includes a barrier layer 61. The barrier layer 61 is located between the second surface 302 of the substrate 30 and the first surface 401 of the mask layer 40. The barrier layer 61 may be in contact with the second surface 302 of the substrate 30.

[0140] The barrier layer 61 may have the function of stopping etching during the process of etching the substrate 30. Specifically, the barrier layer 61 has resistance to the etchant used to etch the substrate 30. The barrier layer 61 may contain metals such as aluminum, aluminum alloys, titanium, or titanium alloys. Aluminum alloys may contain, for example, aluminum and neodymium. The barrier layer 61 may contain inorganic compounds such as silicon oxide.

[0141] The thickness of the barrier layer 61 is not particularly limited as long as it can prevent the mask layer 40 from being etched during the processing of the substrate 30. For example, the thickness of the barrier layer 61 can be less than the thickness of the mask layer 40, or it can be more than the thickness of the mask layer 40. The thickness of the barrier layer 61 can be, for example, 5 nm or more, 50 nm or more, or 75 nm or more. The thickness of the barrier layer 61 can be, for example, 100 μm or less, 50 μm or less, 10.0 μm or less, 5.0 μm or less, 1.0 μm or less, or 150 nm or less. The higher the resistance of the barrier layer 61 to the etchant used on the substrate 30, the smaller the thickness of the barrier layer 61 can be. It is particularly preferred that the thickness of the barrier layer 61 is 1.0 μm or less.

[0142] The intermediate layer 60 may contain a seed layer 62. The seed layer 62 may be connected to the first surface 401 of the mask layer 40. The seed layer 62 may be located between the barrier layer 61 and the first surface 401.

[0143] Seed layer 62 delivers charge to the plating solution when the metal layer 50 of mask layer 40 is formed by electroplating. Seed layer 62 may contain a metal. The metal is, for example, nickel, copper, titanium, aluminum, and alloys thereof. Seed layer 62 may consist of one layer or two or more layers. For example, seed layer 62 may contain a first layer containing titanium located on barrier layer 61 and a second layer containing copper located on the first layer.

[0144] The thickness of the seed layer 62 is, for example, 2.0 nm or more, 10.0 nm or more, or 30.0 nm or more. The thickness of the seed layer 62 is, for example, 5.0 μm or less, 1.0 μm or less, or 150 nm or less.

[0145] The thickness of each layer, the size of each component, and the spacing are determined by observing the cross-sectional image of the mask 20 using a scanning electron microscope.

[0146] Next, the second surface 402 of the mask layer 40 will be described. The second surface 402 is opposite to the first surface 111 of the substrate 110 during the vapor deposition process. The second surface 402 may also be in contact with the first surface 111 of the substrate 110 during the vapor deposition process.

[0147] If a gap is created between the second surface 402 of the mask layer 40 and the first surface 111 of the substrate 110, the vapor-deposited material 7 will enter the gap between the mask 20 and the substrate 110. If the vapor-deposited material enters the gap, the shape of the vapor-deposited layer will deviate from the ideal shape. For example, the outline of the vapor-deposited layer may locally deviate from the ideal line. For example, the thickness of the vapor-deposited layer in the outline portion may locally deviate from the ideal thickness.

[0148] Figure 8 This is a top view showing an example of a vapor-deposited layer 125 having an ideal shape. The outline of the vapor-deposited layer 125 includes, for example, straight-extending edges. Figure 9 yes Figure 8 A cross-sectional view of the vapor-deposited layer 125 along the IX-IX rays. The IX-IX rays are... Figure 8 The vapor-deposited layer 125 extends parallel to the edge of the contour. The vapor-deposited layer 125 has a uniform thickness regardless of its position.

[0149] Figure 10 This is a top view showing an example of a vapor-deposited layer 125 with a shape that deviates from an ideal shape. The outline of the vapor-deposited layer 125 includes serrated edges, for example, like a sawtooth. Figure 11 yes Figure 10 A cross-sectional view of the vapor-deposited layer 125 along line XI-XI. Line XI-XI and... Figure 10 The edges of the vapor-deposited layer 125 extend approximately parallel to each other. The vapor-deposited layer 125 has a thickness that varies depending on its location.

[0150] To suppress the entry of vapor-deposited material into the gaps and to suppress shading, the second surface 402 of the mask layer 40 preferably has high adhesion to the first surface 111 of the substrate 110. In this embodiment, the surface roughness of the second surface 402 of the mask layer 40 is controlled. It is anticipated that the greater the surface roughness of the second surface 402, the lower the adhesion of the mask layer 40 to the substrate 110. By reducing the surface roughness of the second surface 402, the adhesion of the mask layer 40 to the substrate 110 can be improved.

[0151] As indicators of surface roughness, arithmetic mean roughness and maximum height are known. Both arithmetic mean roughness and maximum height are calculated based on data representing the variation in surface height of the second surface 402. The data representing the variation in surface height is obtained using a laser microscope.

[0152] The arithmetic mean roughness is the average of the absolute values ​​of the differences between the average height and the height at each position on the second surface. As arithmetic mean roughness, there are known arithmetic mean roughness Ra related to line roughness and arithmetic mean roughness Sa related to surface roughness. The arithmetic mean roughness Ra is calculated based on data of the surface height of the second surface 402 measured at each position along a straight line of a specified measurement length. The arithmetic mean roughness Sa is calculated based on data of the surface height of the second surface 402 measured at each position over a region of a specified measurement area.

[0153] The maximum height is the difference between the maximum and minimum heights at various locations on the second surface 402. As for the maximum height, there are known maximum heights Rz related to line roughness and Sz related to surface roughness. The maximum height Rz is calculated based on data of the surface height of the second surface 402 measured at various locations along a straight line of a specified measurement length. The maximum height Sz is calculated based on data of the surface height of the second surface 402 measured at various locations within a region of a specified measurement area.

[0154] The second surface 402 of the first region 41 of the mask layer 40 has a first arithmetic mean roughness Ra1, a first maximum height Rz1, a first arithmetic mean roughness Sa1, and a first maximum height Sz1. The first arithmetic mean roughness Ra1 is calculated by averaging the measured arithmetic mean roughness Ra at 25° of the second surface 402 of the first region 41. The first maximum height Rz1 is calculated by averaging the measured maximum height Rz at 25° of the second surface 402 of the first region 41. The first arithmetic mean roughness Sa1 is calculated by averaging the measured arithmetic mean roughness Sa at 25° of the second surface 402 of the first region 41. The first maximum height Sz1 is calculated by averaging the measured maximum height Sz at 25° of the second surface 402 of the first region 41.

[0155] The second surface 402 of the second region 42 of the mask layer 40 has a second arithmetic mean roughness Ra2, a second maximum height Rz2, a second arithmetic mean roughness Sa2, and a second maximum height Sz2. The second arithmetic mean roughness Ra2 is calculated by averaging the measured arithmetic mean roughness Ra at 25° of the second surface 402 of the second region 42. The second maximum height Rz2 is calculated by averaging the measured maximum height Rz at 25° of the second surface 402 of the second region 42. The second arithmetic mean roughness Sa2 is calculated by averaging the measured arithmetic mean roughness Sa at 25° of the second surface 402 of the second region 42. The second maximum height Sz2 is calculated by averaging the measured maximum height Sz at 25° of the second surface 402 of the second region 42.

[0156] Figure 12 This is a top view showing the measurement areas of the mask layer 40. In five first regions 41 and five second regions 42, the arithmetic mean roughness Ra and maximum height Rz related to line roughness, and the arithmetic mean roughness Sa and maximum height Sz related to surface roughness are measured. The five second regions 42 are five twenty-first regions 421.

[0157] Five first regions 41 include first regions 41A to 41E. First region 41A is the first region 41 that overlaps with or is closest to the center point C1 of mask 20. First region 41B is one of the outer first regions 412. First region 41B is adjacent to the inner first region 411 in the first direction D1. First region 41C is the outer first region 412 located in a position symmetrical to first region 41B with respect to a straight line extending in the first direction D1 and passing through the center point C1, or the outer first region 412 closest to the position of line symmetry. First region 41D is the outer first region 412 located in a position symmetrical to first region 41B with respect to a straight line extending in the second direction D2 and passing through the center point C1, or the outer first region 412 closest to the position of line symmetry. First region 41E is the outer first region 412 located in a position symmetrical to first region 41B with respect to the center point C1, or the outer first region 412 closest to the position of point symmetry.

[0158] Five second regions 42 comprise second regions 42A to 42E. Second region 42A is the twenty-first region 421 adjacent to first region 41A. The distance from second region 42A to first region 41B is shorter than the distance from second region 42A to first region 41D. Second region 42B is the twenty-first region 421 adjacent to first region 41B and the inner first region 411. Second region 42C is the twenty-first region 421 adjacent to first region 41C and the inner first region 411. Second region 42D is the twenty-first region 421 adjacent to first region 41D and the inner first region 411. Second region 42E is the twenty-first region 421 adjacent to first region 41E and the inner first region 411.

[0159] In each of the first regions 41A to 41E, the arithmetic mean roughness Ra, maximum height Rz, arithmetic mean roughness Sa, and maximum height Sz are measured at 5 locations. In each of the second regions 42A to 42E, the arithmetic mean roughness Ra, maximum height Rz, arithmetic mean roughness Sa, and maximum height Sz are measured at 5 locations.

[0160] Figure 13 This is a diagram showing the locations where the arithmetic mean roughness Ra and the maximum height Rz were measured in the first region 41A and the second region 42A.

[0161] The straight line extending along the x-direction Dx and marked with the symbol Mx represents the measurement length of the arithmetic mean roughness Ra and the maximum height Rz in the x-direction Dx. The measurement length of the straight line Mx is 85 μm. Based on the surface height data of the second surface 402 along the straight line Mx, the arithmetic mean roughness Ra and the maximum height Rz in the x-direction Dx are calculated.

[0162] The straight line extending along the y-direction Dy and marked with the symbol My represents the measurement length of the arithmetic mean roughness Ra and the maximum height Rz in the y-direction Dy. The measurement length of the straight line My is 85 μm. Based on the surface height data of the second surface 402 along the straight line My, the arithmetic mean roughness Ra and the maximum height Rz in the y-direction Dy are calculated.

[0163] like Figure 13 As shown, the arithmetic mean roughness Ra and maximum height Rz were measured at five locations within the first region 41A. The surface height data of the second surface 402 were obtained at these five locations along lines Mx and My, respectively. The five locations within the first region 41A are arranged in the y-direction Dy with the center point C2 of the first region 41A as a reference when viewed from above.

[0164] like Figure 13As shown, the arithmetic mean roughness Ra and maximum height Rz were measured at five locations within the second region 42A. The surface height data of the second surface 402 were obtained at these five locations along lines Mx and My, respectively. The five locations within the second region 42A are arranged in the y-direction Dy with the center point C3 of the second region 42A as a reference when viewed from above.

[0165] The arithmetic mean roughness Ra and maximum height Rz in regions 41B to 41E are measured at the same locations as those in region 41A. Similarly, the arithmetic mean roughness Ra and maximum height Rz in regions 42B to 42E are measured at the same locations as those in region 42A.

[0166] The aforementioned first arithmetic mean roughness Ra1 is calculated by averaging the arithmetic mean roughness Ra in the x-direction Dx at 25 and the arithmetic mean roughness Ra in the y-direction Dy at 25 on the second surface 402 of the first region 41. The aforementioned first maximum height Rz1 is calculated by averaging the maximum height Rz in the x-direction Dx at 25 and the maximum height Rz in the y-direction Dy at 25 on the second surface 402 of the first region 41.

[0167] Preferably, the deviation between the arithmetic mean roughness Ra in the x-direction Dx and the arithmetic mean roughness Ra in the y-direction Dy is 0.50 or less. The deviation is the ratio of the difference between the average arithmetic mean roughness Ra in the x-direction Dx at 25 and the average arithmetic mean roughness Ra in the y-direction Dy at 25, relative to a first arithmetic mean roughness Ra1. The deviation can be 0.40 or less, 0.30 or less, 0.20 or less, or 0.10 or less.

[0168] The aforementioned second arithmetic mean roughness Ra2 is calculated by averaging the arithmetic mean roughness Ra in the x-direction Dx at 25 of the second surface 402 of the second region 42 with the arithmetic mean roughness Ra in the y-direction Dy at 25. The aforementioned second maximum height Rz2 is calculated by averaging the maximum height Rz in the x-direction Dx at 25 of the second surface 402 of the second region 42 with the maximum height Rz in the y-direction Dy at 25.

[0169] Preferably, the first arithmetic mean roughness Ra1 is greater than the second arithmetic mean roughness Ra2. As a result, the adhesion of the first region 41 to the substrate 110 is lower than that of the second region 42 to the substrate 110. In the separation process, the first region 41 can separate from the substrate 110 before the second region 42. The stress applied to the first region 41 is reduced, thus suppressing damage to the first region 41.

[0170] The difference between the first arithmetic mean roughness Ra1 and the second arithmetic mean roughness Ra2, i.e. (Ra1-Ra2), is, for example, 0.5 nm or more, 1.0 nm or more, 2.0 nm or more, or 3.0 nm or more. (Ra1-Ra2) is, for example, less than 10.0 nm, less than 8.0 nm, less than 6.0 nm or less than 5.0 nm.

[0171] The first arithmetic mean roughness Ra1 is, for example, 50 nm or less, 40 nm or less, 30 nm or less, or 25 nm or less. By making the first arithmetic mean roughness Ra1 50 nm or less, atomic forces can easily exert their influence between the first region 41 and the substrate 110. As a result, the adhesion between the first region 41 and the substrate 110 can be improved, thus suppressing the gap between the first region 41 and the substrate 110. The first arithmetic mean roughness Ra1 is, for example, 1.0 nm or more, 3.0 nm or more, 5.0 nm or more, or 10 nm or more.

[0172] Figure 14 This is a diagram showing the locations where the arithmetic mean roughness Sa and the maximum height Sz were measured in the first region 41A and the second region 42A.

[0173] The quadrilateral marked Ms represents the area measured for the arithmetic mean roughness Sa and the maximum height Sz. The measured area of ​​quadrilateral Ms is 6617.838 μm. 2 (70.44μm×93.95μm). Based on the surface height data of the second face 402 measured at more than two locations within quadrilateral Ms, the arithmetic mean roughness Sa and the maximum height Sz were calculated.

[0174] like Figure 14 As shown, the arithmetic mean roughness Sa and maximum height Sz were measured at five locations within the first region 41A. The five locations within the first region 41A are arranged along the y-direction Dy with the center point C2 of the first region 41A as the reference when viewed from above.

[0175] like Figure 14 As shown, the arithmetic mean roughness Sa and maximum height Sz were measured at five locations within the second region 42A. These five locations are arranged along the y-direction Dy, with the center point C3 of the second region 42A as the reference when viewed from above.

[0176] The arithmetic mean roughness Sa and maximum height Sz in regions 41B to 41E are measured at the same locations as those in region 41A. Similarly, the arithmetic mean roughness Sa and maximum height Sz in regions 42B to 42E are measured at the same locations as those in region 42A.

[0177] The aforementioned first arithmetic mean roughness Sa1 is calculated by averaging the arithmetic mean roughness Sa at 25 of the second surface 402 of the first region 41. The aforementioned first maximum height Sz1 is calculated by averaging the maximum height Sz at 25 of the second surface 402 of the first region 41.

[0178] The aforementioned second arithmetic mean roughness Sa2 is calculated by averaging the arithmetic mean roughness Sa at 25 of the second surface 402 of the second region 42. The aforementioned second maximum height Sz2 is calculated by averaging the maximum height Sz at 25 of the second surface 402 of the second region 42.

[0179] The first arithmetic mean roughness Sa1 is, for example, 70 nm or less, 60 nm or less, 50 nm or less, or 40 nm or less. By making the first arithmetic mean roughness Sa1 70 nm or less, the gap between the first region 41 and the substrate 110 can be suppressed. The first arithmetic mean roughness Sa1 is, for example, 2.0 nm or more, 4.0 nm or more, 6.0 nm or more, or 12 nm or more.

[0180] Preferably, the ratio of the first arithmetic mean roughness Sa1 to the first arithmetic mean roughness Ra1, i.e., Sa1 / Ra1, is appropriately controlled. As shown in the embodiments described later, even when the first arithmetic mean roughness Ra1 and the first arithmetic mean roughness Sa1 are small, if Sa1 / Ra1 is large, the shape of the vapor-deposited layer may sometimes deviate from the ideal shape. For example, sometimes the outline of the vapor-deposited layer may appear blurry. By appropriately controlling Sa1 / Ra1, the shape of the vapor-deposited layer can be appropriately controlled.

[0181] A large Sa1 / Ra1 ratio means a large deviation in the surface roughness of the second surface 402 in the in-plane direction of the first region 41. By appropriately controlling Sa1 / Ra1, the deviation in the surface roughness of the second surface 402 in the in-plane direction of the first region 41 can be suppressed. Therefore, the shape of the vapor-deposited layer can be made close to the ideal shape.

[0182] The ratio of the first arithmetic mean roughness Sa1 to the first arithmetic mean roughness Ra1, i.e., Sa1 / Ra1, is for example 1.82 or less, 1.70 or less, 1.60 or less, 1.50 or less, or 1.40 or less. Sa1 / Ra1 is for example 1.05 or more, 1.10 or more, 1.20 or more, or 1.30 or more.

[0183] Preferably, the first arithmetic mean roughness Sa1 is greater than the second arithmetic mean roughness Sa2. As a result, the adhesion between the first region 41 and the substrate 110 is lower than that between the second region 42 and the substrate 110.

[0184] The difference between the first arithmetic mean roughness Sa1 and the second arithmetic mean roughness Sa2, i.e. (Sa1-Sa2), is, for example, greater than 0.5 nm, greater than 1.0 nm, greater than 2.0 nm, or greater than 3.0 nm. (Sa1-Sa2) is, for example, less than 10.0 nm, less than 8.0 nm, less than 6.0 nm, or less than 5.0 nm.

[0185] The first maximum height Sz1 is, for example, 1000 nm or less, 700 nm or less, 500 nm or less, 300 nm or less, or 200 nm or less. By making the first maximum height Sz1 less than 1000 nm, atomic forces can easily exert their influence between the first region 41 and the substrate 110. As a result, the adhesion between the first region 41 and the substrate 110 can be improved, thus suppressing the gap between the first region 41 and the substrate 110. The first maximum height Sz1 is, for example, 10 nm or more, 30 nm or more, 50 nm or more, or 100 nm or more.

[0186] The first maximum height Sz1 can also be less than the second maximum height Sz2. The difference between the first maximum height Sz1 and the second maximum height Sz2, i.e. (Sz2-Sz1), is, for example, above 100nm, above 200nm, or above 250nm. (Sz2-Sz1) is, for example, below 500nm, below 450nm, or below 400nm.

[0187] Next, the manufacturing method of the mask 20 will be described. First, a substrate preparation process for preparing the substrate 30 is performed. A silicon wafer can be used as the substrate 30. The first surface 301 and the second surface 302 of the substrate 30 can be polished to a mirror finish. The arithmetic mean roughness Ra of the first surface 301 and the second surface 302 can be less than 1.5 nm or less. The surface orientation of the first surface 301 and the second surface 302 can be (100), (110), etc.

[0188] Next, the intermediate layer forming process is performed. In the intermediate layer forming process, such as... Figure 15 As shown, an intermediate layer 60 is formed on the second surface 302 of the substrate 30. The intermediate layer 60 includes, for example, a barrier layer 61. The intermediate layer 60 may include a barrier layer 61 and a seed layer 62. The intermediate layer 60 may be formed over the entire second surface 302 of the substrate. The intermediate layer 60 may be formed, for example, by physical film formation methods such as sputtering, vapor deposition, or ion plating.

[0189] Next, as Figure 16 As shown, an insulating layer forming process is performed to form an insulating layer 55 on the intermediate layer 60. The insulating layer 55 can be formed on the entire second surface 302 of the substrate.

[0190] The insulating layer 55 is, for example, a photoresist layer. The insulating layer forming process may include a process of bonding a dry film photoresist to the intermediate layer 60. The insulating layer forming process may also include a process of applying a solution containing a photoresist material onto the intermediate layer 60. The photoresist layer may contain either a positive or negative photoresist material.

[0191] The insulating layer 55 may contain a silicon compound. The silicon compound can be formed by chemical vapor deposition. For example, the insulating layer 55 can be formed by chemical vapor deposition using tetraethyl silicate (Si(OC2H5)4) as a raw material. Tetraethyl silicate is also known as TEOS.

[0192] The insulation layer forming process may include an insulation layer processing process for processing the insulation layer 55. Figure 17A and Figure 17B This is a cross-sectional view and a top view showing the processed insulating layer 55. The insulating layer 55 includes an insulating first surface 551 opposite to the substrate second surface 302 of the substrate 30 and an insulating second surface 552 located on the opposite side of the insulating first surface 551.

[0193] The insulating layer 55 comprises two or more island portions 573. The aforementioned second opening 43 of the mask 20 is formed at the location of the island portions 573.

[0194] The symbol R3 represents the dimension of the island portion 573 of the insulating first surface 551. The symbol R4 represents the dimension of the island portion 573 of the insulating second surface 552. Dimension R3 is also referred to as the third dimension. Dimension R4 is also referred to as the fourth dimension. The fourth dimension R4 can be smaller than the third dimension R3. As a result, the second dimension R2 of the second opening 43 can be smaller than the first dimension R1. The third dimension R3 and the fourth dimension R4 are determined in the direction in which the island portions 573 are arranged.

[0195] There are no particular limitations on the method for processing the insulating layer 55. For example, if the insulating layer 55 is a photoresist layer, it can be processed by exposing and developing the insulating layer 55. For example, if the insulating layer 55 contains a silicon compound, it can be processed by dry etching using an etching gas. Dry etching can also be reactive ion etching.

[0196] Next, a metal layer formation process for forming metal layer 50 is performed. In this embodiment, metal layer 50 is formed on... Figure 17A and Figure 17B The gap 574 is between the two or more island portions 573 shown. A metal layer 50 is also formed on the outside of the two or more island portions 573.

[0197] Figure 18 This is a cross-sectional view showing a metal layer 50 formed by a metal layer forming process. The metal layer forming process may include a plating process. That is, the metal layer 50 can be formed by a plating process. In the plating process, a plating solution containing ions of the metal constituting the metal layer 50 is supplied to the intermediate layer 60. The plating process may be an electroplating process or an electroless plating process. In the case of performing an electroplating process, the intermediate layer 60 includes a seed layer 62.

[0198] When the plating process is an electroplating process, the Sa1 / Ra1 ratio of the second surface 402 of the first region 41 can be controlled by controlling the current density of the intermediate layer 60. For example, it has been observed that the smaller the current density, the smaller the Sa1 / Ra1 ratio of the second surface 402 of the first region 41.

[0199] The metal layer 50 includes a first metal surface 501 opposite to the second surface 302 of the substrate 30 and a second metal surface 502 located on the opposite side of the first metal surface 501. The metal layer 50 is in contact with the wall surface of the island portion 573 in the planar direction of the first surface 301 of the substrate 30. The metal layer 50 is in contact with the intermediate layer 60 in the thickness direction of the substrate 30. Figure 18 As shown, the metal layer 50 may also protrude upwards from the insulating layer 55 in the thickness direction of the substrate 30. That is, the metal second surface 502 of the metal layer 50 may also be located above the insulating second surface 552 of the insulating layer 55. The metal layer 50 may also be formed on the insulating second surface 552 of the insulating layer 55.

[0200] The metal layer formation process may include a sputtering process. That is, the metal layer 50 can be formed by a sputtering process. In this case, the metal layer 50 can be formed between two or more island portions 573 and on the insulating second surface 552 of the insulating layer 55.

[0201] The metal layer formation process may include an annealing process that heats the metal layer 50. The annealing process reduces strain generated within the metal layer 50. During the annealing process, the substrate 30, the metal layer 50, and the insulating layer 55 are held in an environment at a temperature higher than room temperature. The annealing temperature may be, for example, 120°C or higher, 140°C or higher, or 150°C or higher. The annealing temperature may be, for example, 250°C or lower, 220°C or lower, or 200°C or lower. If the metal layer 50 is a layer containing an alloy such as an iron-nickel alloy formed by plating, the annealing process can be performed at a higher temperature. When recrystallization is achieved by annealing the layer of alloy formed by plating, properties equivalent to those of the smelted alloy can be achieved. These properties include, for example, thermal expansion coefficient, Young's modulus, and hardness. The annealing temperature for the layer of alloy formed by plating may be, for example, 400°C or higher, 500°C or higher, or 600°C or higher.

[0202] Next, a grinding process can be performed. The grinding process grinds the portion of the metal layer 50 located above the insulating second surface 552 of the insulating layer 55. Figure 19 This is a cross-sectional view showing the polished metal layer 50.

[0203] The grinding process can be performed on the metal layer 50 by chemical mechanical grinding. For example, the grinding process may include a process of contacting a slurry containing processing fluid and abrasive particles with the workpiece. The workpiece is an insulating second surface 552 and a metallic second surface 502. With the slurry positioned between the grinding pad of the grinding tool and the workpiece, the workpiece is rotated relative to the grinding pad, thereby grinding the workpiece.

[0204] The processing fluid can be an acidic or alkaline solution. The abrasive grains can contain inorganic oxides such as alumina, silica, and zirconium oxide. The abrasive pad can contain polyurethane.

[0205] The grinding process can be adjusted so that the surface roughness of the second metal surface 502 of the metal layer 50 constituting the first region 41 is greater than the surface roughness of the second metal surface 502 of the metal layer 50 constituting the second region 42. The metal layer 50 formed in the gap 574 between two or more island portions 573 constitutes the first region 41. The metal layer 50 formed on the outer side of two or more island portions 573 constitutes the second region 42.

[0206] In the grinding of the metal layer 50 constituting the first region 41, the grinding pad contacts the metal layer 50 located at two or more island portions 573 and their gaps 574. On the other hand, in the grinding of the metal layer 50 constituting the second region 42, most of the grinding pad contacts the continuously extending metal layer 50. Therefore, the flowability of the slurry during the grinding of the metal layer 50 constituting the first region 41 is different from that during the grinding of the metal layer 50 constituting the second region 42. Due to the difference in slurry flowability, a difference arises between the surface roughness of the metal layer 50 constituting the first region 41 and the surface roughness of the metal layer 50 constituting the second region 42.

[0207] The difference in surface roughness is controlled by adjusting the material of the abrasive pad, the composition of the slurry, the flow rate of the slurry, the abrasive pressure, the rotational speed of the abrasive pad, and the rotational speed of the object. For example, as shown in the embodiments described later, when the abrasive grains contain alumina, a tendency is observed that the surface roughness of the first region 41 is greater than that of the second region 42. For example, a tendency is observed that the smaller the size of the abrasive grains, the greater the surface roughness of the first region 41 is compared to that of the second region 42.

[0208] The polishing process can be performed until the polishing pad of the polishing tool reaches the insulating second surface 552 of the insulating layer 55 in the thickness direction. As a result, the metal second surface 502 of the metal layer 50 and the insulating second surface 552 of the insulating layer 55 are located on the same plane. "Same plane" means that the step difference between the two surfaces is 1.0 μm or less. The step difference between the metal second surface 502 and the insulating second surface 552 can be 0.5 μm or less, 0.3 μm or less, 0.2 μm or less, or 0.1 μm or less.

[0209] Next, as Figure 20 As shown, an insulation layer removal process is performed to remove the insulation layer 55. In the insulation layer removal process, an etching solution such as buffered hydrofluoric acid is supplied to the insulation layer 55. As a result, two or more island portions 573 are removed.

[0210] Next, a substrate processing step is performed to form a first opening 31 on the substrate 30. In the substrate processing step, such as... Figure 21 As shown, a resist layer 38 can be locally formed on the first surface 301 of the substrate. In the resist layer 38, a resist opening 381 is formed opposite to the first opening 31. As... Figure 21 As shown, a protective layer 72 can be formed covering the metal layer 50.

[0211] The resist layer 38 can be a photoresist. In this case, firstly, a liquid resist material is coated onto the first surface 301 of the substrate to form the resist layer 38. After coating, a heating process can be performed on the resist layer 38. Next, a photolithography process of exposing and developing the resist layer 38 is performed. As a result, resist openings 381 are formed in the resist layer 38.

[0212] Although not shown, the resist layer 38 may be a silicon oxide film locally formed on the first surface 301 of the substrate. The silicon oxide film is formed, for example, by performing a localized thermal oxidation treatment on the first surface 301 of the substrate. The silicon oxide film may be formed on the substrate 30 before the intermediate layer 60 is laminated onto the substrate 30.

[0213] In the substrate processing steps, such as Figure 22 As shown, a first opening 31 is formed in the substrate 30 by etching the substrate 30 starting from the first surface 301 side. The etching can be dry etching using an etching gas. The intermediate layer 60 is resistant to the etchant, therefore, as... Figure 22 As shown, etching is suppressed up to metal layer 50. The etching gas is, for example, SF6 gas.

[0214] Next, a resist removal process to remove the resist layer 38, a protective layer removal process to remove the protective layer 72, and an intermediate layer removal process to remove the intermediate layer 60 are performed. The order of the resist removal process, the protective layer removal process, and the intermediate layer removal process is not particularly limited. Figure 23 This is a cross-sectional view showing the state after the resist removal process and the protective layer removal process have been performed. Two or three of the following processes can be performed simultaneously: resist removal, protective layer removal, and intermediate layer removal.

[0215] When the resist layer 38 is a photoresist, a resist treatment solution containing N-methyl-2-pyrrolidone can be supplied to the resist layer 38. The resist layer 38 can be removed by irradiating it with oxygen plasma. When the resist layer 38 is a silicon oxide film, a resist treatment solution containing hydrofluoric acid can be supplied to the resist layer 38. The resist layer 38 can be removed by dry etching using CF4 gas or the like.

[0216] The intermediate layer 60 can be removed by supplying an etchant to the first opening 31. As a result, the intermediate layer 60 overlapping with the first opening 31 in a top view is removed. The removal of the intermediate layer 60 can be carried out by dry etching using a fluorine-based gas or the like. The removal of the intermediate layer 60 can also be carried out by wet etching using an acidic etchant.

[0217] By removing the resist layer 38, the protective layer 72, and the intermediate layer 60 overlapping with the first opening 31, the following can be obtained: Figures 3A to 5 Mask 20 is shown.

[0218] Next, a method for manufacturing a device using a mask 20 will be described. The manufacturing method includes a vapor deposition process in which a vapor deposition layer is formed on the first surface 111 of a substrate 110 using a mask 20. Figure 24 This is a cross-sectional view illustrating an example of a vapor deposition process. A vapor deposition layer 125 is formed by attaching vapor deposition material, which passes through the second opening 43 of the mask layer 40, to the first surface 111. The vapor deposition layer 125 is, for example, an organic layer 130. The vapor deposition layer 125 can also be a second electrode 140.

[0219] Figure 25 This is a cross-sectional view showing the vapor-deposited layer 125. The vapor-deposited layer 125 has a dimension R5 in the first direction D1. The dimension R5 is measured along a cross-section extending along the first direction D1 from the midpoint of the outer edge of the second opening 43, which extends in the second direction D2, which is orthogonal to the first direction D1.

[0220] The vapor-deposited layer 125 includes a portion formed by vapor-deposited material that penetrates the gap between the second surface 402 of the mask layer 40 and the first surface 111 of the substrate 110. Therefore, the dimension R5 of the vapor-deposited layer 125 is larger than the dimension R2 of the second opening 43 of the second surface 402. The shading is quantitatively evaluated based on the difference between dimension R5 and dimension R2. In this application, the value obtained by dividing the difference between dimension R5 and dimension R2 by 2, i.e., (R5-R2) / 2, is called the shading amount.

[0221] The second surface 402 of the first region 41 of the mask layer 40 has a first arithmetic mean roughness Ra1 of less than 50 nm and a first maximum height Sz1 of less than 1000 nm. The gap between the second surface 402 and the first surface 111 is reduced, thus reducing the amount of shading. The amount of shading is, for example, less than 0.10 μm, less than 0.08 μm, less than 0.06 μm, or less than 0.04 μm.

[0222] The dimensions of the mask 20, R1 to R4, were determined by observing the cross-section of the mask 20 using a scanning electron microscope. The dimensions were calculated by averaging the measurements taken at positions corresponding to the ten second openings 43. The ten second openings 43 were extracted from the first region 41 closest to the center point C1 of the mask 20. The ten second openings 43 included the second opening 43 closest to the center point C2 of the first region 41 when viewed from above.

[0223] The dimension R5 of the vapor-deposited layer 125 was determined by observing the vapor-deposited layer 125 using an atomic force microscope.

[0224] On the second surface 402 of the first region 41 of the mask layer 40, the ratio of the first arithmetic mean roughness Sa1 to the first arithmetic mean roughness Ra1, i.e., Sa1 / Ra1, is 1.82 or less. By reducing Sa1 / Ra1, deviations in the surface roughness of the second surface 402 in the in-plane direction of the second surface 402 of the first region 41 are suppressed. Therefore, the shape of the vapor-deposited layer 125 can be made close to the ideal shape.

[0225] After the vapor deposition process, a separation process is performed to separate the substrate 110 from the mask 20. Figure 26 This is a cross-sectional view illustrating an example of a separation process. In the separation process, the substrate 110 is separated from the mask 20 by moving the substrate 110 relative to the mask 20. The separation process includes making... Figure 2 The process shown involves moving the magnet 5 away from the mask 20. By reducing the magnetic force, the mask 20 can be easily separated from the substrate 110.

[0226] The first arithmetic mean roughness Ra1 of the second surface 402 of the first region 41 is greater than the second arithmetic mean roughness Ra2 of the second surface 402 of the second region 42. Therefore, as Figure 26 As shown, in the separation process, the first region 41 separates from the substrate 110 before the second region 42. The stress applied to the first region 41 is reduced, thus suppressing damage to the first region 41.

[0227] Figure 27 This is a cross-sectional view showing the separation process in the comparison method. In the comparison method, the surface roughness of the first region 41 of the mask 20 is less than the surface roughness of the second region 42. As a result, the adhesion of the first region 41 to the substrate 110 is higher than the adhesion of the second region 42 to the substrate 110. In this case, as... Figure 27 As shown, in the separation process, the second region 42 may separate from the substrate 110 before the first region 41. During the separation process, high stress is applied to the portion of the first region 41 that is finally in contact with the substrate 110. Therefore, the first region 41 is prone to breakage. Breakage of the vapor-deposited layer 125 that is in contact with or near the first region 41 is also considered.

[0228] On the other hand, in this embodiment, the first region 41 separates from the substrate 110 before the second region 42, thus suppressing the damage to the first region 41 and the vapor-deposited layer 125.

[0229] Various modifications can be made to the above-described embodiment. Hereinafter, variations will be described with reference to the accompanying drawings as needed. In the following description and the accompanying drawings used in the description, parts that can be constructed in the same manner as the corresponding parts in the above-described embodiment are represented by the same symbols. Repeated descriptions are omitted. Furthermore, where the effects obtained in the above-described embodiment are clearly also obtainable in the variations, their descriptions are sometimes omitted as well.

[0230] (First variation)

[0231] Figure 28 This is a cross-sectional view showing an example of the mask 20 in the first modified example. Second regions 42, such as the twenty-first region 421 and the twenty-fourth region 424, may contain an insulating layer 55. Although not shown, the twenty-second region 422 and the twenty-third region 423 may also contain an insulating layer 55. The insulating layer 55 located in the second region 42 is also referred to as the frame portion 571.

[0232] Figure 29 This is a cross-sectional view showing an example of a portion of the mask 20 corresponding to the twenty-first region 421 of the mask layer 40. The twenty-first region 421 may include a frame portion 571 of the insulating layer 55 and a metal layer 50 that overlaps with the inner region 36 when viewed from above. An intermediate layer 60 may be located between the substrate 30 and a portion of the metal layer 50 and the frame portion 571.

[0233] like Figure 29 As shown, the metal second surface 502 of the metal layer 50 and the insulating second surface 552 of the frame portion 571 can be located on the same plane. For example, at the boundary between the metal layer 50 and the frame portion 571, the step difference between the metal second surface 502 and the insulating second surface 552 can be less than 1.0 μm.

[0234] The thickness T3 of the insulating layer 55 may be, for example, 25.0 μm or less, 10.0 μm or less, or 5.0 μm or less. The thickness T3 of the insulating layer 55 may be, for example, 0.5 μm or more, 1.0 μm or more, or 2.0 μm or more. The thickness T3 of the insulating layer 55 may be the same as the thickness T4 of the metal layer 50. For example, the difference between thickness T3 and thickness T4 may be 1.0 μm or less.

[0235] like Figure 29As shown, the insulating wall surface 572 of the frame portion 571 can be in contact with the metal outer wall surface 52 of the metal layer 50. In this case, the insulating wall surface 572 has a shape corresponding to the metal outer wall surface 52. For example, the sum of angles θ2 and θ3 can be 180°. Angle θ2 is the angle formed by the metal outer wall surface 52 and the metal second surface 502. Angle θ3 is the angle formed by the insulating wall surface 572 and the insulating second surface 552. The metal outer wall surface 52 can overlap with the substrate 30 when viewed from above. In other words, the metal outer wall surface 52 can also not overlap with the first opening 31 when viewed from above.

[0236] Angle θ2 can be, for example, 50° or more, 55° or more, or 60° or more. Angle θ2 can be, for example, less than 90°, less than 85° or less.

[0237] Angle θ3 can be greater than 90°, or greater than 95°, or greater than 100°. Angle θ3 can be less than 130°, or less than 125°, or less than 120°.

[0238] The insulating layer 55 is made of an insulating material. For example, the insulating layer 55 contains an insulating silicon compound. The silicon compound is, for example, silicon oxide.

[0239] The manufacturing method of the mask 20 in the first modified example will be described. Similar to the embodiment described above, a substrate preparation step, an intermediate layer formation step, and an insulating layer formation step are performed. In the insulating layer formation step, the insulating layer 55 can be formed by chemical vapor deposition. The insulating layer formation step may include an insulating layer processing step for processing the insulating layer 55.

[0240] Figure 30A and Figure 30B This shows a cross-sectional view and a top view of the processed insulating layer 55. The insulating layer processing steps can form two or more insulating openings 56 in the insulating layer 55. The two or more insulating openings 56 can be arranged in a first direction D1 and a second direction D2. The two or more insulating openings 56 have a contour that corresponds to the metal layer 50 located in the first region 41 when viewed from above. Figure 30B As shown, the outline of the insulating opening 56 can be rectangular. Although not shown, the corners of the outline of the insulating opening 56 can also be curved. The outline of the insulating opening 56 can be circular or other shapes. The insulating opening 56 is configured such that the outline of the insulating opening 56 includes the outline of the first opening 31 formed in a subsequent process. The shape of the outline of the insulating opening 56 can be similar to the shape of the outline of the first opening 31.

[0241] The insulating layer 55 includes a frame portion 571 that defines the outline of the insulating opening 56. The frame portion 571 includes an insulating wall surface 572 facing the insulating opening 56. In addition, the insulating layer 55 includes two or more island portions 573 that are surrounded by the insulating opening 56 when viewed from above. The aforementioned second opening 43 of the mask 20 is formed at the location of the island portions 573.

[0242] There are no particular limitations on the method used to process the insulating layer 55. For example, the insulating layer 55 can be processed by dry etching using an etching gas. The dry etching can be reactive ion etching.

[0243] Next, as Figure 31 As shown, a metal layer forming process for forming metal layer 50 is performed. In this modified example, the metal layer 50 is formed in the gap 574 of two or more island portions 573 at the insulating opening 56. When the metal layer forming process includes an electroplating process, holes, cuts, etc. for supplying current to the seed layer 62 can be formed in the frame portion 571 of the insulating layer 55.

[0244] Next, a grinding process can be performed. The grinding process grinds the portion of the metal layer 50 located above the insulating second surface 552 of the insulating layer 55. Figure 32 This is a cross-sectional view showing the polished metal layer 50.

[0245] The grinding process can be adjusted so that the surface roughness of the second metal surface 502 of the metal layer 50 constituting the first region 41 is greater than the surface roughness of the second insulating surface 552 of the insulating layer 55 constituting the second region 42. The metal layer 50 formed in the gaps 574 of two or more island portions 573 constitutes the first region 41. The frame portions 571 of the insulating layer 55 constitute the twenty-first region 421, the twenty-second region 422, the twenty-third region 423, and the twenty-fourth region 424 of the second region 42.

[0246] Next, an insulation layer removal process is performed to remove a portion of the insulation layer 55. In the insulation layer removal process, such as... Figure 33 As shown, a protective layer 71 can be formed covering the frame portion 571 of the insulating layer 55. The protective layer 71 may also not cover the two or more island portions 573. The protective layer 71 may also not cover the metal layer 50 surrounding the two or more island portions 573.

[0247] In the insulating layer removal process, an etching solution such as buffered hydrofluoric acid is supplied to the insulating layer 55. As a result, two or more island portions 573 not covered by the protective layer 71 are removed. After the island portions 573 are removed, the process of removing the protective layer 71 can be performed.

[0248] Next, similar to the embodiments described above, the substrate processing step, resist removal step, protective layer removal step, and intermediate layer removal step are performed. The result is... Figure 28 Mask 20 is shown.

[0249] In this modified example, the second surface 402 of the first region 41 of the mask layer 40 also has a first arithmetic mean roughness Ra1 of less than 50 nm and a first maximum height Sz1 of less than 1000 nm. The gap between the second surface 402 and the first surface 111 is reduced, thus reducing the amount of shading.

[0250] In this modified example, on the second surface 402 of the first region 41 of the mask layer 40, the ratio of the first arithmetic mean roughness Sa1 to the first arithmetic mean roughness Ra1, i.e., Sa1 / Ra1, is also 1.82 or less. By reducing Sa1 / Ra1, deviations in the surface roughness of the second surface 402 in the in-plane direction of the second surface 402 of the first region 41 are suppressed. Therefore, the shape of the vapor-deposited layer 125 can be made close to the ideal shape.

[0251] (Second variation)

[0252] Figure 34 This is a cross-sectional view showing an example of the mask 20 in the second modified example. The thickness T12 of the inner region 36 of the substrate 30 may be less than the thickness T11 of the outer region 35.

[0253] The thickness T12 can be, for example, 10 μm or more, 30 μm or more, or 50 μm or more. The thickness T12 can be, for example, less than 300 μm, less than 200 μm, or less than 100 μm.

[0254] The ratio of thickness T12 to thickness T11, i.e., T12 / T11, is, for example, 0.01 or more, 0.10 or more, or 0.20 or more. T12 / T11 is, for example, 0.90 or less, 0.70 or less, or 0.50 or less.

[0255] (Third variation)

[0256] Figure 35 This is a cross-sectional view showing an example of the mask 20 in the third variation. The substrate 30 may also not be included in the portion located between the two adjacent first regions 41 when viewed from above. In other words, the twenty-first region 421, the twenty-second region 422, and the twenty-third region 423 of the second region 42 may also not be supported by the substrate 30. The twenty-fourth region 424 of the second region 42 may be supported by the outer region 35 of the substrate 30.

[0257] (Fourth variation)

[0258] Figure 36 This diagram illustrates an example of a device 200 including component 100. Device 200 includes a substrate 110 and an organic layer 130, etc., deposited by vapor deposition. The vapor deposition layer is formed by vapor deposition using a mask 20. Device 200 is, for example, a smartphone. Device 200 can also be a tablet terminal, a wearable terminal, etc. Wearable terminals include smart glasses, head-mounted displays, etc.

[0259] Two or more constituent elements disclosed in the above embodiments and modifications can be appropriately combined as needed. Alternatively, several constituent elements can be deleted from all the constituent elements shown in the above embodiments and modifications.

[0260] Example

[0261] The present disclosure will now be described in more detail by way of embodiments, but the present disclosure is not limited to the embodiments described below without departing from its spirit.

[0262] (Example 1)

[0263] A silicon wafer is prepared as substrate 30. The dimension S1 of substrate 30 when viewed from above is 150 mm. The thickness T11 of substrate 30 is 625 μm.

[0264] based on Figures 15-23 The mask 20 is fabricated using the method shown. The first region 41 and the second region 42 of the mask layer 40 contain a nickel-containing metal layer 50. The metal layer 50 is formed by an electroplating process. The thickness of the metal layer 50 is 4.0 μm. The dimensions R1 and R2 of the second opening 43 of the mask layer 40 are 5.5 μm and 3.3 μm, respectively.

[0265] In the grinding process, a slurry containing alumina abrasive grains is used. The grinding pad is made of polyurethane. The grinding process conditions in Example 1 are adjusted so that both the first arithmetic mean roughness Ra1 and the second arithmetic mean roughness Ra2 are below 10 nm.

[0266] The first arithmetic mean roughness Ra1, the first arithmetic mean roughness Sa1, and the first maximum height Sz1 of the first region 41 of the mask layer 40, and the second arithmetic mean roughness Ra2, the second arithmetic mean roughness Sa2, and the second maximum height Sz2 of the second region 42 are calculated. Specifically, the arithmetic mean roughness Ra, the arithmetic mean roughness Sa, and the maximum height Sz are measured at 25° on the second surface 402 of the first region 41 and at 25° on the twenty-first region 421 of the second region 42, respectively, using a laser microscope.

[0267] As laser microscopes, the Keyence VK-X250 and VK-X260 were used. The conditions and settings of the laser microscopes are described below.

[0268] Laser: Blue (wavelength 408nm)

[0269] • Objective lens used for measurement in region 41: 150x

[0270] • Objective lens used for measurement in region 42: 50x

[0271] • Optical zoom: 1.0x

[0272] Measurement mode: Single screen

[0273] • Resolution: 1024×768

[0274] • Measurement quality: High precision

[0275] • Dual scan: Yes

[0276] • Remove fluctuations: Yes

[0277] • High horizontal cutting: Available

[0278] In the determination of arithmetic mean roughness Sa and maximum height Sz, Figure 14 The surface height data of the second face 402 is obtained at each position within the quadrilateral Ms shown. The resolution is 1024×768, therefore the number of data points is 786432.

[0279] Figure 37 This table shows the measurement results of the arithmetic mean roughness Ra, arithmetic mean roughness Sa, and maximum height Sz at 25 locations in the first region 41. The arithmetic mean roughness Ra in the x-direction Dx, the arithmetic mean roughness Ra in the y-direction Dy, the arithmetic mean roughness Sa, and the maximum height Sz were measured at each of the 25 locations. The first arithmetic mean roughness Ra1 is the average of 50 measured values ​​of the arithmetic mean roughness Ra. The first arithmetic mean roughness Ra1 is 6.16 nm. The deviation between the arithmetic mean roughness Ra in the x-direction Dx and the arithmetic mean roughness Ra in the y-direction Dy is 0.06. The first arithmetic mean roughness Sa1 is 8.06 nm. The first maximum height Sz1 is 149.0 nm.

[0280] Figure 38This table shows the measurement results of the arithmetic mean roughness Ra, arithmetic mean roughness Sa, and maximum height Sz at 25 locations in the second region 42. The arithmetic mean roughness Ra in the x-direction Dx, the arithmetic mean roughness Ra in the y-direction Dy, the arithmetic mean roughness Sa, and the maximum height Sz were measured at these 25 locations. The second arithmetic mean roughness Ra2 is the average of 50 measured values ​​of the arithmetic mean roughness Ra. The second arithmetic mean roughness Ra2 is 3.99 nm. The deviation between the arithmetic mean roughness Ra in the x-direction Dx and the arithmetic mean roughness Ra in the y-direction Dy is 0.25. The second arithmetic mean roughness Sa2 is 4.48 nm. The second maximum height Sz2 is 490.5 nm.

[0281] In Example 1, the first arithmetic mean roughness Ra1, the first arithmetic mean roughness Sa1, the first maximum height Sz1, Sa1 / Ra1, the second arithmetic mean roughness Ra2, the second arithmetic mean roughness Sa2, the second maximum height Sz2, and Sa2 / Ra2 are summarized as follows: Figure 39 In the table.

[0282] 1. Implement performance evaluation related to mask 20.

[0283] [Rating 1]

[0284] A vapor deposition process is performed to form a vapor-deposited layer on a substrate 110 using a mask 20. The vapor deposition material is tris(8-hydroxyquinoline)aluminum. The target thickness of the vapor-deposited layer is 50 nm. During the vapor deposition process, a magnet 5 is used to attract the mask 20 to the substrate 110.

[0285] Images of a substrate with two or more vapor-deposited layers were obtained using an optical microscope. Three observers visually confirmed whether the outlines of the vapor-deposited layers were blurred. An Olympus MX63 optical microscope was used. The conditions and settings of the optical microscope are described below.

[0286] Eyepiece: 10x

[0287] Objective lens: 50x

[0288] If all three observers determine that the outline of the vapor-deposited layer is not blurred, the result of evaluation 1 is "OK". If at least one of the three observers determines that the outline of the vapor-deposited layer is blurred, the result of evaluation 1 is "NG".

[0289] Figure 40 This is an example of an image of two or more vapor-deposited layers for which the result of evaluation 1 is "OK". Figure 41 This is an example of an image of two or more vapor-deposited layers for which the result of Evaluation 1 is "NG".

[0290] (Example 2~Example 7)

[0291] Similar to the case in Example 1, based on Figures 15-23 The method shown is used to fabricate mask 20. In the grinding process, similar to Example 1, a slurry containing alumina abrasive grains and a grinding pad made of polyurethane are used. In Examples 1 to 7, the rotational speed, pressure, and grinding time of the grinding process differ from one another.

[0292] Similar to Example 1, the first arithmetic mean roughness Ra1, the first arithmetic mean roughness Sa1, and the first maximum height Sz1 of the first region 41, and the second arithmetic mean roughness Ra2, the second arithmetic mean roughness Sa2, and the second maximum height Sz2 of the second region 42 are calculated. Evaluation 1 is performed similarly to Example 1. The results of Examples 2 to 7 are shown below. Figure 39 In the table.

[0293] (Example 8~Example 10)

[0294] Similar to the case in Example 1, based on Figures 15-23 The mask 20 is fabricated using the method shown. The metal layer 50 is formed by an electroplating process. In the electroplating process, a higher current density is used compared to that in Example 1. In Examples 8 to 10, the current densities of the electroplating processes are different from each other.

[0295] In the grinding processes of Examples 8 to 10, a slurry containing alumina abrasive grains and a grinding pad made of polyurethane were used. The rotational speed, pressure, and grinding time of the grinding process were the same as in Example 1.

[0296] Similar to Example 1, the first arithmetic mean roughness Ra1, the first arithmetic mean roughness Sa1, and the first maximum height Sz1 of the first region 41, and the second arithmetic mean roughness Ra2, the second arithmetic mean roughness Sa2, and the second maximum height Sz2 of the second region 42 are calculated. Evaluation 1 is performed similarly to Example 1. The results of Examples 8 to 10 are shown in... Figure 39 In the table.

[0297] (Example 11)

[0298] Similar to the case in Example 1, based on Figures 15-23 The mask 20 is fabricated using the method shown. The metal layer 50 is formed by an electroplating process. In the electroplating process, a higher current density is used compared to that in Example 1.

[0299] In the grinding process of Example 11, a slurry containing alumina abrasive grains and a grinding pad made of polyurethane were used. The size of the alumina abrasive grains in the slurry used in Example 11 was larger than that in Example 1.

[0300] Similar to Example 1, the first arithmetic mean roughness Ra1, the first arithmetic mean roughness Sa1, and the first maximum height Sz1 of the first region 41, and the second arithmetic mean roughness Ra2, the second arithmetic mean roughness Sa2, and the second maximum height Sz2 of the second region 42 are calculated. Evaluation 1 is performed similarly to Example 1. The results of Example 11 are shown below. Figure 39 In the table.

[0301] like Figure 39 As shown, in Examples 1-6 and 8-9, the first arithmetic mean roughness Ra1 is less than 50 nm, the first maximum height Sz1 is less than 1000 nm, and Sa1 / Ra1 is less than 1.82. In Examples 1-6 and 8-9, the result of Evaluation 1 is "OK". In Example 7, the first arithmetic mean roughness Ra1 is greater than 50 nm. In Example 10, Sa1 / Ra1 is greater than 1.82. In Example 11, the first maximum height Sz1 is greater than 1000 nm. In Examples 7 and 10-11, the result of Evaluation 1 is "NG".

Claims

1. A mask having: A substrate, the substrate comprising a first surface, a second surface located opposite to the first surface, and at least one first opening extending from the first surface to the second surface; and A mask layer comprising a first surface facing the second surface of the substrate and a second surface located on the opposite side of the first surface. The mask layer includes two or more first regions that overlap with the first opening when viewed from above, and a second region located between and outside the two or more first regions when viewed from above. The two or more first regions each include two or more second openings that extend from the first surface to the second surface. The second surface of the first region has a first arithmetic mean roughness (Ra1) related to line roughness, a first arithmetic mean roughness (Sa1) related to surface roughness, and a first maximum height (Sz1). The first arithmetic mean roughness (Ra1) is below 50 nm. The first maximum height (Sz1) is below 1000 nm. The ratio of the first arithmetic mean roughness (Sa1) to the first arithmetic mean roughness (Ra1), i.e., Sa1 / Ra1, is 1.82 or less.

2. The mask according to claim 1, wherein, The second surface of the second region has a second arithmetic mean roughness (Ra2) related to the line roughness. The first arithmetic mean roughness (Ra1) is different from the second arithmetic mean roughness (Ra2).

3. The mask according to claim 2, wherein, The first arithmetic mean roughness (Ra1) is greater than the second arithmetic mean roughness (Ra2).

4. The mask according to claim 1, wherein, The second surface of the second region has a second arithmetic mean roughness (Sa2) related to surface roughness. The first arithmetic mean roughness (Sa1) is different from the second arithmetic mean roughness (Sa2).

5. The mask according to claim 4, wherein, The first arithmetic mean roughness (Sa1) is greater than the second arithmetic mean roughness (Sa2).

6. The mask according to claim 1, wherein, The second surface of the second region has a second maximum height (Sz2) related to the surface roughness. The first maximum height (Sz1) is different from the second maximum height (Sz2).

7. The mask according to claim 6, wherein, The first maximum height (Sz1) is less than the second maximum height (Sz2).

8. The mask according to any one of claims 1 to 7, wherein, The in-plane direction of the second surface includes the x-direction and the y-direction orthogonal to the x-direction. The first arithmetic mean roughness (Ra1) is the average of the arithmetic mean roughness of the second surface of the first region in the x direction and the arithmetic mean roughness of the second surface of the first region in the y direction. The ratio of the difference between the arithmetic mean roughness of the second surface of the first region in the x direction and the arithmetic mean roughness of the second surface of the first region in the y direction to the first arithmetic mean roughness (Ra1) is less than 0.

50.

9. The mask according to any one of claims 1 to 7, wherein, The first region contains a metal layer.

10. The mask according to claim 9, wherein, The second region contains a metal layer.

11. The mask according to claim 9, wherein, The second region contains an insulating layer.

12. The mask according to claim 11, wherein, The insulating layer contains silicon oxide.

13. The mask according to any one of claims 1 to 7, comprising a metal-containing intermediate layer located between the mask layer and the substrate.

14. The mask according to any one of claims 1 to 4, wherein, The substrate contains silicon or a silicon compound.

15. A method for manufacturing a mask, comprising: Substrate preparation process, among which, Prepare a substrate comprising a first substrate surface and a second substrate surface located on the opposite side of the first substrate surface; An insulating layer forming process, wherein an insulating layer is formed comprising an insulating first surface facing the second surface of the substrate and an insulating second surface located on the opposite side of the insulating first surface, and comprising at least two island portions; A metal layer forming process, wherein a metal layer comprising a first metal surface facing the second surface of the substrate and a second metal surface located on the opposite side of the first metal surface is formed between the two or more island portions; The grinding process includes grinding the second surface of the metal. The insulation layer removal process includes removing the two or more island portions; and A substrate processing step, wherein a first opening is formed on the substrate that overlaps with the metal layer when viewed from above. The mask includes a mask layer comprising two or more first regions that overlap with the first opening when viewed from above and contain the metal layer, and a second region that contains the metal layer or the insulating layer and is located between and outside the two or more first regions when viewed from above. The mask layer includes a first surface facing the second surface of the substrate and a second surface located on the opposite side of the first surface. The second surface of the first region has a first arithmetic mean roughness (Ra1) related to line roughness, a first arithmetic mean roughness (Sa1) related to surface roughness, and a first maximum height (Sz1). The first arithmetic mean roughness (Ra1) is below 50 nm. The first maximum height (Sz1) is below 1000 nm. The ratio of the first arithmetic mean roughness (Sa1) to the first arithmetic mean roughness (Ra1), i.e., Sa1 / Ra1, is 1.82 or less.

16. The method for manufacturing a mask according to claim 15, wherein, The grinding process includes the step of bringing a slurry containing processing fluid and abrasive particles into contact with the insulating second surface and the metal second surface.

17. The method for manufacturing a mask according to claim 16, wherein, The second surface of the second region has a second arithmetic mean roughness (Ra2) related to the line roughness. The first arithmetic mean roughness (Ra1) is different from the second arithmetic mean roughness (Ra2).

18. The method for manufacturing a mask according to claim 17, wherein, The first arithmetic mean roughness (Ra1) is greater than the second arithmetic mean roughness (Ra2).

19. The method for manufacturing a mask according to any one of claims 15 to 18, wherein, In the metal layer forming process, the metal layer is also formed on the outer side of the two or more island portions. The second region includes the metal layer located outside the two or more first regions.

20. The method for manufacturing a mask according to any one of claims 15 to 18, wherein, The insulating layer forming process forms an insulating layer comprising a frame portion defining the outline of two or more insulating openings and two or more island portions respectively located at the two or more insulating openings. The metal layer forming process forms the metal layer through two or more insulating openings.