A ceramic tile product surface defect classification method and system based on an IDC-Net network

Abstract

The application discloses a kind of based on IDC-Net network's ceramic tile product surface defect classification method and system, belong to ceramic tile surface defect classification technical field, including.The application designs the basic unit IDC-Block with feature enhancement capability, the module integrates dynamic large kernel convolution DLK and inherits the advantage of efficient feature extraction of visual state space block VSSBlock IDC-Layer is constituted, on the basis of IDC-Layer, dense connection design is used to constitute IDC-Block by multilevel structure stacking, gradually enhanced feature representation ability;Further design adaptive gaussian pooling module AGP, reduce the information loss in down-sampling process, significantly improve the classification performance of model to ceramic tile small target defect;Dynamic feature fusion module DYFF is designed, adaptive fusion of different resolution and semantic level features is realized, and the robustness of feature expression is enhanced;With EfficientNetV2-s classification network framework as auxiliary branch, local and global information is integrated to constitute double-path classification network IDC-Net by DYFF module, and the classification accuracy is further improved.

Description

Technical Field

[0001] This invention relates to the field of ceramic tile surface defect classification technology, and specifically to a method for classifying ceramic tile product surface defects based on the IDC-Net network. Background Technology

[0002] Tiles, as a basic building material, are widely used for floor and wall decoration. During production, transportation, and installation, tiles are prone to various defects such as color difference, bulging, thickness deviation, cracking, edge chipping, corner damage, spots, and weld holes. These defects not only affect the product's appearance but may also shorten its lifespan and pose safety hazards. Therefore, how to efficiently and accurately classify tile defects has become a crucial research problem that urgently needs to be solved.

[0003] Currently, many companies still rely primarily on manual inspection and mechanical sorting systems based on fixed rules for classifying the surface quality of ceramic tiles. Manual inspection requires experienced operators to judge each tile individually, which is inefficient and heavily influenced by subjective factors. Traditional mechanical equipment typically operates according to preset parameters, lacking adaptability and struggling to cope with diverse defect types and complex environmental conditions. Therefore, these traditional methods have significant limitations in actual production scenarios.

[0004] To address this, a method for classifying surface defects in ceramic tile products based on the IDC-Net network is proposed. Summary of the Invention

[0005] The technical problem to be solved by this invention is: how to classify surface defects of ceramic tile products with high precision, and provides a method for classifying surface defects of ceramic tile products based on IDC-Net network.

[0006] The present invention solves the above-mentioned technical problems through the following technical solution, and the present invention includes the following steps:

[0007] S1: Dataset Preprocessing

[0008] Obtain a public dataset of surface defects in ceramic tiles and preprocess the images in the dataset;

[0009] S2: Model Building

[0010] The IDC-Block module, AGP module, and DYFF module are designed. The EfficientNetV2-s classification network framework is used as an auxiliary branch. The DYFF module integrates local and global information to form the dual-path classification network IDC-Net.

[0011] S3: Model Training

[0012] The dual-path classification network IDC-Net was trained using the training set to obtain a ceramic tile surface defect classification model;

[0013] S4: Defect Classification

[0014] Test the tile surface defect classification model on the test set and output the defect classification results.

[0015] Furthermore, in step S1, the specific processing procedure is as follows:

[0016] S11: Slice the images according to size and overlap ratio to augment the images in the dataset;

[0017] S12: Divide the expanded images into training and testing sets according to a set ratio;

[0018] S13: Perform mosaic data augmentation on the images in the training set and resize the images.

[0019] Furthermore, in step S2, the specific processing procedure is as follows:

[0020] S21: Based on the visual state space block VSSBlock and the dynamic large kernel convolution module DLK, IDC-Layer is designed. On the basis of IDC-Layer, a dense connection design is adopted to form the IDC-Block module through multi-level stacking, which is used as the basic feature extraction unit of IDC-Net.

[0021] S22: Design the AGP module as the downsampling module of IDC-Net;

[0022] S23: Design a DYFF module to achieve adaptive fusion of features at different resolutions and semantic levels;

[0023] S24: Using the EfficientNetV2-s classification network framework as an auxiliary branch, IDC-Net is constructed by integrating local and global information through the DYFF module.

[0024] Furthermore, in step S21, the processing procedure for the visual state space block VSSBlock is as follows:

[0025] S211: The input features are divided into two branches after layer normalization: the first branch is first passed through a 3×3 depth convolutional layer and SiLU activation function and then input into the 2D selective scanning module;

[0026] S212: The 2D selective scanning module first unfolds the input features into multiple one-dimensional sequences along four complementary traversal paths, processes them in parallel, and then reassembles the results according to the original spatial structure, so that each pixel can receive semantic information of the global context from different directions.

[0027] S213: The output of the 2D selective scanning module, after layer normalization, is multiplied element-wise with the output of another branch activated by the SiLU activation function to finally obtain the output features of the visual state space block VSSBlock.

[0028] Furthermore, in step S21, the processing procedure of the dynamic large kernel convolution module DLK is as follows:

[0029] S214: The dynamic large kernel convolution module DLK uses 1×1, 3×3 and 5×5 convolutions in parallel to extract local features at different scales, and then concatenates the three features in the channel dimension.

[0030] S215: The concatenated features are processed through two branches. One branch performs feature fusion through a 5×5 convolution to obtain the fused features. Increase the receptive field to extract local features;

[0031] S216: Another branch performs global average pooling on the concatenated features and then performs 1×1 convolution and sigmoid activation to obtain a channel weight vector matching the number of channels. This weight vector is then combined with the fused features. Perform channel-by-channel multiplication to achieve adaptive channel recalibration.

[0032] Furthermore, in step S21, the processing formula of the IDC-Block module is as follows:

[0033] ;

[0034] in, Indicates input, Indicates the first The output of the layer, Indicates the first Layer input, Indicates the action on the first Nonlinear transformation operations of layers;

[0035] IDC-Layer No. The layer receives data from all preceding layers 0 to 1. The feature maps of each layer are used as input, and their outputs are used by subsequent layers. The IDC-Block module is formed by stacking the features of each layer.

[0036] Furthermore, in step S22, the specific processing procedure of the AGP module is as follows:

[0037] S221: First, depthwise separable convolution is used to perform local low-pass filtering on each channel to suppress noise interference and reduce aliasing;

[0038] S222: Next, pointwise convolution is used to reorganize information and enhance discriminative features in the channel dimension. Each pointwise convolutional layer is connected to a BN layer and a ReLU activation function to improve training stability and expressive power.

[0039] S223: Finally, max pooling is used to reduce the space size.

[0040] Furthermore, in step S23, the specific process of adaptive fusion of features at different resolutions and semantic levels by the DYFF module is as follows:

[0041] S231: First, the spatial dimension of the input feature map is compressed to 1x1 by adaptive average pooling to obtain global information;

[0042] S232: The global information is then mapped to the same dimension as the number of output channels via a 1x1 convolutional layer, and dynamic weights are generated through the Sigmoid activation function.

[0043] S233: Adaptive feature fusion is achieved by dynamically weighting the 3x3 convolution output of the input feature map.

[0044] Furthermore, in step S24, the specific processing procedure for integrating local and global information through the DYFF module, using the EfficientNetV2-s classification network framework as an auxiliary branch, is as follows:

[0045] S241: First, the feature map is processed through the Stem pre-layer, which reduces the feature map size to half the input size and adjusts the number of channels from 3 to 24.

[0046] S242: Then, the Stage 1 section is passed. Stage 1 includes two Fused-MBConv modules, which reduce the size to half of the input size while keeping the number of channels unchanged. Then, the features output by the first DYFF module are added to the features output by the IDC-Block module of the first layer, and then the features are downsampled by an AGP module, reducing the size by half, thus completing the first stage of feature extraction and fusion.

[0047] S243: The output of Stage 1 is used as the input of Stage 2, reducing the feature map to half the size of the input and changing the number of channels from 24 to 48. Stage 2 includes two Fused-MBConv modules; then, a second DYFF module adjusts the number of channels from 24 to... r is the growth rate of the number of channels through each IDC-Layer; then the features output by the second DYFF module are added to the features output by the IDC-Block module through the second layer, and then downsampled through an AGP module to halve the size, thus completing the second stage of feature extraction and fusion;

[0048] S244: The output of Stage 2 is used as the input of Stage 3, reducing the feature map to half the size of the input and changing the number of channels from 48 to 64. Stage 3 includes two Fused-MBConv modules; then, a third DYFF module adjusts the number of channels from 24 to... Then, the features output by the third DYFF module are added to the features output by the IDC-Block module after the third layer, and then downsampled by an AGP module to halve the size, thus completing the third stage of feature extraction and fusion.

[0049] S245: The output of Stage 3 serves as the input to Stage 4. Stage 4 consists of six MBConv modules, which reduce the feature map to half the size of the input, changing the number of channels from 64 to 128. The fourth DYFF module then adjusts the number of channels from 24 to... Then, the features output by the fourth DYFF module are added to the features output by the IDC-Block module after the fourth layer, and then downsampled by an AGP module to halve the size, thus completing the fourth stage of feature extraction and fusion.

[0050] S246: The output of Stage 4 is used as the input of Stage 5. Stage 5 consists of 24 MBConv modules, which reduce the feature map to half the size of the input, changing the number of channels from 128 to 256. The fifth DYFF module then adjusts the number of channels from 256 to... Then, the features output by the fifth DYFF module are added to the features output by the IDC-Block module of the fourth layer, and after global average pooling, they are input into the fully connected layer FC to complete the classification task.

[0051] This invention also provides a surface defect classification system for ceramic tile products based on the IDC-Net network, applied to the above-mentioned classification method, including:

[0052] The preprocessing module is used to obtain a public dataset of surface defects in ceramic tiles and preprocess the images in the dataset.

[0053] The model building module is used to design the IDC-Block module, AGP module, and DYFF module. With the EfficientNetV2-s classification network framework as an auxiliary branch, the DYFF module integrates local and global information to form the dual-path classification network IDC-Net.

[0054] The model training module is used to train the dual-path classification network IDC-Net using the training set to obtain a ceramic tile surface defect classification model.

[0055] The defect classification module is used to test the tile surface defect classification model on the test set and output the defect classification results.

[0056] The present invention has the following advantages over the prior art:

[0057] 1. A basic unit IDC-Block with feature enhancement capabilities was designed. This module integrates dynamic large kernel convolution DLK and inherits the advantages of efficient feature extraction of visual state space block VSSBlock to form IDC-Layer. On the basis of IDC-Layer, a dense connection design is adopted to form IDC-Block through multi-level stacking structure, which progressively enhances the feature representation capability.

[0058] 2. An adaptive Gaussian pooling module (AGP) was further designed to reduce information loss during downsampling and significantly improve the model's classification performance for small defects in ceramic tiles.

[0059] 3. A dynamic feature fusion module, DYFF, was designed to achieve adaptive fusion of features at different resolutions and semantic levels, thereby enhancing the robustness of feature representation.

[0060] 4. Using the EfficientNetV2-s classification network framework as an auxiliary branch, the DYFF module is used to integrate local and global information to form the dual-path classification network IDC-Net, which further improves the classification accuracy. Attached Figure Description

[0061] Figure 1 This is a flowchart of a method for classifying surface defects of ceramic tile products based on the IDC-Net network in an embodiment of the present invention;

[0062] Figure 2 These are typical defect image samples from the Tianchi Competition tile dataset in this embodiment of the invention, where (a) is a corner abnormality defect, (b) is an aperture defect, (c) is a black spot defect, (d) is an edge abnormality defect, (e) is a light-colored block defect, and (f) is a white spot defect.

[0063] Figure 3This is a schematic diagram of the structure of the 2D selective scanning module in an embodiment of the present invention, wherein (a) is a schematic diagram of horizontal scanning and (b) is a schematic diagram of vertical scanning;

[0064] Figure 4 This is a schematic diagram of the IDC-Layer structure in an embodiment of the present invention;

[0065] Figure 5 This is a schematic diagram of the structure of DLK in an embodiment of the present invention;

[0066] Figure 6 This is a schematic diagram of the structure of the Visual State Space Block (VSSBlock) in an embodiment of the present invention.

[0067] Figure 7 This is a schematic diagram of the structure of IDC-Block (taking 4 layers as an example) in an embodiment of the present invention;

[0068] Figure 8 This is a schematic diagram of the structural principle of the Adaptive Gaussian Pooling Module (AGP) in an embodiment of the present invention;

[0069] Figure 9 This is a schematic diagram of the dynamic feature fusion module DYFF in an embodiment of the present invention;

[0070] Figure 10 This is a schematic diagram of the architecture of the defect classification network IDC-Net in an embodiment of the present invention;

[0071] Figure 11 This is the confusion matrix for classifying tile defect images in this embodiment of the invention, where (a) is the confusion matrix of the baseline model DenseNet; (b) is the confusion matrix of the improved model IDC-Net; in the figure, 0–5 correspond to 0 representing corner abnormal defects, 1 representing aperture defects, 2 representing black spot defects, 3 representing edge abnormal defects, 4 representing light-colored block defects, and 5 representing white spot defects, respectively. Detailed Implementation

[0072] The embodiments of the present invention are described in detail below. These embodiments are implemented based on the technical solution of the present invention, and provide detailed implementation methods and specific operation processes. However, the scope of protection of the present invention is not limited to the following embodiments.

[0073] Example 1

[0074] like Figures 1-11 As shown, this embodiment provides a technical solution: a method for classifying surface defects of ceramic tile products based on the IDC-Net network, comprising the following steps:

[0075] S1: Obtain a public dataset of surface defects in ceramic tiles and preprocess the images in the dataset;

[0076] S2: Design the IDC-Block module, AGP module, and DYFF module. With the EfficientNetV2-s classification network framework as an auxiliary branch, the DYFF module integrates local and global information to form the dual-path classification network IDC-Net.

[0077] S3: Train the IDC-Net network using the training set to obtain a tile surface defect classification model;

[0078] S4: Test the tile surface defect classification model on the test set and output the defect classification results.

[0079] In this embodiment, the specific processing procedure in step S1 is as follows:

[0080] S11: Due to the excessively large image size in the dataset, the 5388 images in the public dataset were sliced ​​sequentially from top to bottom and from left to right, with a size of 800×800 and an overlap ratio of 0.2. The resulting dataset images were expanded to 18886.

[0081] S12: Divide the expanded 18886 images into a training set and a test set in an 8:2 ratio. The training set contains 15107 images, and the validation set and test set each contain 3779 images.

[0082] S13: Perform mosaic data augmentation on the images in the training set, and adjust the size of the processed images to 800×800 as the image input size for the model.

[0083] In this embodiment, the specific processing procedure of step S2 is as follows:

[0084] S21: Based on the visual state space block VSSBlock and the dynamic large kernel convolution module DLK, IDC-Layer is designed. On the basis of IDC-Layer, a dense connection design is adopted to form IDC-Block through multi-level stacking, which is used as the basic feature extraction unit of IDC-Net.

[0085] S22: Design the Adaptive Gaussian Pooling Module (AGP) as a downsampling module for the IDC-Net classification network;

[0086] S23: Design the dynamic feature fusion module DYFF to achieve adaptive fusion of features at different resolutions and semantic levels;

[0087] S24: Using the EfficientNetV2-s classification network framework as an auxiliary branch, the local and global information are integrated through the dynamic feature fusion module DYFF to form the classification network IDC-Net.

[0088] More specifically, in step S21, the processing procedure for the visual state space block VSSBlock is as follows:

[0089] S211: The input features are divided into two branches after layer normalization: the first branch is first passed through a 3×3 depth convolutional layer and SiLU activation function and then input into the 2D selective scanning module;

[0090] S212: The 2D selective scanning module first processes the input features along four complementary traversal paths: row-by-row from top to bottom and left to right; row-by-row from bottom to top and right to left; column-by-column from top to bottom and left to right; and column-by-column from bottom to top and right to left. This unfolds the 2D image into several 1D sequences, processes them in parallel, and then reassembles the results according to the original spatial structure, allowing each pixel to receive semantic information from the global context from different directions.

[0091] S213: The output of the 2D selective scanning module, after layer normalization, is multiplied element-wise with the output of another branch activated by the SiLU activation function to finally obtain the output features of the visual state space block VSSBlock.

[0092] More specifically, in step S21, the processing formula of the dynamic large kernel convolution module DLK is as follows:

[0093]

[0094]

[0095]

[0096]

[0097] in, This means that the features extracted by the three convolutions are first concatenated along the channel dimension, and then fused by a 5×5 convolution to obtain the feature map; , and These correspond to different scales of feature representations extracted by 1×1, 3×3, and 5×5 convolutions, respectively. This indicates that the other branch obtains the channel weight vector through global average pooling. Indicates normalization, The sigmoid function maps the weights to the (0,1) interval; DLK(x) represents the weighted feature output obtained by multiplying the channel weights with the features channel by channel.

[0098] The specific processing steps of the Dynamic Large Kernel Convolution (DLK) module are as follows:

[0099] S214: The dynamic large kernel convolution module DLK uses 1×1, 3×3 and 5×5 convolutions in parallel to extract local features at different scales; then, the three features are concatenated in the channel dimension.

[0100] S215: The spliced ​​features go through two branches, one of which uses a 5×5 convolution to increase the receptive field and extract local features;

[0101] S216: Another branch performs global average pooling on the concatenated features and then performs 1×1 convolution and sigmoid activation to obtain a channel weight vector matching the number of channels. This weight vector is then combined with the fused feature map. Perform channel-by-channel multiplication to achieve adaptive channel recalibration.

[0102] More specifically, in step S21, the processing formula for IDC-Block is as follows:

[0103]

[0104] in, Indicates input, Indicates the first The output of the layer, Indicates the first Layer input, Indicates the action on the first Nonlinear transformation operations of layers.

[0105] S217: IDC-Layer The layer receives data from all preceding layers 0 to 1. The feature maps of each layer are used as input, while their outputs are used by subsequent layers. The stacking of features from each layer forms an IDC-Block.

[0106] More specifically, in step S22, the processing formula of the Adaptive Gaussian Pooling (AGP) module is as follows:

[0107]

[0108]

[0109]

[0110] in, This represents the output of a feature map after a depthwise separable convolution. This represents the output after a 1×1 convolution. This represents the final output of AGP. This represents depthwise separable convolution. For pointwise convolution, MaxPool represents max pooling with a stride of 2.

[0111] The processing procedure of the Adaptive Gaussian Pooling (AGP) module is as follows:

[0112] S221: First, depthwise separable convolution is used to perform local low-pass filtering on each channel to suppress noise interference and reduce aliasing;

[0113] S222: Next, pointwise convolution is used to reorganize information and enhance discriminative features in the channel dimension. Each pointwise convolutional layer is connected to a BN layer and a ReLU activation function to improve training stability and expressive power.

[0114] S223: Finally, max pooling is used to reduce the space size.

[0115] More specifically, in step S23, the processing procedure of the dynamic feature fusion module DYFF is as follows:

[0116] S231: First, the spatial dimension of the input feature map is compressed to 1x1 by adaptive average pooling to obtain global information;

[0117] S232: The global information is then mapped to the same dimension as the number of output channels via a 1x1 convolutional layer, and dynamic weights are generated through the Sigmoid activation function.

[0118] S233: Dynamic weights are used to weight the 3x3 convolution output of the input feature map, thereby achieving adaptive feature fusion.

[0119] More specifically, in step S24, the process by which the DYFF module integrates local and global information to form the classification network IDC-Net is as follows:

[0120] S241: First, the feature map is processed through the Stem pre-layer, which reduces the feature map size to half the input size and adjusts the number of channels from 3 to 24.

[0121] S242: The next stage is Stage 1, which includes two Fused-MBConv modules. The size is halved from the input size, while the number of channels remains the same. r represents the channel growth rate for each IDC-Layer. The features output from the first DYFF module are then added to the features output from the first IDC-Block module, and then downsampled using an AGP module, halving the size. This completes the first stage of feature extraction and fusion.

[0122] S243: The output of Stage 1 is used as the input of Stage 2, reducing the feature map to half the size of the input, and changing the number of channels from 24 to 48. The second DYFF module then adjusts the number of channels from 24 to... The features output from the second DYFF module are then added to the features output from the second-layer IDC-Block module, and then downsampled by an AGP module to halve the size, completing the second stage of feature extraction and fusion.

[0123] S244: The output of Stage 2 is used as the input to Stage 3, reducing the feature map to half the size of the input and changing the number of channels from 48 to 64. The third DYFF module then adjusts the number of channels from 24 to... The features output by the third DYFF module are then added to the features output by the third IDC-Block module, and then downsampled by an AGP module to halve the size, thus completing the third stage of feature extraction and fusion.

[0124] S245: The output of Stage 3 serves as the input to Stage 4, containing six MBConv modules. This reduces the feature map to half the size of the input, increasing the number of channels from 64 to 128. The fourth DYFF module then adjusts the number of channels from 24 to... The features output by the fourth DYFF module are then added to the features output by the IDC-Block module of the fourth layer, and then downsampled by an AGP module to halve the size, thus completing the fourth stage of feature extraction and fusion.

[0125] S246: The output of Stage 4 serves as the input to Stage 5, containing 24 MBConv modules. This reduces the feature map to half the size of the input, changing the number of channels from 128 to 256. The fifth DYFF module then adjusts the number of channels from 256 to... The features output by the fifth DYFF module are then added to the features output by the fourth IDC-Block module, and after global average pooling, they are input into the fully connected layer (FC) to complete the classification task.

[0126] In this embodiment, step S3 includes the following steps:

[0127] S31: Set the parameters for the model training phase, including the number of iterations (200), input image size (800), batch size (16), and optimizer selection (SGD).

[0128] S32: After training, save the weights of the final improved IDC-Net model.

[0129] In this embodiment, step S4 includes the following steps:

[0130] S41: Input the test set into the tile surface defect classification model;

[0131] S42: Output the classification results of the network.

[0132] In this embodiment, the IDC-Net network structure is as follows: Figure 10 The image shows a two-path network;

[0133] The network on the left consists of an Efficient-V2 classification network, specifically including a first Stem layer and five stages; the first Stem layer includes a 3×3 convolution with a stride of 2; Stage 1 includes 2 Fused-MBConv modules; Stage 2 includes 4 Fused-MBConv modules; Stage 3 includes 4 Fused-MBConv modules; Stage 4 includes 6 Fused-MBConv modules; Stage 5 includes 24 MBConv modules;

[0134] The network on the right consists of a second stem layer, a feature extraction module IDC-Block, and an AGP downsampling module. Specifically, it includes a second stem layer, a first IDC-Block module consisting of one IDC-Layer layer, a first AGP downsampling module, a second IDC-Block module consisting of two IDC-Layer layers, a second AGP downsampling module, a third IDC-Block module consisting of four IDC-Layer layers, a third AGP downsampling module, a fourth IDC-Block module consisting of eight IDC-Layer layers, a fourth AGP downsampling module, and a first Avgpool global pooling module.

[0135] The first DYFF module receives the output from Stage 1, then adds it to the features processed by the first IDC-Block module, and then halves the size of the features processed by the first AGP downsampling module, completing the first stage of feature extraction and fusion. The second DYFF module receives the output from Stage 2, with the number of channels adjusted from 48 to (24 + 3 × r). It then adds it to the features processed by the second IDC-Block module, and then halves the size of the features processed by the second AGP downsampling module, completing the second stage of feature extraction and fusion. The third DYFF module receives the output from Stage 3, with the number of channels adjusted from 64 to (24 + 7 × r). It then adds it to the features processed by the third IDC-Block module. The features are summed and then halved in size by the third AGP downsampling module, completing the third stage of feature extraction and fusion. The fourth DYFF module receives the output from Stage 4, with the number of channels adjusted from 128 to (24 + 15 × r). It is then summed with the features from the fourth IDC-Block module and halved in size by the fourth AGP downsampling module, completing the fourth stage of feature extraction and fusion. The fifth DYFF module receives the output from Stage 5, with the number of channels adjusted from 256 to (24 + 15 × r). It is then summed with the features from the fourth AGP downsampling module, and then fed into the fully connected layer FC after passing through the first Avgpool global pooling module to complete the classification task.

[0136] Example 2

[0137] This embodiment conducted a performance comparison experiment with related models in the prior art, and the specific results are shown in Table 1 below:

[0138] Table 1 Performance comparison experiment results data

[0139] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A method for classifying surface defects of ceramic tile products based on IDC-Net network, characterized in that, Includes the following steps: S1: Dataset Preprocessing Obtain a public dataset of surface defects in ceramic tiles and preprocess the images in the dataset; S2: Model Building The IDC-Block module, AGP module, and DYFF module are designed. The EfficientNetV2-s classification network framework is used as an auxiliary branch. The DYFF module integrates local and global information to form the dual-path classification network IDC-Net. S3: Model Training The dual-path classification network IDC-Net was trained using the training set to obtain a ceramic tile surface defect classification model; S4: Defect Classification Test the tile surface defect classification model on the test set and output the defect classification results.

2. The method for classifying surface defects of ceramic tile products based on IDC-Net network according to claim 1, characterized in that, In step S1, the specific processing procedure is as follows: S11: Slice the images according to size and overlap ratio to augment the images in the dataset; S12: Divide the expanded images into training and testing sets according to a set ratio; S13: Perform mosaic data augmentation on the images in the training set and resize the images.

3. The method for classifying surface defects of ceramic tile products based on IDC-Net network according to claim 1, characterized in that, In step S2, the specific processing procedure is as follows: S21: Based on the visual state space block VSSBlock and the dynamic large kernel convolution module DLK, IDC-Layer is designed. On the basis of IDC-Layer, a dense connection design is adopted to form the IDC-Block module through multi-level stacking, which is used as the basic feature extraction unit of IDC-Net. S22: Design the AGP module as the downsampling module of IDC-Net; S23: Design a DYFF module to achieve adaptive fusion of features at different resolutions and semantic levels; S24: Using the EfficientNetV2-s classification network framework as an auxiliary branch, IDC-Net is constructed by integrating local and global information through the DYFF module.

4. The method for classifying surface defects of ceramic tile products based on IDC-Net network according to claim 3, characterized in that, In step S21, the processing procedure for the visual state space block VSSBlock is as follows: S211: The input features are divided into two branches after layer normalization: the first branch is first passed through a 3×3 depth convolutional layer and SiLU activation function and then input into the 2D selective scanning module; S212: The 2D selective scanning module first unfolds the input features into multiple one-dimensional sequences along four complementary traversal paths, processes them in parallel, and then reassembles the results according to the original spatial structure, so that each pixel can receive semantic information of the global context from different directions. S213: The output of the 2D selective scanning module, after layer normalization, is multiplied element-wise with the output of another branch activated by the SiLU activation function to finally obtain the output features of the visual state space block VSSBlock.

5. The method for classifying surface defects of ceramic tile products based on IDC-Net network according to claim 4, characterized in that, In step S21, the processing procedure of the dynamic large kernel convolution module DLK is as follows: S214: The dynamic large kernel convolution module DLK uses 1×1, 3×3 and 5×5 convolutions in parallel to extract local features at different scales, and then concatenates the three features in the channel dimension. S215: The concatenated features are processed through two branches. One branch performs feature fusion through a 5×5 convolution to obtain the fused features. Increase the receptive field to extract local features; S216: Another branch performs global average pooling on the concatenated features and then performs 1×1 convolution and sigmoid activation to obtain a channel weight vector matching the number of channels. This weight vector is then combined with the fused features. Perform channel-by-channel multiplication to achieve adaptive channel recalibration.

6. The method for classifying surface defects of ceramic tile products based on IDC-Net network according to claim 5, characterized in that, In step S21, the processing formula of the IDC-Block module is as follows: ； in, Indicates input, Indicates the first The output of the layer, Indicates the first Layer input, Indicates the action on the first Nonlinear transformation operations of layers; IDC-Layer No. The layer receives data from all preceding layers 0 to 1. The feature maps of each layer are used as input, and their outputs are used by subsequent layers. The IDC-Block module is formed by stacking the features of each layer.

7. The method for classifying surface defects of ceramic tile products based on IDC-Net network according to claim 6, characterized in that, In step S22, the specific processing procedure of the AGP module is as follows: S221: First, depthwise separable convolution is used to perform local low-pass filtering on each channel to suppress noise interference and reduce aliasing; S222: Next, pointwise convolution is used to reorganize information and enhance discriminative features in the channel dimension. Each pointwise convolutional layer is connected to a BN layer and a ReLU activation function to improve training stability and expressive power. S223: Finally, max pooling is used to reduce the space size.

8. The method for classifying surface defects of ceramic tile products based on IDC-Net network according to claim 7, characterized in that, In step S23, the specific process of adaptive fusion of features at different resolutions and semantic levels by the DYFF module is as follows: S231: First, the spatial dimension of the input feature map is compressed to 1x1 by adaptive average pooling to obtain global information; S232: The global information is then mapped to the same dimension as the number of output channels via a 1x1 convolutional layer, and dynamic weights are generated through the Sigmoid activation function. S233: Adaptive feature fusion is achieved by dynamically weighting the 3x3 convolution output of the input feature map.

9. The method for classifying surface defects of ceramic tile products based on IDC-Net network according to claim 8, characterized in that, In step S24, the specific processing procedure for integrating local and global information through the DYFF module, using the EfficientNetV2-s classification network framework as an auxiliary branch, is as follows: S241: First, the feature map is processed through the Stem pre-layer, which reduces the feature map size to half the input size and adjusts the number of channels from 3 to 24. S242: Then, the Stage 1 section is passed. Stage 1 includes two Fused-MBConv modules, which reduce the size to half of the input size while keeping the number of channels unchanged. Then, the features output by the first DYFF module are added to the features output by the IDC-Block module of the first layer, and then the features are downsampled by an AGP module, reducing the size by half, thus completing the first stage of feature extraction and fusion. S243: The output of Stage 1 is used as the input of Stage 2, reducing the feature map to half the size of the input and changing the number of channels from 24 to 48. Stage 2 includes two Fused-MBConv modules; then, a second DYFF module adjusts the number of channels from 24 to... r is the growth rate of the number of channels through each IDC-Layer; then the features output by the second DYFF module are added to the features output by the IDC-Block module through the second layer, and then downsampled through an AGP module to halve the size, thus completing the second stage of feature extraction and fusion; S244: The output of Stage 2 is used as the input of Stage 3, reducing the feature map to half the size of the input and changing the number of channels from 48 to 64. Stage 3 includes two Fused-MBConv modules; then, a third DYFF module adjusts the number of channels from 24 to... Then, the features output by the third DYFF module are added to the features output by the IDC-Block module after the third layer, and then downsampled by an AGP module to halve the size, thus completing the third stage of feature extraction and fusion. S245: The output of Stage 3 serves as the input to Stage 4. Stage 4 consists of six MBConv modules, which reduce the feature map to half the size of the input, changing the number of channels from 64 to 128. The fourth DYFF module then adjusts the number of channels from 24 to... Then, the features output by the fourth DYFF module are added to the features output by the IDC-Block module after the fourth layer, and then downsampled by an AGP module to halve the size, thus completing the fourth stage of feature extraction and fusion. S246: The output of Stage 4 is used as the input of Stage 5. Stage 5 consists of 24 MBConv modules, which reduce the feature map to half the size of the input, changing the number of channels from 128 to 256. The fifth DYFF module then adjusts the number of channels from 256 to... Then, the features output by the fifth DYFF module are added to the features output by the IDC-Block module of the fourth layer, and after global average pooling, they are input into the fully connected layer FC to complete the classification task.

10. A surface defect classification system for ceramic tile products based on IDC-Net network, characterized in that, Applied to the classification method as described in any one of claims 1 to 9, comprising: The preprocessing module is used to obtain a public dataset of surface defects in ceramic tiles and preprocess the images in the dataset. The model building module is used to design the IDC-Block module, AGP module, and DYFF module. With the EfficientNetV2-s classification network framework as an auxiliary branch, the DYFF module integrates local and global information to form the dual-path classification network IDC-Net. The model training module is used to train the dual-path classification network IDC-Net using the training set to obtain a ceramic tile surface defect classification model. The defect classification module is used to test the tile surface defect classification model on the test set and output the defect classification results.

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