A nanosecond pulsed laser driving control device and method

Abstract

The application discloses a nanosecond pulse laser driving control device and method, relates to the technical field of nanosecond pulse lasers, and comprises a main control module connected with a digital-analog conversion module, a direct digital synthesizer module, a reference operation and current monitoring module, a signal output selection module and a signal coupling and current monitoring module respectively; the reference operation and current monitoring module is connected with the digital-analog conversion module; a pulse signal generation and conditioning module is connected with the direct digital synthesizer module and the signal output selection module respectively; the signal coupling and current monitoring module is connected with the signal output selection module; the reference operation and current monitoring module and the signal coupling and current monitoring module are connected with a target nanosecond pulse laser, and the application can improve the stability and reliability in the driving control process of the target nanosecond pulse laser.

Description

Technical Field

[0001] This application relates to the field of nanosecond pulsed laser technology, and in particular to a nanosecond pulsed laser driving control device and method. Background Technology

[0002] Nanosecond pulsed lasers, with their narrow pulse width and high peak power characteristics, are widely used in high-end fields such as semiconductor precision machining, lidar, and biomedical imaging. Their drive control technology directly determines the accuracy, stability, and dynamic performance of the laser's output pulses. Currently, mainstream drive control schemes fall into two categories, both focusing on pulse generation and output control: 1. FPGA main control drive control scheme: The core logic is "FPGA generates digital pulse control signal + external DAC converts analog pulse". In low-end and mid-range scenarios, FPGA + low-speed DAC (≤100MSPS) is used to realize pulse timing control through logic programming. However, analog pulses have stepped distortion and limited control accuracy. Customized scenarios use FPGA + high-speed DAC (≥500MSPS) to improve accuracy. However, multiple devices need to be controlled in coordination. There is a digital-analog pulse synchronization delay (phase deviation >5ns). The control logic is complex and the cost is high.

[0003] 2. Analog / DDS chip-driven control scheme: The pure analog control scheme is based on the 555 timer and operational amplifier, and controls pulse generation through RC circuit. The control logic is simple but it is greatly affected by temperature drift and noise. The pulse parameter drift is >5% / 10℃ and the stability is poor. The general DDS control scheme (such as AD9850 chip) can generate digital and analog pulses, but the sampling rate is ≤400MSPS, the pulse width control accuracy is >1ns, and there is no dynamic closed-loop control capability, which cannot meet the precise control requirements of high-end scenarios.

[0004] In summary, the relevant technical solutions have the following drawbacks: 1. Insufficient control precision: The solutions lack high-precision pulse generation control and dynamic calibration mechanisms, with pulse width modulation accuracy only reaching the nanosecond level and frequency resolution at the kHz level, which cannot meet the requirements of high-end scenarios for 10ns pulse width and sub-nanosecond modulation precision; 2. Low control integration: They mostly adopt a multi-entity control architecture, with pulse generation, voltage control, and synchronization adjustment scattered across different devices, resulting in complex control links, poor synchronization, and the need to reconstruct control logic when adapting to different lasers, leading to long debugging cycles; 3. Poor control stability: Analog control schemes are susceptible to environmental interference, while digital control schemes lack effective closed-loop calibration mechanisms, resulting in significant pulse parameter drift during long-term operation, and the absence of a robust false trigger control mechanism, leading to insufficient safety. Summary of the Invention

[0005] The purpose of this application is to provide a nanosecond pulse laser driving control device and method, which can improve the stability and reliability of the driving control process of the target nanosecond pulse laser.

[0006] To achieve the above objectives, this application provides the following solution: In a first aspect, this application provides a nanosecond pulsed laser drive control device, including: a main control module, a digital-to-analog conversion module, a reference working and current monitoring module, a direct digital synthesizer module, a pulse signal generation and conditioning module, a signal output selection module, and a signal coupling and current monitoring module; The main control module is connected to the analog-to-digital converter module, the direct digital synthesizer module, the reference working and current monitoring module, the signal output selection module, and the signal coupling and current monitoring module, respectively; the reference working and current monitoring module is connected to the analog-to-digital converter module; the pulse signal generation and conditioning module is connected to the direct digital synthesizer module and the signal output selection module, respectively; the signal coupling and current monitoring module is connected to the signal output selection module; the reference working and current monitoring module, as well as the signal coupling and current monitoring module, are all connected to the target nanosecond pulsed laser. The main control module generates control signals, which are processed by the analog-to-digital converter module, the reference working and current monitoring module, the direct digital synthesizer module, the pulse signal generation and conditioning module, the signal output selection module, and the signal coupling and current monitoring module to drive the target nanosecond pulse laser. The module also acquires the reference current signal and the drive current signal of the target nanosecond pulse laser in real time. Based on the reference current signal and the drive current signal, the module sets the voltage of the analog-to-digital converter module and adjusts the pulse parameters of the direct digital synthesizer module.

[0007] In one embodiment, the digital-to-analog conversion module includes a digital-to-analog conversion circuit and an operational amplifier circuit; The digital-to-analog converter circuit is connected to the main control module and the operational amplifier circuit respectively; the operational amplifier circuit is connected to the reference working and current monitoring module.

[0008] In one embodiment, the reference operating voltage and current monitoring module includes a laser operating protection circuit and a current driving and monitoring circuit; The laser operating protection circuit is connected to the target nanosecond pulse laser and the current driving and monitoring circuit, respectively; the current driving and monitoring circuit is connected to the digital-to-analog conversion module, the target nanosecond pulse laser and the main control module, respectively.

[0009] In one embodiment, the nanosecond pulsed laser drive control device further includes a power conversion module; the power conversion module is connected to the main control module, the digital-to-analog conversion module, the reference working and current monitoring module, the direct digital synthesizer module, the pulse signal generation and conditioning module, the signal output selection module, and the signal coupling and current monitoring module.

[0010] In one embodiment, the nanosecond pulse laser drive control device further includes: a power monitoring module; the power monitoring module is connected to the power conversion module; the power monitoring module is used to monitor the voltage output by the power conversion module.

[0011] In one embodiment, the power conversion module includes a first power conversion unit, a second power conversion unit, and a third power conversion unit; the second power conversion unit is connected to both the first power conversion unit and the third power conversion unit. The second power conversion unit is connected to the main control module, the digital-to-analog converter module, the direct digital synthesizer module, the pulse signal generation and conditioning module, and the signal coupling and current monitoring module, respectively. The third power conversion unit is connected to the reference working and current monitoring module.

[0012] In one embodiment, the digital-to-analog converter circuit uses a DAC8532IDGK chip.

[0013] In one embodiment, the operational amplifier circuit uses the MAX4475AUT+T chip.

[0014] In one embodiment, the laser operating protection circuit includes a power load switch and an electrostatic discharge protection diode; The power load switch is connected to the electrostatic protection diode and the target nanosecond pulsed laser, respectively; the electrostatic protection diode is connected to the target nanosecond pulsed laser and the current driving and monitoring circuit, respectively. The power load switch uses a TPS22975DGSR chip; the electrostatic protection diode uses an MRM9HDET5G chip.

[0015] Secondly, this application provides a nanosecond pulse laser driving control method, applied to the nanosecond pulse laser driving control device described in any one of the above-mentioned methods; the nanosecond pulse laser driving control method includes: Acquire the reference current signal and drive current signal of the target nanosecond pulsed laser; The reference current deviation is determined based on the reference current signal and the preset target current value; the drive current deviation is determined based on the drive current signal and the preset target current value; If the reference current deviation exceeds a set threshold, an adjustment digital signal is generated; the adjustment digital signal is used to adjust the set voltage of the digital-to-analog converter module. If the drive current deviation exceeds the set threshold, an adjustment drive signal is generated; the adjustment drive signal is used to adjust the pulse parameters of the direct digital synthesizer module.

[0016] According to the specific embodiments provided in this application, this application has the following technical effects: This application provides a nanosecond pulsed laser driving control device and method. The main control module generates control signals to control a digital-to-analog converter module, a direct digital synthesizer module, a reference working and current monitoring module, a pulse signal generation and conditioning module, a signal output selection module, and a signal coupling and current monitoring module to work collaboratively to drive the target nanosecond pulsed laser. Furthermore, by acquiring the reference current signal and driving current signal of the target nanosecond pulsed laser in real time, the voltage setting of the digital-to-analog converter module and the pulse parameters of the direct digital synthesizer module are adjusted. This achieves closed-loop control throughout the entire process of closed-loop feedback calibration control, thereby improving the stability and reliability of the target nanosecond pulsed laser driving control process and solving the technical defects of low pulse control safety, poor synchronization, and high difficulty in integrated control in related technologies. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of a nanosecond pulse laser driving control device according to an embodiment of this application; Figure 2 A schematic diagram of a laser operation protection circuit provided in an embodiment of this application; Figure 3 This is a schematic diagram of a current output control circuit structure provided in an embodiment of this application; Figure 4 This is a schematic diagram of a current monitoring circuit structure provided in an embodiment of this application; Figure 5 This is a schematic diagram of the structure of a signal output selection module and a signal coupling and current monitoring module provided in an embodiment of this application.

[0019] Figure reference numerals: Electrostatic discharge protection diode: D12; Capacitors: C197, C198, C199, C200, C201, C202, C203, C204, C205, C206, C207, C208, C209, C210, C212, C213, C214, C215, C216, C217, C218, C219, C220, C221, C227, C228, C229, C230, C231, C232, C233, C234, C235, C23 6. C237; Resistors: R180, R181, R182, R183, R185, R186, R187, R188, R189, R190, R191, R192, R193, R194, R196, R197, R198, R199, R200, R201, R202, R203, R204, R205, R206, R207, R208, R209, R210, R329; Inductors: L37, L39; MOSFET: Q6; RF MOSFET: Q7. Detailed Implementation

[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0021] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0022] In one exemplary embodiment, such as Figure 1 As shown, a nanosecond pulsed laser driving and control device is provided, including: a main control module, a digital-to-analog conversion module, a reference working and current monitoring module, a direct digital synthesizer module, a pulse signal generation and conditioning module, a signal output selection module, a signal coupling and current monitoring module, and a target nanosecond pulsed laser (i.e., Figure 1 (The laser in the middle).

[0023] The main control module is connected to the analog-to-digital converter module, the direct digital synthesizer module, the reference working and current monitoring module, the signal output selection module, and the signal coupling and current monitoring module. The reference working and current monitoring module is connected to the analog-to-digital converter module. The pulse signal generation and conditioning module is connected to both the direct digital synthesizer module and the signal output selection module. The signal coupling and current monitoring module is connected to the signal output selection module. Both the reference working and current monitoring modules, as well as the signal coupling and current monitoring module, are connected to the target nanosecond pulsed laser.

[0024] The main control module generates control signals. After being processed by the analog-to-digital converter module, the reference working and current monitoring module, the direct digital synthesizer module, the pulse signal generation and conditioning module, the signal output selection module, and the signal coupling and current monitoring module, the control signals drive the target nanosecond pulse laser. It also acquires the reference current signal and the drive current signal of the target nanosecond pulse laser in real time. Based on the reference current signal and the drive current signal, the analog-to-digital converter module sets the voltage and the direct digital synthesizer module adjusts the pulse parameters.

[0025] The control signals include digital signals, drive signals, and enable signals. The main control module sends digital signals to the analog-to-digital converter (ADC) module. It also sends drive signals to the direct digital synthesizer (DDS) module and enable signals to the signal output selection module. The ADC module generates analog signals based on the digital signals. The reference operation and current monitoring module generates a reference signal based on the analog signal. The DDS module generates DAC differential signals and CMOS single-ended signals based on the drive signals. The pulse signal generation and conditioning module generates nanosecond modulation signals based on the DAC differential signals and CMOS single-ended signals. The signal output selection module generates nanosecond pulse signals based on the nanosecond modulation signals and enable signals. The signal coupling and current monitoring module generates a composite drive signal based on the nanosecond pulse signal and the reference signal. This composite drive signal drives the target nanosecond pulse laser. The reference operation and current monitoring module also acquires the reference current signal of the target nanosecond pulse laser. The signal coupling and current monitoring module also acquires the drive current signal of the target nanosecond pulse laser.

[0026] In one embodiment, to achieve the generation of multi-channel control signals and the acquisition and processing of feedback signals, the main control chip used in the main control module can be an STM32F103RBT7TR, which has multiple GPIO interfaces and an ADC interface. The main control module employs an external 8MHz crystal oscillator + internal PLL clock scheme. An external 8MHz passive crystal oscillator with a 10pF load capacitor is used, and the frequency is multiplied to 72MHz by the internal PLL of the MCU (i.e., the main control chip) to provide a stable high-speed clock for computation and peripheral drive. An external CAT24C256WI-GT3 EEPROM storage module is connected. This EEPROM storage module has an I2C bus interface and a storage capacity of 256KB, enabling long-term power-off storage of control parameters and acquired data. Data reading and writing are achieved through software adaptation (e.g., connection to a host computer).

[0027] In one embodiment, the digital-to-analog conversion module includes a digital-to-analog conversion circuit and an operational amplifier circuit. The digital-to-analog conversion circuit is connected to both the main control module and the operational amplifier circuit. The operational amplifier circuit is connected to the reference operating and current monitoring module.

[0028] The digital-to-analog converter (DAC) circuit uses the U33 DAC chip, specifically the DAC8532IDGK. The DAC8532IDGK is a 16-bit independent dual-channel low-power DAC with a built-in rail-to-rail output amplifier and rail-to-rail voltage output. The DAC8532IDGK's reference voltage input is connected to a 2.5V reference voltage, used to convert the input digital signal into the corresponding analog signal. Pins 6 (SCK clock signal), pin 7 (DIN data signal), and pin 8 (chip select signal) of the U33 DAC chip communicate with the main control module via the SPI protocol (i.e., connected to the SPI interface of the main control chip).

[0029] The operational amplifier circuit uses an operational amplifier chip, specifically the MAX4475AUT+T. The MAX4475AUT+T is a wideband voltage-controlled gain operational amplifier with a 5MHz gain-bandwidth product and a slew rate of 4.5V / μs. The output terminal (pin 4) of the digital-to-analog converter chip U33 is filtered by resistors and capacitors and then connected to pin 3 (IN+, i.e., the input terminal) of the operational amplifier chip U30 (chip model MAX4475AUT+T).

[0030] The reference operating voltage and current monitoring module includes a laser operating protection circuit and a current driving and monitoring circuit. The laser operating protection circuit is connected to both the target nanosecond pulsed laser and the current driving and monitoring circuit. The current driving and monitoring circuit is connected to the digital-to-analog converter module, the target nanosecond pulsed laser, and the main control module.

[0031] The laser operation protection circuit includes a power load switch and an electrostatic discharge (ESD) protection diode. The power load switch is connected to both the ESD protection diode and the target nanosecond pulsed laser. The ESD protection diode is connected to both the target nanosecond pulsed laser and the current drive and monitoring circuit. The power load switch uses a TPS22975DGSR chip (U29). The ESD protection diode D12 uses an MRM9HDET5G chip.

[0032] like Figure 2 As shown, pins 1 (VIN1) and 2 (VIN2) of chip U29 are connected to a 2.5V power input, with capacitors C201 and C202 connected in parallel to the analog ground (AGND); pin 4 (VBIAS) is connected to a 3.3V analog voltage as a bias voltage, with capacitor C204 connected in parallel to the analog ground (AGND); pin 3 (ON) is connected to the main control module, and the LASER_ENABLE (laser enable signal) output by the main control module controls the enabling and disabling of the chip; pin 6 (CT) sets the chip slew rate via capacitor C203; pins 5 and 9 are grounded; pins 7 (VOUT1) and 8 (VOUT2) are used as outputs, with capacitors C199 and C200 connected in parallel to the analog ground (AGND), and connected in parallel with the electrostatic protection diode MRM9HDET5G (D12), capacitors C197 and C198 to the target nanosecond pulsed laser (i.e., laser diode). The positive terminal of the laser diode (LD) is connected to the drain current input terminal of pin 3 of the field-effect transistor Q6 (the model of the field-effect transistor can be NTR4501NT1G) (transmitting the drive signal LASER_LD_C).

[0033] The current drive and monitoring circuit includes a current output control circuit and a current detection circuit. 1) Current output control: such as... Figure 3As shown, pin 1 (VDD) of the digital-to-analog converter chip U33 is the power input terminal, connected to a 3.3V voltage. This 3.3V voltage is connected in series with inductor L37 and then in parallel with capacitors C217 and C228 to the analog ground terminal (AGND). Pin 2 is the reference voltage pin (VREF), connected to a 2.5V reference voltage and then in parallel with capacitors C219 and C220 to the analog ground terminal (AGND). Pin 8 (GND) is the ground terminal. The main control module configures pins 6 (serial clock input SCLK), 7 (serial data input DIN), and 5 (SYNC, chip select signal) of the digital-to-analog converter chip U33 via the SPI protocol to output voltages, causing pin 4 (VOUTA) to output the analog signal LASER_DAC_VOUT. This analog signal is filtered by resistor R182 and capacitor C211 and then connected to pin 3 (IN+) of the operational amplifier chip U30 (non-inverting input). Pin 3 (VOUTB) of the digital-to-analog converter chip U33 outputs the temperature control signal LASER_TEC_DAC_VOUT. Pin 6 of the operational amplifier chip U30 is the power input terminal, connected to a 3.3V voltage. After series resistor R180, capacitors C205 and C206 are connected in parallel to AGND. Pin 4 (inverting input terminal) of the operational amplifier chip U30 is shorted to pin 1 (output terminal) to form a voltage follower, making its output voltage equal to the input voltage. Pin 2 is the ground terminal, connected to the analog ground terminal. Pin 5 is the enable terminal, connected to the analog voltage 3.3V, causing the operational amplifier chip U30 to always be in the working state. The signal from pin 1 (output) of op-amp chip U30 is divided by a voltage divider network consisting of resistors R183 and R185, filtered by capacitor C210, and then connected to pin 3 (non-inverting input) of op-amp chip U31 (chip model MAX4475AUT+T). Pin 4 (inverting input) of op-amp chip U31 is first connected to the output terminal via capacitor C215 for anti-oscillation, then resistor R188 acts as a buffer and current limiter, one end of which is connected to sampling resistors R190 and R191, and the other end is connected to pin 2 (source current output) of MOSFET Q6. Pin 6 of op-amp chip U31 is the power input terminal, connected to a 3.3V voltage, and connected in series with resistor R181... Parallel capacitors C207 and C208 are connected to AGND; pin 5 of operational amplifier chip U31 is the enable terminal, which is connected to the laser on / off signal LASER_EN of the main control module to control its switching; pin 2 is connected to the analog ground terminal; pin 1 (output terminal) of operational amplifier chip U31 is first filtered by resistor R186 and capacitor C214, protected by resistor R184 and anti-oscillation by C209, and then connected to the gate control terminal of pin 1 of field effect transistor Q6, forming a path with the line where the negative terminal of the target nanosecond pulse laser LD is connected to pin 3 (drain current input terminal) of field effect transistor Q6; the two ends of resistor R194 and resistor R187 are connected to the analog ground terminal and digital ground terminal respectively to suppress ground loop interference.

[0034] 2) Current monitoring circuit: such as Figure 4 As shown, pin 3 (non-inverting input) of the operational amplifier chip U32A (chip model OPA2340EA / 2K5) acquires the reference current signal flowing in through the sampling resistor; pin 8 of the operational amplifier chip U32A is the power input terminal, connected to a 3.3V voltage, with capacitors C212 and C213 connected in parallel to AGND; signal amplification is completed through gain configuration resistors R193 and R192; pin 4 of the operational amplifier chip U32A is the ground terminal, connected to the analog ground terminal; the signal from pin 1 (output terminal) is filtered by resistor R189 and capacitor C216, and then connected to the ADC pin of the main control chip STM32F103RBT7TR for voltage conversion (transmitting signal LASER_CUR_MON), realizing real-time monitoring of the current under the reference operating state of the target nanosecond pulse laser. The circuit sets a test point TP30 (LASER_MON), and the voltage can be directly measured with a multimeter and compared with the monitoring value acquired by the ADC pin of the main control module for verification.

[0035] In one embodiment, the Direct Digital Synthesizer (DDS) module can use the AD9912ABCPZ chip as the DDS chip. The AD9912ABCPZ integrates a 14-bit digital-to-analog converter (DAC) and a system clock phase-locked loop (PLL), allowing system clock inputs as low as 25MHz. It features a 48-bit frequency tuning word (FTW) and can achieve frequency synthesis with a step size no greater than 4μHz. Furthermore, the AD9912ABCPZ supports configuration via an SPI interface (connected to the SPI interface of the main control chip), enabling the generation and output of complex waveforms. An external 25MHz active crystal oscillator serves as the clock input source for the AD9912ABCPZ chip. The crystal oscillator output is connected to the differential system clock signal pairs (SYSCLKB and SYSCLK) of the AD9912ABCPZ chip via AC coupling, achieving differential clock signal input and providing a precise clock reference for the DDS module, ensuring the frequency accuracy and phase noise performance of the output signal.

[0036] The pulse signal generation and conditioning circuit is used to amplify, filter, buffer, and level-condition the DAC differential signal and CMOS single-ended signal output from the DDS module, processing them into high-drive, low-noise signals. Both the DAC differential signal and the CMOS single-ended signal are first amplified and shaped by gain control. After observing the waveforms of both channels and the quality of the synthesized signal on an oscilloscope, the operational amplifier enable circuit precisely selects between single-channel output or two-channel combined output (based on the signal quality observed on the oscilloscope and selected according to the set requirements). Then, after integration by a differential amplifier, a nanosecond modulated signal that meets the preset pulse parameters (including pulse width and amplitude) is finally output.

[0037] In one embodiment, such as Figure 5 As shown, the multiplexer chip U37 in the signal output selection module uses the ADG779BKSZ-REEL chip. Pin 2 of the multiplexer chip is connected to a 5V power supply, connected in series with inductor L39, and then in parallel with capacitors C227 and C228 to AGND. The internal drive signal INT_MOD_PULSE (i.e., nanosecond pulse modulation signal) is connected to pin 4 (S1) of the multiplexer chip U37. The external drive signal EXT_MOD_PULSE (i.e., enable signal) is filtered by resistor R201 and capacitor C232 and then connected to pin 6 (S2) of the multiplexer chip U37. Pin 1 (input terminal IN) of the multiplexer chip U37 is connected to the MOD_PULSE_SEL (module pulse signal) output by the main control module. The input source can be switched, and the nanosecond pulse modulation signal or the enable signal generated by the DDS module can be flexibly selected as the modulation source (i.e., generating a nanosecond pulse signal), which improves the flexibility of the device. The test points TP33 (EXT_P) and TP32 (INT_P) added in the circuit can be viewed by connecting an oscilloscope. Pin 3 of the multiplexing chip U37 is connected to the analog ground terminal as the ground terminal. Pin 5 is the output terminal (D). The nanosecond pulse signal is first filtered by resistor R199 and capacitor C231 and then connected to pin 1 (IN+) of the gate driver chip U36 (chip model LMG1025Q).

[0038] like Figure 5As shown, in the signal output selection module, pin 5 (VCC) of the NAND gate U38 (specifically model SN74LVC1G00DCKR) is connected as the power input pin to a 3.3V power supply (digital power supply), with a capacitor C233 connected in parallel to DGND; pin 1 (A) of the NAND gate U38 is connected to the main control module, receiving the enable signal LASER_ENABLE from the main control module. The enable signal is connected to a pull-down resistor R206 to suppress noise interference on the line, ensuring the laser enable signal is stable and reliable. Pin 2 (B) is connected to the output of the main control module... The board operation switch enable signal WORK_DIS_N (controlling the working state of NAND gate U38) is connected; pin 3 (GND) of NAND gate U38 is connected to the digital ground terminal (DGND); pin 4 (Y) of NAND gate U38 is connected as the output terminal to pin 6 (IN-) of the gate driver chip U36. The output of pin 4 (Y) will only flip to low level when pins 1 and 2 of NAND gate U38 are both high level. TP34 (P_EN_N) is the output signal test point of NAND gate U38. The on / off state of the chip signal can be determined by testing its voltage value.

[0039] like Figure 5 As shown, in the signal coupling and current monitoring module, pin 3 (VDD) of the gate driver chip U36 is connected to a 5V power supply, and after series resistor R197, capacitors C229 and C230 are connected in parallel to AGND; pin 2 (GND) and pin 7 (internal pad TPAD) are connected to the analog ground terminal; pin 4 (OUTH) and pin 5 (OUTL) of the gate driver chip U36 are connected in series with resistors R198 and R200 respectively, and then integrated into one channel connected to the RF field-effect transistor Q7 (model AFT09MS015NT1). The driver (i.e., the gate driver chip U36) output is valid only when pin 1 (IN+) of the gate driver chip U36 is high and pin 6 (IN–) is low, driving the RF field-effect transistor Q7 to conduct; in other states, the output is off and the RF field-effect transistor is off. Pin 3 of the RF field-effect transistor Q7 is connected to the negative terminal LASER_LD_C of the target nanosecond pulse laser. The output of the gate driver chip U36 controls the on / off state of the RF field-effect transistor Q7, enabling Q7 to output a pulse signal to the negative terminal of the target nanosecond pulsed laser. Furthermore, since pin 3 of the field-effect transistor Q6 is connected to the negative terminal of the target nanosecond pulsed laser, outputting a reference signal to the negative terminal, the on / off state of RF field-effect transistor Q7 generates a pulse signal, which is then coupled with the reference signal to form a composite drive signal, ultimately input to the target nanosecond pulsed laser.

[0040] The signal output from pin 2 of the RF MOSFET Q7 flows to the analog ground terminal (AGND1) via a sampling resistor network (including sampling resistors R203, R204, R205, and R329); on the other hand, the signal output from pin 2 is directly connected to resistor R207 and flows to pin 4 (input terminal) of the operational amplifier chip U39 (the specific model of the operational amplifier chip U39 can be AD8045ACPZ). Pin 8 of op-amp chip U39 is connected to a 3.3V analog power supply, with capacitors C234 and C235 connected in parallel to AGND; pin 3 (inverting input) of op-amp chip U39 is connected to pin 2 for anti-oscillation through gain ratio resistors R210 and R209, and capacitor C237 connected in parallel; pin 5 is connected to the analog ground terminal as the chip ground terminal; pin 7 is the output terminal, which is filtered by resistor R208 and capacitor C236 and then flows to the ADC pin of the main control module to realize the current monitoring of signal coupling (i.e., drive current signal). The circuit sets a test point TP35 (LASER_MOD_CUR_MON), and the voltage can be directly measured with a multimeter and compared with the monitoring value collected by the ADC pin of the main control module for verification.

[0041] In one embodiment, the nanosecond pulsed laser drive control device may further include a power conversion module. The power conversion module is connected to the main control module, the digital-to-analog converter module, the reference operation and current monitoring module, the direct digital synthesizer module, the pulse signal generation and conditioning module, the signal output selection module, and the signal coupling and current monitoring module. The power conversion module includes a first power conversion unit, a second power conversion unit, and a third power conversion unit. The second power conversion unit is connected to both the first and third power conversion units. The second power conversion unit is also connected to the main control module, the digital-to-analog converter module, the direct digital synthesizer module, the pulse signal generation and conditioning module, and the signal coupling and current monitoring module. The third power conversion unit is connected to the reference operation and current monitoring module.

[0042] The nanosecond pulsed laser drive control device may further include: a power monitoring module. The power monitoring module is connected to the power conversion module. The power monitoring module is used to monitor the voltage output by the power conversion module.

[0043] In an exemplary embodiment, based on the structure of the nanosecond pulse laser driving control device in the above embodiments, the narrow pulse signal of the target nanosecond pulse laser (in this embodiment, a laser wind radar) is modulated. The specific steps are as follows: Step 1: Connect the power conversion module of the nanosecond pulsed laser driver control device to an external 24V power supply, and connect the target nanosecond pulsed laser to the reference working and current monitoring module and the signal coupling and current monitoring module. Step 2: After the external power is turned on, the power module immediately starts working. The power supply chain is divided into three levels (i.e., the first power conversion unit, the second power conversion unit, and the third power conversion unit) for orderly conversion. At the same time, the power monitoring module starts synchronously. The specific process is as follows: The first power conversion unit adopts a DC-DC architecture, converting the input 24V voltage into 5V and 6V output voltages, providing basic power supply for the subsequent power conversion of the second power conversion unit; the second power conversion unit adopts a dual-architecture design (including DC-DC architecture and LDO architecture), where the DC-DC architecture converts the 5V voltage into 3.3V, 2.5V, and 1.8V digital voltages. The power supply (powering the main control module, analog-to-digital converter module, direct digital synthesizer module, reference operation and current monitoring module) uses an LDO architecture to convert 6V to 5V, powering the AD8045ACPZ op-amp chip, ADG779BKSZ-REEL multiplexer chip, and LMG1025Q gate driver chip. The third power conversion unit further converts the 5V power to 3.3V and 1.8V analog power, precisely powering the OPA2340EA / 2K5 and MAX4475AUT+T op-amp chips, the DAC8532IDGK DAC chip, and the REF3225AIDBVT reference voltage chip. This three-stage power supply architecture ensures that each module of the device meets the operational requirements of the laser wind radar, achieving stable operation. Simultaneously, the power monitoring module collects voltage signals from each output terminal of the power modules in real time, monitoring the power supply status to ensure safe and reliable power supply.

[0044] Step 3: The main control chip acts as the SPI master, sending the corresponding digital quantity (i.e., digital signal) to the 16-bit DAC chip DAC8532IDGK in the digital-to-analog converter module via the SPI protocol. The DAC8532IDGK chip uses 2.5V as a reference voltage, linearly converting the received digital quantity into an analog voltage (i.e., analog signal). This analog voltage is then converted into a corresponding reference operating current (i.e., reference signal) by a constant current source circuit (i.e., the current drive and monitoring circuit in the reference operating and current monitoring module). Simultaneously, the sampling resistor in the current drive and monitoring circuit acquires the reference current signal of the target nanosecond pulse laser, amplifies it using an operational amplifier chip, and feeds it back to the main control module for real-time monitoring.

[0045] Step 4: Nanosecond Pulse Signal Generation and Conditioning: Based on preset pulse parameters (pulse width, repetition frequency, amplitude, etc.), the main control chip writes a frequency control word (FTW) and a phase control word (POW) to the AD9912ABCPZ chip of the DDS module via the SPI interface, driving the AD9912ABCPZ to synchronously output two signals at a high sampling rate of 1GSPS: one is a DAC pulse modulation differential signal DAC_IOUTN and DAC_IOUTP (i.e., DAC differential signal), which is converted into a single-ended signal by a transformer; the other is a CMOS single-ended digital signal (i.e., CMOS single-ended signal). The two signals are first amplified, filtered, buffered, and level-conditioned by gain control, and then the circuit precisely selects one or both signals to output simultaneously, ultimately generating a nanosecond modulation signal that meets the preset pulse width and amplitude requirements.

[0046] Step 5: Signal Output Selection: The two signals output by AD9912ABCPZ are amplified and shaped, and then integrated into an internal drive signal by a differential amplifier; the external drive signal can be connected to an external signal generator, and the waveform configuration output is completed by the control module; the main control chip switches the internal and external drive signals on and off by controlling the signal to achieve selective output of different modulation signals.

[0047] Step 6: Coupling and outputting the reference signal and nanosecond pulse signal: After the preceding parameters are configured, the circuit maintains the smooth operation of the drive link. The reference signal output by the reference working and current monitoring module is linearly coupled with the conditioned nanosecond pulse signal. Under the precise control of the main control chip, the nanosecond pulse output is regulated to form a composite drive signal of DC reference + nanosecond pulse, ensuring that its amplitude and pulse shape fully match the driving requirements of the target nanosecond pulse laser.

[0048] Step 7: Current monitoring and closed-loop calibration: After the composite drive signal is output, the sampling resistor collects the final current signal of the target nanosecond pulse laser (including the reference current signal and the drive current signal) in real time. After being amplified by the operational amplifier chip, it is fed back to the main control chip to realize the real-time monitoring of the operating current of the target nanosecond pulse laser.

[0049] The main control chip compares the acquired reference current signal and drive current signal with the preset target current value, and calculates the deviation (including reference current deviation and drive current deviation). If the reference current deviation is >5%, the main control chip generates an adjustment digital signal to readjust the set voltage of the DAC8532IDGK through the SPI interface. If the drive current deviation is >5%, the main control chip generates an adjustment drive signal to readjust the pulse parameters (amplitude and pulse width) of the AD9912ABCPZ through the SPI interface. After adjustment, steps 1-6 are repeated until both the reference current deviation and drive current deviation are ≤5%, thus constructing a stable closed-loop control circuit.

[0050] Based on the above embodiments, this application achieves high-precision, high-stability, and highly integrated drive control for nanosecond pulse lasers, as detailed below: 1. Significantly improved pulse parameter control accuracy. Achieves precise control of nanosecond pulse widths, with pulse width modulation accuracy ≤0.1ns and frequency resolution up to 4μHz, far exceeding the control accuracy of existing technologies. For the first time, an AD9912 is used to build a dedicated drive link (1GSPS sampling rate, 48-bit frequency control word) as the core of pulse generation control, achieving microhertz-level frequency resolution and sub-nanosecond-level timing granularity, directly generating high-precision analog pulses with nanosecond-level pulse widths, replacing the stepped distortion output of traditional FPGA + low-speed DAC; the main control module achieves precise control of nanosecond-level step sizes through digital parameter configuration; simultaneously, combined with a closed-loop calibration control loop, it dynamically corrects parameter deviations, ensuring system control accuracy from both the pulse generation end and the precise calibration end.

[0051] 2. High control integration, strong compatibility and operability. Using a single main control chip as the core control unit, it integrates multiple control functions such as DDS pulse generation, voltage control, path selection, and closed-loop calibration. The hardware control chain is simplified; different laser models only require modification of the main control chip's configuration parameters for adaptation, reducing the debugging cycle by 50% and significantly improving control flexibility. Through the standardized control flow design of steps 1 to 7, the dispersed control functions are integrated into a unified management system on the main control chip, replacing the traditional multi-entity control architecture of FPGA + DAC + clock chip. The pulse source selection control and modular control logic in step 4 enable the device to adapt to different scenario requirements, reducing adaptation difficulty.

[0052] 3. Excellent control stability and safety. The voltage fluctuation during the laser driving process is ≤0.1V, eliminating the risk of false triggering. Long-term operation (100 hours) shows pulse parameter drift of <0.8%, demonstrating control stability and safety far exceeding existing analog control schemes. The digital control of the reference voltage in step 1 eliminates the influence of temperature drift in analog circuits; the enable logic control in step 4 establishes a safety management mechanism; and the closed-loop control in step 7 real-time offsets external interference and device aging effects, forming a stable control system throughout the entire process and further stabilizing pulse width modulation accuracy.

[0053] 4. Timing synchronization optimization: Relying on the low jitter of the AD9912 and the high-speed output of the differential operational amplifier, the phase deviation of multi-device collaboration is eliminated, ensuring the timing synchronization of pulse generation and laser driving, and further improving control accuracy.

[0054] Based on the same inventive concept, this application also provides a nanosecond pulse laser driving control method, which is applied to the nanosecond pulse laser driving control device in the above embodiments. Specific limitations in one or more nanosecond pulse laser driving control method embodiments provided below can be found in the limitations of the nanosecond pulse laser driving control device described above, and will not be repeated here.

[0055] In one exemplary embodiment, a nanosecond pulsed laser driving control method is provided, comprising: Acquire the reference current signal and drive current signal of the target nanosecond pulsed laser.

[0056] The reference current deviation is determined based on the reference current signal and the preset target current value. The drive current deviation is determined based on the drive current signal and the preset target current value.

[0057] If the reference current deviation exceeds the set threshold, an adjustment digital signal is generated. This adjustment digital signal is used to adjust the set voltage of the digital-to-analog converter module.

[0058] If the drive current deviation exceeds the set threshold, an adjustment drive signal is generated. The adjustment drive signal is used to adjust the pulse parameters of the direct digital synthesizer module.

[0059] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0060] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. Furthermore, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A nanosecond pulsed laser driving and control device, characterized in that, include: The module includes a main control module, a digital-to-analog conversion module, a reference working and current monitoring module, a direct digital synthesizer module, a pulse signal generation and conditioning module, a signal output selection module, and a signal coupling and current monitoring module. The main control module is connected to the analog-to-digital converter module, the direct digital synthesizer module, the reference working and current monitoring module, the signal output selection module, and the signal coupling and current monitoring module, respectively; the reference working and current monitoring module is connected to the analog-to-digital converter module; the pulse signal generation and conditioning module is connected to the direct digital synthesizer module and the signal output selection module, respectively; the signal coupling and current monitoring module is connected to the signal output selection module; the reference working and current monitoring module, as well as the signal coupling and current monitoring module, are all connected to the target nanosecond pulsed laser. The main control module generates control signals, which are processed by the analog-to-digital converter module, the reference working and current monitoring module, the direct digital synthesizer module, the pulse signal generation and conditioning module, the signal output selection module, and the signal coupling and current monitoring module to drive the target nanosecond pulse laser. The module also acquires the reference current signal and the drive current signal of the target nanosecond pulse laser in real time. Based on the reference current signal and the drive current signal, the module sets the voltage of the analog-to-digital converter module and adjusts the pulse parameters of the direct digital synthesizer module.

2. The nanosecond pulse laser driving and control device according to claim 1, characterized in that, The digital-to-analog conversion module includes a digital-to-analog conversion circuit and an operational amplifier circuit; The digital-to-analog converter circuit is connected to the main control module and the operational amplifier circuit respectively; the operational amplifier circuit is connected to the reference working and current monitoring module.

3. The nanosecond pulse laser driving and control device according to claim 1, characterized in that, The reference operating voltage and current monitoring module includes a laser operating protection circuit and a current driving and monitoring circuit. The laser operating protection circuit is connected to the target nanosecond pulse laser and the current driving and monitoring circuit, respectively; the current driving and monitoring circuit is connected to the digital-to-analog conversion module, the target nanosecond pulse laser and the main control module, respectively.

4. The nanosecond pulse laser driving and control device according to claim 1, characterized in that, The nanosecond pulsed laser drive control device further includes a power conversion module; the power conversion module is connected to the main control module, the digital-to-analog conversion module, the reference working and current monitoring module, the direct digital synthesizer module, the pulse signal generation and conditioning module, the signal output selection module, and the signal coupling and current monitoring module.

5. The nanosecond pulse laser driving and control device according to claim 4, characterized in that, The nanosecond pulsed laser drive control device further includes: a power monitoring module; the power monitoring module is connected to the power conversion module; the power monitoring module is used to monitor the voltage output by the power conversion module.

6. The nanosecond pulse laser driving and control device according to claim 4, characterized in that, The power conversion module includes a first power conversion unit, a second power conversion unit, and a third power conversion unit; the second power conversion unit is connected to the first power conversion unit and the third power conversion unit respectively. The second power conversion unit is connected to the main control module, the digital-to-analog converter module, the direct digital synthesizer module, the pulse signal generation and conditioning module, and the signal coupling and current monitoring module, respectively. The third power conversion unit is connected to the reference working and current monitoring module.

7. The nanosecond pulse laser driving and control device according to claim 2, characterized in that, The digital-to-analog converter circuit uses the DAC8532IDGK chip.

8. The nanosecond pulse laser driving and control device according to claim 2, characterized in that, The operational amplifier circuit uses the MAX4475AUT+T chip.

9. The nanosecond pulse laser driving and control device according to claim 3, characterized in that, The laser operating protection circuit includes a power load switch and an electrostatic protection diode. The power load switch is connected to the electrostatic protection diode and the target nanosecond pulsed laser, respectively; the electrostatic protection diode is connected to the target nanosecond pulsed laser and the current driving and monitoring circuit, respectively. The power load switch uses a TPS22975DGSR chip; the electrostatic protection diode uses an MRM9HDET5G chip.

10. A method for driving and controlling a nanosecond pulsed laser, characterized in that, The nanosecond pulse laser driving control method is applied to the nanosecond pulse laser driving control device as described in claims 1-9; The nanosecond pulse laser driving and control method includes: Acquire the reference current signal and drive current signal of the target nanosecond pulsed laser; The reference current deviation is determined based on the reference current signal and the preset target current value; the drive current deviation is determined based on the drive current signal and the preset target current value; If the reference current deviation exceeds a set threshold, an adjustment digital signal is generated; the adjustment digital signal is used to adjust the set voltage of the digital-to-analog converter module. If the drive current deviation exceeds the set threshold, an adjustment drive signal is generated; the adjustment drive signal is used to adjust the pulse parameters of the direct digital synthesizer module.

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