Controller for LLC resonant power converter

Abstract

A controller applied to an LLC resonant power converter is disclosed. The controller includes a critical voltage generating circuit and a gate control signal generating circuit. The critical voltage generating circuit generates an upper critical voltage and a lower critical voltage according to a reference voltage, a feedback voltage and a phase of a gate control signal. The gate control signal generating circuit turns off an upper bridge control signal according to a detection voltage and the upper critical voltage, or turns off a lower bridge control signal according to the detection voltage and the lower critical voltage. An upper bridge switch of the LLC resonant power converter is turned on according to the upper bridge control signal, and a lower bridge switch of the LLC resonant power converter is turned on according to the lower bridge control signal. The present application can compensate for the offset of the output load detection caused by the delay of the internal and external elements of the controller, so as to greatly improve the accuracy of the over-current protection and reduce the output load entering the standby mode.

Description

Technical Field

[0001] This invention relates to a controller for an LLC resonant power converter, and more particularly to a controller capable of compensating for delays caused by internal and external components of the controller. Background Technology

[0002] In an LLC resonant power converter using the Bang-Bang charge control (BBCC) method, since the input voltage and the switching frequency under full load output can be considered constant, the output power PO of the LLC resonant power converter can be referred to by equation (1):

[0003] PO= k*ΔVFBC (1)

[0004] Where k is a constant, and ΔVFBC is the detection voltage of a pin on a controller applied to the LLC resonant power converter. Therefore, as shown in equation (1), the output power PO can be known by detecting the voltage ΔVFBC, so the output load point for over-current protection (OCP) and entering standby mode can be set by detecting the voltage ΔVFBC.

[0005] However, in reality, delays caused by internal and external components of the controller can result in the actual output power exceeding the output power PO by the output power PD. Therefore, the overcurrent protection (OCP) set by detecting the voltage ΔVFBC and the output load point for entering standby mode will show a corresponding offset in output power PD. Thus, eliminating the aforementioned drawbacks of the prior art has become an important issue for the designers of the controller. Summary of the Invention

[0006] An embodiment of the present invention discloses a controller applied to an LLC resonant power converter. The controller includes a threshold voltage generation circuit and a gate control signal generation circuit. The threshold voltage generation circuit is used to generate an upper threshold voltage and a lower threshold voltage based on a reference voltage, a feedback voltage, and a gate control signal phase. The gate control signal generation circuit is used to turn off an upper bridge control signal based on a detected voltage and the upper threshold voltage, or to turn off a lower bridge control signal based on the detected voltage and the lower threshold voltage, wherein an upper bridge switch of the LLC resonant power converter is turned on based on the upper bridge control signal, and a lower bridge switch of the LLC resonant power converter is turned on based on the lower bridge control signal.

[0007] In one embodiment of the present invention, the gate control signal phase is a first phase or a second phase, the first phase corresponding to the upper bridge control signal, and the second phase corresponding to the lower bridge control signal.

[0008] In one embodiment of the present invention, the critical voltage generating circuit includes a compensation circuit and a voltage adjustment circuit. The compensation circuit is used to receive a compensation voltage and the reference voltage, wherein the compensation circuit outputs a first voltage based on the first phase, the compensation voltage, and the reference voltage, and outputs a second voltage based on the second phase, the compensation voltage, and the reference voltage. The voltage adjustment circuit is coupled to the compensation circuit to generate the upper critical voltage based on the feedback voltage and the first voltage, and to generate the lower critical voltage based on the feedback voltage and the second voltage.

[0009] In one embodiment of the present invention, the compensation circuit includes a first adder and a second adder. The first adder is used to receive the compensation voltage and the reference voltage, and subtract the compensation voltage from the reference voltage to generate the first voltage. The second adder is used to receive the compensation voltage and the reference voltage, and add the compensation voltage to the reference voltage to generate the second voltage.

[0010] In one embodiment of the invention, the voltage adjustment circuit includes a level circuit and a level offset. The level circuit is used to generate a voltage level based on the feedback voltage. The level offset is coupled to the compensation circuit and the level circuit, and includes a third adder and a fourth adder, wherein the third adder is used to add the voltage level to the first voltage to generate the upper critical voltage, and the fourth adder is used to subtract the voltage level from the second voltage to generate the lower critical voltage.

[0011] In one embodiment of the present invention, the gate control signal generation circuit includes a first comparator, a second comparator, a first flip-flop, and a second flip-flop. The first comparator is used to receive the detection voltage and the upper threshold voltage, and generate a first shutdown signal based on the detection voltage and the upper threshold voltage. The second comparator is used to receive the detection voltage and the lower threshold voltage, and generate a second shutdown signal based on the detection voltage and the lower threshold voltage. The first flip-flop is coupled to the first comparator and is used to control the shutdown and activation of the upper bridge control signal based on the first shutdown signal and an upper bridge enable signal, respectively. The second flip-flop is coupled to the second comparator and is used to control the shutdown and activation of the lower bridge control signal based on the second shutdown signal and a lower bridge enable signal, respectively.

[0012] In one embodiment of the present invention, the upper threshold voltage is greater than the reference voltage and the lower threshold voltage is less than the reference voltage.

[0013] In one embodiment of the present invention, the power converter is a current-mode LLC resonant power converter.

[0014] Another embodiment of the present invention discloses a controller applied to an LLC resonant power converter. The controller includes a threshold voltage generation circuit and a gate control signal generation circuit. The threshold voltage generation circuit is used to generate an upper threshold voltage and a lower threshold voltage based on a reference voltage, a feedback voltage, an upper bridge control signal, and a lower bridge control signal. The gate control signal generation circuit is used to turn off the upper bridge control signal based on a detected voltage and the upper threshold voltage, or to turn off the lower bridge control signal based on the detected voltage and the lower threshold voltage, wherein an upper bridge switch of the LLC resonant power converter is turned on based on the upper bridge control signal, and a lower bridge switch of the LLC resonant power converter is turned on based on the lower bridge control signal.

[0015] In one embodiment of the present invention, the critical voltage generating circuit includes a compensation circuit and a voltage adjustment circuit. The compensation circuit is used to receive a compensation voltage, the reference voltage, the upper bridge control signal, and the lower bridge control signal. The compensation circuit outputs a first voltage based on the upper bridge control signal, the compensation voltage, and the reference voltage, and outputs a second voltage based on the lower bridge control signal, the compensation voltage, and the reference voltage. The voltage adjustment circuit is coupled to the compensation circuit and is used to generate the upper critical voltage based on the feedback voltage and the first voltage, and to generate the lower critical voltage based on the feedback voltage and the second voltage.

[0016] In one embodiment of the present invention, the compensation circuit includes a fifth adder and a sixth adder. The fifth adder is used to receive the compensation voltage and the reference voltage, and subtract the compensation voltage from the reference voltage to generate the first voltage. The sixth adder is used to receive the compensation voltage and the reference voltage, and add the compensation voltage to the reference voltage to generate the second voltage. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of a controller for an LLC resonant power converter disclosed in an embodiment of the present invention.

[0018] Figure 2 This is a schematic diagram illustrating the delays in the upper and lower critical voltages caused by internal and external components of the controller in the prior art.

[0019] Figure 3 This is a schematic diagram illustrating the gate control signal generation circuit, compensation circuit, and voltage adjustment circuit.

[0020] Figure 4 This is a schematic diagram illustrating the first voltage, second voltage, reference voltage, new upper critical voltage, upper critical voltage, new lower critical voltage, lower critical voltage, compensation voltage, voltage level, and detection voltage.

[0021] Figure 5 This is a schematic diagram of the gate control signal generation circuit, compensation circuit, and voltage adjustment circuit disclosed in another embodiment of the present invention.

[0022] Figure 6 This is a schematic diagram illustrating the first voltage, second voltage, reference voltage, new upper critical voltage, upper critical voltage, new lower critical voltage, lower critical voltage, compensation voltage, voltage level, and detection voltage.

[0023] Figure 7 This is a schematic diagram illustrating how the critical voltage for overcurrent protection can be set by adjusting the voltage level.

[0024] Figure 8 This is a schematic diagram illustrating how the standby threshold voltage for the corresponding output load point to enter standby mode can be set by the voltage level.

[0025] The reference numerals in the attached figures are explained as follows:

[0026] 100 LLC resonant power converter

[0027] 102 Bridge Switch

[0028] 104 Lower Bridge Switch

[0029] 200 controller

[0030] 202, 302 Critical Voltage Generation Circuit

[0031] 203 Logic Circuits

[0032] 204 Gate Control Signal Generation Circuit

[0033] Pins 206, 208, 210, and 212

[0034] 2022, 3022 compensation circuits

[0035] 2024 Voltage Regulation Circuit

[0036] 20222 First Adder

[0037] 20224 Second Adder

[0038] 20242 level circuit

[0039] 20244-level offset

[0040] 220 Third Adder

[0041] 222 Fourth Adder

[0042] 2042 First Comparator

[0043] 2044 First Shifter

[0044] 2046 Second Comparator

[0045] 2048 Second Shifter

[0046] 30222 Fifth Adder

[0047] 30224, 30228 First Switch

[0048] 30226 Sixth Adder

[0049] FDS First Shutdown Signal

[0050] GP gate control signal phase

[0051] HGATE upper bridge control signal

[0052] LGATE lower bridge control signal

[0053] THGATE bridge activation signal

[0054] SDS Second Shutdown Signal

[0055] tPD delay time

[0056] TLGATE downbridge enable signal

[0057] VFBV Feedback Voltage

[0058] VFBC_TH Voltage Level

[0059] VCM-ΔVFBC_PD First Voltage

[0060] VCM+ΔVFBC_PD Second Voltage

[0061] ΔVFBC_PD compensation voltage

[0062] VCM reference voltage

[0063] VFBC detection voltage

[0064] VFBC_THH Upper Critical Voltage

[0065] VFBC_THL Lower Critical Voltage

[0066] VFBC_THHPD New Upper Critical Voltage

[0067] VFBC_THLPD New Lower Critical Voltage

[0068] VFBC_OCPH Overcurrent Protection Critical Voltage

[0069] VFBC_STBTH Standby Critical Voltage Detailed Implementation

[0070] Please refer to Figure 1 , Figure 1 This is a schematic diagram of a controller 200 applied to an LLC resonant power converter 100 according to an embodiment of the present invention. The controller 200 includes a threshold voltage generation circuit 202 and a gate control signal generation circuit 204. The threshold voltage generation circuit 202 includes a compensation circuit 2022 and a voltage adjustment circuit 2024. The coupling relationship between the threshold voltage generation circuit 202, the gate control signal generation circuit 204, the compensation circuit 2022, and the voltage adjustment circuit 2024 can be referred to... Figure 1 This will not be elaborated further here. Additionally, the LLC resonant power converter 100 is a current-mode LLC resonant power converter. Because the detection voltage VFBC at pin 206 of the controller 200 is actually between a maximum value (e.g., but not limited to 4V) and a minimum value (e.g., but not limited to 1V), a reference voltage VCM input to the compensation circuit 2022 can be set to the midpoint of the maximum and minimum values, 2.5V, where ΔVFBC_PD is the compensation voltage for delays caused by internal and external components of the controller 200, and the maximum and minimum values ​​correspond to the maximum output load of the LLC resonant power converter 100. Furthermore, as... Figure 1 As shown, the controller 200 can receive a ground voltage through the GND pin.

[0071] Next, please refer to Figure 2 In existing technologies, such as Figure 2As shown, the upper threshold voltage VFBC_THH generated by the voltage adjustment circuit 2024 will be shifted upward to a new upper threshold voltage VFBC_THHPD due to the compensation voltage ΔVFBC_PD, and the lower threshold voltage VFBC_THL generated by the voltage adjustment circuit 2024 will be shifted downward to a new lower threshold voltage VFBC_THLPD due to the compensation voltage ΔVFBC_PD. As a result, the upper bridge control signal HGATE and the lower bridge control signal LGATE generated by the gate control signal generation circuit 204 will be delayed and turned off, where tPD is the delay time. The upper threshold voltage VFBC_THH is greater than the reference voltage VCM, and the lower threshold voltage VFBC_THL is less than the reference voltage VCM.

[0072] Then as Figure 3 As shown, the compensation circuit 2022 includes a first adder 20222 and a second adder 20224. The first adder 20222 subtracts the compensation voltage ΔVFBC_PD from the reference voltage VCM to generate a first voltage VCM-ΔVFBC_PD, and the second adder 20224 adds the compensation voltage ΔVFBC_PD to the reference voltage VCM to generate a second voltage VCM+ΔVFBC_PD. When the gate control signal phase GP input to the compensation circuit 2022 is a first phase, the compensation circuit 2022 outputs the first voltage VCM-ΔVFBC_PD; when the gate control signal phase GP is a second phase, the compensation circuit 2022 outputs the second voltage VCM+ΔVFBC_PD. The first phase corresponds to the upper bridge control signal HGATE, and the second phase corresponds to the lower bridge control signal LGATE.

[0073] like Figure 3 As shown, the voltage adjustment circuit 2024 includes a level circuit 20242 and a level offset 20244. The level circuit 20242 can receive a feedback voltage VFBV from the optocoupler 101 of the LLC resonant power converter 100 through a pin 208 of the controller 200, and generate a voltage level VFBC_TH according to the feedback voltage VFBV. The voltage level VFBC_TH will be changed according to the actual design requirements. When a third adder 220 in the level offset 20244 receives a first voltage VCM-ΔVFBC_PD (corresponding to the first phase), the third adder 220 can add the voltage level VFBC_TH to the first voltage VCM-ΔVFBC_PD to generate an upper critical voltage VFBC_THH; when a fourth adder 222 in the level offset 20244 receives a second voltage VCM+ΔVFBC_PD (corresponding to the second phase), the fourth adder 222 can subtract the voltage level VFBC_TH from the second voltage VCM+ΔVFBC_PD to generate a lower critical voltage VFBC_THL.

[0074] like Figure 3 As shown, the gate control signal generation circuit 204 includes a first comparator 2042, a first flip-flop 2044, a second comparator 2046, and a second flip-flop 2048. The first comparator 2042 is coupled to pin 206 of the third adder 220 and the controller 200, and is used to receive the detection voltage VFBC and the upper threshold voltage VFBC_THH, and generate a first shutdown signal FDS based on the detection voltage VFBC and the upper threshold voltage VFBC_THH. When the first flip-flop 2044 receives the first shutdown signal FDS, it shuts down the upper bridge control signal HGATE according to the first shutdown signal FDS. Furthermore, the first flip-flop 2044 and the second flip-flop 2048 are included in... Figure 1 In the logic circuit 203 shown. Additionally, when the first flip-flop 2044 receives an enable signal from the gate control signal generation circuit 204 (not shown in the diagram),... Figure 1 and Figure 2 When the bridge enable signal THGATE is generated, the first flip-flop 2044 enables the bridge control signal HGATE according to the bridge enable signal THGATE. Figure 3 As shown, the second comparator 2046 is coupled to pin 206 of the fourth adder 222 and the controller 200 to receive the detection voltage VFBC and the lower threshold voltage VFBC_THL, and generates a second shutdown signal SDS based on the detection voltage VFBC and the lower threshold voltage VFBC_THL. When the second flip-flop 2048 receives the second shutdown signal SDS, the second flip-flop 2048 shuts down the lower bridge control signal LGATE according to the second shutdown signal SDS. Additionally, when the second flip-flop 2048 receives the enable signal generated by the circuit (not shown in the diagram)... Figure 1 and Figure 2 When the lower bridge enable signal TLGATE is generated, the second flip-flop 2048 enables the lower bridge control signal LGATE according to the lower bridge enable signal TLGATE. The upper bridge switch 102 of the LLC resonant power converter 100 is turned on according to the upper bridge control signal HGATE, and the lower bridge switch 104 of the LLC resonant power converter 100 is turned on according to the lower bridge control signal LGATE. Additionally, as... Figure 1 As shown, the logic circuit 203 transmits the upper bridge control signal HGATE to the upper bridge switch 102 through the pin 210 of the controller 200, and transmits the lower bridge control signal LGATE to the lower bridge switch 104 through the pin 212 of the controller 200.

[0075] like Figure 4As shown, because the first voltage VCM-ΔVFBC_PD and the second voltage VCM+ΔVFBC_PD generated by the compensation circuit 2022 already contain information about the compensation voltage ΔVFBC_PD, the first voltage VCM-ΔVFBC_PD and the second voltage VCM+ΔVFBC_PD can cancel each other out. Figure 2 The compensation voltage ΔVFBC_PD, as shown, affects the new upper critical voltage VFBC_THHPD and the new lower critical voltage VFBC_THLPD, causing the new upper critical voltage VFBC_THHPD to return to the upper critical voltage VFBC_THH and the new lower critical voltage VFBC_THLPD to return to the lower critical voltage VFBC_THL. Therefore, because the new upper critical voltage VFBC_THHPD returns to the upper critical voltage VFBC_THH and the new lower critical voltage VFBC_THLPD returns to the lower critical voltage VFBC_THL, neither the upper bridge control signal HGATE nor the lower bridge control signal LGATE will be delayed in being turned off.

[0076] Furthermore, the coupling relationships between the first adder 20222, the second adder 20224, the level circuit 20242, the third adder 220, the fourth adder 222, the first comparator 2042, the first flip-flop 2044, the second comparator 2046, and the second flip-flop 2048 can be referred to Figure 3 This will not be elaborated upon here.

[0077] Next, please refer to Figure 5 , Figure 5 This is a schematic diagram of a critical voltage generating circuit 302 disclosed in another embodiment of the present invention, wherein the critical voltage generating circuit 302 has the same function as the critical voltage generating circuit 202, and the critical voltage generating circuit 302 includes a compensation circuit 3022 and a voltage adjustment circuit 2024. Figure 5 As shown, the compensation circuit 3022 includes a fifth adder 30222, a first switch 30224, a sixth adder 30226, and a first switch 30228. The fifth adder 30222 can subtract the compensation voltage ΔVFBC_PD from the reference voltage VCM to generate a first voltage VCM-ΔVFBC_PD, and the sixth adder 30226 can add the compensation voltage ΔVFBC_PD to the reference voltage VCM to generate a second voltage VCM+ΔVFBC_PD.

[0078] like Figure 5As shown, when the upper bridge control signal HGATE is enabled and the lower bridge control signal LGATE is disabled, the compensation circuit 3022 outputs a first voltage VCM-ΔVFBC_PD to the voltage adjustment circuit 2024. At this time, the third adder 220 in the level offset unit 20244 can add the voltage level VFBC_TH to the first voltage VCM-ΔVFBC_PD to generate the upper threshold voltage VFBC_THH. Next, please refer to... Figure 5 and Figure 6 Because the first voltage VCM-ΔVFBC_PD generated by the compensation circuit 3022 already contains information about the compensation voltage ΔVFBC_PD, the first voltage VCM-ΔVFBC_PD can cancel out the compensation voltage ΔVFBC_PD. Figure 2 The compensation voltage ΔVFBC_PD shown has an effect on the new upper critical voltage VFBC_THHPD, causing the new upper critical voltage VFBC_THHPD to return to the upper critical voltage VFBC_THH. Therefore, because the new upper critical voltage VFBC_THHPD returns to the upper critical voltage VFBC_THH, the first comparator 2042 and the first flip-flop 2044 in the gate control signal generation circuit 204 will not delay the shutdown of the upper bridge control signal HGATE. The operating principle of the gate control signal generation circuit 204 can be referred to the above. Figure 3 The relevant descriptions will not be repeated here. In addition, although when the compensation circuit 3022 outputs the first voltage VCM-ΔVFBC_PD to the voltage adjustment circuit 2024, the fourth adder 222 in the level offset 20244 will also operate according to the first voltage VCM-ΔVFBC_PD and the voltage level VFBC_TH, because the lower bridge control signal LGATE has been turned off (corresponding to the lower bridge enable signal TLGATE being turned off), the second flip-flop 2048 in the gate control signal generation circuit 204 will continue to turn off the lower bridge control signal LGATE.

[0079] In addition, such as Figure 5 As shown, when the upper bridge control signal HGATE is off and the lower bridge control signal LGATE is on, the compensation circuit 3022 outputs the second voltage VCM+ΔVFBC_PD to the voltage adjustment circuit 2024. At this time, the fourth adder 222 in the level offset unit 20244 can subtract the voltage level VFBC_TH from the second voltage VCM+ΔVFBC_PD to generate the lower threshold voltage VFBC_THL. Next, please refer to... Figure 5 and Figure 6 Because the second voltage VCM+ΔVFBC_PD generated by the compensation circuit 3022 already contains the information of the compensation voltage ΔVFBC_PD, the second voltage VCM+ΔVFBC_PD can cancel out the compensation voltage ΔVFBC_PD. Figure 2The compensation voltage ΔVFBC_PD shown has an effect on the new lower critical voltage VFBC_THLPD, causing the new lower critical voltage VFBC_THLPD to return to the lower critical voltage VFBC_THL. Therefore, because the new lower critical voltage VFBC_THLPD returns to the lower critical voltage VFBC_THL, the second comparator 2046 and the second flip-flop 2048 in the gate control signal generation circuit 204 will not delay the shutdown of the lower bridge control signal LGATE. The operating principle of the gate control signal generation circuit 204 can be referred to the above. Figure 3 The relevant descriptions will not be repeated here. In addition, although when the compensation circuit 3022 outputs the second voltage VCM+ΔVFBC_PD to the voltage adjustment circuit 2024, the third adder 220 in the level offset 20244 will also operate according to the second voltage VCM+ΔVFBC_PD and the voltage level VFBC_TH, because the upper bridge control signal HGATE has been turned off (corresponding to the upper bridge enable signal THGATE being turned off), the first flip-flop 2044 in the gate control signal generation circuit 204 will continue to turn off the lower bridge control signal LGATE.

[0080] Furthermore, the coupling relationships between the fifth adder 30222, the first switch 30224, the sixth adder 30226, the first switch 30228, the level circuit 20242, the third adder 220, the fourth adder 222, the first comparator 2042, the first flip-flop 2044, the second comparator 2046, and the second flip-flop 2048 can be referred to [reference needed]. Figure 5 This will not be elaborated upon here.

[0081] Therefore, as Figure 4 and Figure 6 As shown, since neither the upper bridge control signal HGATE nor the lower bridge control signal LGATE is delayed in turning off due to the compensation voltage ΔVFBC_PD, the output power PO and voltage level VFBC_TH of the LLC resonant power converter 100 can be approximately linearly related. Therefore, because the output power PO and voltage level VFBC_TH can be approximately linearly related, the output load point for overcurrent protection (OCP) and entering standby mode can be set via the voltage level VFBC_TH. Therefore, as... Figure 7 As shown, the overcurrent protection threshold voltage VFBC_OCPH can be set via the voltage level VFBC_TH, where the overcurrent protection threshold voltage VFBC_OCPH is the output load point corresponding to the overcurrent protection; as shown... Figure 8As shown, the standby threshold voltage VFBC_STBTH for the output load point entering standby mode can be set via the voltage level VFBC_TH. Thus, this invention can significantly improve the accuracy of overcurrent protection and reduce the output load entering standby mode.

[0082] In summary, because the first and second voltages generated by the compensation circuit of this invention already contain information about the delays caused by the internal and external components of the controller, this invention can compensate for the offset in output load detection caused by the delays caused by the internal and external components of the controller. Thus, this invention can significantly improve the accuracy of overcurrent protection and reduce the output load when entering standby mode.

[0083] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A controller for an LLC resonant power converter, characterized in that... Include: A threshold voltage generation circuit is used to generate an upper threshold voltage and a lower threshold voltage based on a reference voltage, a feedback voltage, and the phase of a gate control signal; and A gate control signal generation circuit is provided for turning off an upper bridge control signal based on a detected voltage and the upper threshold voltage, or turning off a lower bridge control signal based on the detected voltage and the lower threshold voltage, wherein an upper bridge switch of the LLC resonant power converter is turned on based on the upper bridge control signal, and a lower bridge switch of the LLC resonant power converter is turned on based on the lower bridge control signal.

2. The controller as described in claim 1, characterized in that... The gate control signal phase is either a first phase or a second phase, the first phase corresponding to the upper bridge control signal and the second phase corresponding to the lower bridge control signal.

3. The controller as described in claim 2, characterized in that... The critical voltage generating circuit includes: a compensation circuit for receiving a compensation voltage and the reference voltage, wherein the compensation circuit outputs a first voltage according to the first phase, the compensation voltage and the reference voltage, and outputs a second voltage according to the second phase, the compensation voltage and the reference voltage; and A voltage regulation circuit, coupled to the compensation circuit, is used to generate the upper critical voltage based on the feedback voltage and the first voltage, and to generate the lower critical voltage based on the feedback voltage and the second voltage.

4. The controller as described in claim 3, characterized in that... The compensation circuit includes: A first adder is configured to receive the compensation voltage and the reference voltage, and subtract the compensation voltage from the reference voltage to generate the first voltage; and A second adder is used to receive the compensation voltage and the reference voltage, and add the compensation voltage to the reference voltage to generate the second voltage.

5. The controller as described in claim 3, characterized in that... The voltage adjustment circuit includes: A level circuit is used to generate a voltage level based on the feedback voltage; and A quasi-offset, coupled to the compensation circuit and the level circuit, includes a third adder and a fourth adder, wherein the third adder is used to add the voltage level to the first voltage to generate the upper critical voltage, and the fourth adder is used to subtract the voltage level from the second voltage to generate the lower critical voltage.

6. The controller as described in claim 1, characterized in that... The gate control signal generation circuit includes: A first comparator is configured to receive the detection voltage and the upper threshold voltage, and generate a first shutdown signal based on the detection voltage and the upper threshold voltage; A second comparator is provided to receive the detection voltage and the lower threshold voltage, and to generate a second shutdown signal based on the detection voltage and the lower threshold voltage. A first flip-flop, coupled to the first comparator, is used to control the opening and closing of the upper bridge control signal according to the first closing signal and the upper bridge enabling signal, respectively. and A second flip-flop, coupled to the second comparator, is used to control the shutdown and activation of the lower bridge control signal according to the second shutdown signal and the lower bridge enable signal, respectively.

7. The controller as described in claim 1, characterized in that... The upper critical voltage is greater than the reference voltage and the lower critical voltage is less than the reference voltage.

8. The controller as described in claim 1, characterized in that... The power converter is a current-mode LLC resonant power converter.

9. A controller for an LLC resonant power converter, characterized in that... Include: A critical voltage generation circuit is used to generate an upper critical voltage and a lower critical voltage based on a reference voltage, a feedback voltage, an upper bridge control signal, and a lower bridge control signal. and A gate control signal generation circuit is provided to turn off the upper bridge control signal based on a detected voltage and the upper threshold voltage, or to turn off the lower bridge control signal based on the detected voltage and the lower threshold voltage, wherein an upper bridge switch of the LLC resonant power converter is turned on based on the upper bridge control signal, and a lower bridge switch of the LLC resonant power converter is turned on based on the lower bridge control signal.

10. The controller as described in claim 9, characterized in that... The critical voltage generation circuit includes: a compensation circuit for receiving a compensation voltage, the reference voltage, the upper bridge control signal, and the lower bridge control signal, wherein the compensation circuit outputs a first voltage according to the upper bridge control signal, the compensation voltage, and the reference voltage, and outputs a second voltage according to the lower bridge control signal, the compensation voltage, and the reference voltage; and A voltage regulation circuit, coupled to the compensation circuit, is used to generate the upper critical voltage based on the feedback voltage and the first voltage, and to generate the lower critical voltage based on the feedback voltage and the second voltage.

11. The controller as claimed in claim 10, characterized in that... The voltage adjustment circuit includes: A level circuit is used to generate a voltage level based on the feedback voltage; and A quasi-offset, coupled to the compensation circuit and the level circuit, includes a third adder and a fourth adder, wherein the third adder is used to add the voltage level to the first voltage to generate the upper critical voltage, and the fourth adder is used to subtract the voltage level from the second voltage to generate the lower critical voltage.

12. The controller as claimed in claim 10, characterized in that... The compensation circuit includes: A fifth adder is configured to receive the compensation voltage and the reference voltage, and subtract the compensation voltage from the reference voltage to generate the first voltage; and A sixth adder is used to receive the compensation voltage and the reference voltage, and add the compensation voltage to the reference voltage to generate the second voltage.

13. The controller as described in claim 9, characterized in that... The gate control signal generation circuit includes: A first comparator is configured to receive the detection voltage and the upper threshold voltage, and generate a first shutdown signal based on the detection voltage and the upper threshold voltage; A second comparator is provided to receive the detection voltage and the lower threshold voltage, and to generate a second shutdown signal based on the detection voltage and the lower threshold voltage. A first flip-flop, coupled to the first comparator, is used to control the opening and closing of the upper bridge control signal according to the first closing signal and the upper bridge enabling signal, respectively. and A second flip-flop, coupled to the second comparator, is used to control the shutdown and activation of the lower bridge control signal according to the second shutdown signal and the lower bridge enable signal, respectively.

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