A low leakage TVS chip and a preparation method thereof

Abstract

This invention belongs to the field of TVS chip technology, specifically relating to a low-leakage TVS chip and its fabrication method. The invention uses the methacryloyloxy group of KH570 as a hydrophobic group, grafted onto the surface of a SiO2 passivation layer via Si-O-Si bonds, replacing the hydrophilic silanol groups (-Si-OH) on the SiO2 surface, significantly reducing surface energy. The cross-linked layer formed by polymerization with MMA double bonds can prevent the adsorption of moisture in humid environments, improving the leakage suppression performance of the TVS chip in humid environments. Through KH570 chemical anchoring, micropores and defects on the surface of the SiO2 passivation layer are filled, reducing leakage channels for charge carriers. The dense layer formed by the cross-linking polymerization of KH570 and MMA can reduce the interface state density on the SiO2 surface, suppressing surface-state-induced leakage, thereby improving the leakage suppression effect of the TVS chip.

Description

Technical Field

[0001] This invention belongs to the field of TVS chip technology, specifically relating to a low-leakage TVS chip and its fabrication method. Background Technology

[0002] TVS chips, also known as transient voltage suppressors, are solid-state semiconductor protection devices based on the avalanche breakdown effect. They act as "electronic lightning rods" in circuits, specifically designed to suppress transient overvoltages (such as electrostatic discharge, lightning strikes, and power surges) and protect sensitive electronic components from damage. The reverse leakage current of a TVS chip is a tiny current that should not flow under reverse bias. Its main sources include recombination current in the depletion region, carrier tunneling current, semiconductor surface state leakage current, and leakage current in the device's isolation region. The occurrence of these leakage currents has two main consequences: first, they increase the device's power consumption and generate heat, which is extremely detrimental to the device's stability; second, excessive leakage current can cause significant interference, affecting the performance of surrounding chips and greatly impacting the device's safety.

[0003] The essence of low leakage current is to minimize leakage current by controlling the characteristics of the PN junction and surface states. Suppressing surface states and edge leakage through a high-quality passivation layer is the core of low leakage current design. Silicon atoms are very stable inside the crystal, but the outermost silicon atoms have unpaired dangling bonds, which are the source of surface states. Dangling bonds trap charge carriers (electrons / holes), forming tiny conductive channels, i.e., surface leakage. Dangling bonds also adsorb moisture and impurities from the air, widening the leakage channels and increasing the leakage current. By pairing the atoms in the passivation layer with the dangling bonds on the surface, surface states can be eliminated, forming stable chemical bonds. Silicon dioxide (SiO2) is a common main component of glass. In semiconductor processes, a dense silicon dioxide film is usually grown directly on the silicon wafer through "dry oxidation" or "wet oxidation". It has a very strong adhesion to the silicon surface, which can perfectly block the dangling bonds on the silicon surface. It also has good insulation, mature technology, and very low cost. However, if it is in a humid environment for a long time, it will absorb a small amount of water vapor, which is not good enough for ultra-high and low leakage current scenarios. Summary of the Invention

[0004] The purpose of this invention is to provide a low-leakage TVS chip and its fabrication method to solve the above-mentioned technical problems.

[0005] To achieve the above-mentioned technical objectives, the technical solution of the present invention is as follows: A method for fabricating a low-leakage TVS chip includes the following steps: S1. Take a P-type single crystal, cut it into a 50mm×50mm substrate, and pre-treat it to remove the natural oxide layer and metal impurities on the surface. S2. The pretreated substrate is placed under vacuum and heated to 450~550℃. A mixture of GeH4 and SiH4 gas is introduced, and the substrate is vertically irradiated with an infrared continuous wave laser to grow a Si-Ge alloy layer on the substrate surface. Subsequently, PH3 gas is introduced, and the substrate is activated with a pulsed laser to form P. + -PN graded doping structure, SiO2 passivation layer is coated on the surface by dry oxygen oxidation, and then naturally cooled to room temperature to obtain PN junction substrate; S3. A KH570-MMA modified liquid was spin-coated onto the surface of a PN junction substrate to prepare a KH570-MMA modified SiO2 passivation layer. The layer was then transferred to an oven and heated under a nitrogen atmosphere to crosslink KH570-MMA into a PMMA film. After washing and drying, a low-leakage TVS chip was obtained.

[0006] As a further improvement, in step S1, the substrate pretreatment method is as follows: using an ultraviolet nanosecond laser with a wavelength of 355~400nm and a power density of 6~8W / cm². 2 Scan the substrate surface 2 to 4 times with a scanning speed of 50 to 70 mm / s.

[0007] As a further improvement, in step S2, the volume ratio of GeH4 to SiH4 in the GeH4 and SiH4 mixed gas is 5~7:1; the wavelength of the infrared continuous wave laser is 1064nm, and the laser power is linearly gradual from 20~30W at the center of the substrate to 5~10W at the edge; the concentration of the PH3 gas is 100~110ppm; the pulse width of the pulsed laser is 10~15ns, and the frequency is 1~2kHz; the thickness of the SiO2 passivation layer is 200~300nm.

[0008] As a further improvement, in step S3, the KH570-MMA modified liquid comprises the following components by weight: 5-8 parts KH570, 3-6 parts MMA, 85-95 parts anhydrous ethanol, 7-9 parts deionized water, and 0.1-0.3 parts AIBN.

[0009] As a further improvement, the preparation method of the KH570-MMA modified solution is as follows: KH570 is slowly poured into anhydrous ethanol, stirred and dispersed evenly at 300-400 rpm, then MMA is added, followed by deionized water dropwise. After adjusting the pH to 3-4 with glacial acetic acid, AIBN is added under ice bath conditions at 0-5℃ and in the dark. After reacting for 30-40 minutes, the KH570-MMA modified solution is obtained.

[0010] As a further improvement, in step S3, the spin coating method of the KH570-MMA modified liquid is as follows: first, fix the PN junction substrate on the spin coater, add the KH570-MMA modified liquid, spin coat at 500~600 rpm for 5~8s, and then spin coat at 3000~5000 rpm for 30~50s, so that the KH570-MMA modified liquid uniformly covers the surface of the SiO2 passivation layer until there are no liquid film defects.

[0011] As a further improvement, in step S3, the heating process of the oven is as follows: first, the temperature is raised to 80~90℃ for 30 minutes to form Si-O-Si covalent bonds between KH570 and SiO2, and initially fixed; then, the temperature is raised to 120~130℃ for 60 minutes to copolymerize KH570 with MMA to form a PMMA crosslinked film.

[0012] As a further improvement, step S4 is also included: isolating and encapsulating the low-leakage TVS chip; the isolation and encapsulation method is as follows: using laser etching to create shallow trenches with a depth of 2μm and a width of 1μm, filling them with modified nano-silica sol, and curing at 150℃ for 2h; magnetically sputtering to deposit Ti (50nm) / Ni (100nm) / Cu (2μm) multilayer electrodes, and laser annealing at 350℃ for 1min; attaching them to a ceramic substrate, bonding with alloy wires, and then evacuating to a vacuum of 5×10. -5 Pa, filled with high-purity N2 and sealed.

[0013] As a further improvement, the preparation method of the modified nano-silica sol is as follows: by weight, take 100-120 parts of nano-silica sol, 10-15 parts of KH570, 6-8 parts of MMA, 60-80 parts of anhydrous ethanol, 14-18 parts of deionized water, and 0.2-0.4 parts of AIBN; add the nano-silica sol to anhydrous ethanol, adjust the pH to 3-4, slowly add KH570, stir and mix for 15 minutes, then add deionized water dropwise. After the addition is complete, add MMA, and then slowly add AIBN dissolved in anhydrous ethanol under ice bath and light protection conditions at 0-5℃. After stirring and mixing evenly, heat to 50-60℃ and stir to react. After the reaction is completed, age at room temperature to obtain the modified nano-silica sol.

[0014] The present invention also provides a low leakage current TVS chip.

[0015] Due to the adoption of the above technical solution, the beneficial effects of the present invention are as follows: 1. After the trimethoxysilyl group at the end of the KH570 molecule hydrolyzes to generate silanol groups (-Si-OH), it can undergo a dehydration condensation reaction with the active silanol groups on the surface of the PN junction substrate. Through stable Si-O-Si covalent bonds, chemical grafting is achieved, thereby replacing the hydrophilic silanol groups (-Si-OH) on the substrate surface with methacryloyloxy groups, significantly reducing the surface energy. At the same time, the acryloyloxy double bond of KH570 and the MMA double bond undergo free radical copolymerization under the action of an initiator to form a three-dimensional cross-linked dense polymer layer. This cross-linked layer can physically block water vapor in humid environments from penetrating and adsorbing onto the substrate surface, eliminating water vapor-induced surface conductive channels from the root, and significantly improving the leakage current suppression stability of the TVS chip in high humidity environments.

[0016] 2. When KH570 molecules are chemically anchored to the substrate surface through Si-O-Si covalent bonds, their molecular chains can embed and fill the micropores and lattice defects on the SiO2 surface, directly reducing leakage channels for carrier transport. Furthermore, the dense coating layer formed by the cross-linking polymerization of KH570 and MMA can effectively passivate dangling bonds and defect sites on the substrate surface, reduce the interface state density at the semiconductor-dielectric layer interface, and suppress leakage caused by the capture-emission effect of interface states on carriers. Through the dual effects of surface defect repair and interface state passivation, the leakage suppression effect of TVS chips is improved. Detailed Implementation

[0017] The technical solution of the present invention will be clearly and completely described below with reference to specific embodiments. However, those skilled in the art will understand that the embodiments described below are some embodiments of the present invention, but not all embodiments, and are only used to illustrate the present invention, and should not be regarded as limiting the scope of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Where specific conditions are not specified in the embodiments, conventional conditions or manufacturer's conditions shall be followed. Where the manufacturers of reagents or instruments are not specified, they are all conventional products that can be purchased commercially.

[0018] Example 1: A low-leakage TVS chip and its fabrication method, comprising the following steps: 1. Select resistivity Crystal orientation <100> P-type single-crystal silicon wafers were cut into 50mm × 50mm substrates; a 355nm ultraviolet nanosecond laser was used with a power density of 6W / cm². 2 The substrate surface was scanned twice at a scanning speed of 50 mm / s to remove the natural oxide layer and metal impurities on the surface, and to activate the silanol groups (-Si-OH) on the silicon surface, providing active sites for subsequent binding with γ-methacryloyloxypropyltrimethoxysilane (KH570).

[0019] 2. Place the pretreated substrate into the vacuum chamber and evacuate to 5×10⁻⁶. -6 Pa was heated to 450℃; a mixture of GeH4 and SiH4 gas was introduced at a volume ratio of 5:1, and the mixture was vertically irradiated with a 1064nm infrared continuous wave laser, with the laser power linearly decreasing from 20W at the center to 5W at the edge, to grow a Si-Ge alloy layer on the substrate surface; subsequently, a 100ppm PH3 gas was introduced, and the mixture was activated with a pulsed laser with a pulse width of 10ns and a frequency of 1kHz to form P + -PN graded-doped structure; placed in a vertical dry oxygen oxidation furnace and evacuated to 1×10⁻⁶. -5 Pa; high-purity dry oxygen was introduced, the oxidation temperature was controlled at 900℃, the oxidation time was 40min, and after natural cooling to room temperature, a PN junction substrate was obtained.

[0020] 3. By weight, take 5 parts KH570, 3 parts methyl methacrylate (MMA), 85 parts anhydrous ethanol, 7 parts deionized water, and 0.1 parts azobisisobutyronitrile (AIBN). Slowly pour KH570 into anhydrous ethanol, stir at 300 rpm to disperse evenly, add MMA, then add deionized water dropwise. Adjust the pH to 3 with glacial acetic acid, add AIBN under 0°C ice bath and light protection, and react for 30 min to obtain KH570-MMA modified solution.

[0021] 4. Fix the PN junction substrate on a spin coater, add KH570-MMA modification solution, spin coat at 500 rpm for 5 seconds, then spin coat at 3000 rpm for 30 seconds to ensure the KH570-MMA modification solution evenly covers the SiO2 surface until there are no liquid film defects; then transfer to an oven, under a nitrogen atmosphere, first heat to 80℃ for 30 minutes to form Si-O-Si covalent bonds between KH570 and SiO2 for initial fixation; then heat to 120℃ for 60 minutes to copolymerize KH570 and MMA double bonds to form a PMMA crosslinked film, covering hydrophilic groups and filling micropores; finally rinse the silicon wafer surface with anhydrous ethanol for 10 seconds to remove unreacted free monomers and avoid introducing impurities and leakage; after drying with nitrogen, a low leakage TVS chip is obtained.

[0022] 5. By weight, take 100 parts of nano-silica sol, 10 parts of KH570, 6 parts of MMA, 60 parts of anhydrous ethanol, 14 parts of deionized water, and 0.2 parts of AIBN. Add the nano-silica sol to a three-necked flask, add anhydrous ethanol, stir at 200 rpm for 10 min, add glacial acetic acid dropwise to adjust the pH to 3, continue stirring for 5 min, then slowly add KH570, stir for 15 min, then add deionized water dropwise, continue stirring for 30 min after the addition is complete, then add MMA, stir and mix for 10 min; under 0℃ and light-protected conditions, take an additional small amount of anhydrous ethanol to dissolve AIBN, slowly add it dropwise to the flask, continue stirring for 20 min, raise the temperature to 50℃, stir at 150 rpm for 60 min, after the reaction is complete, transfer to room temperature and age under light-protected conditions for 24 h to obtain modified nano-silica sol.

[0023] 6. A shallow trench (2 μm deep, 1 μm wide) was laser-etched, filled with modified nano-silica sol, and cured at 150℃ for 2 hours. A Ti (50 nm) / Ni (100 nm) / Cu (2 μm) multilayer electrode was deposited by magnetron sputtering and laser-annealed at 350℃ for 1 minute. The chip was then bonded to a ceramic substrate, bonded with alloy wires, and evacuated to a vacuum of 5 × 10⁻⁶. -5 Pa, filled with high-purity N2 and sealed.

[0024] Example 2: A low-leakage TVS chip and its fabrication method, comprising the following steps: 1. Select resistivity Crystal orientation <100> P-type single-crystal silicon wafers were cut into 50mm × 50mm substrates; a 375nm ultraviolet nanosecond laser was used with a power density of 7W / cm². 2 The substrate surface was scanned three times at a scanning speed of 60 mm / s.

[0025] 2. Place the pretreated substrate into the vacuum chamber and evacuate to 5×10⁻⁶. -6 Pa was heated to 500℃; a mixture of GeH4 and SiH4 gas was introduced at a volume ratio of 6:1, and the mixture was vertically irradiated with a 1064nm infrared continuous wave laser, with the laser power linearly decreasing from 25W at the center to 8W at the edge, to grow a Si-Ge alloy layer on the substrate surface; subsequently, a 105ppm PH3 gas was introduced, and the mixture was activated with a pulsed laser with a pulse width of 13ns and a frequency of 2kHz to form P + -PN graded-doped structure; placed in a vertical dry oxygen oxidation furnace and evacuated to 1×10⁻⁶. -5 Pa; high-purity dry oxygen was introduced, the oxidation temperature was controlled at 900℃, the oxidation time was 50min, and after natural cooling to room temperature, a PN junction substrate was obtained.

[0026] 3. By weight, take 7 parts KH570, 5 parts MMA, 90 parts anhydrous ethanol, 8 parts deionized water, and 0.2 parts AIBN. Slowly pour KH570 into anhydrous ethanol, stir at 300 rpm to disperse evenly, add MMA, then add deionized water dropwise, adjust the pH to 4 with glacial acetic acid, add AIBN under 3°C ice bath and light protection, and react for 35 min to obtain KH570-MMA modified solution.

[0027] 4. Fix the PN junction substrate on a spin coater, add KH570-MMA modification solution, spin coat at 600 rpm for 7 seconds, then spin coat at 3500 rpm for 40 seconds to ensure the KH570-MMA modification solution evenly covers the SiO2 surface until there are no liquid film defects; then transfer to an oven, under a nitrogen atmosphere, first heat to 85℃ for 30 minutes to form Si-O-Si covalent bonds between KH570 and SiO2 for initial fixation; then heat to 125℃ for 60 minutes to copolymerize KH570 and MMA double bonds to form a PMMA crosslinked film, covering hydrophilic groups and filling micropores; finally rinse the silicon wafer surface with anhydrous ethanol for 15 seconds to remove unreacted free monomers and avoid introducing impurities and leakage; after drying with nitrogen, a low leakage TVS chip is obtained.

[0028] 5. By weight, take 110 parts of nano-silica sol, 13 parts of KH570, 7 parts of MMA, 70 parts of anhydrous ethanol, 16 parts of deionized water, and 0.3 parts of AIBN. Add the nano-silica sol to a three-necked flask, add anhydrous ethanol, stir at 200 rpm for 10 min, add glacial acetic acid dropwise to adjust the pH to 4, continue stirring for 5 min, then slowly add KH570, stir for 15 min, then add deionized water dropwise, continue stirring for 30 min after the addition is complete, then add MMA, stir and mix for 10 min; at 3℃ and in the dark, take an additional small amount of anhydrous ethanol to dissolve AIBN, slowly add it dropwise to the flask, continue stirring for 20 min, raise the temperature to 50℃, stir at 150 rpm for 60 min, after the reaction is complete, transfer to room temperature and in the dark for 24 h to obtain modified nano-silica sol.

[0029] 6. A shallow trench (2 μm deep, 1 μm wide) was laser-etched, filled with modified nano-silica sol, and cured at 150℃ for 2 hours. A Ti (50 nm) / Ni (100 nm) / Cu (2 μm) multilayer electrode was deposited by magnetron sputtering and laser-annealed at 350℃ for 1 minute. The chip was then bonded to a ceramic substrate, bonded with alloy wires, and evacuated to a vacuum of 5 × 10⁻⁶. -5 Pa, filled with high-purity N2 and sealed.

[0030] Example 3: A low-leakage TVS chip and its fabrication method, comprising the following steps: 1. Select resistivity Crystal orientation <100> P-type single-crystal silicon wafers were cut into 50mm × 50mm substrates; a 400nm wavelength ultraviolet nanosecond laser was used with a power density of 8W / cm². 2 The substrate surface was scanned four times at a scanning speed of 70 mm / s.

[0031] 2. Place the pretreated substrate into the vacuum chamber and evacuate to 5×10⁻⁶. -6 Pa was heated to 550℃; a mixture of GeH4 and SiH4 gas was introduced at a volume ratio of 7:1, and the mixture was vertically irradiated with a 1064nm infrared continuous wave laser, with the laser power linearly decreasing from 30W at the center to 10W at the edge, to grow a Si-Ge alloy layer on the substrate surface; subsequently, a 110ppm PH3 gas was introduced, and the mixture was activated with a pulsed laser with a pulse width of 15ns and a frequency of 2kHz to form P + -PN graded-doped structure; placed in a vertical dry oxygen oxidation furnace and evacuated to 1×10⁻⁶. -5 Pa; high-purity dry oxygen was introduced, the oxidation temperature was controlled at 900℃, the oxidation time was 60min, and after natural cooling to room temperature, a PN junction substrate was obtained.

[0032] 3. By weight, take 8 parts KH570, 6 parts MMA, 95 parts anhydrous ethanol, 9 parts deionized water, and 0.3 parts AIBN. Slowly pour KH570 into anhydrous ethanol, stir at 400 rpm to disperse evenly, add MMA, then add deionized water dropwise, adjust the pH to 4 with glacial acetic acid, add AIBN under 5°C ice bath and light protection, and react for 40 min to obtain KH570-MMA modified solution.

[0033] 4. Fix the PN junction substrate on a spin coater, add KH570-MMA modification solution, spin coat at 600 rpm for 8 seconds, then spin coat at 4000 rpm for 50 seconds to ensure the KH570-MMA modification solution evenly covers the SiO2 surface until there are no liquid film defects; then transfer to an oven, under a nitrogen atmosphere, first heat to 90℃ for 30 minutes to form Si-O-Si covalent bonds between KH570 and SiO2 for initial fixation; then heat to 130℃ for 60 minutes to copolymerize KH570 and MMA double bonds to form a PMMA crosslinked film, covering hydrophilic groups and filling micropores; finally rinse the silicon wafer surface with anhydrous ethanol for 20 seconds to remove unreacted free monomers and avoid introducing impurities and leakage; after drying with nitrogen, a low leakage TVS chip is obtained.

[0034] 5. By weight, take 120 parts of nano-silica sol, 15 parts of KH570, 8 parts of MMA, 80 parts of anhydrous ethanol, 18 parts of deionized water, and 0.4 parts of AIBN. Add the nano-silica sol to a three-necked flask, add anhydrous ethanol, stir at 200 rpm for 10 min, add glacial acetic acid dropwise to adjust the pH to 4, continue stirring for 5 min, then slowly add KH570, stir for 15 min, then add deionized water dropwise, continue stirring for 30 min after the addition is complete, then add MMA, stir and mix for 10 min; at 5℃ and in the dark, take an additional small amount of anhydrous ethanol to dissolve AIBN, slowly add it dropwise to the flask, continue stirring for 20 min, raise the temperature to 50℃, stir at 150 rpm for 60 min, after the reaction is complete, transfer to room temperature and in the dark for 24 h to obtain modified nano-silica sol.

[0035] 6. A shallow trench (2 μm deep, 1 μm wide) was laser-etched, filled with modified nano-silica sol, and cured at 150℃ for 2 hours. A Ti (50 nm) / Ni (100 nm) / Cu (2 μm) multilayer electrode was deposited by magnetron sputtering and laser-annealed at 350℃ for 1 minute. The chip was then bonded to a ceramic substrate, bonded with alloy wires, and evacuated to a vacuum of 5 × 10⁻⁶. -5 Pa, filled with high-purity N2 and sealed.

[0036] Comparative Example 1: A method for fabricating a low-leakage TVS chip, differing from Example 1 in that a single KH570 is used to modify the SiO2 passivation layer, specifically including the following steps: 1. Select resistivity Crystal orientation <100> P-type single-crystal silicon wafers were cut into 50mm × 50mm substrates; a 355nm ultraviolet nanosecond laser was used with a power density of 6W / cm². 2 The substrate surface was scanned twice at a scanning speed of 50 mm / s.

[0037] 2. Place the pretreated substrate into the vacuum chamber and evacuate to 5×10⁻⁶. -6 Pa was heated to 450℃; a mixture of GeH4 and SiH4 gas was introduced at a volume ratio of 5:1, and the mixture was vertically irradiated with a 1064nm infrared continuous wave laser, with the laser power linearly decreasing from 20W at the center to 5W at the edge, to grow a Si-Ge alloy layer on the substrate surface; subsequently, a 100ppm PH3 gas was introduced, and the mixture was activated with a pulsed laser with a pulse width of 10ns and a frequency of 1kHz to form P + -PN graded-doped structure; placed in a vertical dry oxygen oxidation furnace and evacuated to 1×10⁻⁶. -5 Pa; high-purity dry oxygen was introduced, the oxidation temperature was controlled at 900℃, the oxidation time was 40min, and after natural cooling to room temperature, a PN junction substrate was obtained.

[0038] 3. By weight, take 5 parts KH570, 85 parts anhydrous ethanol, 7 parts deionized water, and 0.1 parts AIBN. Slowly pour KH570 into the anhydrous ethanol, stir and disperse evenly at 300 rpm, then add deionized water dropwise. Adjust the pH to 3 with glacial acetic acid, then add AIBN under 0°C ice bath and light-proof conditions. Stir and mix for 30 minutes to obtain the modified solution.

[0039] 4. Fix the PN junction substrate on a spin coater, add the modification solution, spin coat at 500 rpm for 5 seconds, then spin coat at 3000 rpm for 30 seconds to ensure the modification solution evenly covers the SiO2 surface until there are no liquid film defects; then transfer to an oven, under a nitrogen atmosphere, first heat to 80℃ for 30 minutes to form Si-O-Si covalent bonds between KH570 and SiO2 for initial fixation; then heat to 120℃ for 60 minutes to form a KH570 film, covering hydrophilic groups and filling micropores; finally rinse the silicon wafer surface with anhydrous ethanol for 10 seconds to remove unreacted free monomers and avoid introducing impurities and leakage; after drying with nitrogen, a low-leakage TVS chip is obtained.

[0040] 5. By weight, take 100 parts of nano-silica sol, 10 parts of KH570, 6 parts of MMA, 60 parts of anhydrous ethanol, 14 parts of deionized water, and 0.2 parts of AIBN. Add the nano-silica sol to a three-necked flask, add anhydrous ethanol, stir at 200 rpm for 10 min, add glacial acetic acid dropwise to adjust the pH to 3, continue stirring for 5 min, then slowly add KH570, stir for 15 min, then add deionized water dropwise, continue stirring for 30 min after the addition is complete, then add MMA, stir and mix for 10 min; under 0℃ and light-protected conditions, take an additional small amount of anhydrous ethanol to dissolve AIBN, slowly add it dropwise to the flask, continue stirring for 20 min, raise the temperature to 50℃, stir at 150 rpm for 60 min, after the reaction is complete, transfer to room temperature and age under light-protected conditions for 24 h to obtain modified nano-silica sol.

[0041] 6. A shallow trench (2 μm deep, 1 μm wide) was laser-etched, filled with modified nano-silica sol, and cured at 150℃ for 2 hours. A Ti (50 nm) / Ni (100 nm) / Cu (2 μm) multilayer electrode was deposited by magnetron sputtering and laser-annealed at 350℃ for 1 minute. The chip was then bonded to a ceramic substrate, bonded with alloy wires, and evacuated to a vacuum of 5 × 10⁻⁶. -5 Pa, filled with high-purity N2 and sealed.

[0042] Comparative Example 2: A method for fabricating a low-leakage TVS chip, differing from Example 1 in that unmodified nano-silica sol is used for filling, specifically including the following steps: 1. Select resistivity Crystal orientation <100> P-type single-crystal silicon wafers were cut into 50mm × 50mm substrates; a 355nm ultraviolet nanosecond laser was used with a power density of 6W / cm². 2 The substrate surface was scanned twice at a scanning speed of 50 mm / s.

[0043] 2. Place the pretreated substrate into the vacuum chamber and evacuate to 5×10⁻⁶. -6 Pa was heated to 450℃; a mixture of GeH4 and SiH4 gas was introduced at a volume ratio of 5:1, and the mixture was vertically irradiated with a 1064nm infrared continuous wave laser, with the laser power linearly decreasing from 20W at the center to 5W at the edge, to grow a Si-Ge alloy layer on the substrate surface; subsequently, a 100ppm PH3 gas was introduced, and the mixture was activated with a pulsed laser with a pulse width of 10ns and a frequency of 1kHz to form P + -PN graded-doped structure; placed in a vertical dry oxygen oxidation furnace and evacuated to 1×10⁻⁶. -5 Pa; high-purity dry oxygen was introduced, the oxidation temperature was controlled at 900℃, the oxidation time was 40min, and after natural cooling to room temperature, a PN junction substrate was obtained.

[0044] 3. By weight, take 5 parts KH570, 3 parts MMA, 85 parts anhydrous ethanol, 7 parts deionized water, and 0.1 parts AIBN. Slowly pour KH570 into anhydrous ethanol, stir at 300 rpm to disperse evenly, add MMA, then add deionized water dropwise, adjust the pH to 3 with glacial acetic acid, add AIBN under 0℃ ice bath and light protection, and react for 30 min to obtain KH570-MMA modified solution.

[0045] 4. Fix the PN junction substrate on a spin coater, add KH570-MMA modification solution, spin coat at 500 rpm for 5 seconds, then spin coat at 3000 rpm for 30 seconds to ensure the KH570-MMA modification solution evenly covers the SiO2 surface until there are no liquid film defects; then transfer to an oven, under a nitrogen atmosphere, first heat to 80℃ for 30 minutes to form Si-O-Si covalent bonds between KH570 and SiO2 for initial fixation; then heat to 120℃ for 60 minutes to copolymerize KH570 and MMA double bonds to form a PMMA crosslinked film, covering hydrophilic groups and filling micropores; finally rinse the silicon wafer surface with anhydrous ethanol for 10 seconds to remove unreacted free monomers and avoid introducing impurities and leakage; after drying with nitrogen, a low leakage TVS chip is obtained.

[0046] 5. A shallow trench with a depth of 2 μm and a width of 1 μm was laser-etched, filled with nano-silica sol, and cured at 150℃ for 2 h; a Ti (50 nm) / Ni (100 nm) / Cu (2 μm) multilayer electrode was deposited by magnetron sputtering and laser annealed at 350℃ for 1 min; the chip was then attached to a ceramic substrate, bonded with alloy wire, and vacuumed to 5 × 10⁻⁶ m² / h. -5 Pa, filled with high-purity N2 and sealed.

[0047] I. Hydrophobicity Test The low-leakage TVS chips obtained in Examples 1-3 and Comparative Examples 1-2 were ultrasonically cleaned with anhydrous ethanol for 5 minutes and dried with nitrogen gas to ensure that there were no residual impurities on the chip surface. The water contact angle of the chip was tested using a contact angle meter, and the test results are shown in Table 1. Table 1 Hydrophobicity test results of TVS chips

[0048] As shown in Table 1, the hydrophobicity of Examples 1-3 is stronger than that of Comparative Examples 1-2. In Comparative Example 1, the modified solution removed MMA, retaining only KH570. The double bond copolymerization of KH570 and MMA can form a dense cross-linked film, which can not only cover the hydrophilic groups on the substrate surface but also effectively fill the surface micropores, blocking leakage paths. The single KH570 film, lacking a cross-linked structure, cannot effectively cover the hydrophilic groups on the substrate surface, resulting in a decrease in the hydrophobicity of the TVS chip. Comparative Example 2 did not use modified nano-silica sol for filling; the nano-silica sol surface contains hydrophilic silanol groups, leading to a decrease in the hydrophobicity of the TVS chip.

[0049] II. Interface State Density The TVS chips obtained in Examples 1-3 and Comparative Examples 1-2 were cut into 5mm × 5mm pieces, cleaned and dried. Circular Al electrodes with a diameter of 0.5mm and a thickness of 100nm were deposited on the sample surface using a vacuum evaporation apparatus. A large-area Al electrode with a thickness of 200nm was deposited on the back of the sample. Five parallel samples were prepared for each group. An LCR meter was used with a frequency of 1MHz, an AC signal amplitude of 50mV, a DC bias scanning range of -5V to +5V, and a scanning step size of 0.1V. The samples were placed on a probe stage, with the probes contacting the front circular Al electrode and the back Al electrode respectively. The scan was started, and the interface state density between the TVS chip and the passivation layer was calculated. The test results are shown in Table 2. Table 2. Test results of interface state density of TVS chips

[0050] As shown in Table 2, the interface state density of the TVS chips obtained in Examples 1-3 is better than that in Comparative Examples 1-2. Comparative Example 1 uses a single KH570 to modify the substrate surface. Due to the lack of a dense cross-linked layer formed with MMA, the interface state density is reduced, the defect sites on the substrate surface are exposed, and the leakage current suppression effect is reduced. After the modified nano-silica sol is coated with a PMMA cross-linked layer, the insulation performance and interface adhesion are significantly improved. After filling the shallow trench, a highly efficient insulating isolation layer can be formed. In Comparative Example 2, the shallow trench is filled with unmodified nano-silica sol. The nano-silica sol is prone to agglomeration and has poor interfacial compatibility with the substrate. It cannot effectively block the leakage current path in the trench, resulting in a decrease in leakage current suppression performance.

[0051] III. Reverse leakage current Ten finished TVS chips from Examples 1-3 and Comparative Examples 1-2 were used in each group. The reverse leakage current of the TVS chips was tested under a reverse bias voltage of -5V. The test results are shown in Table 3. Table 3 Reverse leakage current test results of TVS chips

[0052] As shown in Table 3, the leakage current suppression performance of the TVS chips obtained in Examples 1-3 is better than that of Comparative Examples 1-2. Comparative Example 1 only uses KH570 to modify the SiO2 passivation layer. After KH570 hydrolysis, it forms a linear siloxane film only through intermolecular -Si-OH dehydration condensation. Without cross-linked network support, the film layer is loose and porous, and a large number of uncovered hydrophilic groups remain on the surface. These micropores and hydrophilic groups easily adsorb water vapor in a humid environment, forming surface conductive channels. As a result, under reverse bias, charge carriers leak through the channels, and the leakage current increases. Comparative Example 2 uses unmodified nano-silica sol to fill the shallow trench. The surface of the unmodified nano-silica sol is rich in silanol groups, and the particles easily agglomerate through hydrogen bonds. When filling the shallow trench, a large number of micron-sized gaps and micropores are formed between the agglomerated particles, which cannot form a dense insulating isolation layer. Under reverse bias, charge carriers can be directly transported in the trench through these gaps, forming leakage channels, which leads to an increase in reverse leakage current.

[0053] The specific embodiments of the present invention described above do not constitute a limitation on the scope of protection of the present invention. Any other corresponding changes and modifications made in accordance with the technical concept of the present invention should be included within the scope of protection of the claims of the present invention.

Claims

1. A method for fabricating a low-leakage TVS chip, characterized in that, Includes the following steps: S1. Take a P-type single crystal, cut it into a 50mm×50mm substrate, and pre-treat it to remove the natural oxide layer and metal impurities on the surface. S2. The pretreated substrate is placed under vacuum and heated to 450~550℃. A mixture of GeH4 and SiH4 gas is introduced, and the substrate is vertically irradiated with an infrared continuous wave laser to grow a Si-Ge alloy layer on the substrate surface. Subsequently, PH3 gas is introduced, and the substrate is activated with a pulsed laser to form P. + -PN graded doping structure, SiO2 passivation layer is coated on the surface by dry oxygen oxidation, and then naturally cooled to room temperature to obtain PN junction substrate; S3. A KH570-MMA modified liquid was spin-coated onto the surface of a PN junction substrate to prepare a KH570-MMA modified SiO2 passivation layer. The layer was then transferred to an oven and heated under a nitrogen atmosphere to crosslink KH570-MMA into a PMMA film. After washing and drying, a low-leakage TVS chip was obtained.

2. The method for fabricating a low-leakage TVS chip according to claim 1, characterized in that, In step S1, the substrate pretreatment method is as follows: using an ultraviolet nanosecond laser with a wavelength of 355~400nm and a power density of 6~8W / cm². 2 Scan the substrate surface 2 to 4 times with a scanning speed of 50 to 70 mm / s.

3. The method for fabricating a low-leakage TVS chip according to claim 1, characterized in that, In step S2, the volume ratio of GeH4 to SiH4 in the GeH4 and SiH4 mixed gas is 5~7:1; the wavelength of the infrared continuous wave laser is 1064nm, and the laser power is linearly gradual from 20~30W at the center of the substrate to 5~10W at the edge; the concentration of PH3 gas is 100~110ppm; the pulse width of the pulsed laser is 10~15ns, and the frequency is 1~2kHz; the thickness of the SiO2 passivation layer is 200~300nm.

4. The method for fabricating a low-leakage TVS chip according to claim 1, characterized in that, In step S3, the KH570-MMA modified liquid comprises the following components by weight: 5-8 parts KH570, 3-6 parts MMA, 85-95 parts anhydrous ethanol, 7-9 parts deionized water, and 0.1-0.3 parts AIBN.

5. The method for fabricating a low-leakage TVS chip according to claim 4, characterized in that, The preparation method of the KH570-MMA modified solution is as follows: KH570 is slowly poured into anhydrous ethanol, stirred and dispersed evenly at 300-400 rpm, then MMA is added, followed by deionized water dropwise. After adjusting the pH to 3-4 with glacial acetic acid, AIBN is added under ice bath and light protection conditions at 0-5℃. After reacting for 30-40 min, the KH570-MMA modified solution is obtained.

6. The method for fabricating a low-leakage TVS chip according to claim 1, characterized in that, In step S3, the spin coating method of the KH570-MMA modified liquid is as follows: first, fix the PN junction substrate on the spin coater, add the KH570-MMA modified liquid, spin coat at 500~600 rpm for 5~8s, and then spin coat at 3000~5000 rpm for 30~50s, so that the KH570-MMA modified liquid is evenly covered on the surface of the SiO2 passivation layer until there are no liquid film defects.

7. The method for fabricating a low-leakage TVS chip according to claim 1, characterized in that, In step S3, the heating process of the oven is as follows: first, the temperature is raised to 80~90℃ and heated for 30 minutes to form Si-O-Si covalent bonds between KH570 and SiO2, which is initially fixed; then, the temperature is raised to 120~130℃ and reacted for 60 minutes to copolymerize KH570 with MMA to form a PMMA crosslinked film.

8. The method for fabricating a low-leakage TVS chip according to claim 1, characterized in that, The process also includes step S4: isolating and encapsulating the low-leakage TVS chip; the isolation and encapsulation method is as follows: using laser etching to create shallow trenches with a depth of 2μm and a width of 1μm, filling them with modified nano-silica sol, and curing at 150℃ for 2h; magnetically sputtering to deposit Ti (50nm) / Ni (100nm) / Cu (2μm) multilayer electrodes, and laser annealing at 350℃ for 1min; attaching them to a ceramic substrate, bonding with alloy wires, and then evacuating to a vacuum of 5×10. -5 Pa, filled with high-purity N2 and sealed.

9. The method for fabricating a low-leakage TVS chip according to claim 8, characterized in that, The modified nano-silica sol is prepared as follows: by weight, take 100-120 parts of nano-silica sol, 10-15 parts of KH570, 6-8 parts of MMA, 60-80 parts of anhydrous ethanol, 14-18 parts of deionized water, and 0.2-0.4 parts of AIBN; add the nano-silica sol to anhydrous ethanol, adjust the pH to 3-4, slowly add KH570, stir and mix for 15 minutes, then add deionized water dropwise. After the addition is complete, add MMA, and then slowly add AIBN dissolved in anhydrous ethanol under ice bath and light protection conditions at 0-5℃. After stirring and mixing evenly, heat to 50-60℃ and stir to react. After the reaction is completed, age at room temperature to obtain the modified nano-silica sol.

10. The low-leakage TVS chip prepared by the preparation method according to any one of claims 1 to 9.

Images