A two-dimensional van der waals heterojunction one-step synchronous manufacturing method and device based on controllable micro-explosion
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- GUANGXI QINZHOU HUAYUAN ELECTRONICS CO LTD
- Filing Date
- 2026-03-28
- Publication Date
- 2026-06-23
AI Technical Summary
Existing technologies cannot simultaneously achieve wafer-level large-area fabrication, atomically clean and defect-free interfaces, compatibility with multiple material systems, short cycle time and low cost, and high yield, which has become the core bottleneck for two-dimensional van der Waals heterostructures to move from the laboratory to industrial applications.
By employing layered nano-confined microcavities and multi-channel layered liquid injection technology, and using nanosecond lasers to synchronously trigger controllable micro-explosions, the synchronous in-situ formation of each layer of the heterostructure is achieved. This completely eliminates the traditional layer-by-layer growth and transfer stacking process, enabling synchronous growth of multiple materials and a clean, defect-free interface.
It achieves wafer-level large-area uniform fabrication with interface flatness Ra<0.3nm, yield ≥99%, production efficiency increased by 1000 times, energy consumption reduced by 95%, and cost reduced by 95%, fully meeting the requirements for industrial mass production of semiconductors.
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Figure CN122269765A_ABST
Abstract
Description
[0001] This invention belongs to the fields of two-dimensional heterojunction device manufacturing, atomic-level precision manufacturing, and advanced semiconductor technology. Specifically, it relates to a one-step synchronous manufacturing method for two-dimensional van der Waals heterojunctions based on controllable micro-explosion of energetic precursors, as well as a supporting manufacturing device for implementing this method. It can be directly applied to the large-scale manufacturing of two-dimensional heterojunctions in fields such as advanced logic chips, quantum devices, 6G radio frequency devices, and optoelectronic integrated chips.
[0002] Two-dimensional van der Waals heterostructures are artificial superlattice structures formed by stacking different two-dimensional materials (such as graphene, hexagonal boron nitride, transition metal chalcogenides, and black phosphorus) through van der Waals forces. They can achieve precise design of electronic structure and optoelectronic properties through material combination and layer thickness control, breaking through the performance limits of single materials. They are the core basic structure of advanced chips and quantum devices in the post-Moore era and have irreplaceable strategic value in the global semiconductor field.
[0003] Currently, the mainstream manufacturing technology for two-dimensional van der Waals heterostructures worldwide faces insurmountable industry pain points, specifically as follows:
[0004] Layer-by-layer transfer stacking: The mainstream method for fabricating laboratory-scale heterojunctions globally. This method involves first preparing two-dimensional material films of various layers through mechanical exfoliation / CVD growth, and then stacking them layer by layer using wet / dry transfer processes to form a heterojunction. This method suffers from three major drawbacks: First, the transfer process easily introduces interface impurities, bubbles, and lattice damage, resulting in severe interface defects and device performance far below theoretical limits. Second, it can only achieve manual, serial fabrication of micron-sized heterojunctions, with a production capacity significantly lower than the demands of wafer-level mass production. The cost is more than twice that of other products, making industrial application impossible; thirdly, the preparation cycle is as long as tens of hours, the process is extremely complex, the yield is extremely low, and the cost is huge.
[0005] Layer-by-layer CVD growth: The only mass production candidate process for wafer-level heterojunctions, this method involves layer-by-layer CVD growth of different two-dimensional materials on a substrate to form a heterojunction. However, this method has several key drawbacks: First, the high-temperature growth process of the upper layer can damage and dope the lower layer, impairing its properties. Second, the growth processes for different materials are incompatible, making it impossible to achieve high-quality growth of multi-material heterojunctions. Third, the fabrication cycle is extremely long, lasting tens of hours, with very high energy consumption, and the overall cost is more than 10 times that of silicon-based chips, making it completely unsuitable for large-scale mass production.
[0006] Other existing technologies, such as molecular beam epitaxy, can only prepare small-sized heterojunctions with few layers. The equipment cost is as high as hundreds of millions of yuan, and the growth cycle is as long as several days, making it impossible to industrialize. Liquid phase self-assembly can only prepare powder heterojunctions and cannot realize wafer-level thin film device applications.
[0007] In summary, existing technologies have consistently failed to simultaneously achieve the five core objectives of wafer-level large-area fabrication, atomically clean and defect-free interfaces, compatibility with multiple material systems, short cycle time and low cost, and high yield. This has become the core bottleneck restricting the global application of two-dimensional van der Waals heterostructures from the laboratory to industrial applications. Currently, there is no publicly available technical solution worldwide that can resolve all of these pain points.
[0008] The purpose of this invention is to overcome the aforementioned defects of the prior art and provide a one-step synchronous manufacturing method and apparatus for two-dimensional van der Waals heterojunctions based on controllable micro-explosion. This completely overturns the traditional technical logic of "layer-by-layer growth + transfer stacking". By adopting layered nano-confined microcavities and multi-channel layered liquid injection technology, corresponding material-energy integrated precursors are prepared for each layer of the heterojunction. Controllable micro-explosion is synchronously triggered by nanosecond lasers, achieving in-situ forming of two-dimensional van der Waals heterojunctions with no interlayer defects and clean interfaces in one step. At the same time, it is 100% compatible with existing 8 / 12-inch semiconductor wafer production lines, completely solving the industry pain points of existing technologies such as many interface defects, long preparation cycles, and inability to achieve wafer-level mass production.
[0009] The core inventive concept of this invention is as follows: a layered nano-confined microcavity structure is adopted, and a corresponding material-energy integrated energetic precursor is designed for each layer of two-dimensional material in the heterojunction. The precursors of all layers are precisely filled into the corresponding chambers of the microcavity in layers. Nanosecond lasers are used to synchronously trigger nanosecond-level controllable micro-explosions in the precursors of all layers. Within the same time window, each layer completes the directional self-assembly of the two-dimensional material synchronously, forming a two-dimensional van der Waals heterojunction with clean, defect-free, and impurity-free interlayer interfaces in one step. This achieves "multi-material synchronous growth - one-step heterojunction forming", completely abandoning the complex process of traditional layer-by-layer preparation.
[0010] Compared with the prior art, the present invention has the following disruptive and beneficial technical effects: 1. One-step synchronous molding, completely solving the core pain point of interface defects: This invention realizes the synchronous in-situ growth of two-dimensional materials in each layer of heterojunction without the need for subsequent transfer and stacking processes. The interlayer interface is atomically clean, free of impurities, bubbles, and lattice damage. The interface flatness Ra<0.3nm and the interface cleanliness ≥99.9% completely solves the industry problem of interface defects introduced by the transfer process in existing technologies, and the device performance can approach the theoretical limit.
[0011] 2. Achieving a breakthrough in production efficiency, completely overturning the industry's production cycle: Compared with the traditional layer-by-layer preparation method with a preparation cycle of tens of hours, the production efficiency of this invention is increased by more than 1,000 times, compressing the preparation cycle of a single 8-inch wafer heterojunction to less than 15 minutes, perfectly matching the mass production rhythm of semiconductor wafer production lines, and completely solving the core pain point of extremely low production efficiency in existing technologies.
[0012] 3. Wafer-level large-area uniform fabrication with significantly improved yield: This invention can achieve uniform fabrication of 8 / 12-inch wafer-level two-dimensional van der Waals heterojunctions, with layer thickness uniformity ≤ ±0.5% and yield ≥ 99%, far exceeding the yield of < 10% for manual fabrication in existing technologies, and fully meeting the requirements for mass production in the semiconductor industry.
[0013] 4. Full material system compatibility, maximum design freedom: This invention is compatible with all two-dimensional material systems such as graphene, hexagonal boron nitride, transition metal chalcogenides, and black phosphorus. It allows for the free design of 2-5 layer heterojunction structures without considering the compatibility issues of different material growth processes, completely breaking the material system limitations of existing technologies and providing unlimited possibilities for heterojunction device design.
[0014] 5. Collapsed energy consumption and manufacturing costs: This invention does not require multi-step high-temperature long-term growth, nor does it require complex transfer equipment and processes. The overall energy consumption is only less than 1% of that of the traditional layer-by-layer CVD method, and the overall manufacturing cost can be reduced by more than 95%, completely breaking the cost barrier of the two-dimensional van der Waals heterostructure industry.
[0015] 6. 100% compatible with existing semiconductor production lines, enabling rapid mass production: All core process modules of this invention adopt mature mass production technologies in the existing semiconductor industry. There is no need to build new dedicated production lines. Modular upgrades can be carried out directly on existing 8 / 12-inch wafer production lines, and industrialization can be achieved within 3-5 years without any technological generation gap barriers.
[0016] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below in conjunction with preferred embodiments. All other embodiments obtained by those skilled in the art based on the core concept of this invention without creative effort are within the scope of protection of this invention.
[0017] Unless otherwise specified, the raw materials and equipment used in the specific embodiments of this invention are all commercially available conventional products; the process methods used are all conventional technical methods in the field unless otherwise specified.
[0018] The core equipment used in this embodiment of the invention includes: a 248nm / 193nm nanosecond pulsed excimer laser and a high-vacuum reaction chamber (ultimate vacuum). It is equipped with a turbomolecular pump group, an inductively coupled plasma (ICP) etching machine, a PECVD thin film deposition system, a high-precision multi-channel layered liquid injection system, and a 308nm excimer laser annealing module; the core detection methods include: Raman spectroscopy to test the structure of each layer of material, atomic force microscopy (AFM) to test the interface flatness, transmission electron microscopy (TEM) to observe the interlayer interface structure, Hall effect testing system to test carrier mobility, and X-ray photoelectron spectroscopy (XPS) to test the elemental distribution of the interface.
[0019] Example 1: One-step fabrication of graphene / hexagonal boron nitride (Gr / h-BN) van der Waals heterojunction (for RF devices)
[0020] This embodiment is used to fabricate an 8-inch graphene / hexagonal boron nitride van der Waals heterojunction for 6G radio frequency devices and high-frequency transistors. The specific steps are as follows: 1. Substrate pretreatment and layered confinement template preparation: An 8-inch 4H-SiC silicon carbide wafer substrate was selected. After polishing and cleaning, an array of double-layer nano-confined microcavities was prepared on the substrate surface using photolithography and multilayer ICP dry etching. The lower cavity was a hexagonal boron nitride growth cavity with a depth of 500 nm, and the upper cavity was a graphene growth cavity with a depth of 500 nm. The planar size of a single cavity was 5 μm × 5 μm, and the fill factor of the microcavity array was 95%. The inner wall of each cavity was modified with the corresponding material to serve as the directional growth template for each layer of the heterojunction. 2. Layered precursor preparation and precise filling: For the lower hexagonal boron nitride layer, a boron-nitrogen integrated precursor with a cubic boron-nitrogen complex as its core was prepared; for the upper graphene layer, a carbon-energy integrated precursor with a cubic alkylene derivative as its core was prepared; under a vacuum degree of... In a high vacuum environment, a high-precision multi-channel layered liquid injection system is used to accurately fill the lower chamber with hexagonal boron nitride precursor and the upper chamber with graphene precursor. The filling error of a single chamber is ≤0.1%. After filling, a 100nm thick SiO2 film is deposited using PECVD process to seal the microcavity opening. 3. Pre-field control and pre-temperature control: Place the filled substrate on the high-precision heating stage of the vacuum reaction chamber, and evacuate the vacuum reaction chamber to... The substrate was heated to 700°C and held at that temperature under extreme vacuum, while parallel plate electrodes were applied to the upper and lower sides of the substrate. A uniform electric field perpendicular to the substrate surface; 4. Synchronous and controllable micro-explosion and one-step heterojunction formation: A 248nm nanosecond pulsed excimer laser is used to expose the entire substrate, with a laser energy density of... The pulse width is 20ns, and the energy uniformity of the entire wafer is ≤0.3%. The laser synchronously triggers nanosecond-level controllable micro-explosions in the precursors of the upper and lower layers in the microcavity. The lower precursor decomposes to generate highly active boron and nitrogen atoms, and the upper precursor decomposes to generate highly active carbon atoms, simultaneously releasing the instantaneous high temperature and high pressure matching the growth of the corresponding materials. Under the synergistic constraints of the modified templates of each layer, the uniform electric field and the laser polarization, the atoms of each layer complete the directional self-assembly in situ in the microcavity, generating a graphene / hexagonal boron nitride van der Waals heterostructure with no interlayer defects and a clean interface in one step. 5. In-situ post-processing: After the micro-explosion reaction is completed, the substrate is annealed in milliseconds using a 308nm excimer laser with a peak annealing temperature of 1200℃ and an annealing time of 5ms to repair lattice defects and interface defects in each layer. At the same time, high-purity argon gas with a purity of 99.9999% is introduced to passivate the surface of the heterojunction at a low temperature of 200℃ for 30s. The gas generated by the reaction is extracted by a molecular pump system, and after cooling to room temperature, the substrate is removed to obtain the target 8-inch graphene / hexagonal boron nitride van der Waals heterojunction.
[0021] Performance testing results: The heterojunction prepared in this embodiment is a monolayer graphene / monolayer hexagonal boron nitride structure. TEM testing shows that the interlayer interface is atomically clean, free of impurities and defects, and the interface flatness Ra < 0.2 nm; the room temperature carrier mobility of graphene reaches... It is close to the theoretical limit and has extremely low interface scattering; the uniformity of the whole wafer layer thickness is ±0.4%, and the yield is ≥99.5%, which can be directly used for 6G RF devices and high-frequency transistor manufacturing; the total time for single wafer preparation is <12 minutes, and the comprehensive energy consumption is only 0.5% of the traditional layer-by-layer CVD method.
[0022] Example 2 Fabrication of a graphene / hexagonal boron nitride three-layer van der Waals heterostructure (for photodetectors)
[0023] This embodiment is used to fabricate an 8-inch MoS2 / graphene / hexagonal boron nitride three-layer van der Waals heterojunction for infrared photodetectors and optoelectronic devices. The specific steps are as follows: 1. Substrate pretreatment and layered confinement template preparation: An 8-inch silicon wafer substrate was selected, and an array of three-layer nano-confinement microcavities were prepared by photolithography and multilayer ICP dry etching process. From bottom to top, the microcavities consisted of a hexagonal boron nitride cavity, a graphene cavity, and a MoS2 cavity. The depth of each cavity layer was 300 nm, and the planar size was 2 μm × 2 μm. The inner wall of each cavity layer was modified with the corresponding material. 2. Layered precursor preparation and precise filling: Corresponding material-energy integrated precursors were prepared for the three-layer structure. In a high vacuum environment, a multi-channel layered liquid injection system is used to accurately fill the corresponding chambers in a bottom-up order. After filling, a SiO2 thin film is deposited and sealed using PECVD process. 3. Pretreatment: Heat the substrate to 650℃ and apply... A vertical uniform electric field, with the vacuum level maintained at ; 4. Synchronous micro-explosion and one-step heterojunction formation: Full-area exposure using a 248nm nanosecond pulsed excimer laser, with a laser energy density of... With a pulse width of 20ns, a controllable micro-explosion of the three-layer precursor is triggered simultaneously, and the in-situ formation of the three-layer van der Waals heterojunction is completed in one step. 5. In-situ post-processing: lattice and interface defects were repaired by 1100℃ millisecond-level laser annealing, and the substrate was passivated by argon gas at 180℃ for 30s. After cooling, the substrate was removed to obtain the target three-layer van der Waals heterostructure.
[0024] Performance test results: The three-layer heterojunction prepared in this embodiment has a clean and defect-free interface, a photoresponsivity of 1500A / W, a response speed of 10ns, and a dark current as low as 1pA. It can be directly used in high-sensitivity infrared photodetectors and optoelectronic devices.
[0025] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly described below. These drawings constitute a part of this specification and are used to further understand the present invention. They are used together with the specific embodiments of the present invention to explain the present invention and do not constitute a limitation thereof.
[0026] Figure 1 This is a schematic diagram of the overall structure of the one-step synchronous manufacturing device for two-dimensional van der Waals heterojunctions described in this invention.
[0027] Figure 2 This is a process flow diagram of the one-step synchronous manufacturing method for two-dimensional van der Waals heterojunctions described in this invention;
[0028] Figure 3 This is a schematic diagram of the cross-sectional structure of the layered nanoconfined microcavity described in this invention;
[0029] Figure 4 This is a schematic diagram illustrating the principle of the synchronously controllable micro-explosion one-step forming of a two-dimensional van der Waals heterostructure as described in this invention.
[0030] The component names marked in the attached diagram are as follows: 1-Vacuum reaction chamber system; 2-Upper electrode; 3-Lower electrode; 4-Substrate heating stage; 5-Conductive growth substrate; 6-Laser incident window; 7-Vacuum evacuation port; 8-Protective gas (argon) inlet; 9-Electrode terminals; 10-Layered array-type nano-confined microcavity; 11-Nanosecond-level controllable micro-explosion region; 12-Highly active atoms in each layer; 13-Layered directional growth template; 14-Layered precursor filling and sealing system; 15-Wafer-level laser synchronous triggering system.
Claims
1. A one-step synchronous manufacturing method for two-dimensional van der Waals heterostructures based on controllable micro-explosion, characterized in that, Includes the following steps: S1 Substrate pretreatment and layered confinement template preparation: A conductive substrate is selected as the growth substrate, and an array of layered nano-confined microcavities are prepared on the substrate surface. The microcavities are divided into multiple independent filling chambers according to the layered structure of the target heterojunction. The inner wall of each chamber is modified with a corresponding two-dimensional material as a directional growth template for each layer of the heterojunction. S2 Layered Precursor Preparation and Precise Filling: For each layer of the two-dimensional material in the heterostructure, a corresponding material-energy integrated energetic precursor is prepared; under vacuum conditions... In a high vacuum environment, a high-precision layered liquid injection system is used to accurately fill each layer of precursor into the corresponding layered chamber of the microcavity according to the heterojunction structure sequence. After filling, the opening of the microcavity is sealed. S3 Pre-field control and pre-temperature control: The filled substrate is placed in the vacuum reaction chamber and heated to the pre-temperature control range of 400-900℃. At the same time, a directional uniform electric field perpendicular to the substrate surface is applied to the upper and lower sides of the substrate. S4 Synchronous Controllable Micro-Explosion and One-Step Heterojunction Formation: Nanosecond pulsed excimer lasers are used to expose the entire wafer surface of the substrate. The laser synchronously triggers nanosecond-level controllable micro-explosions in the energetic precursors of each layer in the microcavity. The precursors of each layer are simultaneously decomposed to generate highly active atoms of the corresponding two-dimensional material and nitrogen protective gas, while releasing the instantaneous high temperature and high pressure matching the growth of the corresponding material. Under the synergistic constraints of the modified templates of each layer, the uniform electric field and the laser polarization, the atoms of each layer complete the directional self-assembly in situ within the microcavity, generating a two-dimensional van der Waals heterojunction with no interlayer defects and a clean interface in one step. S5 In-situ post-processing: After the micro-explosion reaction is completed, the substrate is subjected to millisecond-level laser annealing to repair lattice defects and interface defects in each layer. At the same time, high-purity inert gas is introduced to perform low-temperature passivation treatment on the surface of the heterojunction. The protective gas generated by the reaction is removed through a vacuum system, and finally the target two-dimensional van der Waals heterojunction structure is obtained.
2. The manufacturing method according to claim 1, characterized in that, The two-dimensional van der Waals heterostructures are graphene / hexagonal boron nitride, MoS2 / graphene, silicon carbide / graphene / hexagonal boron nitride, etc. / One or more multilayer stacked structures in graphene.
3. The manufacturing method according to claim 1, characterized in that, The material-energy integrated energetic precursor is an energetic compound system corresponding to a two-dimensional material. The decomposition products are only the constituent atoms of the target material and nitrogen protective gas, with no impurities remaining.
4. The manufacturing method according to claim 1, characterized in that, The layered nanoconfined microcavities have 2-5 layers, with a single-layer cavity depth of 2nm-10μm and a planar size of 10nm-60μm. They are fabricated using MEMS photolithography and multilayer dry etching processes.
5. The manufacturing method according to claim 4, characterized in that, In step S2, a 50-150 nm thick SiO2 film is deposited using PECVD to seal the microcavity opening. The precursor filling error in a single-layer cavity is ≤0.1%, and the interlayer filling sequence is completely matched with the heterojunction structure.
6. The manufacturing method according to claim 1, characterized in that, In step S3, the field strength of the directional uniform electric field is Vacuum degree of the vacuum reaction chamber .
7. The manufacturing method according to claim 1, characterized in that, In step S4, the wavelength of the nanosecond pulsed excimer laser is 193nm or 248nm, and the laser energy density is... With a pulse width of 10-100ns, the energy uniformity of the entire wafer exposed by surface exposure is ≤0.5%, and the explosion thermodynamic parameters of each precursor layer can be controlled by the laser energy gradient.
8. The manufacturing method according to claim 1, characterized in that, In step S4, the instantaneous high temperature of the controllable micro-explosion is maintained for 10-80 ns, and the generated heterojunction has 1-5 layers or a single layer structure. The interlayer interfaces are free of impurities and defects, and the interface flatness is high. .
9. The manufacturing method according to claim 1, characterized in that, In step S5, the peak temperature of laser annealing is 800-1400℃, the temperature of inert gas passivation is 120-250℃, the passivation time is 10-60s, and the inert gas is argon or nitrogen with a purity ≥99.9999%.
10. The manufacturing method according to any one of claims 1-9, characterized in that, The prepared two-dimensional van der Waals heterostructure exhibits van der Waals forces as the interlayer bonding force, with no chemical bond hybridization, an interface cleanliness ≥99.9%, and a room-temperature carrier mobility of [missing information]. .
11. A one-step synchronous manufacturing apparatus for a two-dimensional van der Waals heterojunction implementing the manufacturing method of any one of claims 1-10, characterized in that, include: The high-vacuum reaction chamber system is equipped with a high-precision substrate heating stage, a molecular pump pumping unit, and multiple gas pathways, achieving an ultimate vacuum level. ; The layered precursor filling and sealing system includes a high-precision multi-channel layered liquid injection unit and a nanoscale thin film sealing unit, which is used to complete the precise layered filling and microcavity sealing of each layer of heterojunction precursor in a high vacuum environment. The electric field control system, including parallel plate electrodes and a high-precision high-voltage power supply, can output electric field strength. Adjustable vertical uniform electric field; The wafer-level laser synchronous triggering system includes a nanosecond pulsed excimer laser with wavelengths of 193nm / 248nm and pulse widths of 10-100ns, as well as a surface exposure homogenizing optical path, which can achieve uniform exposure of the entire 8 / 12-inch wafer with energy uniformity ≤0.5% and support energy gradient control. The in-situ post-processing system, including a millisecond-level laser annealing module and an inert gas atmosphere control unit, is used for lattice repair, interface optimization and surface passivation of heterojunctions. The closed-loop measurement and control system is electrically connected to the above systems and is used for real-time monitoring and closed-loop control of vacuum degree, temperature, electric field intensity, laser parameters and reaction process.