A method and apparatus for measuring the frequency of a high-speed pulse signal

Abstract

This invention provides a method and apparatus for measuring the frequency of high-speed pulse signals. The frequency measurement process includes: first, the host computer configures parameters; second, the FPGA performs initial denoising on the input signal and obtains the measurement time by counting the number of reference clock cycles within the measurement time, while simultaneously recording the number of pulses measured during the measurement time; third, the microcontroller calculates the frequency value based on the measurement time and the number of pulses, and can automatically select whether to use a median moving average method for secondary denoising based on the measurement time; and fourth, the host computer reads the frequency value from the data area. The signal switching circuit of the frequency measurement device can protect the input signal and select input signals with different voltage ranges. This invention can measure the frequency of input signals with different voltage ranges, and the measurement method of this invention can significantly improve the accuracy and stability of signal frequency measurement.

Description

Technical Field

[0001] This invention belongs to the field of industrial process control technology, and specifically relates to a method and device for measuring the frequency of high-speed pulse signals. Background Technology

[0002] High-speed pulse signals are widely used in industrial control, not only improving production efficiency and product quality but also enhancing system safety and intelligence. However, during pulse signal acquisition, frequency measurement jumps can occur due to various reasons. For example, methods using I / O port registers can result in "missed acquisitions," while noise generated by industrial equipment can lead to "over-acquisitions." Furthermore, current frequency measurement equipment used in industrial control can only count pulse signals within a single voltage range. Summary of the Invention

[0003] To address at least one of the aforementioned problems in the above-mentioned technologies, the present invention provides a method and apparatus for measuring the frequency of high-speed pulse signals.

[0004] To achieve the above objectives, the present invention adopts the following technical solution: A method for measuring the frequency of a high-speed pulse signal, the method comprising: The first step is to denoise the input signal. The signal under test passes through the signal switching circuit and the optocoupler and then enters the FPGA. The FPGA denoises the input signal. Furthermore, the noise parameters are configured, i.e., the noise pulse width value is selected. When the measured signal is high, timer Cnt1 operates and the value of timer Cnt2 is cleared to zero. If the value of timer Cnt1 is equal to the noise pulse width value, timer Cnt1 stops operating and the Noise Reduction output is high. When the measured signal is low, timer Cnt2 operates and the value of timer Cnt1 is cleared to zero. If the value of timer Cnt2 is equal to the noise pulse width value, timer Cnt2 stops operating and the Noise Reduction output is low.

[0005] The second step is to obtain the average period T of the signal under test. 被测 Record a measurement time T 测量时间 The number of measured signals n and the reference clock T within the period of n measured signals. 基准时钟 The number N 基准时钟 , using N 基准时钟 The total cycle time Tn of the reference clock represents the measurement time T of n measured signals. 测量时间 = Tn = T 基准时钟 ·N 基准时钟 According to formula T 被测 = T n / n calculates the average period of the measured signal within a measurement time; Furthermore, if the update time T 更新时间 If there is a pulse signal, then the measurement time T 测量时间 The current update time T 更新时间_current The last pulse rising edge t current Compared to the previous update time T 更新时间_last The last pulse rising edge t last The difference between the update time T and the update time T 更新时间 The sum, i.e., Tn = T 测量时间 = t current - t last + T 更新时间 If the update time T 更新时间 If there is no pulse signal, then the measurement time T 测量时间 The last update time T 更新时间_last The last pulse rising edge t last With update time T 更新时间 The sum, i.e., Tn = T 测量时间 = t last + T 更新时间； Furthermore, update time T 更新时间 The microcontroller periodically acquires the frequency f of the measured signal in the FPGA register via SPI. 被测 Time T SPI an integer multiple of m, i.e., T 更新时间 = m·T SPI This indicates the time when the device updates the measured value; Furthermore, the integer m is configurable and used to determine whether the update time has arrived.

[0006] The third step is to calculate the frequency f of the signal being measured. 被测 =1 / T 被测 .

[0007] Microcontroller reads FPGA registers and processes data: 91. The microcontroller periodically reads the total clock cycle time Tn and the number of pulses n from the FPGA register via SPI; 92. Determine if the update time has arrived. If the update time has not arrived, return to step 1 and repeat reading the FPGA register; otherwise, record the total reference clock cycle time Tn and the number of pulses n. 93. Determine if the number of pulses n is 0. If n is not 0, calculate the frequency f = Tn / n according to the formula and put the frequency value into the control register; if n equals 0, proceed to step four. 94. Determine the update time count Flag_x. If Flag_x reaches the preset value, it is determined that there has been no pulse signal for a long period of time, the frequency output is 0, and the frequency value is placed in the control register; if Flag_x does not reach the preset value, the total cycle time of the reference clock is Tn = t. last + T 更新时间 The frequency f = Tn / n0 is calculated according to the formula, and the frequency value is placed into the control register. 95. Determine the number of samples Sam_cnt. If Sam_cnt reaches the preset value, perform secondary noise reduction on the frequency value using the median moving average method and put the frequency value into the data area; if Sam_cnt does not reach the preset value, directly put the frequency value into the data area.

[0008] A high-speed pulse signal frequency measuring device, comprising: The signal switching circuit is used to protect the input signal and select the input signal from different voltage ranges. Optical isolators are used to isolate signal switching circuits and microcontrollers, thereby improving the device's anti-interference capability. The FPGA circuit is used to perform noise reduction on the input signal and record the measurement parameters, and then report the parameter information to the microcontroller. The microcontroller is used to process the parameter information reported by the FPGA, output the frequency of the measured signal, and build the slave protocol stack. The memory is used to store information such as microcontroller control programs and frequency measurement results; and the bus control circuit is used to output slave data through the bus.

[0009] Furthermore, the signal switching circuit includes a signal protection circuit and a voltage range switching circuit, wherein the voltage range switching circuit is used to select input signals with different voltage ranges.

[0010] Furthermore, in one embodiment, the voltage range switching circuit includes a multi-channel switching switch, a relay, or a voltage comparison switching circuit.

[0011] Compared with the prior art, the present invention has the following advantages: the signal switching circuit can select input signals with different voltage ranges, and the data acquisition method of the present invention can greatly improve the accuracy and stability of frequency measurement. Attached Figure Description

[0012] Figure 1 This is a block diagram of the device for measuring the frequency of high-speed pulse signals.

[0013] Figure 2 This is a schematic diagram of a signal protection circuit.

[0014] Figure 3 This is a schematic diagram of a voltage range switching circuit.

[0015] Figure 4 This is a schematic diagram of a single noise reduction step.

[0016] Figure 5 A schematic diagram illustrating the method for calculating measurement time when there is an internal pulse signal for updating the time.

[0017] Figure 6 A schematic diagram illustrating the method for calculating measurement time when there is no pulse signal within the update time.

[0018] Figure 7 This is a schematic diagram of a high-speed pulse signal frequency measurement method.

[0019] Figure 8 Flowchart of the microcontroller's FPGA register reading and data processing mechanism. Detailed Implementation

[0020] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0021] A method for measuring the frequency of a high-speed pulse signal is as follows: Figure 7 As shown, it includes: host computer parameter configuration 71, FPGA performing noise reduction and related parameter recording 8, microcontroller reading, processing and uploading data 9, and host computer data reading 72.

[0022] The first step is for the host computer to configure parameters 71, including: noise parameters, i.e., noise pulse width configuration and update time, i.e., T. 更新时间 = m·T SPI Configuration;

[0023] The second step involves the FPGA performing noise reduction and recording relevant parameters, including: 81. The signal under test enters the FPGA after passing through the signal switching circuit and the optocoupler isolator. The FPGA performs noise reduction on the input signal. Specifically, such as Figure 4 As shown, when the measured signal is high, timer Cnt1 operates and the value of timer Cnt2 is cleared to zero. If the value of timer Cnt1 is equal to the noise pulse width value, timer Cnt1 stops operating and the Noise Reduction output is high. When the measured signal is low, timer Cnt2 operates and the value of timer Cnt1 is cleared to zero. If the value of timer Cnt2 is equal to the noise pulse width value, timer Cnt2 stops operating and the Noise Reduction output is low. 82, record a measurement time T 测量时间 The number of measured signals n, and the reference clock (T) within the period of n measured signals.基准时钟 The number N) 基准时钟 , using N 基准时钟 The total cycle time of the reference clock represents the cycle time T of n measured signals. 测量时间 = Tn = T 基准时钟 ·N 基准时钟 ; Specifically, if the update time T 更新时间 It contains pulse signals, such as Figure 5 As shown, the measurement time T 测量时间 The current update time T 更新时间_current The last pulse rising edge t current Compared to the previous update time T 更新时间_last The last pulse rising edge t last The difference between the update time T and the update time T 更新时间 The sum, i.e., Tn = T 测量时间 = t current - t last +T 更新时间 If the update time T 更新时间 There is no pulse signal inside, such as Figure 6 As shown, the measurement time T 测量时间 The last update time T 更新时间_last The last pulse rising edge t last With update time T 更新时间 The sum, i.e., Tn = T 测量时间 = t last +T 更新时间 .

[0024] The third step involves the microcontroller reading, processing, and uploading data. 91. The microcontroller periodically reads the total clock cycle time Tn and the number of pulses n from the FPGA register via SPI; 92. Determine if the update time has reached T. 更新时间 That is, whether Flag_m == m is true; if the update time has not yet arrived, then T. 更新时间 = m·T SPI Then T SPI The integer multiple flag Flag_m is automatically incremented by 1 (Flag_m++), and then 91 is returned to repeatedly read the FPGA register; if the update time arrives, the total reference clock cycle time Tn and the number of pulses n are recorded. 93. Determine if the number of pulses n is 0, i.e., whether n == 0 is true. If n is not 0, calculate the frequency f = Tn / n according to the formula, put the frequency value into the control register, and assign n0 to n and Flag_x to 0. If n equals 0, proceed to 94. 94. Determine if the update time count flag Flag_x has reached the preset value x, i.e., whether Flag_x == x. If Flag_x reaches the preset value x, it is determined that there has been no pulse signal for a long time, the frequency output is 0, the frequency value is placed in the control register, and Flag_x is assigned the value 0. If Flag_x has not reached the preset value, the total period of the reference clock is Tn = t. last +T 更新时间 The frequency f = Tn / n0 is calculated according to the formula, and the frequency value is placed in the control register. At the same time, Flag_x is automatically incremented by 1 (Flag_x++), and Tn = t last + T 更新时间 n0 remains unchanged, i.e., n0 = n0; 95. Determine whether the number of samples Sam_cnt has reached the preset value i. If Sam_cnt has reached the preset value, then use the median moving average method to perform secondary noise reduction on the frequency value and put the frequency value into the data area. If Sam_cnt has not reached the preset value, then directly put the frequency value into the data area, and at the same time, Sam_cnt is incremented by 1, i.e., Sam_cnt++.

[0025] The fourth step is to read data from the host computer at frequency 72, which is the frequency value at which the host computer reads data from the data area.

[0026] The measurement method of the present invention has been described in detail above. The apparatus of the present invention will now be described, as follows: Figure 1 , 2 As shown in Figures 1 and 3, this invention provides a high-speed pulse frequency measurement device, comprising: a signal switching circuit 1, an optocoupler isolator 2, an FPGA circuit 3, a microcontroller 4, a FLASH memory 5, and a bus control circuit 6. The signal switching circuit 1 is used to protect the input signal and select input signals from different voltage ranges; the optocoupler isolator 2 is used to isolate the signal switching circuit and the microcontroller; the FPGA circuit 3 is used to perform primary noise reduction of the input signal and record measurement parameters, and report the parameter information to the microcontroller; the microcontroller 4 is used to organize the parameter information reported by the FPGA, output the frequency of the measured signal, and construct a slave protocol stack; the FLASH memory 5 is used to store information such as the microcontroller control program and frequency measurement results; and the bus control circuit 6 is used to output slave data via the bus.

[0027] In this embodiment, the pulse signal reaches the optocoupler 2 via the signal switching circuit 1. The signal switching circuit 1 includes a signal protection circuit 11 and a voltage range switching circuit 12. The signal protection circuit 11 is used to provide electrostatic discharge protection, reverse connection protection, and overvoltage protection for the signal; the voltage range switching circuit 12 is used to select input signals with different voltage ranges.

[0028] Specifically, D4 is a TVS for electrostatic discharge protection; D1 is an ESD protection for surge protection; D2 is a diode for reverse connection protection; D3 is a BAV99, which limits the voltage of the signal when the pulse signal level is higher than V1, and the voltage value is V1; the voltage range switching circuit 12 uses a dual-channel switching switch S1, which selects the channel with a larger voltage range by default.

[0029] FPGA circuit 3 includes FPGA 31 and FLASH memory 32. FPGA 31 is connected to microcontroller 4 through SPI interface. It is used to perform noise reduction of input signal and record measurement parameters, and report parameter information to microcontroller.

[0030] Microcontroller 4 is connected to FPGA 31 via SPI interface to read data from FPGA 31 and process the data; microcontroller 4 is also connected to bus microcontroller 61 via SPI interface to transmit conversion slave data to bus microcontroller 61.

[0031] This invention is not limited to the embodiments described above. Any obvious improvements or modifications made to the embodiments by those skilled in the art will not exceed the scope of the invention and the appended claims.

Claims

1. A method for measuring the frequency of a high-speed pulse signal, characterized in that, Includes the following steps: The first step is to denoise the input signal; The second step is to obtain the average period T of the signal under test. 被测 ; The third step is to calculate the frequency f of the signal being measured. 被测 =1 / T 被测 .

2. The high-speed pulse signal frequency measurement method according to claim 1, characterized in that, During the measurement, a measurement time T is recorded. 测量时间 The number of measured signals n and the reference clock T within the period of n measured signals. 基准时钟 The number N 基准时钟 , using the N 基准时钟 The total cycle time of the reference clocks represents the measurement time T of the n measured signals. 测量时间 =Tn = T 基准时钟 ·N 基准时钟 According to formula T 被测 = T n / n calculates a measurement time T within the specified time period. 测量时间 The average period T of the measured signal 被测 .

3. The high-speed pulse signal frequency measurement method according to claim 2, characterized in that, If the update time is T 更新时间 If there is a pulse signal, then the measurement time T 测量时间 The current update time T 更新时间_current The last pulse rising edge t current Compared to the previous update time T 更新时间_last The last pulse rising edge t last The difference between the update time T and the update time T 更新时间 The sum, i.e., Tn = T 测量时间 = t current - t last + T 更新时间 If the update time T 更新时间 If there is no pulse signal, then the measurement time T 测量时间 The last update time T 更新时间_last The last pulse rising edge t mentioned inside last With the update time T 更新时间 The sum, i.e., Tn = T 测量时间 = t last + T 更新时间 .

4. A high-speed pulse signal frequency measuring device, characterized in that, include: The signal switching circuit is used to protect the input signal and select the input signal from different voltage ranges.

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