Design method of thick film resistor paste system based on ts gradient matching and gradient temperature sintering process

Abstract

This invention provides a design method for a thick-film resistive paste system based on Ts gradient matching and gradient temperature sintering process. The core principle is: the glass softening point Ts_G1 of the protective layer paste < the glass softening point Ts_C1 of the conductive layer paste < the glass softening point Ts_R of the resistive layer paste. By first sintering the resistive layer R at high temperature, and then sintering the conductive layer C1 and the protective layer G1 at low temperature step by step, the performance of each layer can be independently optimized while ensuring that the constructed resistive and conductive network is not damaged by the subsequent sintering layers. This method is a universal design methodology applicable to the entire resistance range from 0.01Ω / square to 1MΩ / square.

Description

Technical Field

[0001] This invention belongs to the field of electronic materials and component manufacturing technology, specifically relating to the design and manufacturing methods of thick film resistor pastes, thick film resistor pastes used in chip resistors (wafer resistors) and their multilayer structures, and particularly to the design method of thick film resistor paste system based on Ts gradient matching and gradient temperature sintering process. Background Technology

[0002] Traditional thick-film resistor paste technology has the following main limitations: 1) Blind-matching sintering temperature cannot optimize the performance of each layer: When using the "blind-matching" sintering process, the resistance layer R and the conductor layer C are sintered at the same temperature, such as 850℃, while the glass protective layer G1 is sintered at another fixed temperature, such as 600℃. This causes the formulation parameters of each layer material, such as glass composition and conductive phase content, to have to compromise with each other, and it is impossible to independently optimize their respective electrical properties (such as temperature coefficient of resistance TCR), conductivity, or mechanical protection properties.

[0003] 2) The later sintered layer will damage the conductive network of the earlier sintered layer: During the sintering process of multilayer structure, the later sintered layer (such as the resistance leading layer C1 and the protective layer G1) will cause interface erosion, thermal stress or physical damage to the already sintered and fragile conductive network of the resistance layer R (composed of conductive phase particles and glass phase) at high temperature, resulting in resistance value drift, TCR drift, and ESD and STOL performance degradation.

[0004] 3) There is a contradiction between interfacial bonding strength and reliability: In order to obtain good interlayer bonding strength, it is often necessary to increase the sintering temperature or adjust the glass composition, but this will aggravate the damage to the underlying functional layer, making it difficult to achieve a balance between interfacial bonding quality and electrical performance stability.

[0005] 4) Lack of universal design principles for the entire resistance range: Existing technologies usually develop formulations and processes for specific resistance ranges (such as the medium resistance range), and lack a universally applicable design framework that can cover the entire range from 0.01Ω / square (extremely low resistance) to 1MΩ / square (extremely high resistance).

[0006] 5) High sintering sensitivity: At different sintering temperatures, the silver in the positive conductor diffuses into the resistive layer R, resulting in a significant change in resistance.

[0007] 6) Significant size effect: The temperature coefficient has a significant dependence on the size of the resistor, often resulting in the need to design several products with different temperature coefficients within the same resistance range to meet different size requirements. This increases production costs on the manufacturing side and management costs on the application side.

[0008] Based on the above-mentioned deficiencies, the present invention aims to systematically solve the following technical problems: 1) How to achieve system design but independent optimization of the performance of each layer? That is, how to design the material formulation and sintering conditions of the resistive layer R, the conductive layer C1, and the protective layer G1 separately to achieve their respective optimal performance without restricting each other, but in a way that is harmonized by the system.

[0009] 2) How to protect the core conductive network that has been built? That is, how to ensure that the conductive network of the sintered resistive layer R (R layer) is not damaged when building the upper structure (C1, G1 layers).

[0010] 3) How to establish a design framework applicable to the entire resistance range? That is, how to establish universal design principles that are independent of specific resistance values ​​and can guide the development of all products from low resistance to high resistance, thereby improving R&D efficiency and application matching efficiency.

[0011] 4) How to shift from "single material optimization" to "system design"? That is, how to regard the thick film resistor as a system composed of R, C1 and G1 layers working together, and design the matching relationship between each layer as a whole, rather than optimizing a single layer of paste in isolation.

[0012] Purpose of the invention This invention aims to provide a design method for thick film resistive slurry systems based on Ts gradient matching and gradient temperature sintering processes, in order to solve the technical problems existing in traditional single sintering processes, such as the inability to take into account the performance of each layer, damage to the first sintered layer by the later sintered layer, and the lack of universal design principles for all resistance values.

[0013] The technical solution of this invention is to provide a design method for a thick film resistive slurry system based on Ts gradient matching and gradient temperature sintering process. Its core can be summarized as "one objective + two constraints + three simultaneous principles": 1. The design is based on the resistive paste R: The resistive paste is the core that determines the key electrical performance of the final device, such as sheet resistance, TCR, and ESD. All other designs revolve around the resistive layer R.

[0014] 2. Two fundamental constraints No-damage constraint: The sintering process of conductive layer C1 and protective layer G1 must not damage the already constructed resistive layer R conductive network. This is the fundamental constraint of the design method of this system.

[0015] Gradient order constraint: The glass phase softening points of the protective layer paste, conductive layer paste, and resistive layer paste must satisfy a strict decreasing relationship: Ts_G1 <Ts_C1<Ts_R; Where Ts_G1 is the glass phase softening point of the protective layer paste, Ts_C1 is the glass phase softening point of the conductive layer paste, and Ts_R is the glass phase softening point of the resistive layer paste.

[0016] 3. Three - in - one Principle: The present invention creatively proposes the "Three - in - one Principle", which sublimates the Ts gradient matching from a design concept into an operable methodology: At the design stage: The resistor layer paste, the conductive layer paste, and the protective layer paste must be co - designed as an integrated system rather than pieced together after independent design. When designing, the Ts gradient relationship of the three layers must be determined simultaneously to ensure Ts_G1 < Ts_C1 < Ts_R; At the sintering stage: The three layers of the resistor layer R, the conductive layer C1, and the protective layer G1 designed and manufactured according to the design - at - the - same - time principle must be sintered and applied in sequence according to a specific temperature - time window: The first - stage sintering: T1 > Ts_R + 50°C (superheat temperature above 50°C to ensure complete densification of the glass phase of the R layer), so that the resistor layer R is sintered and shaped; The second - stage sintering: Ts_C1 + 50°C < T2 < Ts_R (superheat temperature above 50°C to ensure densification of the conductive layer C1 and at the same time protect the already cured resistor layer R), so that the conductive layer C1 is sintered without damaging the already cured resistor layer R; <​​​​​​​​​​​​​The resistive layer paste, conductive layer paste, and protective layer paste are sequentially sintered using a resistance-first gradient temperature sintering process with a gradient-matched temperature-time window. The resistance-first gradient temperature sintering process includes: first sintering the resistive layer paste at a first temperature T1 to form a resistive layer R; then sintering the conductive layer paste at a second temperature T2 to form a conductive layer C1; and finally sintering the protective layer paste at a third temperature T3 to form a protective layer G1. The temperature-time window for gradient matching satisfies: T1>Ts_R + 50°C; Ts_C1 + 50°C <T2<Ts_R; Ts_G1 + 50°C <T3<Ts_C。

[0018] Creative value: In existing technologies ("blind matching" process), the resistive layer R, conductive layer C1, and protective layer G1 are usually designed and applied independently. However, this invention is the first to use "three simultaneous" as a mandatory constraint, which elevates the Ts gradient from a fuzzy principle to a system design methodology. This is the core innovation of this invention at the methodological level.

[0019] Detailed technical solution description, including the Ts gradient matching principle mentioned in this solution: 1. Definition of Ts gradient relationship: like Figure 2 As shown, the core material design principle proposed in this invention is the gradient matching relationship of the softening point (Ts) of the glass phase in each layer of the slurry, which must satisfy the following inequality: Ts_G1 <Ts_C1<Ts_R。

[0020] Furthermore, to ensure the operability and verifiability of the Ts gradient design principle, the difference between the softening points of each glass phase layer must meet the following numerical range: 1) ΔT1 = Ts_R - Ts_C1: Typical range is 80°C ~ 200°C. Where ΔT1 is the first temperature gradient. It should be noted that if ΔT1 is too small (<80°C), the sintering temperature window of the conductive layer C1 will be too narrow, making process control difficult and failing to fully protect the R layer network. If ΔT1 is too large (>200°C), the large difference in ΔT1 will lead to an excessive temperature difference between the first sintering temperature T1 and the second sintering temperature T2, which will increase the risk of thermal expansion mismatch between the conductive layer C1 and the resistive layer R. 2) ΔT2 = Ts_C1 - Ts_G1: Typical range is 80°C ~ 200°C; Among them, ΔT2 is the second temperature gradient. If ΔT2 is too small, it will lead to a too narrow sintering temperature window of the protective layer G1 and a compressed process window. If ΔT2 is too large, it will lead to too low protective temperature of the protective layer G1, which may affect the densification of its glass phase and the protective effect.

[0021] 3) ΔT_total = Ts_R - Ts_G1: The typical range is 200°C ~ 350°C; Among them, ΔT_total is the total temperature gradient. This total temperature difference ensures that there is sufficient independent optimization space for the three-layer structure. The above difference range is the key parameter for the implementation of the methodology of the present invention. They transform the Ts gradient design from an abstract principle into a specific executable technical solution and are an important technical feature that differentiates the present invention from the prior art.

[0022] 2. Physical meaning of the Ts setting for each layer: The setting of this gradient relationship has clear physical and process purposes: The sintering window of the resistor layer R, that is, the first temperature satisfies: T1>Ts_R + 50°C. The Ts of the resistor layer paste is the highest (Ts_R) to ensure that the resistor layer R can complete sintering first at the highest temperature. At this temperature, the high-Ts glass phase in the resistor layer R is fully melted, effectively wets and firmly bonds the conductive phase particles (such as RuO2, Ag-Pd, etc.), forming a stable and low-defect bulk conductive network. This is the basis for obtaining stable electrical performance.

[0023] The sintering window of the conductive layer C1, that is, the second temperature T2 satisfies: Ts_C1 + 50°C<T2<Ts_R, so that its sintering temperature window is below the Ts of the resistor layer R. At this temperature, the self-glass phase of the conductive layer C1 can be melted and densified to form a good end resistance lead-out layer and form an ideal interface with the already fully cured R layer. Since T2<Ts_R, the glass phase of the resistor layer R will not re-soften or flow, thus strictly protecting the integrity of its conductive network.

[0024] The Ts of the protective layer G1 is the lowest (Ts_G1): enabling it to flow and spread at a lower temperature (Ts_G1+50°C<T3<Ts_C1) to form a dense and continuous glass protective layer G1. This low-temperature process completely avoids the thermal shock or interface erosion of the melt of the protective layer G1 to the underlying conductive layer C1 and resistor layer R, achieving lossless encapsulation.

[0025] 3. Universality of gradient matching: The Ts gradient relationship (G1 Ts < C1 Ts < R Ts) is a universal design principle of the present invention, which is independent of specific resistance values. Whether the goal is to prepare a thick film resistor with a low resistance value (high content of conductive phase) or a high resistance value (low content of conductive phase, high content of glass phase), the Ts of the pastes of the conductive layer C1 and the protective layer G1 must strictly follow this gradient relationship.

[0026] Correspondingly, the present solution provides a design method for a thick film resistor paste system based on Ts gradient matching and gradient temperature sintering process, and defines the first temperature gradient, the second temperature gradient and the total temperature gradient as follows: ΔT1 = Ts_R - Ts_C1; ΔT2 = Ts_C1 - Ts_G1; ΔT_total = Ts_R - Ts_G1; Where ΔT1 is the first temperature gradient, ΔT2 is the second temperature gradient, and ΔT_total is the total gradient. Among them, ΔT1 is 80°C to 200°, ΔT2 is 80°C to 200°C, and ΔT_total is 200°C to 350°C.

[0027] Gradient temperature sintering process: As Figure 3 shown, to achieve the above Ts gradient matching, a gradient temperature sintering process with resistor priority must be adopted. The whole process flow includes substrate preparation, paste printing (or coating), drying and the key gradient temperature sintering.

[0028] 1. Detailed explanation of the process flow: The first stage of sintering (resistor layer R shaping): Temperature: It is carried out at the first temperature T1, and it must satisfy T1 > Ts_R + 50°C (superheat of more than 50°C to ensure complete densification of the glass phase in the resistor layer R).

[0029] Purpose: To completely melt the glass phase in the resistor layer paste, achieve uniform distribution and firm combination of the conductive phase, and form the final resistor body conductive network structure. After sintering, the key parameters such as the microstructure and sheet resistance of the resistor layer R are basically shaped.

[0030] The second stage of sintering (construction of the conductive layer C1): Temperature: It is carried out at the second temperature T2, and the temperature window needs to satisfy Ts_C1 + 50°C < T2 < Ts_R (superheat of more than 50°C to ensure densification of the conductive layer C1 and protect the resistor layer R at the same time).

[0031] Objective: Sinter the conductive layer C1. At this temperature, the glass phase of the conductive layer C1 melts to form a densified layer, which can play the role of lead-out resistance at the end. Since the second temperature T2 is strictly lower than Ts_R, the established resistance layer R network will not be thermally damaged.

[0032] In some special cases, the time dimension can also be considered, and rapid sintering can be considered to shorten the sintering time and further reduce the impact of the sintering of the conductive layer C1 on the network of the resistance layer R.

[0033] The third-stage sintering (encapsulation of the protective layer G1): Temperature: It is carried out at the third temperature T3, and the temperature window needs to meet Ts_G1 + 50°C < T3 < Ts_C1 (superheat of more than 50°C to ensure the densification of the protective layer G1 and protect the lower layer at the same time).

[0034] Objective: Complete the sintering of the outermost protective layer G1 to form a dense glass film, providing mechanical strength, moisture protection, insulation and other final protection for the device. Among them, the third temperature T3 is the lowest temperature to ensure the minimization of the thermal impact on the lower-layer structure.

[0035] In some special cases, the time dimension can also be considered, and rapid sintering can be considered to shorten the sintering time and further reduce the impact of the sintering of the protective layer G1 on the R&C network.

[0036] 2. Key features of the process: The key to this gradient temperature sintering process is that the performance of the intermediate product can be detected (such as measuring the sheet resistance) after each sintering step, and the subsequent sintering steps will not change the structural performance formed in the previous steps. This makes the entire manufacturing process highly predictable and controllable, which is the basis for the realization of the system design method.

[0037] Beneficial effects: Adopting the Ts gradient matching and segmented sintering system design method described in the present invention can bring the following significant beneficial effects: <了 (1) Provide a universal framework to improve the R & D efficiency and application-side adaptation efficiency: The present invention provides a set of general design frameworks for the development of thick film resistor products with a full resistance range. When developing new resistance value products, only the Ts_R of the resistance layer paste needs to be determined under the Ts gradient principle, and the pastes of C1 / G1 with corresponding Ts can be matched accordingly, without having to explore complex sintering process curves again, which can significantly shorten the R & D cycle; for the application side, it also avoids various problems caused by traditional blind matching.

[0038] (ii) Improve production consistency and product yield: The gradient temperature sintering process has relatively relaxed requirements for the absolute accuracy of temperature in each zone of the sintering furnace and has a wider process window. This is conducive to controlling product consistency in large-scale production, reducing excessive reliance on equipment precision, and thus improving the overall yield. Attached Figure Description

[0039] Figure 1 This is the test chart for Comparative Example 2.

[0040] Figure 2 It represents the Ts gradient relationship between the resistive layer paste, the conductive layer paste, and the protective layer paste.

[0041] Figure 3 This is a schematic diagram of the design method for a thick film resistive paste system based on Ts gradient matching and gradient temperature sintering process. Detailed Implementation

[0042] Example 1: A method for designing a thick-film resistor system with a sheet resistance of 100 Ω / square (RFC969-1): Design principle: R / C1 / G1 are designed simultaneously, and the Ts matching principle is used for adaptation. Based on the target resistance value, the Ts_R of the glass phase of the resistive layer paste is determined to be approximately 651°C. Slurry matching: Select a conductive layer slurry with a Ts_C1 of approximately 520.9°C and a protective layer slurry with a Ts_G1 of approximately 361°C, satisfying Ts_G1. <Ts_C1<Ts_R。

[0043] R-priority + gradient temperature sintering: First stage: Sintering the resistance layer R at 850°C for 10 minutes to reach peak temperature.

[0044] Second stage: Sintering of conductive layer C1 at 620°C for 10 minutes to reach peak temperature.

[0045] Third stage: Sinter the protective layer G1 at 520°C for 3 minutes to reach the peak temperature.

[0046] Performance testing: Sheet resistance is 113 Ω / square, HTCR is -62 ppm / °C, CTCR is ppm / °C; ESD 2.73; After covering with protective layer G1, the resistance change rate ΔR / R% is -1.28%.

[0047] Comparative Example 1: The resistivity layer paste is the same, and traditional blind mixing and sintering at traditional temperatures are used: Design principle: Instead of following a system design, the resistive layer paste is designed separately, and the Ts_R of the glass phase in the resistive layer paste is determined to be approximately 651.6°C. Slurry matching: Blindly match the conductive layer slurry and the protective layer slurry: Traditional sintering temperature: First stage: Sinter the conductive layer C1 at 850 °C, with a peak temperature time of 10 min.

[0048] Second stage: Sinter the resistance layer R at 850 °C, with a peak temperature time of 10 min.

[0049] Third stage: Sinter the protective layer G1 at 600 °C, with a peak temperature time of 3 min.

[0050] Performance test: Sheet resistance is 94 Ω / square, HTCR is 14 ppm / °C, CTCR is -73 ppm / °C; ESD is 0.89; after covering the protective layer G1, the resistance change rate ΔR / R = 33% The data comparison table for Example 1 and Comparative Example 1 is shown in Table 1 below: Table 1 Data comparison table for Example 1 and Comparative Example 1

[0051] Conclusion: Example 1 (RFC969 - 1) adopts the Ts gradient matching and gradient temperature sintering process, showing excellent performance at the medium - high resistance end (100 Ω / square); more importantly, the resistance change rate after sintering the protective layer G1 (-1.28% vs 33%) is significantly reduced by 96%, less than the industry range of 5%, indicating that the gradient design based on Ts_G1 < Ts_C1 < Ts_R can significantly improve the stability of thick - film resistors during the sintering process of the protective layer G1, effectively avoiding the problem of severe resistance drift caused by temperature mismatch in traditional processes.

[0052]

Example 2

[0053] Slurry matching: Select a conductive layer slurry with Ts_C1 approximately 521 °C and a protective layer slurry with Ts_G1 approximately 361 °C, satisfying Ts_G1 < Ts_C1 < Ts_R.

[0054] Adopt R - first + gradient temperature sintering: First stage: Sinter the resistance layer R at 850 °C, with a peak temperature time of 10 min.

[0055] Second stage: Sinter the conductive layer C1 at 620 °C with a peak temperature time of 10 min.

[0056] Third stage: Sinter the protective layer G1 at 520 °C with a peak temperature time of 3 min.

[0057] Performance test: Sheet resistance 0.94 Ω / sq, HTCR 101.9 ppm / °C, CTCR 130.7 ppm / °C, resistance change rate ΔR / R = 0.42%.

[0058]

Comparative Example 2

[0059] Second stage: Sinter the resistance layer R at 850 °C with a peak temperature time of 10 min.

[0060] Third stage: Sinter the protective layer G1 at 600 °C with a peak temperature time of 3 min.

[0061] Performance test: Sheet resistance 1.19 Ω / sq, HTCR 133.2 ppm / °C; CTCR 152 ppm / °C, change rate of G1 0.51%. Obvious microcracks can be seen in the interfacial microscopic observation, see attachment Figure 1 .

[0062] The data comparison table of Example 2 and Comparative Example 2 is shown in Table 2 below: Table 2 Data comparison table of Example 2 and Comparative Example 2

[0063] Combined: Example 2 adopts the Ts gradient matching and gradient temperature sintering process. Compared with blindly matching C1, G1 and sintering at traditional temperature using a traditional formula (containing ruthenium dioxide), it shows excellent performance in terms of temperature coefficient: HTCR is reduced by 57%, CTCR is reduced by 39%, indicating that the gradient design based on Ts_G1<Ts_C1<Ts_R can effectively improve the temperature stability and reliability of thick film resistors, and the cost is reduced by 35%.

[0064]

Example 3

[0065] Slurry matching: Select a conductive layer slurry with a Ts_C1 of approximately 521°C and a protective layer slurry with a Ts_G1 of approximately 361°C, satisfying Ts_G1. <Ts_C1<Ts_R。

[0066] R-preferred + gradient temperature sintering: First stage: Sintering the resistance layer R at 850°C for 10 minutes to reach peak temperature.

[0067] Second stage: Sintering of conductive layer C1 at 620°C for 10 minutes to reach peak temperature.

[0068] Third stage: Sinter the protective layer G1 at 520°C for 3 minutes to reach the peak temperature.

[0069] Performance testing: The sheet resistance after sintering was measured to be 0.78 MΩ / square, HTCR was -72.4 ppm / °C, and CTCR / HTCR was -179 ppm / °C; ESD 1.06; After G1, the resistance change rate ΔR / R=0.14%.

[0070] [Comparative Example 3]: Using traditional blind batching and traditional temperature sintering Design principle: Instead of following a system design, the resistive layer R is designed separately, and the Ts_R of the glass phase of the resistive layer paste is determined to be approximately 709°C. Slurry matching: Blind mixing of C1 and G1 Traditional sintering temperature: First stage: Sintering of conductive layer C1 at 850°C for 10 minutes to reach peak temperature.

[0071] Second stage: Sinter the resistance layer R at 850°C for 10 minutes to reach peak temperature.

[0072] Third stage: Sinter the protective layer G1 at 600°C for 3 minutes to reach the peak temperature.

[0073] Performance testing: After sintering, the sheet resistance was measured to be 0.42 MΩ / square, HTCR to be -78.4 ppm / °C, and CTCR to HTCR to be -192.8 ppm / °C; ESD 0.21; after G1, the resistance change rate ΔR / R = 12.78%. The data comparison table between Example 3 and Comparative Example 3 is shown in Table 3 below: Table 3. Data Comparison Table between Example 3 and Comparative Example 3

[0074] Conclusion: Example 3 (RFD027) adopts the Ts gradient matching and gradient temperature sintering process and performs excellently at the high resistance end (1 MΩ / square): the measured sheet resistance is closer to the target value of 1 MΩ / square, the absolute values of HTCR and CTCR are closer to the target 0 point. More importantly, the resistance change rate after G1 sintering (0.14% vs 12.78%), for the example, it is less than 5% of the industry standard, while for the comparative example, it is more than twice the industry standard, indicating that the gradient design based on Ts_G1<Ts_C1<Ts_R can effectively solve the problem of severe resistance drift at the high resistance end during the G1 sintering process of the protective layer, and significantly improve the process stability.

[0075] Those skilled in the art should understand that the technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as within the scope described in this specification.

[0076] The above embodiments only represent several implementation manners of the present application, and the description thereof is relatively specific and detailed, but it should not be understood as a limitation to the scope of the present application. It should be pointed out that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A method for designing a thick film resistor paste system based on Ts gradient matching and gradient temperature sintering process, characterized in that, The method comprises the steps of: simultaneously designing resistive layer paste, conductive layer paste and protective layer paste and determining the temperature gradient relationship of the glass phase softening points of the resistive layer paste, the conductive layer paste and the protective layer paste, wherein the glass phase softening points of the protective layer paste, the conductive layer paste and the resistive layer paste satisfy: Ts_G1 < Ts_C1 < Ts_R; wherein Ts_G1 is the glass phase softening point of the protective layer paste, Ts_C1 is the glass phase softening point of the conductive layer paste, and Ts_R is the glass phase softening point of the resistive layer paste; sintering the resistive layer paste, the conductive layer paste and the protective layer paste in sequence according to a resistive-preferred gradient temperature sintering process in a gradient-matched temperature-time window, wherein the resistive-preferred gradient temperature sintering process comprises: first sintering the resistive layer paste at a first temperature T1 to form a resistive layer R, then sintering the conductive layer paste at a second temperature T2 to form a conductive layer C1, and finally sintering the protective layer paste at a third temperature T3 to form a protective layer G1; wherein the gradient-matched temperature-time window satisfies: T1 > Ts_R + 50°C; Ts_C1 + 50°C < T2 < Ts_R; Ts_G1 + 50°C < T3 < Ts_C.

2. The thick film resistive paste system design method based on Ts gradient matching and gradient temperature sintering process of claim 1, wherein, The first temperature gradient, the second temperature gradient and the total temperature gradient are defined as follows: ΔT1 = Ts_R - Ts_C1; ΔT2 = Ts_C1 - Ts_G1; ΔT_total = Ts_R - Ts_G1; wherein ΔT1 is the first temperature gradient, ΔT2 is the second temperature gradient, and ΔT_total is the total gradient.

3. The thick film resistive paste system design method based on Ts gradient matching and gradient temperature sintering process of claim 2, wherein, ΔT1 is 80°C ~ 200°C, ΔT2 is 80°C ~ 200°C, and ΔT_total is 200°C ~ 350°C.

4. The thick film resistive paste system design method based on Ts gradient matching and gradient temperature sintering process of claim 1, wherein, The temperature relationship of the first temperature T1, the second temperature T2 and the third temperature T3 satisfies: T1 > T2 > T3.

5. The thick film resistive paste system design method based on Ts gradient matching and gradient temperature sintering process of claim 1, wherein, The second temperature T2 at which the conductive layer paste is sintered is lower than the glass softening point Ts_R of the resistive layer paste.

6. The thick film resistive paste system design method based on Ts gradient matching and gradient temperature sintering process of claim 1, wherein, After each segment of the resistive layer R, the conductive layer C1 or the protective layer G1 is sintered, the sintered layer is subjected to electrical performance detection.

7. The thick film resistive paste system design method based on Ts gradient matching and gradient temperature sintering process of claim 1, wherein, The resistive layer R, the conductive layer C1 and the protective layer G1 are applied as a functional system as a whole to a device.

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