A boron diffusion precursor structure, a p-type passivation contact structure and a preparation method thereof
By using PECVD technology to prepare a silicon oxide source layer and a polycrystalline silicon layer containing carbon and boron, and controlling boron diffusion, the problem of low passivation index of P-type TOPCon structure was solved, achieving high-efficiency passivation performance and cost optimization.
Patent Information
- Application Number
- CN202411931835.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2026-06-26
AI Technical Summary
The existing P-type TOPCon structure has low passivation index, poor passivation quality, difficult-to-control boron diffusion, and difficult-to-reduce silicon film thickness, posing safety risks and high cost issues, making mass production difficult.
Silicon oxide containing carbon and boron was prepared using PECVD technology as the source layer, combined with a polycrystalline silicon layer and a silicon oxide layer. Boron diffusion was controlled by high-temperature annealing to reduce interface defects and improve passivation performance.
Significantly improves the passivation quality of P-type TOPCon structures, with iVoc reaching 745–750 mV and J0,s as low as 1–2.5 fA/cm2 for bifacial symmetrical passivation sheets. Reduces polysilicon layer thickness, decreases parasitic absorption and risk of film bursting, and improves doping uniformity and cost-effectiveness.
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Figure CN122294645A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of crystalline silicon solar cell technology, and more specifically, to a boron diffusion precursor structure, a P-type passivated contact structure, and a method for preparing the same. Background Technology
[0002] TOPCon (Tunnel Oxide Passivated Contact) solar cell technology is an advanced solar cell technology. Its core lies in achieving efficient passivation contact through a tunnel oxide layer and a doped polycrystalline silicon layer, thereby improving the cell's photoelectric conversion efficiency. Depending on the doping element, TOPCon structures are divided into two types: N-type TOPCon structures based on phosphorus-doped polycrystalline silicon and P-type TOPCon structures based on boron-doped polycrystalline silicon.
[0003] Currently, N-type TOPCon technology is relatively mature in terms of manufacturing processes, with high performance in two key technical indicators: passivation and contact, and has been widely adopted in industry. Specifically, the single-sided saturation current density (J / s) of N-type TOPCon is... 0,s It can reach 1.5–3 fA / cm 2 Left and right, the implicit open-circuit voltage (iV) of the double-sided symmetrical passivation plate oc The passivation performance can reach approximately 740–745 mV. However, the passivation performance of P-type TOPCon technology is significantly worse than that of N-type TOPCon, with its J... 0,s Typically 6–20 fA / cm 2 Left and right, iV with double-sided symmetrical passivation oc Typically, the voltage is around 700–730 mV. From an industry development perspective, only by improving the technical specifications of the P-type TOPCon structure can more efficient crystalline silicon solar cells based on TOPCon technology be developed, such as TOPCon cells with passivated back junction contacts (TBJ) and TOPCon cells with full back-side contacts (TBC). Therefore, the low passivation performance of the P-type TOPCon structure is the most significant factor restricting the improvement of crystalline silicon cell efficiency.
[0004] In existing technologies, the fabrication techniques for P-type TOPCon structures are mainly divided into the following three types:
[0005] 1) Low-pressure chemical vapor deposition (LPCVD) is used to prepare interfacial silicon oxide and intrinsic amorphous silicon. Then, a subsequent boron diffusion method is used to convert the intrinsic amorphous silicon into boron-doped polycrystalline silicon, thereby obtaining a p-TOPCon structure. Research has revealed the following problems with this technology: low passivation quality; difficulty in controlling boron diffusion, making it difficult to reduce the thickness of the silicon thin film; uneven thickness and distribution of the boron source layer, affecting the performance stability of the battery; boron oxide deposition can cause quartz tube breakage, posing a safety risk during manufacturing; and severe winding deposition, resulting in high process costs.
[0006] 2) LPCVD technology is used to prepare interfacial silicon oxide and boron-doped amorphous silicon, followed by high-temperature annealing to form a p-TOPCon structure. This method suffers from problems such as uneven thickness of the deposited boron-doped amorphous silicon and a slow deposition rate, making it difficult to achieve mass production in practice.
[0007] 3) First, an interface silicon oxide layer is deposited on a silicon substrate using different methods. Then, a boron-doped amorphous silicon layer is deposited on the interface silicon oxide layer using PECVD. High-temperature annealing transforms the amorphous silicon into boron-doped polycrystalline silicon, forming a p-TOPCon structure. This method is difficult to control boron diffusion, requires a relatively thick silicon film, increases parasitic absorption, and generates more defects at the interlayer interface, increasing the probability of carrier recombination and affecting the final passivation quality. Optimizing the interface silicon oxide process can improve the passivation quality of P-type TOPCon, but the highest turn-on voltage of p-TOPCon in existing technologies still cannot exceed 735mV.
[0008] In summary, due to the advantages of PECVD technology, such as slight winding and in-situ doping, it has greater economic value potential in mass production applications. Therefore, it is of great significance to develop p-TOPCon with high passivation quality based on PECVD technology. Summary of the Invention
[0009] To address the shortcomings of existing technologies, the purpose of this invention is to develop a P-type TOPCon technology based on the PECVD route, which controls boron diffusion, reduces interface defects, allows for flexible adjustment of polysilicon thickness, and improves the passivation performance of the P-type TOPCon structure.
[0010] To achieve the above objectives, a first aspect of the present invention provides a boron diffusion precursor structure, comprising a first silicon oxide layer, an intrinsic polycrystalline silicon layer, and a first boron source layer disposed on a silicon substrate. The thickness of the first silicon oxide layer is 1–3 nm, the thickness of the intrinsic polycrystalline silicon layer is 10–400 nm, and the material of the first boron source layer is silicon oxide containing carbon, boron, and nitrogen elements, wherein the carbon doping concentration of the first boron source layer is greater than 1 × 10⁻⁶. 20 cm -3 Boron doping concentration greater than 1×10 20 cm -3 The thickness of the first boron source layer is greater than or equal to 10 nm.
[0011] This invention uses silicon oxide containing carbon and boron as the source layer. By utilizing the difference in the segregation coefficient of boron in silicon and silicon oxide, the boron concentration in the interface region can be flexibly controlled. The intrinsic polycrystalline silicon layer acts as a barrier to diffusion, achieving buffered diffusion of boron. Boron diffuses into the silicon substrate through the polycrystalline silicon layer, reducing the enrichment of boron in the interfacial nano-silicon oxide layer, reducing interface defects, which is beneficial to improving the passivation performance of the P-type TOPCon structure. It can also reduce the thickness of the polycrystalline silicon layer and reduce parasitic absorption.
[0012] Furthermore, the boron diffusion precursor structure also includes a second silicon oxide layer disposed between the intrinsic polysilicon layer and the first boron source layer, the thickness of the second silicon oxide layer being 0.8–4 nm. The second silicon oxide layer acts as a diffusion barrier, which helps to reduce the thickness of the polysilicon layer; simultaneously, the second silicon oxide layer protects the first boron source layer, preventing boron oxidation during annealing.
[0013] Furthermore, the intrinsic polycrystalline silicon layer contains carbon, which can improve the material's stability.
[0014] Furthermore, the boron diffusion precursor structure also includes a second boron source layer disposed on the first boron source layer, wherein the material of the second boron source layer is boron-doped amorphous silicon, and the boron doping concentration is greater than 5 × 10⁻⁶. 20 cm -3 The second boron source layer can improve carrier transport and electrode contact.
[0015] A second aspect of the present invention provides a P-type passivated contact structure, which is obtained by high-temperature annealing and diffusion from the aforementioned boron diffusion precursor structure. The P-type passivated contact structure includes a silicon substrate, a first silicon oxide layer and a first polysilicon layer sequentially disposed on the silicon substrate, and a hydrogen-containing dielectric layer disposed on the outermost side. The silicon substrate has an inward expansion region near the surface of the first silicon oxide layer, and the first polysilicon layer has an enrichment region near the surface of the first silicon oxide layer. The first silicon oxide layer and the first polysilicon layer contain boron and carbon elements. The thickness of the first silicon oxide layer is 1-3 nm, and the thickness of the first polysilicon layer is 10-400 nm.
[0016] Furthermore, the boron doping concentration in the inner expansion region is less than 2 × 10⁻⁶. 19 cm -3 Boron activation concentration less than 6×10 18 cm -3 Carbon doping concentration greater than 1×10 18 cm -3 Hydrogen doping concentration greater than 1×10 19 cm -3 .
[0017] Furthermore, the boron doping concentration of the first silicon oxide layer is less than 1×10⁻⁶.20 cm -3 Carbon doping concentration greater than 5×10 18 cm -3 Hydrogen doping concentration greater than 5 × 10 19 cm -3 .
[0018] Furthermore, the boron doping concentration in the enriched region is less than 1 × 10⁻⁶. 20 cm -3 Boron activation concentration less than 5×10 19 cm -3 Carbon doping concentration greater than 1×10 18 cm -3 Hydrogen doping concentration greater than 1×10 19 cm -3 .
[0019] Furthermore, the material of the hydrogen-containing dielectric layer is selected from one or more stacks of alumina, silicon nitride, silicon oxynitride, and silicon oxide.
[0020] Furthermore, the P-type passivated contact structure also includes a second silicon oxide layer disposed on the first polysilicon layer, the thickness of the second silicon oxide layer being 0.8–4 nm.
[0021] Furthermore, the P-type passivated contact structure also includes a second polysilicon layer disposed beneath the hydrogen-containing dielectric layer. The material of the second polysilicon layer is boron-doped polysilicon, wherein the boron activation concentration is 5 × 10⁻⁶. 19 ~40×10 19 cm -3 .
[0022] Furthermore, the P-type passivated contact structure also includes a first boron source layer disposed on the second silicon oxide layer, wherein the material of the first boron source layer is silicon oxide containing carbon and boron elements.
[0023] Furthermore, the P-type passivated contact structure also includes a second boron source layer disposed on the first boron source layer, wherein the material of the second boron source layer is boron-doped polycrystalline silicon.
[0024] The P-type passivated contact structure of the present invention has excellent surface passivation quality, and its double-sided symmetrical passivation sheet has a maximum iV oc Reaching 745–750 mV, corresponding to the lowest J 0,s As low as 1–2.5 fA / cm 2 .
[0025] A third aspect of the present invention provides a method for preparing the above-mentioned P-type passivated contact structure, comprising the following steps:
[0026] A first silicon oxide layer is prepared on the surface of a silicon substrate;
[0027] An intrinsic amorphous silicon layer is prepared on the first silicon oxide layer;
[0028] High-temperature annealing transforms the intrinsic amorphous silicon layer into an intrinsic polycrystalline silicon layer;
[0029] The second silicon oxide layer is prepared on the intrinsic polycrystalline silicon layer; this step can be omitted.
[0030] The first boron source layer is prepared on an intrinsic polycrystalline silicon layer or a second silicon oxide layer using PECVD. The material is silicon oxide containing carbon and boron.
[0031] The second boron source layer is prepared on the first boron source layer by PECVD. The material is boron-doped amorphous silicon. This step can be omitted.
[0032] High-temperature annealing allows carbon and boron elements to diffuse.
[0033] Etching removes the boron source layer; this step can be omitted.
[0034] The second polycrystalline silicon layer is prepared using boron-doped polycrystalline silicon; this step can be omitted.
[0035] Preparation of hydrogen-containing dielectric layer;
[0036] Perform sintering, light infusion, or dark annealing.
[0037] This invention uses PECVD technology to deposit a boron source layer, which can achieve uniform deposition, thus reducing the thickness of boron-doped polysilicon in the TOPCon structure and expanding the applicability of the process.
[0038] The present invention has the following advantages over the prior art:
[0039] (1) Significantly improve the passivation quality of P-type TOPCon: Using silicon oxide containing carbon and boron as the source layer, boron buffer diffusion can be achieved, reducing the enrichment of boron in the interfacial nano silicon oxide layer, reducing interfacial defects, suppressing film bursting, and improving passivation quality.
[0040] (2) Improve passivation performance: The source layer contains carbon elements. The introduction of carbon can combine with boron atoms to form stable compounds, reducing the formation of boron defects. At the same time, the enrichment of carbon at the interface is conducive to increasing the concentration of hydrogen in polycrystalline silicon, interface silicon oxide and silicon surface area, thus improving passivation quality.
[0041] (3) The boron concentration in polycrystalline silicon is flexibly adjustable: By controlling the doping concentration of the source layer, setting a second silicon oxide layer, and adjusting the annealing temperature, the boron concentration curve in polycrystalline silicon can be flexibly adjusted to reduce the thickness of polycrystalline silicon and reduce the risk of parasitic absorption and film explosion.
[0042] (4) Improved doping uniformity: The source layer is prepared by PECVD technology, which can uniformly deposit boron source on the entire silicon substrate surface, effectively avoiding the doping non-uniformity problem in traditional BSG technology.
[0043] (5) Reduce stress: PECVD uses plasma to provide energy for the reactants. This plasma environment can increase the bonding force between the film and the substrate, while reducing the stress inside the film.
[0044] (6) Suppressing film bursting: By introducing carbon atoms during deposition, hydrogen atoms in the film form carbon-hydrogen bonds with carbon atoms. During annealing, the carbon-hydrogen bonds are not easily broken, thus avoiding the film bursting phenomenon caused by the release of a large amount of hydrogen in a short period of time.
[0045] (7) Compatible with various boron doping sources: PECVD technology can deposit thin films at relatively low temperatures and can achieve in-situ doping, that is, boron and other doping elements can be directly incorporated during the deposition process. It can be compatible with and effectively utilize various boron doping sources.
[0046] (8) High cost-effectiveness: Compared with the traditional high temperature and high pressure LPCVD process, the present invention uses PECVD technology to prepare the source layer, which has the advantages of low temperature deposition, light coating, simple etching, improved performance, reduced tube bursting, and improved yield, thereby reducing the overall cost of battery manufacturing process. Attached Figure Description
[0047] Figure 1 This is a schematic diagram of a P-type passivated contact structure according to a specific embodiment of the present invention.
[0048] Figure 2 This is a schematic diagram of another P-type passivated contact structure in a specific embodiment of the present invention.
[0049] Figure 3 This is a schematic diagram of another P-type passivated contact structure in a specific embodiment of the present invention.
[0050] Figure 4 This is a comparison chart of the ECV curves of the double-sided P-type TOPCon structure passivation sheets prepared in the embodiments and comparative examples of the present invention.
[0051] Figure 5 SIMS test images of the double-sided P-type TOPCon structure passivation sheets prepared in the embodiments and comparative examples of the present invention.
[0052] Figure 6 This is a comparison of lifetime spectrum curves of the double-sided P-type TOPCon structure passivation sheets prepared in the embodiments and comparative examples of the present invention.
[0053] Explanation of reference numerals in the attached figures:
[0054] 1-Silicon substrate, 11-Inner expansion region, 2-First silicon oxide layer, 3-First polycrystalline silicon layer, 31-Enriched region, 4-Second silicon oxide layer, 5-First boron source layer, 6-Second boron source layer, 7-Second polycrystalline silicon layer, 8-Hydrogen-containing dielectric layer. Detailed Implementation
[0055] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the following embodiments are only used to illustrate the implementation methods and typical parameters of the present invention, and are not intended to limit the parameter range described in the present invention. Reasonable variations derived therefrom are still within the protection scope of the claims of the present invention.
[0056] It should be noted that the endpoints and any values of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values should be understood to include values close to these ranges or values. For numerical ranges, the endpoint values of the various ranges, the endpoint values of the various ranges and individual point values, and individual point values can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein.
[0057] A specific embodiment of the present invention provides a boron diffusion precursor structure, comprising a first silicon oxide layer, an intrinsic polycrystalline silicon layer, and a first boron source layer disposed on a silicon substrate. The first boron source layer is made of silicon oxide containing carbon, boron, and nitrogen elements, and the carbon doping concentration of the first boron source layer is greater than 1 × 10⁻⁶. 20 cm -3 Boron doping concentration greater than 1×10 20 cm -3 .
[0058] In a specific embodiment, the thickness of the first silicon oxide layer is between 1 and 3 nm; the thickness of the intrinsic polycrystalline silicon layer is between 10 and 400 nm; and the thickness of the first boron source layer is greater than or equal to 10 nm.
[0059] In some embodiments, the intrinsic polycrystalline silicon layer has a sublayer structure, typically a stacked structure of one or more silicon oxide films and intrinsic polycrystalline silicon films, wherein the thickness and composition of each silicon oxide film and intrinsic polycrystalline silicon film in the sublayer structure may be the same or different.
[0060] In some embodiments, a second silicon oxide layer is provided between the intrinsic polysilicon layer and the first boron source layer. In a specific embodiment, the thickness of the second silicon oxide layer is between 0.8 and 4 nm.
[0061] In some embodiments, a second boron source layer is further provided on the first boron source layer, and the material of the second boron source layer is boron-doped amorphous silicon. In a specific embodiment, the boron doping concentration in the second boron source layer is greater than 5 × 10⁻⁶. 20 cm-3 .
[0062] In some embodiments, the second boron source layer has a sublayer structure, typically a stacked structure of one or more silicon oxide films, intrinsic amorphous silicon and boron-doped amorphous silicon films (all amorphous silicon films may contain carbon), wherein the thickness and composition of each silicon oxide film, intrinsic amorphous silicon and boron-doped amorphous silicon film in the sublayer structure may be the same or different.
[0063] The aforementioned boron diffusion precursor structure can be subjected to high-temperature annealing and diffusion to obtain a P-type passivated contact structure, a typical structure as follows: Figure 1 As shown, the substrate includes a silicon substrate 1, on the surface of which a first silicon oxide layer 2, a first polycrystalline silicon layer 3, and a hydrogen-containing dielectric layer 8 are sequentially disposed. The silicon substrate 1 has an inward expansion region 11 near the surface of the first silicon oxide layer 2, and the first polycrystalline silicon layer 3 has an enrichment region 31 far from the first silicon oxide layer 2 near the surface. The near-surface region refers to a region with a depth less than 5–10 nm from the surface.
[0064] In a specific embodiment, the inner expansion region 11 contains elements such as carbon, oxygen, and hydrogen, wherein the boron doping concentration is less than 2 × 10⁻⁶. 19 cm -3 Boron activation concentration less than 6×10 18 cm -3 Carbon doping concentration greater than 1×10 18 cm -3 Hydrogen doping concentration greater than 1×10 19 cm -3 .
[0065] In a specific embodiment, the thickness of the first silicon oxide layer 2 is 1–3 nm, and it contains elements such as carbon, boron, and hydrogen, wherein the boron doping concentration is less than 1 × 10⁻⁶. 20 cm -3 Carbon doping concentration greater than 5×10 18 cm -3 Hydrogen doping concentration greater than 5 × 10 19 cm -3 .
[0066] In a specific embodiment, the thickness of the first polycrystalline silicon layer 3 is 10–400 nm, and it contains elements such as carbon, oxygen, boron, and hydrogen. The doping concentration of boron and carbon in the first polycrystalline silicon layer 3 is relatively low in the middle region and significantly increases in the enriched region 31. The boron doping concentration in the enriched region 31 is less than 1 × 10⁻⁶. 20 cm -3 Boron activation concentration less than 5×10 19 cm -3 Carbon doping concentration greater than 1×10 18 cm -3 Hydrogen doping concentration greater than 1×10 19cm -3 .
[0067] In a specific embodiment, the material of the hydrogen-containing dielectric layer 8 may be one or more stacks of alumina, silicon nitride, silicon oxynitride, and silicon oxide.
[0068] A typical method for preparing the above-mentioned P-type passivated contact structure includes the following steps:
[0069] (1) A first silicon oxide layer is prepared on the surface of a silicon substrate.
[0070] (2) An intrinsic amorphous silicon layer is prepared on the first silicon oxide layer.
[0071] (3) High-temperature annealing transforms the intrinsic amorphous silicon layer into an intrinsic polycrystalline silicon layer, with typical temperatures ranging from 700 to 1100°C.
[0072] (4) The first boron source layer is prepared on the intrinsic polycrystalline silicon layer by PECVD. The material is silicon oxide containing carbon and boron elements.
[0073] (5) High-temperature annealing is carried out to diffuse carbon and boron elements. The typical temperature is 800-1000℃. An inner expansion region is formed on the surface of the silicon substrate, and an enrichment region is formed on the surface of the intrinsic polycrystalline silicon layer.
[0074] (6) Etching to remove the boron source layer.
[0075] (7) Prepare a hydrogen-containing dielectric layer.
[0076] (8) Perform sintering, light infusion or dark annealing.
[0077] In other embodiments, the P-type passivated contact structure is as follows: Figure 2 As shown, the substrate includes a silicon substrate 1. The surface of the silicon substrate 1 is sequentially provided with a first silicon oxide layer 2, a first polycrystalline silicon layer 3, a second silicon oxide layer 4, a first boron source layer 5, a second boron source layer 6, and a hydrogen-containing dielectric layer 8. The silicon substrate 1 has an inward expansion region 11 near the surface of the first silicon oxide layer 2, and the first polycrystalline silicon layer 3 has an enrichment region 31 far from the first silicon oxide layer 2 near its surface. The first boron source layer 5 is made of silicon oxide containing carbon and boron. The second boron source layer 6 is made of boron-doped polycrystalline silicon.
[0078] In a specific embodiment, the thickness of the second silicon oxide layer 4 is 0.8–4 nm.
[0079] In a specific embodiment, the second boron source layer 6 contains elements such as boron and hydrogen, and may also contain carbon, wherein the boron doping concentration is greater than 5 × 10⁻⁶. 20 cm -3 .
[0080] A typical method for preparing the above-mentioned P-type passivated contact structure includes the following steps:
[0081] (1) A first silicon oxide layer is prepared on the surface of a silicon substrate.
[0082] (2) An intrinsic amorphous silicon layer is prepared on the first silicon oxide layer.
[0083] (3) High-temperature annealing transforms the intrinsic amorphous silicon layer into an intrinsic polycrystalline silicon layer, with typical temperatures ranging from 700 to 1100°C.
[0084] (4) A second silicon oxide layer is prepared on the intrinsic polycrystalline silicon layer.
[0085] (5) A first boron source layer is prepared on the second silicon oxide layer by PECVD. The material is silicon oxide containing carbon and boron.
[0086] (6) A second boron source layer is prepared on the first boron source layer by PECVD, and the material is boron-doped amorphous silicon.
[0087] (7) High-temperature annealing is carried out to diffuse carbon and boron elements. The typical temperature is 800-1000℃. An inner expansion region is formed on the surface of the silicon substrate, and an enrichment region is formed on the surface of the intrinsic polycrystalline silicon layer.
[0088] (8) Prepare a hydrogen-containing dielectric layer.
[0089] (9) Perform sintering, light infusion or dark annealing.
[0090] In other embodiments, the P-type passivated contact structure is as follows: Figure 3 As shown, the substrate includes a silicon substrate 1, on the surface of which are sequentially disposed a first silicon oxide layer 2, a first polycrystalline silicon layer 3, a second silicon oxide layer 4, a second polycrystalline silicon layer 7, and a hydrogen-containing dielectric layer 8. The silicon substrate 1 has an inward expansion region 11 near the surface of the first silicon oxide layer 2, and the first polycrystalline silicon layer 3 has an enrichment region 31 near the surface of the first polycrystalline silicon layer 3 away from the first silicon oxide layer 2. The second polycrystalline silicon layer 7 is made of boron-doped polycrystalline silicon.
[0091] In a specific embodiment, the second polycrystalline silicon layer 7 contains elements such as boron and hydrogen, wherein the boron activation concentration is 5×10⁻⁶. 19 ~40×10 19 cm -3 .
[0092] A typical method for preparing the above-mentioned P-type passivated contact structure includes the following steps:
[0093] (1) A first silicon oxide layer is prepared on the surface of a silicon substrate.
[0094] (2) An intrinsic amorphous silicon layer is prepared on the first silicon oxide layer.
[0095] (3) High-temperature annealing transforms the intrinsic amorphous silicon layer into an intrinsic polycrystalline silicon layer, with typical temperatures ranging from 700 to 1100°C.
[0096] (4) A second silicon oxide layer is prepared on the intrinsic polycrystalline silicon layer.
[0097] (5) A first boron source layer is prepared on the second silicon oxide layer by PECVD. The material is silicon oxide containing carbon and boron.
[0098] (6) A second boron source layer is prepared on the first boron source layer by PECVD, and the material is boron-doped amorphous silicon.
[0099] (7) High-temperature annealing is carried out to diffuse carbon and boron elements. The typical temperature is 800-1000℃. An inner expansion region is formed on the surface of the silicon substrate, and an enrichment region is formed on the surface of the intrinsic polycrystalline silicon layer.
[0100] (8) Etching to remove the boron source layer.
[0101] (9) Prepare boron-doped amorphous silicon and anneal it at high temperature to crystallize it, thereby obtaining a second polycrystalline silicon layer.
[0102] (10) Prepare a hydrogen-containing dielectric layer.
[0103] (11) Perform sintering, light infusion or dark annealing.
[0104] The technical solution and effects of the present invention will be described below through specific embodiments. The silicon wafers used in the following embodiments and comparative examples are n-type double-sided alkaline polished wafers with a resistivity of 0.8 Ω·cm and a thickness of 130 μm.
[0105] Example 1
[0106] The following steps were taken to prepare a double-sided P-type TOPCon passivation wafer: An n-type crystalline silicon substrate with a resistivity of 0.8 Ω·cm and a thickness of 130 μm was prepared. RCA cleaning was performed. A 1.5 nm thermal oxide silicon layer was deposited on both sides of the n-type crystalline silicon substrate using LPCVD technology. Subsequently, a 30 nm intrinsic amorphous silicon layer was deposited and annealed at 1050 °C for 30 min to promote amorphous silicon crystallization. A 1 nm silicon oxide layer was deposited using PECVD technology. A 20 nm carbon-doped boron-containing silicon oxide layer with a carbon content of 5 at% was then deposited. Annealing at 900 °C for 90 min promoted amorphous silicon crystallization and simultaneously facilitated boron diffusion. The carbon-doped boron-containing silicon oxide layer was removed by cleaning and etching with a 5 vol% HF solution. Alumina and silicon nitride dielectric films were prepared. The sample surface was then passivated by light injection.
[0107] Example 2
[0108] The following steps were taken to prepare a double-sided P-type TOPCon passivation wafer: An n-type crystalline silicon substrate with a resistivity of 0.8 Ω·cm and a thickness of 130 μm was prepared. RCA cleaning was performed. A 1.5 nm thermal oxide silicon layer was deposited on both sides of the n-type crystalline silicon substrate using LPCVD technology. Subsequently, a 60 nm intrinsic amorphous silicon layer was deposited and annealed at 1050 °C for 30 min to promote amorphous silicon crystallization. A 1 nm silicon oxide layer was deposited using PECVD technology. A 20 nm carbon-doped boron-containing silicon oxide layer with a carbon content of 5 at% was then deposited. Annealing at 900 °C for 90 min promoted amorphous silicon crystallization and simultaneously facilitated boron diffusion. The carbon-doped boron-containing silicon oxide layer was removed by cleaning and etching with a 5 vol% HF solution. Alumina and silicon nitride dielectric films were prepared. The sample surface was then passivated by light injection.
[0109] Example 3
[0110] The following steps were taken to prepare a double-sided P-type TOPCon passivation wafer: An n-type crystalline silicon substrate with a resistivity of 0.8 Ω·cm and a thickness of 130 μm was prepared. RCA cleaning was performed. A 1.5 nm thermal oxide silicon layer was deposited on both sides of the n-type crystalline silicon substrate using LPCVD technology. Subsequently, a 400 nm intrinsic amorphous silicon layer was deposited and annealed at 1050 °C for 30 min to promote amorphous silicon crystallization. A 1 nm silicon oxide layer was deposited using PECVD technology. A 20 nm carbon-doped boron-containing silicon oxide layer with a carbon content of 5 at% was then deposited. Annealing at 900 °C for 90 min promoted amorphous silicon crystallization and simultaneously facilitated boron diffusion. The carbon-doped boron-containing silicon oxide layer was removed by cleaning and etching with a 5 vol% HF solution. Alumina and silicon nitride dielectric films were prepared. The sample surface was then passivated by light injection.
[0111] Example 4
[0112] The following steps were taken to prepare a double-sided P-type TOPCon passivation wafer: An n-type crystalline silicon substrate with a resistivity of 0.8 Ω·cm and a thickness of 130 μm was prepared. RCA cleaning was performed. A 1.5 nm thermal oxide silicon layer was deposited on both sides of the n-type crystalline silicon substrate using LPCVD technology. Subsequently, a 30 nm intrinsic amorphous silicon layer was deposited and annealed at 1050 °C for 30 min to promote amorphous silicon crystallization. A 1 nm silicon oxide layer was deposited using PECVD technology. A 20 nm carbon-doped boron-containing silicon oxide layer with a carbon content of 5 at% was then deposited. Annealing at 900 °C for 120 min promoted amorphous silicon crystallization and simultaneously facilitated boron diffusion. The carbon-doped boron-containing silicon oxide layer was removed by cleaning and etching with a 5 vol% HF solution. Alumina and silicon nitride dielectric films were prepared. The sample surface was then passivated by light injection.
[0113] Example 5
[0114] The following steps were taken to prepare a double-sided P-type TOPCon passivation wafer: An n-type crystalline silicon substrate with a resistivity of 0.8 Ω·cm and a thickness of 130 μm was prepared. RCA cleaning was performed. A 1.5 nm thermal oxide silicon layer was deposited on both sides of the n-type crystalline silicon substrate using LPCVD technology. Subsequently, an approximately 30 nm intrinsic amorphous silicon layer was deposited and annealed at 1050 °C for 30 min to promote amorphous silicon crystallization. A 30 nm carbon-doped boron-containing silicon oxide layer with a carbon content of 5 at% was deposited using PECVD technology. This layer was annealed at 900 °C for 90 min to promote amorphous silicon crystallization and simultaneously achieve boron diffusion. The carbon-doped boron-containing silicon oxide layer was removed by cleaning and etching with a 5 vol% HF solution. Alumina and silicon nitride dielectric films were then prepared. The sample surface was subsequently passivated by light injection.
[0115] Example 6
[0116] The following steps were taken to prepare a double-sided P-type TOPCon passivation wafer: An n-type crystalline silicon substrate with a resistivity of 0.8 Ω·cm and a thickness of 130 μm was prepared. RCA cleaning was performed. A 1.5 nm thermal oxide silicon layer was deposited on both sides of the n-type crystalline silicon substrate using LPCVD technology. Subsequently, a 30 nm intrinsic amorphous silicon layer was deposited and annealed at 1050 °C for 30 min to promote amorphous silicon crystallization. A 1 nm silicon oxide layer was deposited using PECVD technology. A 30 nm carbon-doped boron-containing silicon oxide layer with a carbon content of 5 at% was then deposited. Annealing at 900 °C for 90 min promoted amorphous silicon crystallization and simultaneously facilitated boron diffusion. The carbon-doped source layer was removed by cleaning and etching with a 5 vol% HF solution. Alumina and silicon nitride dielectric films were prepared. The sample surface was then passivated by light injection.
[0117] Example 7
[0118] The following steps were taken to prepare a double-sided P-type TOPCon passivation wafer: an n-type crystalline silicon substrate with a resistivity of 0.8 Ω·cm and a thickness of 130 μm was prepared. RCA cleaning was performed; a 1.5 nm thermal oxide silicon layer was deposited on both sides of the n-type crystalline silicon substrate using LPCVD technology; followed by the deposition of an approximately 30 nm intrinsic amorphous silicon layer, which was then annealed at 1050 °C for 30 min to promote amorphous silicon crystallization; a 1 nm silicon oxide layer was deposited using PECVD technology; followed by the deposition of a 30 nm carbon-doped boron-containing silicon oxide layer with a carbon content of 5 at%; followed by the deposition of an approximately 20 nm boron-doped amorphous silicon layer; annealing was performed at 900 °C for 90 min to promote amorphous silicon crystallization and simultaneously achieve boron diffusion; the boron-doped polycrystalline silicon layer and the carbon-doped boron-containing silicon oxide layer were removed by cleaning and etching with 5 vol% HF solution; an approximately 20 nm boron-doped amorphous silicon layer was deposited using PECVD technology and annealed to crystallize the amorphous silicon; aluminum oxide and silicon nitride dielectric films were prepared; and the sample surface was subsequently passivated by light injection.
[0119] Comparative Example 1
[0120] The following steps were taken to prepare a double-sided P-type TOPCon passivation wafer: An n-type crystalline silicon substrate with a resistivity of 0.8 Ω·cm and a thickness of 130 μm was prepared. RCA cleaning was performed. An approximately 1.5 nm thermal oxide silicon layer was deposited on the n-type crystalline silicon substrate using LPCVD technology, followed by the deposition of an approximately 40 nm intrinsic amorphous silicon layer. The substrate was then annealed at 1050 °C for 30 min to promote amorphous silicon crystallization and boron diffusion. The surrounding coating was removed by cleaning and etching with a 5 vol% HF solution. Alumina and silicon nitride dielectric films were prepared. The sample surface was then passivated by light injection.
[0121] Comparative Example 2
[0122] The following steps were taken to prepare a double-sided P-type TOPCon passivation wafer: An n-type crystalline silicon substrate with a resistivity of 0.8 Ω·cm and a thickness of 130 μm was prepared. RCA cleaning was performed. A 1.5 nm thermal oxide silicon layer was deposited on the n-type crystalline silicon substrate using PECVD technology. Subsequently, an intrinsic amorphous silicon layer of approximately 40 nm was deposited. Following this, a 30 nm carbon-doped boron-containing amorphous silicon layer of approximately 30 nm was deposited, with a carbon content of 15 at%. Annealing at 900 °C for 90 min was performed to promote amorphous silicon crystallization and achieve boron diffusion. The surrounding coating was removed by cleaning and etching with a 5 vol% HF solution. Alumina and silicon nitride dielectric films were prepared. Finally, the sample surface was passivated by light injection.
[0123] Comparative Example 3
[0124] The following steps were taken to prepare a double-sided P-type TOPCon passivation wafer: An n-type crystalline silicon substrate with a resistivity of 0.8 Ω·cm and a thickness of 130 μm was prepared. RCA cleaning was performed. A 1.5 nm thermal oxide silicon layer was deposited on the n-type crystalline silicon substrate using PECVD technology. Subsequently, an intrinsic amorphous silicon layer of approximately 40 nm was deposited. A boron-doped amorphous silicon layer of approximately 30 nm with zero carbon content was then deposited. Annealing at 900 °C for 90 min was performed to promote amorphous silicon crystallization and achieve boron diffusion. The surrounding coating was removed by cleaning and etching with a 5 vol% HF solution. Alumina and silicon nitride dielectric films were prepared. The sample surface was then passivated by light injection.
[0125] The ECV curves of the double-sided P-type TOPCon structure passivation sheets prepared in Example 3, Comparative Example 1, and Comparative Example 2 are as follows: Figure 4 As shown, the novel boron source structure prepared by PECVD demonstrates that the activation concentration of boron in the polycrystalline silicon layer is significantly reduced, which is beneficial for reducing surface recombination and improving passivation performance. The doping concentration curves of boron, carbon, and hydrogen in the double-sided P-type TOPCon structure passivation wafers prepared in Example 3 and Comparative Example 2 are shown below. Figure 5 As shown. The lifetime spectrum curves of the double-sided P-type TOPCon structure passivation sheets prepared in Example 3 and Comparative Example 2 are shown below. Figure 6 As shown, the technical solution of the present invention can effectively improve the effective carrier lifetime of the double-sided P-type TOPCon structure.
[0126] The passivation performance of the double-sided P-type TOPCon structure passivation sheets prepared in Examples 1-7 and Comparative Examples 1-3 was tested. The results are shown in Table 1. The test results show that selecting boron-doped silicon oxide containing carbon as the boron source layer can significantly improve the passivation performance of the P-type TOPCon structure.
[0127] Table 1. Comparison of passivation performance of the double-sided P-type TOPCon structure in the embodiments and comparative examples.
[0128]
[0129] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.
Claims
1. A boron diffusion precursor structure, characterized in that, The system comprises a first silicon oxide layer, an intrinsic polycrystalline silicon layer, and a first boron source layer disposed on a silicon substrate. The thickness of the first silicon oxide layer is 1–3 nm, the thickness of the intrinsic polycrystalline silicon layer is 20–400 nm, and the first boron source layer is made of silicon oxide containing carbon, boron, and nitrogen. The carbon doping concentration of the first boron source layer is greater than 1 × 10⁻⁶. 20 cm -3 Boron doping concentration greater than 1×10 20 cm -3 The thickness of the first boron source layer is greater than or equal to 10 nm.
2. The boron diffusion precursor structure according to claim 1, characterized in that, It also includes a second silicon oxide layer disposed between the intrinsic polysilicon layer and the first boron source layer, the thickness of the second silicon oxide layer being 0.8 to 4 nm.
3. The boron diffusion precursor structure according to claim 1, characterized in that, The intrinsic polycrystalline silicon layer contains carbon.
4. The boron diffusion precursor structure according to any one of claims 1-3, characterized in that, It also includes a second boron source layer disposed on the first boron source layer, wherein the material of the second boron source layer is boron-doped amorphous silicon, and the boron doping concentration is greater than 5 × 10⁻⁶. 20 cm -3 .
5. A P-type passivated contact structure, characterized in that, The P-type passivated contact structure is obtained by high-temperature annealing and diffusion from the boron diffusion precursor structure as described in any one of claims 1-4. The P-type passivated contact structure includes a silicon substrate, a first silicon oxide layer and a first polycrystalline silicon layer sequentially disposed on the silicon substrate, and a hydrogen-containing dielectric layer disposed on the outermost side. The silicon substrate has an inward expansion region near the surface of the first silicon oxide layer, and the first polycrystalline silicon layer has an enrichment region near the surface of the first silicon oxide layer. The first silicon oxide layer and the first polycrystalline silicon layer contain boron, carbon, and nitrogen elements. The thickness of the first silicon oxide layer is 1-3 nm, and the thickness of the first polycrystalline silicon layer is 20-400 nm.
6. The P-type passivated contact structure according to claim 5, characterized in that, The boron doping concentration in the inner expansion region is less than 2 × 10⁻⁶. 19 cm -3 Boron activation concentration less than 6×10 18 cm -3 Carbon doping concentration greater than 1×10 18 cm -3 Hydrogen doping concentration greater than 1×10 19 cm -3 .
7. The P-type passivated contact structure according to claim 5, characterized in that, The boron doping concentration of the first silicon oxide layer is less than 1×10 20 cm -3 Carbon doping concentration greater than 5×10 18 cm -3 Hydrogen doping concentration greater than 5 × 10 19 cm -3 .
8. The P-type passivated contact structure according to claim 5, characterized in that, The boron doping concentration in the enrichment region is less than 1×10⁻⁶. 20 cm -3 Boron activation concentration less than 5×10 19 cm -3 Carbon doping concentration greater than 1×10 18 cm -3 Hydrogen doping concentration greater than 1×10 19 cm -3 .
9. The P-type passivated contact structure according to claim 5, characterized in that, The material of the hydrogen-containing dielectric layer is selected from one or more stacks of alumina, silicon nitride, silicon oxynitride, and silicon oxide.
10. The P-type passivated contact structure according to any one of claims 5-9, characterized in that, It also includes a second silicon oxide layer disposed on the first polysilicon layer, the thickness of the second silicon oxide layer being 0.8 to 4 nm.
11. The P-type passivated contact structure according to claim 10, characterized in that, It also includes a second polycrystalline silicon layer disposed beneath the hydrogen-containing dielectric layer. The material of the second polycrystalline silicon layer is boron-doped polycrystalline silicon, wherein the boron activation concentration is 5 × 10⁻⁶. 19 ~4×10 20 cm -3 .
12. The P-type passivated contact structure according to claim 10, characterized in that, It also includes a first boron source layer disposed on the second silicon oxide layer, wherein the material of the first boron source layer is silicon oxide containing carbon, boron and nitrogen elements.
13. The P-type passivated contact structure according to claim 12, characterized in that, It also includes a second boron source layer disposed on the first boron source layer, wherein the material of the second boron source layer is boron-doped polycrystalline silicon.
14. A method for preparing a P-type passivated contact structure as described in any one of claims 5-13, characterized in that, Includes the following steps: A first silicon oxide layer is prepared on the surface of a silicon substrate; An intrinsic amorphous silicon layer is prepared on the first silicon oxide layer; High-temperature annealing transforms the intrinsic amorphous silicon layer into an intrinsic polycrystalline silicon layer; The second silicon oxide layer is prepared on the intrinsic polycrystalline silicon layer; this step can be omitted. The first boron source layer is prepared on an intrinsic polycrystalline silicon layer or a second silicon oxide layer using PECVD. The material is silicon oxide containing carbon, boron, and nitrogen elements. The second boron source layer is prepared on the first boron source layer by PECVD. The material is boron-doped amorphous silicon. This step can be omitted. High-temperature annealing allows carbon and boron elements to diffuse. Etching removes the boron source layer; this step can be omitted. The second polycrystalline silicon layer is prepared using boron-doped polycrystalline silicon; this step can be omitted. Preparation of hydrogen-containing dielectric layer; Perform sintering, light infusion, or dark annealing.