Sequencing chip, spatial chip and method of making the same

Abstract

This invention discloses a sequencing chip, a space chip, and a method for fabricating the same. The sequencing chip includes a first substrate, a second substrate, encapsulating adhesive, and a support pillar. The second substrate is disposed opposite to the first substrate, and the encapsulating adhesive is disposed between the first and second substrates, forming a channel. The support pillar is disposed within the channel and connects the first and second substrates. The width of the support pillar decreases along the flow direction of the channel. In the sequencing chip of this embodiment, the support pillar in the channel provides support for the channel, reducing the degree of deformation caused by negative pressure. Furthermore, the reduced width of the support pillar along the flow direction of the channel reduces eddies formed in the channel, thereby reducing the impact of eddies on sequencing and improving sequencing quality.

Description

Technical Field

[0001] This invention relates to the field of gene sequencing, and in particular to a sequencing chip, a space chip, and a method for preparing the same. Background Technology

[0002] A chip adapted to a sequencing platform is a reaction device that can hold the nucleic acid to be tested and contain a solution to provide a reaction environment or detection environment for the nucleic acid to be tested. It is also called a flow cell.

[0003] On a sequencing platform (sometimes simply called a sequencer) that uses an optical imaging system to detect chips, the sequencer images specific locations on the chip (where the nucleic acid molecule to be tested is connected, sometimes also called the reaction region or fluid channel), and then identifies and determines the base sequence of the nucleic acid molecule based on the information in these images. For example, specifically, in a platform that uses optically labeled nucleotides and performs sequencing by synthesis, the sequencer irradiates the label in the reagent solution and excites it to emit optical signals. These optical signals are then collected, for example, by taking pictures to obtain images. The base sequence is then identified and determined based on the information in these images to achieve the sequencing purpose.

[0004] In related technologies, the chip includes a substrate and a cover plate, which are encapsulated by adhesive. The channel formed between the substrate and the cover plate will deform under negative pressure, and the solution in the channel is prone to forming eddies, which will affect sequencing. Summary of the Invention

[0005] This invention provides a sequencing chip, a space chip, and a method for preparing the same.

[0006] The sequencing chip of this application includes a first substrate, a second substrate, encapsulating adhesive, and a support post. The second substrate is disposed opposite to the first substrate, the encapsulating adhesive is disposed between the first substrate and the second substrate, the encapsulating adhesive forms a channel, the support post is disposed in the channel and connects the first substrate and the second substrate, and the width of the support post decreases along the flow direction of the channel.

[0007] In the sequencing chip of this application embodiment, a support column is provided in the channel. The support column can provide support for the channel and reduce the degree of deformation caused by negative pressure. In addition, the width of the support column is reduced along the flow direction of the channel, which can reduce the eddies formed in the channel, thereby reducing the impact of eddies on sequencing and improving sequencing quality.

[0008] In some implementations, the sequencing chip includes an inlet and an outlet, which are located at opposite ends of the channel along its length and are connected to the channel. The end face of the support column facing the inlet is arc-shaped.

[0009] In some embodiments, the support columns converge to form a tip on the side facing the outlet along the direction from the inlet to the outlet.

[0010] In some implementations, the sides of the support column are streamlined along the flow direction of the channel.

[0011] In some embodiments, the area of ​​the cross section of the support column perpendicular to the thickness direction of the first plate is equal everywhere.

[0012] In some implementations, there are multiple support columns, which are spaced apart along the length of the channel.

[0013] In some implementations, the distance between two adjacent support columns along the length of the channel is L1, where 12mm≤L1≤15mm.

[0014] In some implementations, there are multiple support columns, which are spaced apart along the width of the channel.

[0015] In some implementations, the distance between two adjacent support columns along the width direction of the channel is L2, where 3mm ≤ L2 ≤ 4mm.

[0016] In some implementations, the ratio of the distance L2 between two adjacent support columns to the width W of the channel along the width direction is L2 / W, where 0.24 ≤ L2 / W ≤ 0.32.

[0017] In some implementations, there are multiple channels, which are spaced apart along the width of the sequencing chip.

[0018] In some implementations, the ends of the channel along its length are clustered together.

[0019] In some implementations, the width of the channel is W, where 12mm ≤ W ≤ 13mm.

[0020] In some embodiments, the first substrate is formed with chip units located on one side of the support post along the length of the channel, and the chip units correspond to the channel.

[0021] In some implementations, there are multiple chip units, which are spaced apart along the length of the channel.

[0022] In some embodiments, the chip cell has a first surface and a second surface disposed opposite to each other, the second surface being located between the first surface and the second substrate, and the first surface being provided with markings.

[0023] In some implementations, the labels are one or a combination of letters, numbers, and graphics.

[0024] In some implementations, the markings include direction markings and area markings.

[0025] In some implementations, there are multiple markers, which are arranged at circumferential intervals along the chip cell.

[0026] In some implementations, the markings include serial number markings.

[0027] The space chip in this application includes a substrate and chip units. The chip units are disposed on the surface of the substrate and are formed by cutting a first substrate of the sequencing chip.

[0028] In some embodiments, the chip cell has a first surface and a second surface disposed opposite to each other, the first surface being disposed on the surface of a substrate, the first surface being located between the second surface and the substrate, and the first surface being provided with markings.

[0029] In some implementations, there are multiple chip units, which are arranged at intervals on the substrate.

[0030] In some implementations, the chip cell is square.

[0031] In some implementations, the space chip includes a tag disposed on a substrate, the tag being used to record the position information of each chip unit on the sequencing chip.

[0032] In some implementations, the label is a QR code or a barcode.

[0033] In some embodiments, an adhesive layer is provided between the substrate and the chip unit.

[0034] In some implementations, the adhesive layer covers at least a portion of the surface of the chip cell.

[0035] The preparation method of this application embodiment is used to prepare a space chip, and the method includes:

[0036] Provide a substrate;

[0037] Provide a sequencing chip according to any of the above embodiments;

[0038] The first substrate of the sequencing chip is cut to obtain chip units;

[0039] The chip unit is mounted on the substrate.

[0040] In some embodiments, a sequencing chip according to any of the above embodiments is provided, comprising:

[0041] Provide the first and second boards;

[0042] The encapsulating adhesive and support pillars are placed on the second plate, and the encapsulating adhesive forms channels.

[0043] The first board and the second board are bonded together.

[0044] In some embodiments, a first plate and a second plate are provided, including:

[0045] Clean the first and second boards;

[0046] Surface treatment is performed on the first and second boards after cleaning;

[0047] The first and second boards after drying treatment.

[0048] In some embodiments, the encapsulating adhesive and support posts are disposed on the second plate, including:

[0049] Place the second sheet material on the support platform;

[0050] Place the encapsulating adhesive and support pillars on the conveying device;

[0051] The drive platform and the conveying device move relative to each other, so that the platform and the conveying device move closer to each other, thereby bringing the encapsulating glue, the support column and the second plate closer to each other;

[0052] A positioning device is used to assist in positioning the second substrate and the encapsulating adhesive.

[0053] The control pressing device adheres the encapsulating adhesive and support pillars to the second plate.

[0054] In some embodiments, bonding the first substrate to the second substrate includes:

[0055] The second and first plates, which are equipped with encapsulating adhesive and support columns, are placed on the bonding fixture;

[0056] The first and second boards are bonded together using a vacuum laminator.

[0057] In some embodiments, after bonding the first substrate to the second substrate, the method includes:

[0058] The sequencing chip, after the first and second substrates are bonded together, is subjected to pressure using a pressure-holding device.

[0059] The sequencing chip, after being held under pressure, is cured using a curing device;

[0060] The solidified sequencing chip was defoamed using a defoaming device.

[0061] In some implementations, the method includes, prior to dicing the first substrate of the sequencing chip:

[0062] Sequencing is performed using sequencing chips.

[0063] In some embodiments, the first substrate of the sequencing chip is cut, including:

[0064] At least one preset area is determined on the first plate corresponding to the channel according to the preset shape and size, and the preset area is marked.

[0065] The preset area is cut to obtain at least one chip unit.

[0066] In some embodiments, the chip cell has a first surface and a second surface disposed opposite to each other, with the second surface facing the second substrate;

[0067] The chip unit is mounted on the substrate, including:

[0068] The first surface of the chip cell is disposed on the surface of the substrate.

[0069] In some embodiments, the first surface of the chip cell is disposed on the surface of the substrate, including:

[0070] The adhesive layer is applied to the surface of the substrate;

[0071] The first surface of the chip unit is bonded to a substrate with an adhesive layer using a surface mount fixture.

[0072] In some embodiments, the adhesive layer is disposed on the surface of the substrate, including:

[0073] The substrate is placed on the support platform;

[0074] Place the adhesive layer on the conveying device;

[0075] The drive platform and the conveying device move relative to each other, so that the adhesive layer and the substrate move closer to each other;

[0076] A positioning device is used to assist in positioning the substrate and adhesive layer;

[0077] The control pressing device adheres the adhesive layer to the substrate.

[0078] In some embodiments, after the adhesive layer is applied to the surface of the substrate, the method includes:

[0079] Defoaming equipment is used to defoam the substrate with the adhesive layer.

[0080] In some embodiments, the patch fixture is formed with a first groove and a second groove intersecting the first groove, the second groove being higher than the first groove;

[0081] Using a mounting fixture to bond the first surface of a chip unit to a substrate with an adhesive layer includes:

[0082] A sequencing chip with chip units is placed in a first groove, with the first surface close to the opening of the first groove;

[0083] A substrate with an adhesive layer is placed in the second groove, with the adhesive layer surface of the substrate facing the sequencing chip.

[0084] The adhesive layer is bonded to the first surface of the chip unit on the side facing away from the substrate.

[0085] In some embodiments, there are multiple chip units, which are spaced apart along a first direction; there are also multiple second grooves, which are spaced apart along the first direction, and each second groove corresponds to at least one chip unit along the first direction; and / or,

[0086] The number of chip units is multiple, and the multiple chip units are arranged at intervals along the second direction, which intersects with the first direction. Along the second direction, a second groove corresponds to at least one chip unit.

[0087] In some embodiments, there are multiple first grooves, which are spaced apart along a first direction and / or a second direction, and each first groove intersects with at least one second groove.

[0088] In some embodiments, after the chip cells are disposed on the substrate, the method includes:

[0089] Defoaming equipment is used to defoam the substrate containing chip units;

[0090] Tags are placed on the substrate to record the position information of each chip unit on the sequencing chip.

[0091] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0092] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0093] Figure 1 This is a schematic diagram of the sequencing chip according to an embodiment of the present invention;

[0094] Figure 2 yes Figure 1 Schematic cross-sectional view along the AA direction;

[0095] Figure 3 This is a schematic diagram of the support column according to an embodiment of the present invention;

[0096] Figure 4This is a schematic diagram of the sequencing chip according to an embodiment of the present invention;

[0097] Figure 5 This is a schematic diagram of the chip unit structure according to an embodiment of the present invention;

[0098] Figure 6 This is a schematic diagram of the structure of the space chip according to an embodiment of the present invention;

[0099] Figure 7 This is a schematic diagram of the structure of the space chip according to an embodiment of the present invention;

[0100] Figure 8 This is a schematic flowchart of the method for fabricating a space chip according to an embodiment of the present invention;

[0101] Figure 9 This is a schematic flowchart of the method for fabricating a space chip according to an embodiment of the present invention;

[0102] Figure 10 This is a schematic flowchart of the method for fabricating a space chip according to an embodiment of the present invention;

[0103] Figure 11 This is a schematic flowchart of the method for fabricating a space chip according to an embodiment of the present invention;

[0104] Figure 12 This is a schematic flowchart of the method for fabricating a space chip according to an embodiment of the present invention;

[0105] Figure 13 This is a schematic flowchart of the method for fabricating a space chip according to an embodiment of the present invention;

[0106] Figure 14 This is a schematic flowchart of the method for fabricating a space chip according to an embodiment of the present invention;

[0107] Figure 15 This is a schematic flowchart of the method for fabricating a space chip according to an embodiment of the present invention;

[0108] Figure 16 This is a schematic flowchart of the method for fabricating a space chip according to an embodiment of the present invention;

[0109] Figure 17 This is a schematic diagram of the patch fixture according to an embodiment of the present invention.

[0110] Explanation of reference numerals in the attached figures: 10, sequencing chip; 11, first substrate; 12, second substrate; 13, encapsulating adhesive; 131, channel; 14, support post; 141, end face; 142, side face; 15, liquid inlet; 16, liquid outlet; 17, chip unit; 18, first surface; 181, mark; 19, second surface; 20, spatial chip; 21, substrate; 22, label; 23, adhesive layer; 30, mounting fixture; 31, first groove; 32, second groove. Detailed Implementation

[0111] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0112] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0113] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows for communication; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0114] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0115] The following disclosure provides many different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this invention, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0116] Please see Figure 1 and Figure 2 The sequencing chip 10 of this application includes a first substrate 11, a second substrate 12, an encapsulating adhesive 13, and a support post 14. The second substrate 12 is disposed opposite to the first substrate 11. The encapsulating adhesive 13 is disposed between the first substrate 11 and the second substrate 12. The encapsulating adhesive 13 forms a channel 131. The support post 14 is disposed in the channel 131 and connects the first substrate 11 and the second substrate 12. The width of the support post 14 decreases along the flow direction D of the channel 131.

[0117] In the sequencing chip 10 of this application embodiment, a support column 14 is provided in the channel 131. The support column 14 can provide support for the channel 131, reducing the degree of deformation of the channel 131 under negative pressure. In addition, the width of the support column 14 is reduced along the flow direction D of the channel 131, which can reduce the eddies formed in the channel 131, thereby reducing the impact of eddies on sequencing and improving sequencing quality.

[0118] Specifically, the first sheet 11 may be made of, for example, glass, silica, crystal, quartz glass, plastic, ceramic, PET (polyterephthalic acid), PMMA (polymethyl methacrylate), or any other suitable material. It should be understood that at least one of the second sheet 12 and the first sheet 11 is made of a light-transmitting material, including but not limited to glass and crystal.

[0119] The material of the second substrate 12 may include at least one of silicon dioxide, crystal, and quartz glass; it may also include at least one of plastic, ceramic, PET (polyterephthalic acid), and PMMA (polymethyl methacrylate); or it may be a composite material made of at least one of silicon dioxide, crystal, and quartz glass and at least one of plastic, ceramic, PET, and PMMA. It is understood that the second substrate 12 is made of one or more of the above materials. In some embodiments, the second substrate 12 is made of one of the above materials. For example, the second substrate 12 is a silicon dioxide substrate, a crystal substrate, a quartz glass substrate, etc. Of course, the second substrate 12 may also be formed by stacking multiple substrate units made of the same or different materials. In this embodiment, the stacking method may be sequentially stacked along a direction perpendicular to one surface of the substrate unit; or sequentially stacked along a direction parallel to one surface of the substrate unit. For example, the second substrate 12 is a composite substrate, including a silicon dioxide substrate unit and a quartz glass layer formed on one surface of the silicon dioxide substrate unit. When the second substrate 12 includes multiple substrate units, the number of substrate units is not strictly limited and can be adjusted according to the expected dimensions of the second substrate 12, such as its thickness.

[0120] In this embodiment, the shape of the second plate 12 can be a rectangle, square, rhombus, other polygons, or an irregular shape with an arc-shaped outer perimeter. In some embodiments, in order to match the structural setup of most sequencing platform instruments that accommodate and fix the sequencing chip 10, the overall shape of the second plate 12 is set to a rectangle.

[0121] In one embodiment, the second substrate 12 and / or the first substrate 11 are made of a light-transmitting material, enabling the optical system to acquire optical signals generated on the surface of the sequencing chip 10. This expands the types of reactions occurring on the surface of the sequencing chip 10 to include optical applications. For example, in the sequencing chip 10, when dNTPs containing fluorescent groups react with nucleic acid molecules immobilized on the surface of the sequencing chip 10, the optical system acquires the optical signals generated by the fluorescent groups on the surface of the sequencing chip 10 to identify the reaction sites and dNTP types.

[0122] Of course, it is understandable that both the second substrate 12 and the first substrate 11 are sheet-like parts made of light-transmitting material, with light-shielding treatment applied to the side that does not require light transmission. In some embodiments, when the laser emitted by the laser of the sequencing platform 10 irradiates the sequencing chip 10, particularly channel 131, through the lens, it also irradiates the encapsulating adhesive 13. The molecules in this adhesive layer 23 are thus excited to emit fluorescence, significantly interfering with the identification and detection of the target signal, i.e., the signal from the nucleic acid molecules to be tested in channel 131. To avoid this interference, the second substrate 12 is light-shielded. Light-shielding treatment can be achieved in various ways, such as forming a light-shielding coating on the bottom surface to meet the requirements of gene sequencers, especially single-molecule sequencers, for the fluorescence background characteristics of the sequencing chip 10.

[0123] In some embodiments, the second plate 12 and / or the first plate 11 are made of glass. Thus, the glass material of the second plate 12 and / or the first plate 11 improves the fluidity of the liquid, making it less likely to adhere to the interior of the sequencing chip 10, thereby improving the accuracy of the sequencing chip 10. Specifically, glass is an amorphous inorganic non-metallic material, generally made from various inorganic minerals such as quartz sand, borax, boric acid, barite, barium carbonate, limestone, feldspar, and soda ash as the main raw materials, with the addition of small amounts of auxiliary materials. Its main components are silicon dioxide and other oxides.

[0124] The encapsulating adhesive 13 may be made of at least one of the following: epoxy resin (found in epoxy adhesives), acrylic resin (found in acrylate adhesives), OCA (Optically Clear Adhesive), PSA (Pressure Sensitive Adhesive), or PI (Polyimide) double-sided tape. Thus, the encapsulating adhesive 13 can bond to at least one surface of the second substrate 12 through its adhesive properties. Specifically, the encapsulating adhesive 13 can bond the second substrate 12 and the first substrate 11. In this way, the second substrate 12 and the first substrate 11 are connected by adhesion, thereby fixing the second substrate 12 to the first substrate 11.

[0125] In some embodiments, the encapsulating adhesive 13 may be made of other materials that form a surface adhesive layer, such as PE foam double-sided tape. In this case, the encapsulating adhesive 13 can be adhered to at least one side surface of the second substrate 12 through the surface adhesive layer. It should be understood that the surface adhesive layer can be provided in the portion of the area where the encapsulating adhesive 13 is bonded to the second substrate 12, or it can be provided in all areas where the encapsulating adhesive 13 is bonded to the second substrate 12. In one embodiment, providing adhesive in all areas where the encapsulating adhesive 13 is bonded to the second substrate 12 can reduce the risk of cross-contamination of the reaction reagent solution or solution in different channels, thereby reducing the impact on the accuracy of the detection results. Furthermore, by fully bonding the encapsulating adhesive 13 to the second substrate 12, the wetting of the reagent solution in unbonded areas can be reduced, thus reducing reagent solution loss. In one embodiment, the area of ​​the encapsulating adhesive 13 is smaller than the area of ​​the second substrate 12. As an example, in the length and / or width direction of the sequencing chip 10, the two ends of the encapsulating adhesive 13 are recessed towards the middle region, leaving the two ends of the second substrate 12 empty in the length and / or width direction, i.e., the two ends of the second substrate 12 are not bonded to the encapsulating adhesive 13 in the length and / or width direction. In another embodiment, the encapsulating adhesive 13 has the same shape and size as the outer edge of the first substrate 11.

[0126] The support post 14 can be made of the same material as the encapsulating adhesive 13, and the support post 14 can be integrally cut and formed with the encapsulating adhesive 13. The channel 131 and the support post 14 can be formed by removing a portion of the encapsulating adhesive 13.

[0127] The flow direction D of channel 131 can be the length direction of sequencing chip 10, i.e., the first direction; the width direction of sequencing chip 10 can be the second direction; and the thickness direction of sequencing chip 10 can be the third direction. The first, second, and third directions are perpendicular to each other. The width of support post 14 can be the dimension of support post 14 in the second direction.

[0128] Please see Figure 1 and Figure 3 In some embodiments, the sequencing chip 10 includes an inlet 15 and an outlet 16. The inlet 15 and the outlet 16 are located at opposite ends of the channel 131 along its length and are connected to the channel 131. The end face 141 of the support column 14 facing the inlet 15 is arc-shaped.

[0129] The inlet 15 and outlet 16 can be provided on the second plate 12 and penetrate the second plate 12 along the thickness direction of the second plate 12. The solution can enter the channel 131 from the inlet 15 and exit the channel 131 from the outlet 16.

[0130] The end face 141 of the support column 14 facing the liquid inlet 15 is arc-shaped, so that the solution can be dispersed along the end face 141 of the support column 14 when it flows from the liquid inlet 15 to the support column 14, reducing the eddies formed in the channel 131.

[0131] Please see Figure 1 and Figure 3 In some embodiments, along the direction from the inlet 15 to the outlet 16, the support column 14 converges to form a tip on the side facing the outlet 16. The tip can guide the solution to flow along the length of the channel 131, while reducing the area occupied by the support column 14 in the channel 131.

[0132] Please see Figure 1 and Figure 3 In some embodiments, the side surface 142 of the support column 14 is streamlined along the flow direction D of the channel 131. For example, the side surface 142 of the support column 14 can be teardrop-shaped. This can reduce the resistance of the solution as it passes through the support column 14, which helps to reduce the eddies formed in the channel 131.

[0133] In some embodiments, the area of ​​the cross-section of the support column 14 perpendicular to the thickness direction of the first plate 11 is uniform everywhere. Furthermore, the shape and size of the cross-section of the support column 14 perpendicular to the direction from the first plate 11 to the second plate 12 can be identical everywhere. This makes the support column 14 structurally stable, and ensures that the solution flowing through the support column 14 in the channel 131 in a consistent direction perpendicular to the first plate 11 to the second plate 12, thereby reducing eddies formed in the channel 131.

[0134] Please see Figure 1 In some embodiments, there are multiple support columns 14, which are arranged at intervals along the length of the channel 131.

[0135] In this way, multiple support columns 14 can increase the support effect along the length of channel 131, further disperse the solution, reduce the eddies formed in channel 131, improve the uniformity of deformation along the length of channel 131, and thus improve sequencing quality.

[0136] Specifically, along the length of the channel 131, the number of support columns 14 can be 2, 3, 4, 5, 6, etc., and multiple support columns 14 are evenly arranged along the length of the channel 131.

[0137] Please see Figure 1 In some embodiments, the distance between two adjacent support pillars 14 along the length of channel 131 is L1, where 12mm ≤ L1 ≤ 15mm. This reduces eddies formed in the solution within channel 131 while ensuring that channel 131 meets sequencing requirements.

[0138] Please see Figure 1 In some embodiments, there are multiple support columns 14, which are arranged at intervals along the width direction of the channel 131.

[0139] In this way, multiple support columns 14 can increase the support effect in the width direction of channel 131, further disperse the solution, reduce the eddies formed in channel 131, and improve the uniformity of deformation in the length direction of channel 131, thereby improving sequencing quality.

[0140] Specifically, along the width direction of the channel 131, the number of support columns 14 can be 2, 3, 4, 5, 6, etc., and multiple support columns 14 are evenly arranged along the width direction of the channel 131.

[0141] Please see Figure 1 In some embodiments, the distance between two adjacent support pillars 14 along the width direction of channel 131 is L2, where 3mm ≤ L2 ≤ 4mm. This reduces the eddies formed in the solution within channel 131 while ensuring that channel 131 meets sequencing requirements.

[0142] Please see Figure 1 In some embodiments, along the width direction of channel 131, the ratio of the distance L2 between two adjacent support pillars 14 to the width W of channel 131 is L2 / W, where 0.24 ≤ L2 / W ≤ 0.32. This reduces eddies formed in channel 131 and also lowers the risk of high flow velocity of the solution between adjacent support pillars 14, which could affect sequencing.

[0143] Because the solution accumulates at one end of channel 131 near the outlet 16 to flow out from the outlet 16, the deformation of channel 131 near the outlet 16 is greater than the deformation at other locations of channel 131. In one embodiment, a support column 14 is provided on the side of channel 131 near the outlet 16 to reduce the deformation at the location of maximum deformation of channel 131.

[0144] In one embodiment, multiple support columns 14 can be arranged at intervals along both the length and width directions of the channel 131. In the embodiments disclosed in this application, the number of support columns 14 is 10. Along the length direction of the channel 131, four support columns 14 are arranged at intervals, and along the width direction of the channel 131, three support columns 14 are arranged at intervals. One support column 14 is located at one end of the channel 131 near the liquid outlet 16, and the central axis of the support column 14 is parallel to the axis of the end.

[0145] Please see Figure 1In some embodiments, there are multiple channels 131, and the multiple channels 131 are arranged at intervals along the width direction of the sequencing chip 10.

[0146] Thus, multiple channels 131 facilitate the simultaneous sequencing of multiple samples, thereby improving sequencing efficiency.

[0147] Specifically, the number of channels 131 can be 2, 3, 4, 5, 6, etc., and the samples in each channel 131 can be the same or different. The dimensions of each channel 131 can be exactly the same or different. In some embodiments, the channel 131 has a non-circular cross-section or an approximately rectangular cross-section, the channel 131 has a width of at least 2 mm, about 4 mm, or about 7 mm, and the height of the channel 131 can be at least 0.8 mm or about 1.2 mm.

[0148] Please see Figure 1 In some embodiments, the ends of the channel 131 along its length are clustered together.

[0149] This facilitates the dispersion of the reagent solution from the end into the channel 131, and also facilitates the aggregation of the reagent solution in the channel 131 towards the end.

[0150] Specifically, the channel 131 can have an irregular shape. For example, the channel 131 may include a middle section, a first end, and a second end. The first end and the second end are symmetrically arranged at both ends of the channel 131 along its center and are both triangular in shape, while the middle section is a long, narrow rectangle. Of course, the first end and the second end can also have different shapes; for example, the first end may form an angle, and the second end may have rounded corners. In one embodiment, the angle formed by the ends is 64.46°.

[0151] The first end, the middle section, and the second end are sequentially arranged along the length of channel 131. The middle section is used for the reagent solution to undergo the corresponding reaction; the first end can be configured as an inlet area for the reagent solution to flow into channel 131, and the second end can be configured as an outlet area for the reagent solution to exit channel 131. However, it should be understood that the positions of the first and second ends can be interchanged. Therefore, channel 131 can also be configured such that the second end is the inlet area for the reagent solution to flow into channel 131, and the first end is the outlet area for the reagent solution to exit channel 131.

[0152] Please see Figure 1 In some embodiments, the width of channel 131 is W, where 12mm ≤ W ≤ 13mm. This improves sequencing efficiency and allows the sequencing chip 10 to form larger chip units 17 to meet user sequencing needs.

[0153] Please see Figure 4 In some embodiments, the first substrate 11 is formed with a chip unit 17, which is located on one side of the support post 14 along the length direction of the channel 131 and corresponds to the channel 131.

[0154] The first substrate 11 can form a chip unit 17 after sequencing is completed by the sequencing chip 10, so that the chip unit 17 has sites, and the sites are bound to polynucleotides. The polynucleotides participate in the detection reaction as substrates, and the detection and analysis are realized through the signal generated by the detection reaction.

[0155] Please see Figure 4 In some embodiments, there are multiple chip units 17, which are arranged at intervals along the length of the channel 131. Multiple chip units 17 can meet the user's sequencing needs and improve the efficiency of spatial sequencing. The number, size, and spacing of the chip units 17 in each channel 131 can be designed according to actual requirements.

[0156] Please see Figure 2 , Figure 4 and Figure 5 In some embodiments, the chip unit 17 has a first surface 18 and a second surface 19 disposed opposite to each other, the second surface 19 being located between the first surface 18 and the second substrate 12, and the first surface 18 being provided with a mark 181.

[0157] By setting a marker 181 on the first surface 18, the position of each chip unit 17 on the first substrate 11 can be obtained. The site information in the chip unit 17 includes the location information of the site and the barcode sequence corresponding to each location. Thus, when the space chip 20 performs biochemical detection, the site information in the chip unit 17 can be quickly obtained through the marker 181, thereby obtaining the corresponding barcode sequence through the location of the site, and then analyzing the sample to be tested based on each unique barcode sequence to achieve space omics detection. In one embodiment, the first surface 18 also includes markers 181 for distinguishing different regional sites.

[0158] Please see Figure 5 In some implementations, the mark 181 is one or a combination of letters, numbers, and graphics. For example, a single letter mark 181, a single number mark 181, a single graphic mark 181, or a mark 181 containing both letters and numbers, or both letters and graphics, or both numbers and graphics, may be used. Alternatively, a mark 181 containing both letters, numbers, and graphics may be used.

[0159] Please see Figure 5In some embodiments, the marking 181 includes a direction marking 181 and a region marking 181. The direction marking 181 is used to indicate the orientation of the chip unit 17 on the first substrate 11, so that the site information on each first surface 18 can be accurately determined during subsequent detection. In one embodiment, the direction marking 181 may be an arrow marking 181 or other directional marking 181 to indicate the direction of the chip unit 17.

[0160] Please see Figure 5 In some embodiments, there are multiple markers 181, and the multiple markers 181 are arranged at circumferential intervals along the chip cell 17.

[0161] A chip unit 17 may be provided with one or more orientation marks 181. The orientation marks 181 are located on the first surface 18 at the outer edge of the region of the location, i.e., the edge region of the first surface 18. For example, when the chip unit 17 is a rectangular chip, the orientation marks 181 can be set in the region of one or more right angles on the first surface 18 to quickly identify the orientation of the chip unit 17.

[0162] In some embodiments, each chip unit 17 may include one or more region markers 181. When a region marker 181 is set on the first surface 18 of a chip unit 17, for each detection reaction in the reaction area, the position must be calibrated based on the region marker 181 to determine the site information of the reaction area (including the site location information and the barcode sequence corresponding to each location information), and then the corresponding detection reaction signal or result can be obtained and analyzed.

[0163] Therefore, in some embodiments, the first surface 18 is provided with multiple region markers 181. By providing multiple region markers 181, different regions of the first surface 18 of the chip unit 17 can be marked 181 respectively. This allows the relative or absolute position of the reaction region in the chip unit 17 to be quickly determined using the region markers 181 when a detection reaction is performed on the first surface 18 of the chip unit 17, thereby obtaining the corresponding site information. This method can quickly perform region calibration based on the current region markers 181 when a detection reaction is performed using the chip unit 17, quickly determine the site information of the region (including the location information of the site and the barcode sequence corresponding to each location information), and obtain the corresponding detection reaction signal or result, avoiding the tedious calibration based on a single marker 181 for each reaction.

[0164] In this embodiment of the application, when multiple area markers 181 are provided on the first surface 18, the multiple area markers 181 can be represented by different marker 181 graphics, such as: using different letters / numbers (including using different letters and / or uppercase and lowercase, such as A, B, C, D, a, b, c, d, etc.), different patterns such as circles, triangles, rectangles, squares, ellipses or other polygons, etc., or different letters and patterns, etc.; of course, the marker 181 images can also be distinguished by setting different arrangement angles relative to one direction on the first surface 18 (such as the orientation of the apex angle of a non-equilateral triangle, etc.), and can also be distinguished by using different numbers of marker 181 graphics (such as a square or triangle or circle, two squares or triangles or circles arranged according to a certain arrangement rule, etc.).

[0165] In some embodiments, multiple region markers 181 are distributed dispersedly near the outer edge of the chip unit 17. In some embodiments, the chip unit 17 is a polygon, such as a rectangle, and the multiple region markers 181 are evenly distributed in a direction parallel to each side of the polygon. In one embodiment, to facilitate rapid identification, the type of region marker 181 is different for markers 181 set on different sides, such as using circular, triangular, square, and rectangular markers 181 for the four sides of a rectangle, or using different shapes or different numbers of the same shape for marking 181. In another embodiment, the chip unit 17 is circular or elliptical, and the region markers 181 are evenly distributed along the trajectory of the adjacent outer edge. By evenly distributing multiple region markers 181, the speed of locating the detection area is improved, thereby improving the efficiency of the spatial chip 20 in detection response and analysis.

[0166] Please see Figure 5 In some embodiments, the mark 181 includes a serial number mark 181, which is used to mark the arrangement order of chip units 17 on the first substrate 11.

[0167] Please see Figure 2 and Figure 6 The space chip 20 in this embodiment includes a substrate 21 and a chip unit 17. The chip unit 17 is disposed on the surface of the substrate 21 and is formed by cutting the first plate material 11 of the sequencing chip 10.

[0168] Specifically, the substrate 21 can support the chip units 17, and it typically has a flat surface to allow each chip unit 17 to be distributed flatly on its surface. The material of the substrate 21 is not strictly limited; it can be an inorganic material, such as silicon dioxide, silicon nitride, silicon, quartz, glass, ceramics, etc., or an organic material, such as a polymer substrate 21, PET (polyterephthalic acid), PMMA (polymethyl methacrylate), etc.

[0169] In some embodiments, the substrate 21 is selected to have a light transmittance greater than or equal to 90%, such as transparent glass. Therefore, when the resulting spatial chip 20 is used for optical detection, the substrate 21 can be kept away from interfering with the detection signal.

[0170] In some embodiments, the thickness of the substrate 21 is 0.5mm to 1.5mm. For example, the thickness of the substrate 21 can be 0.5mm±0.05mm, 0.6mm±0.05mm, 0.7mm±0.05mm, 0.8mm±0.05mm, 0.9mm±0.05mm, 1.0mm±0.05mm, 1.1mm±0.05mm, 1.2mm±0.05mm, 1.3mm±0.05mm, 1.4mm±0.05mm, 1.5mm±0.05mm, etc. When the thickness of the substrate 21 is within this range, it is beneficial for fixing the space chip 20 in the carrier. At the same time, it is beneficial for optical focusing and optical imaging when performing optical signal acquisition on the space chip 20.

[0171] The shape of the substrate 21 is not strictly limited. In one possible implementation, the substrate 21 is rectangular, and at least one of the four right angles of the rectangular structure is chamfered.

[0172] The chamfer in this embodiment can be, but is not limited to, a bevel and / or a rounded corner. A bevel is sometimes referred to as a chamfer; a rounded corner is sometimes referred to as a rounded corner or a circular chamfer. In some embodiments, two adjacent sides of the substrate 21 are connected by line segments to replace the original right angle, forming a bevel. It should be understood that the number of line segments forming the bevel can be one, two, or more. When multiple line segments form the bevel, they are connected sequentially to form a regular or irregular line, and the two ends of the regular or irregular line are respectively connected to the endpoints of the two adjacent sides of the rectangular substrate 21 where the chamfer is located. In some embodiments, a rounded corner is formed by connecting the endpoints of two adjacent sides of the rectangular substrate 21 with arcs to replace the original right angle. It should be understood that the number of arcs forming the rounded corner can be one, two, or more. When there are multiple arcs forming a rounded corner, the multiple arcs are connected in sequence to form a regular or irregular curve, and the two ends of the regular or irregular curve are respectively connected to the endpoints of the two adjacent sides of the chamfered corner in the rectangular substrate 21.

[0173] In some embodiments, three right angles of the substrate 21 are rounded, and one right angle is chamfered. This enhances the identifiability of the directional positioning of the substrate 21.

[0174] Please see Figure 5 and Figure 7In some embodiments, the chip unit 17 has a first surface 18 and a second surface 19 disposed opposite to each other. The first surface 18 is disposed on the surface of the substrate 21 and is located between the second surface 19 and the substrate 21. The first surface 18 is provided with a mark 181.

[0175] The second surface 19 is located on the side of the chip unit 17 away from the substrate 21, so that the polynucleotides are located on the outside of the spatial chip 20, which facilitates spatial omics analysis.

[0176] In some embodiments, there are multiple chip units 17, which are arranged at intervals on the substrate 21.

[0177] Specifically, multiple chip units 17 can originate from the same sequencing chip 10 or from different sequencing chips 10. The number and density of chip units 17 on the substrate 21 can be determined based on actual needs. In some embodiments, the distance between adjacent chip units 17 is greater than or equal to 1 mm. By setting an appropriate distance between adjacent chip units 17, mutual reaction interference can be avoided during detection reactions, and detection crosstalk can be avoided when acquiring or detecting signals from the chip units 17 after the reaction.

[0178] In some implementations, the chip unit 17 is square, which makes it more suitable for user needs. In this embodiment, the chip unit 17 has a size of 10mm × 10mm.

[0179] Please see Figure 6 In some embodiments, the spatial chip 20 includes a tag 22 disposed on the substrate 21. The tag 22 is used to record the position information of each chip unit 17 on the sequencing chip 10. In some embodiments, the tag 22 is a QR code or barcode, or other markings or descriptions that can be associated with computer-stored information. By scanning the QR code or barcode, the location of the sites contained within the chip unit 17 and the unique barcode sequence corresponding to each location can be quickly obtained.

[0180] Please see Figure 7In some embodiments, an adhesive layer 23 is provided between the substrate 21 and the chip unit 17, and the chip unit 17 is fixed by the adhesive effect of the adhesive layer 23. In some embodiments, the adhesive layer 23 can cover the entire first surface 18 to completely bond the first surface 18 to the surface of the substrate 21. In other embodiments, the adhesive layer 23 can also be provided in a partial area of ​​the first surface 18 to partially bond the first surface 18 to the surface of the substrate 21. It should be understood that, under the premise of using the same adhesive material and bonding method, the larger the bonding area, the stronger the bond between the first surface 18 and the substrate 21. When the adhesive layer 23 is provided in a partial area of ​​the first surface 18, the area where the adhesive layer 23 is provided can be an edge area, or several bonding areas uniformly or non-uniformly distributed on the adhesive layer 23.

[0181] In some embodiments, the adhesive layer 23 is selected from materials with a light transmittance greater than or equal to 90%, such as optical adhesives. Thus, the resulting spatial chip 20 can be used for optical detection without being affected by the light transmittance of the adhesive layer 23. For example, the adhesive layer 23 is selected from at least one of transparent double-sided tape, epoxy adhesives such as epoxy resin, and acrylate adhesives such as acrylic resin.

[0182] Please see Figure 8 The preparation method of this application embodiment is used to prepare a space chip 20, and the method includes:

[0183] S100 provides a substrate 21;

[0184] S200, providing the sequencing chip 10 of any of the above embodiments;

[0185] S300, the first substrate 11 of the sequencing chip 10 is cut to obtain chip unit 17;

[0186] S400, chip unit 17 is disposed on substrate 21.

[0187] In step S100, the substrate 21 can be cut so that the cut substrate 21 is rectangular and at least one of the four right angles of the rectangle is chamfered, so as to enhance the recognizability of the orientation of the substrate 21.

[0188] In step S200, the sequencing chip 10 includes a first substrate 11, a second substrate 12, an encapsulating adhesive 13, and a support post 14. The second substrate 12 is disposed opposite to the first substrate 11. The encapsulating adhesive 13 is disposed between the first substrate 11 and the second substrate 12 and forms a channel 131. The support post 14 is disposed in the channel 131 and connects the first substrate 11 and the second substrate 12. Along the flow direction D of the channel 131, the width of the support post 14 decreases perpendicular to the flow direction D.

[0189] In step S300, the first plate 11 can be cut into a preset size using laser cutting.

[0190] In step S400, the chip unit 17 can be disposed on the surface of the substrate 21 in the thickness direction.

[0191] Please see Figure 9 In some embodiments, the sequencing chip 10 of any of the above embodiments is provided (step S200), including:

[0192] S210, providing a first plate 11 and a second plate 12;

[0193] S220, the encapsulating adhesive 13 and the support post 14 are placed on the second plate 12, and the encapsulating adhesive 13 forms a channel 131;

[0194] S230, the first plate 11 and the second plate 12 are bonded together.

[0195] In step S210, the first plate 11 and the second plate 12 can be cut so that the cut first plate 11 and the second plate 12 have the same shape and size.

[0196] In step S220, before setting the encapsulating adhesive 13 and the support post 14 on the second plate 12, the encapsulating adhesive 13 can be cut to form channels 131 and support posts 14 in the encapsulating adhesive 13.

[0197] In step S230, the first plate 11 and the second plate 12 can be bonded by pressure or by vacuum bonding.

[0198] Please see Figure 10 In some embodiments, providing a first plate 11 and a second plate 12 (step S210) includes:

[0199] S211, Clean the first plate 11 and the second plate 12;

[0200] S212, Surface treatment is performed on the first plate 11 and the second plate 12 after cleaning;

[0201] S213, the first board 11 and the second board 12 after drying treatment.

[0202] In step S211, the cleaning can be immersion cleaning, ultrasonic cleaning, plasma cleaning, etc., the purpose of which is to remove impurities on the first plate 11 and the second plate 12, so as to provide a clean surface for subsequent surface treatment.

[0203] In step S212, since the first substrate 11 and the second substrate 12 of the sequencing chip 10 are the core components of the entire sequencing chip 10, the main function of the first substrate 11 and the second substrate 12 is to capture DNA through specific surface properties, then allow the DNA to react with the biochemical sequencing reagents in the sequencing chip 10, and finally the instrument detects the signal on the first substrate 11 or the second substrate 12. The performance of the first substrate 11 and the second substrate 12 directly affects the biochemical reaction effect and the test results. Therefore, the surface treatment of the first substrate 11 and the second substrate 12 is one of the most important steps.

[0204] Specifically, the surface treatment of the first substrate 11 and the second substrate 12 can be performed using chemical vapor deposition. This treatment method ensures that the required functional groups are uniformly distributed on the surfaces of the first substrate 11 and the second substrate 12 of the sequencing chip 10. The surface treatment effect, depending on specific needs, can create hydrophilic or hydrophobic surfaces, or specific functional groups such as hydroxyl, carboxyl, ether, aldehyde, and carbonyl groups. The purpose is to effectively connect and immobilize the NDA, while simultaneously enabling the biochemical sequencing reagents to react more effectively within the flow channel. The surface treatment temperature range is 25℃ to 50℃, and the surface treatment time is 5 min to 60 min.

[0205] The surface treatment methods for the first plate 11 and the second plate 12 can also be liquid phase immersion, surface spin coating, surface spraying, etc.

[0206] In step S213, nitrogen gas can be used to remove moisture from the first plate 11 and the second plate 12, thereby reducing the oxidation of the first plate 11 and the second plate 12.

[0207] Please see Figure 11 In some embodiments, the encapsulating adhesive 13 and the support post 14 are disposed on the second plate 12 (step S220), including:

[0208] S221, Place the second plate 12 on the support platform;

[0209] S222, the encapsulating adhesive 13 and the support column 14 are placed on the conveying device;

[0210] S223, drive the bearing platform and the conveying device to move relative to each other, so that the bearing platform and the conveying device move closer to each other, thereby driving the encapsulating glue 13, the support column 14 and the second plate 12 to move closer to each other;

[0211] S224, using a positioning device to assist in positioning the second plate 12 and the encapsulating adhesive 13;

[0212] S225, the control pressing device adheres the encapsulating adhesive 13 and the support column 14 to the second plate 12.

[0213] In this way, by driving the conveying device and the carrying platform to move relative to each other, and using the positioning device to assist the second plate 12 in precise positioning with the encapsulating adhesive 13 and the support column 14, the bonding accuracy of the encapsulating adhesive 13 and the support column 14 with the second plate 12 after being pressed by the pressing device is improved, thereby reducing the defects of the second plate 12, the encapsulating adhesive 13 and the support column 14.

[0214] Specifically, in step S221, the support platform can provide support for the second plate 12. The support platform has an installation position, and the support platform can generate negative pressure to adsorb the second plate 12 at the installation position. The surface shape of the support platform is not strictly limited; for example, the support platform can be approximately a rectangular plate structure.

[0215] In step S222, the conveying device is provided with an installation position, and the conveying device can generate negative pressure to adsorb the encapsulating adhesive 13 and the support column 14 at the installation position.

[0216] In step S223, the conveying device can move or rotate to transport the encapsulating adhesive 13 and the support column 14 from the loading position away from the support platform to the bonding position close to the support platform. The distance between the conveying device and the support platform can be adjusted according to actual needs.

[0217] In step S224, the positioning device may include a camera and a display screen, which may be located above the support platform. The conveying device may be located between the support platform and the positioning device. Positioning may involve diagonally aligning the encapsulating adhesive 13 and the second sheet material 12 to ensure bonding accuracy.

[0218] In step S225, the pressing device can be a rolling pressing roller or a pressing plate structure. The pressing device can roll along the length of the supporting platform or move up and down along the height of the supporting platform, so that the second plate 12 is firmly bonded to the encapsulating adhesive 13 and the support column 14. During bonding, the film of the encapsulating adhesive 13 can be peeled off first, and then the encapsulating adhesive 13 and the support column 14 are bonded to the second plate 12 with the film on one side.

[0219] Please see Figure 12 In some embodiments, bonding the first plate 11 to the second plate 12 (step S230) includes:

[0220] S231, the second plate 12 and the first plate 11, which are provided with encapsulating adhesive 13 and support column 14, are placed on the bonding fixture;

[0221] S232, the first board 11 and the second board 12 are bonded together using a vacuum bonding machine.

[0222] In step S231, the bonding fixture can be located on the support platform of the vacuum bonding machine. The bonding fixture has an installation space. The second plate 12 is placed in the installation space, and the first plate 11 is located on the side of the second plate 12 away from the support platform. Alternatively, the first plate 11 can be placed in the installation space, and the second plate 12 can be located on the side of the first plate 11 away from the support platform.

[0223] In step S232, the bonding principle of the vacuum bonding machine is to place the second board 12 and the first board 11 in a vacuum chamber in a vacuum environment, and use the cylinder pressure of the machine to lower the inner mold of the vacuum cylinder to completely press the glass cover plate and the LCD screen placed in the lower mold of the vacuum cylinder together.

[0224] The vacuum level during lamination can range from 10 Pa to 50 Pa, such as 10 Pa, 20 Pa, 30 Pa, 40 Pa, and 50 Pa. The air pressure can range from 0.05 MPa to 0.1 MPa, such as 0.05 MPa, 0.06 MPa, 0.07 MPa, 0.08 MPa, 0.09 MPa, and 0.1 MPa. The lamination time can range from 10 seconds to 30 seconds, such as 10 seconds, 15 seconds, 20 seconds, 25 seconds, and 30 seconds. Parameters can be set according to different vacuum laminators, and the lamination pressure can be around 50 N, such as 45 N, 47 N, 49 N, 51 N, 53 N, and 55 N.

[0225] Please see Figure 12 In some embodiments, after bonding the first plate 11 and the second plate 12, the method includes:

[0226] S233, the sequencing chip 10 after the first plate 11 and the second plate 12 are bonded together is pressurized using a pressure holding device;

[0227] S234, The sequencing chip 10 after pressure holding is cured using a curing device;

[0228] S235, the solidified sequencing chip 10 is defoamed using a defoaming device.

[0229] In step S233, the holding pressure and holding time can be determined based on the actual holding effect, so that the encapsulating adhesive 13 and the support pillar 14 are not subjected to excessive impact during the holding process, which could cause the encapsulating adhesive 13 and the support pillar 14 to burst. At the same time, a certain holding pressure is applied to re-press the sequencing chip 10, removing some large air bubbles formed when the first plate 11 and the second plate 12 are bonded, or turning large air bubbles into small air bubbles. In one embodiment, the holding pressure is 0.3 MPa and the holding time is 30 seconds.

[0230] In step S234, the curing time and curing power can be determined based on the curing energy of the encapsulating adhesive 13 and the support pillar 14, as well as the power of the curing equipment. In one embodiment, the curing time is 20 seconds, the curing power is 90%, and the energy of the curing equipment is greater than 7000 mJ / cm². 2 .

[0231] In step S235, the cured sequencing chip 10 is defoamed to remove small air bubbles after pressure curing. In one embodiment, the defoaming time is 15 minutes and the defoaming pressure is 0.45 MPa.

[0232] In some embodiments, the method includes, prior to cutting the first substrate 11 of the sequencing chip 10:

[0233] Sequencing was performed using sequencing chip 10.

[0234] When sequencing the sequencing chip 10, the sample to be tested and reagents are first injected into channel 131, and then the sequencing chip 10 is placed into the sequencer for sequencing. After sequencing is completed, the used reaction solution is discharged from channel 131.

[0235] Please see Figure 13 In some embodiments, the first substrate 11 of the sequencing chip 10 is cut (step S300), including:

[0236] S310, at least one preset area is determined on the first plate 11 corresponding to the channel 131 according to the preset shape and size, and the preset area is marked.

[0237] S320, the preset area is cut to obtain at least one chip unit 17.

[0238] In step S310, at least one preset region is formed on the surface of the sequencing chip 10 according to the shape and size of the chip unit 17 to be obtained. It should be understood that the chip obtained from the preset region in this embodiment corresponds to the chip unit 17 that constitutes the spatial chip 20 mentioned above. That is, the preset region is the area on the sequencing chip 10 that corresponds to the chip unit 17 in the spatial chip 20 before it has been completely cut. Therefore, the preset chip defined by the preset region also includes a first surface 18 and a second surface 19, with the surface containing the site being used as the second surface 19.

[0239] In some embodiments, when one or more preset regions are defined on the surface of the sequencing chip 10 according to a preset shape and size, the distance between adjacent preset regions is greater than or equal to 1 mm. Examples include distances greater than or equal to 2 mm, 3 mm, 4 mm, 5 mm, 6 mm, 7 mm, 8 mm, and 9 mm. In this case, when a preset region is removed from the sequencing chip 10, interference with adjacent preset regions can be reduced, mitigating the impact on the integrity and function of the preset regions. It should be understood that the greater the distance between adjacent preset regions, the smaller the impact on each other, but the utilization rate of the chip unit 17 prepared using the sequencing chip 10 is correspondingly reduced. In some embodiments, the distance between adjacent preset regions is greater than or equal to 9 mm. When the distance between adjacent preset regions meets this requirement, multiple adjacent preset regions can be simultaneously extracted without causing interference.

[0240] The method provided in this application includes a step of marking a predetermined region. By setting a marker 181 on the surface where the polynucleotide is located, the arrangement direction and origin of the chip unit 17 defined by the predetermined region can be obtained, thereby obtaining the site information in the chip unit 17. The site information of the chip unit 17 includes the location information of the site and the barcode sequence corresponding to each location information. Therefore, when the obtained chip unit 17 is used for space omics, the site information in the chip unit 17 can be quickly obtained through the marker 181 when performing biochemical detection using a space chip 20, thus realizing space omics detection.

[0241] In some implementations, the marking 181 formed by the marking process can refer to the type and manner of the marking 181 on the surface of the chip cell 17 described above.

[0242] In step S320, the preset region is separated from the sequencing chip 10 by laser cutting according to the preset cutting line. This yields the chip unit 17 that constitutes the spatial chip 20 mentioned above. The resulting chip unit 17 includes a first substrate 11, which has a first surface 18 and a second surface 19 opposite to the first surface 18, with the site located on the second surface 19.

[0243] In some embodiments, the chip unit 17 has a first surface 18 and a second surface 19 disposed opposite to each other, with the second surface 19 facing the second substrate 12;

[0244] The chip unit 17 is disposed on the substrate 21, including:

[0245] The first surface 18 of the chip unit 17 is disposed on the surface of the substrate 21.

[0246] When the chip unit 17 is disposed on the surface of the substrate 21, a certain space is reserved between the edge of the chip unit 17 and the substrate 21 to avoid wear or damage to the edge of the chip unit 17 and to avoid loss of site data. In some embodiments, the reserved space between the edge of the chip unit 17 and the substrate 21 can prevent wear or damage to the edge of the chip unit 17 during preparation, storage, or transportation, and to avoid loss of site data. In some embodiments, the distance between the edge of the chip unit 17 and the edge of the substrate 21 is greater than or equal to 1 mm. For example, the distance between the edge of the chip unit 17 and the edge of the substrate 21 is greater than or equal to 1 mm, 2 mm, 3 mm, 4 mm, 5 mm, 6 mm, etc., and is not limited thereto. In some embodiments, the distance between the edge of an adjacent chip unit 17 and the edge of the substrate 21 is one-quarter or more of the length of the chip unit 17 in that distance direction.

[0247] Please see Figure 14 In some embodiments, the first surface 18 of the chip unit 17 is disposed on the surface of the substrate 21, including:

[0248] S410, the adhesive layer 23 is disposed on the surface of the substrate 21;

[0249] S420, the first surface 18 of the chip unit 17 is bonded to the substrate 21 with the adhesive layer 23 using the mounting fixture 30.

[0250] In step S410, the adhesive layer 23 can be cut into a preset shape and size, and then the cut adhesive layer 23 can be placed on the surface of the substrate 21.

[0251] In step S420, before bonding the first surface 18 of the chip unit 17 to the adhesive layer 23, the first surface 18 can be wiped clean to reduce the impact of surface impurities on the bonding effect.

[0252] Please see Figure 15 In some embodiments, the adhesive layer 23 is disposed on the surface of the substrate 21 (step S410), including:

[0253] S411, the substrate 21 is placed on the support platform;

[0254] S412, Place the adhesive layer 23 on the conveying device;

[0255] S413, drive the carrier platform and the conveying device to move relative to each other, so that the carrier platform and the conveying device move closer to each other, thereby driving the adhesive layer 23 and the substrate 21 to move closer to each other;

[0256] S414, the positioning device is used to assist in positioning the substrate 21 and the adhesive layer 23;

[0257] S415, control the pressing device to bond the adhesive layer 23 to the substrate 21.

[0258] In this way, by driving the conveying device and the carrying platform to move relative to each other, and using the positioning device to assist in the precise positioning of the substrate 21 and the adhesive layer 23, the bonding accuracy of the adhesive layer 23 and the substrate 21 after being pressed by the pressing device is improved, thereby reducing defects in the substrate 21 and the adhesive layer 23.

[0259] Specifically, in step S411, the support platform can provide support for the substrate 21. The support platform has a mounting position, and the support platform can generate a negative pressure to adsorb the substrate 21 at the mounting position. The surface shape of the support platform is not strictly limited; for example, the support platform can be approximately a rectangular plate structure.

[0260] In step S412, the conveying device is provided with an installation position, and the conveying device can generate negative pressure to adsorb the adhesive layer 23 at the installation position.

[0261] In step S413, the conveying device can move or rotate to transport the adhesive layer 23 from a loading position away from the support platform to a bonding position closer to the support platform. The distance between the conveying device and the support platform can be adjusted according to actual needs.

[0262] In step S414, the positioning device may include a camera and a display screen, which may be located above the support platform. The conveying device may be located between the support platform and the positioning device. Positioning may involve diagonally aligning the adhesive layer 23 and the substrate 21 to ensure bonding accuracy.

[0263] In step S415, the pressing device can be a rolling pressing roller or a pressing plate structure. The pressing device can roll along the length of the support platform or move up and down along the height of the support platform, so that the substrate 21 and the adhesive layer 23 are firmly bonded together. During bonding, the film of the adhesive layer 23 can be peeled off first, and then the adhesive layer 23 is bonded to the substrate 21 with the side of the film.

[0264] In some embodiments, after the adhesive layer 23 is disposed on the surface of the substrate 21, the method includes:

[0265] The substrate 21 with the adhesive layer 23 is defoamed using a defoaming device.

[0266] In this way, air bubbles generated when the adhesive layer 23 is bonded to the substrate 21 can be removed, the adhesion between the adhesive layer 23 and the substrate 21 can be increased, and the structural stability of the space chip 20 can be improved.

[0267] Specifically, the defoaming process can be performed by placing the substrate 21 with the adhesive layer 23 in a defoaming machine and performing a defoaming operation for 3 minutes at a temperature of 40°C and an air pressure of 0.45 MPa.

[0268] Please see Figure 16 In some embodiments, the patch fixture 30 is formed with a first groove 31 and a second groove 32 intersecting the first groove 31, the second groove 32 being higher than the first groove 31;

[0269] The first surface 18 of the chip unit 17 is bonded to the substrate 21 with the adhesive layer 23 using the bonding jig 30 (step S420), including:

[0270] S421, the sequencing chip 10 with chip unit 17 is placed in the first groove 31, and the first surface 18 is close to the groove opening of the first groove 31.

[0271] S422, the substrate 21 with adhesive layer 23 is placed in the second groove 32, with the surface of the substrate 21 with adhesive layer 23 facing the sequencing chip 10;

[0272] S423, the side of the adhesive layer 23 facing away from the substrate 21 is bonded to the first surface 18 of the chip unit 17.

[0273] The first groove 31 can extend along the length direction of the patch fixture 30, and the second groove 32 can extend along the width direction of the patch fixture 30. The first groove 31 can position the sequencing chip 10, and the second groove 32 can position the substrate 21, so as to achieve precise control of the relative position between the substrate 21 and the chip unit 17.

[0274] In step S421, the distance between the bottom surface of the first groove 31 and the opening of the second groove 32 can be less than the thickness of the sequencing chip 10, so that the first surface 18 of the chip unit 17 is higher than the opening of the first groove 31, which facilitates the bonding of the substrate 21 and the chip unit 17.

[0275] In step S422, the chip unit 17 can be stably bonded to the substrate 21 by pressing or other means.

[0276] In some embodiments, there are multiple chip units 17, which are spaced apart along a first direction; there are also multiple second grooves 32, which are spaced apart along the first direction, and each second groove 32 corresponds to at least one chip unit 17 along the first direction; and / or,

[0277] The number of chip units 17 is multiple, and the multiple chip units 17 are arranged at intervals along the second direction, which intersects with the first direction. Along the second direction, a second groove 32 corresponds to at least one chip unit 17.

[0278] The first direction can be the length direction of the sequencing chip 10, and the second direction can be the width direction of the sequencing chip 10.

[0279] The substrate 21 may be bonded to at least one chip unit 17 in the first direction at once, or the substrate 21 may be bonded to at least one chip unit 17 in the second direction at once, or the substrate 21 may be bonded to at least one chip unit 17 in the first direction and the second direction simultaneously at once.

[0280] In one embodiment, there are 6 chip units 17, which are arranged at intervals along a first direction. There are 3 second grooves 32, which are arranged at intervals along the first direction. Along the first direction, each second groove 32 corresponds to 2 chip units 17. In this way, the substrate 21 can be bonded to 1 or 2 chip units 17 in the first direction at one time.

[0281] In one embodiment, the number of chip units 17 is 3, and the 3 chip units 17 are arranged at intervals along the second direction. Along the second direction, a second groove 32 corresponds to the 3 chip units 17. In this way, the substrate 21 can be bonded to 1, 2 or 3 chip units 17 in the second direction at one time.

[0282] In one embodiment, there are 8 chip units 17 arranged in a rectangular array along a first direction and a second direction. Along the first direction, 4 chip units 17 are arranged at intervals, and along the second direction, 2 chip units 17 are arranged at intervals. There are 2 second grooves 32 arranged at intervals along the first direction. Each second groove 32 corresponds to 4 chip units 17. In this way, the substrate 21 can be bonded to 1, 2, 3 or 4 chip units 17 at a time.

[0283] In some embodiments, there are multiple first grooves 31, which are arranged at intervals along a first direction and / or a second direction, and each first groove 31 intersects with at least one second groove 32.

[0284] The number of first grooves 31 is the same as the number of chip units 17 in the second direction. In one embodiment, three chip units 17 are arranged at intervals along the second direction, and there are three first grooves 31. The three first grooves 31 are arranged at intervals along the first and second directions. The three chip units 17 are a, b, and c from one end to the other in the second direction, and the three first grooves 31 are A1, B1, and C1 from one end to the other in the second direction. When the sequencing chip 10 is placed into the three first grooves 31 A1, B1, and C1 in sequence, a in A1, b in B1, and c in C1 are on the same straight line and arranged along the second direction. This allows the three substrates 21 to be bonded to one chip unit 17 in each of the three first grooves 31, and the three chip units 17 are in the same position on the three substrates 21.

[0285] The number of first grooves 31 can be multiple or there can be only one first groove 31. Multiple mounting positions are formed in one first groove 31, and the chip unit 17 is placed in the mounting position.

[0286] Combination Figure 17 In one embodiment, there are eight chip units 17, which are arranged in a 4×2 matrix (2 columns and 4 rows) along the first and second directions. There is one first groove 31, which has four mounting positions. The four mounting positions are arranged in a 2×2 matrix along the first and second directions, and the four mounting positions are A2, B2, C2, and D2. A2, B2 and C2, D2 are arranged along the second direction, and A2, C2 and B2, D2 are arranged along the first direction. When the sequencing chip 10 is in A2, the second column of chip units 17 coincides with the first column of chip units 17 when the sequencing chip 10 is in B2. Similarly, when the sequencing chip 10 is in C2, the second column of chip units 17 coincides with the first column of chip units 17 when the sequencing chip 10 is in D2. There are four second grooves 32, which are arranged at intervals along the first direction. Two of the second grooves 32 intersect with A2 and B2 and correspond to the chip units 17 in the first and third rows, respectively. The other two second grooves 32 intersect with C2 and D2 and correspond to the chip units 17 in the second and fourth rows, respectively. This allows the sequencing chip 10 to be positioned in A2, with the two substrates 21 located in the two second grooves 32 respectively bonded to the chip units 17 in the second column of the first row and the second column of the third row; in B2, with the two substrates 21 located in the two second grooves 32 respectively bonded to the chip units 17 in the first column of the first row and the first column of the third row; in C2, with the two substrates 21 located in the two second grooves 32 respectively bonded to the chip units 17 in the second column of the second row and the second column of the fourth row; and in D2, with the two substrates 21 located in the two second grooves 32 respectively bonded to the chip units 17 in the first column of the second row and the first column of the fourth row, and each chip unit 17 is positioned in the same position on the substrate 21.

[0287] Please see Figure 8 In some embodiments, after the chip unit 17 is disposed on the substrate 21, the method includes:

[0288] S500, the substrate 21 with chip unit 17 is debubbled using a debubbling device;

[0289] S600, a tag 22 is set on the substrate 21. The tag 22 is used to record the position information of each chip unit 17 on the sequencing chip 10.

[0290] In step S500, the substrate 21 with chip unit 17 can be placed in a debubbling machine and debubbling is performed under preset conditions. This can remove the air bubbles generated when the adhesive layer 23 is bonded to the chip unit 17, increase the adhesion between the adhesive layer 23 and the chip unit 17, and improve the structural stability of the space chip 20.

[0291] In step S600, the label 22 can be attached to the surface of the substrate 21 where the chip unit 17 is located by double-sided adhesive, or it can be etched onto the surface of the substrate 21 where the chip unit 17 is located by laser etching.

[0292] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0293] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A sequencing chip, characterized in that, include: First board material; The second material is disposed opposite to the first material. An encapsulating adhesive is disposed between the first substrate and the second substrate, and the encapsulating adhesive forms a channel; and A support column is disposed in the channel and connects the first plate and the second plate. The width of the support column decreases along the flow direction of the channel.

2. The sequencing chip according to claim 1, characterized in that, The sequencing chip includes an inlet and an outlet, the inlet and the outlet being located at opposite ends of the channel along its length and communicating with the channel, and the end face of the support column facing the inlet being arc-shaped. Optionally, along the direction from the inlet to the outlet, the support column converges to form a tip on one side facing the outlet; Optionally, the side of the support column is streamlined along the flow direction of the channel; Optionally, the area of ​​the cross-section of the support column perpendicular to the thickness direction of the first plate is equal everywhere; Optionally, the number of the support columns is multiple, and the multiple support columns are arranged at intervals along the length direction of the channel; Optionally, along the length of the channel, the distance between two adjacent support columns is L1, where 12mm≤L1≤15mm; Optionally, the number of support columns is multiple, and the multiple support columns are arranged at intervals along the width direction of the channel; Optionally, along the width direction of the channel, the distance between two adjacent support columns is L2, where 3mm≤L2≤4mm; Optionally, along the width direction of the channel, the ratio of the distance L2 between two adjacent support columns to the width W of the channel is L2 / W, where 0.24≤L2 / W≤0.32; Optionally, the number of channels is multiple, and the multiple channels are arranged at intervals along the width direction of the sequencing chip; Optionally, the ends of the channel along its length are converging. Optionally, the width of the channel is W, where 12mm ≤ W ≤ 13mm.

3. The sequencing chip according to claim 1 or 2, characterized in that, The first substrate has a chip unit formed thereon, the chip unit being located on one side of the support post along the length direction of the channel, and the chip unit corresponding to the channel; Optionally, the number of chip units is multiple, and the multiple chip units are arranged at intervals along the length direction of the channel; Optionally, the chip unit has a first surface and a second surface disposed opposite to each other, the second surface being located between the first surface and the second substrate, and the first surface being provided with a mark; Optionally, the markings are one or a combination of letters, numbers, and graphics; Optionally, the markings include direction markings and area markings; Optionally, the number of the marks is multiple, and the multiple marks are arranged at circumferential intervals along the chip cell; Optionally, the mark includes a serial number mark.

4. A space chip, characterized in that, include: substrate; A chip unit disposed on the surface of the substrate, the chip unit being formed by cutting the first substrate of the sequencing chip according to any one of claims 1-3.

5. The space chip according to claim 4, characterized in that, The chip unit has a first surface and a second surface disposed opposite to each other. The first surface is disposed on the surface of the substrate and is located between the second surface and the substrate. The first surface is provided with a mark. Optionally, the number of chip units is multiple, and the multiple chip units are arranged at intervals on the substrate; Optionally, the chip unit is square; Optionally, the space chip includes a tag disposed on the substrate, the tag being used to record the position information of each chip unit on the sequencing chip; Optionally, the label is a QR code or a barcode; Optionally, an adhesive layer is disposed between the substrate and the chip unit; Optionally, the adhesive layer covers at least a portion of the surface of the chip cell.

6. A preparation method for preparing a space chip, characterized in that, The method includes: Provide a substrate; Provide a sequencing chip according to any one of claims 1-3; The first substrate of the sequencing chip is cut to obtain chip units; The chip unit is disposed on the substrate.

7. The preparation method according to claim 6, characterized in that, The sequencing chip provided according to any one of claims 1-19 comprises: Provide the first and second boards; Encapsulating adhesive and support pillars are disposed on the second plate, wherein the encapsulating adhesive forms channels; The first plate and the second plate are bonded together; Optionally, the provision of the first and second plates includes: Clean the first and second plates; The first and second plates are then subjected to surface treatment after cleaning. The first and second plates after drying treatment; Optionally, the step of setting the encapsulating adhesive and support posts on the second plate includes: Place the second plate on the support platform; The encapsulating adhesive and the support column are placed on the conveying device; Drive the bearing platform and the conveying device to move relative to each other, so that the bearing platform and the conveying device move closer to each other, thereby driving the encapsulating adhesive, the support column and the second plate to move closer to each other; A positioning device is used to assist in positioning the second plate and the encapsulating adhesive; The control pressing device adheres the encapsulating adhesive and the support column to the second plate; Optionally, the bonding of the first plate and the second plate includes: The second plate and the first plate, which are provided with the encapsulating adhesive and the support column, are placed on the bonding fixture; The first material and the second material are bonded together using a vacuum laminator; Optionally, after bonding the first sheet material to the second sheet material, the method includes: The sequencing chip after the first and second plates are bonded together is subjected to pressure using a pressure-holding device; The sequencing chip, after being held under pressure, is cured using a curing device; The solidified sequencing chip is defoamed using a defoaming device.

8. The preparation method according to claim 6, characterized in that, Before dicing the first substrate of the sequencing chip, the method includes: Sequencing was performed using the aforementioned sequencing chip; Optionally, the cutting of the first substrate of the sequencing chip includes: At least one preset area is determined on the first plate corresponding to the channel according to a preset shape and size, and the preset area is marked. The preset region is cut to obtain at least one chip unit; Optionally, the chip unit has a first surface and a second surface disposed opposite to each other, the second surface facing the second substrate; The step of placing the chip unit on the substrate includes: The first surface of the chip unit is disposed on the surface of the substrate; Optionally, the step of disposing the first surface of the chip unit on the surface of the substrate includes: An adhesive layer is applied to the surface of the substrate; The first surface of the chip unit is bonded to the substrate having the adhesive layer using a bonding fixture; Optionally, the process of depositing the adhesive layer on the surface of the substrate includes: The substrate is placed on the support platform; The adhesive layer is placed on the conveying device; Drive the support platform and the conveying device to move relative to each other, so as to bring the adhesive layer and the substrate closer together; A positioning device is used to assist in the positioning of the substrate and the adhesive layer; The control pressing device adheres the adhesive layer to the substrate; Optionally, after the adhesive layer is applied to the surface of the substrate, the method includes: The substrate with the adhesive layer is defoamed using a defoaming device; Optionally, the patch fixture is formed with a first groove and a second groove intersecting the first groove, the second groove being higher than the first groove; The method of bonding the first surface of the chip unit to the substrate having the adhesive layer using a bonding fixture includes: The sequencing chip having the chip unit is placed in the first groove, with the first surface close to the opening of the first groove; The substrate with the adhesive layer is placed in the second groove, with the surface of the substrate having the adhesive layer facing the sequencing chip; The adhesive layer is bonded to the first surface of the chip unit on the side facing away from the substrate. Optionally, the number of chip units is multiple, and the multiple chip units are arranged at intervals along a first direction; the number of second grooves is multiple, and the multiple second grooves are arranged at intervals along the first direction; along the first direction, each second groove corresponds to at least one chip unit; and / or, The number of chip units is multiple, and the multiple chip units are arranged at intervals along a second direction, which intersects with the first direction. Along the second direction, one second groove corresponds to at least one chip unit. Optionally, there are multiple first grooves, which are spaced apart along the first direction and / or the second direction, and each first groove intersects with at least one second groove.

9. The preparation method according to claim 6, characterized in that, After the chip unit is disposed on the substrate, the method includes: The substrate containing the chip unit is defoamed using a defoaming device; A label is placed on the substrate to record the position information of each chip unit on the sequencing chip.

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