A PMN-PT-based lanthanum strontium titanate heterostructure and its preparation method

Abstract

This invention belongs to the field of functional oxide thin film material preparation technology. It discloses a lead magnesium niobate-lead titanate (PMN-PT) based strontium titanate (SrTiO3, abbreviated as STO) / lanthanum nickelate (LaNiO3, abbreviated as LNO) heterostructure and its preparation method. This invention solves the problems of low density and easy sputtering of traditional target materials by precisely controlling the target material preparation process, laying the foundation for high-quality thin film growth. The critical process window for LaNiO3 thin film growth (600 degrees Celsius, 1.7 joules per square centimeter, 27 Pascals) was determined, and the surface resistivity was reduced from >1kΩ to 500Ω, with an improvement in electrical performance of more than 50%. The SrTiO3 buffer layer effectively blocks Pb diffusion and improves interface quality. The process repeatability is excellent, with the standard deviation of resistance of multiple batches of samples <8%, meeting the requirements of industrial production.

Description

Technical Field

[0001] This invention belongs to the field of functional oxide thin film material preparation technology, and particularly relates to a lead magnesium niobate-lead titanate (PMN-PT) based strontium titanate (SrTiO3, abbreviated as STO) / lanthanum nickelate (LaNiO3, abbreviated as LNO) heterostructure and its preparation method. Background Technology

[0002] Lanthanum nickel oxide (LaNiO3) films with perovskite structures are widely used as bottom electrodes, buffer layers, and conductive channel materials in oxide electronic devices due to their excellent metallic conductivity, lattice matching, and chemical stability. In practical device integration, it is often necessary to combine LNO films with functional materials with excellent electrical properties (such as ferroelectric, piezoelectric, and multiferroic materials) to construct heterostructures to achieve the modulation of device performance.

[0003] PMN-PT single crystal substrates (Pb(Mg1 / 3Nb2 / 3)O3-PbTiO3, where the molar ratio of Mg to Nb is 1:2) exhibit extremely high piezoelectricity (piezoelectricity d) near the quasi-isomorphic phase boundary. 33 (d) 33 LNO (pC / N) represents the piezoelectric strain constant (>2000 pC / N) and its electric field-controllable strain characteristics, making it an ideal platform for constructing strain-modulated functional devices. However, the direct epitaxial growth of LNO thin films on PMN-PT substrates faces significant challenges.

[0004] (1) There is a large lattice mismatch (about 4.7%) between PMN-PT and LNO, resulting in poor crystal quality and high surface roughness of LNO film.

[0005] (2) Volatile elements such as lead (Pb) contained in PMN-PT substrates are easily diffused into LNO films during high-temperature growth, which can damage their stoichiometry and electrical properties.

[0006] (3) The surface quality of PMN-PT substrate is poor (roughness is usually >2nm), which is not conducive to achieving an atomically flat interface and affects the stability and repeatability of device performance.

[0007] The integration of ferroelectric single-crystal substrate heterostructures and functional oxide thin films on them is an important research direction in the field of functional electronic materials, attracting widespread attention in applications such as piezoelectric sensors and field-effect modulation devices. In existing technologies, to improve the interface structure and electrical properties between ferroelectric thin films and functional oxides, researchers have attempted to introduce buffer layers onto the ferroelectric substrate to achieve lattice matching and interface modulation. For example, research on using lead-strontium titanate titanate (SrTiO3) buffer layers as template layers for the growth of complex oxide thin films indicates that buffer layers can serve as commonly used transition interfaces to promote the epitaxial growth of oxide thin films and improve crystal quality.

[0008] However, the aforementioned existing technologies mainly focus on crystal matching of the buffer layer and improvement of thin film epitaxial quality, without systematically optimizing the room-temperature electrical stability and strain interaction response of the ferroelectric single-crystal substrate and the conductive oxide thin film. In actual thin film fabrication and device integration, due to the differences in lattice and thermal expansion between the ferroelectric single-crystal substrate and the conductive oxide layer, high-density defects, mismatched domains, and discontinuous strain fields easily arise at the interface, leading to resistive instability of the conductive oxide layer at room temperature and poor repeatability of the electric field-driven modulation effect. This electrical instability directly restricts the reliable application of heterostructures in electric field-controlled electronic devices. Therefore, how to construct an oxide heterostructure with a stable electrical response under an electric field and effectively transmits ferroelectric strain has become a core technical problem that urgently needs to be solved in the existing technologies. Summary of the Invention

[0009] To address the problems existing in the prior art, this invention provides a PMN-PT-based lanthanum titanate titanate heterostructure and its preparation method.

[0010] This invention is achieved by providing a PMN-PT-based lanthanum strontium titanate nickel oxide heterostructure comprising: {001} PMN-PT single crystal substrate with crystal orientation (representing the crystallographic Miller index).

[0011] Strontium titanate (SrTiO3) buffer layer.

[0012] Lanthanum nickelate (LaNiO3) conductive thin film layer.

[0013] The LaNiO3 conductive thin film layer is obtained by pulsed laser deposition under a specific process window, which is: substrate temperature 600±5℃, laser energy density 1.7J / cm², and oxygen pressure 27±1Pa, so that the surface resistance Rs of the LaNiO3 conductive thin film at 20℃ is 400-600Ω / □.

[0014] Furthermore, the thickness of the SrTiO3 buffer layer is 25-40 nm, and it is obtained by pulsed laser deposition under the conditions of substrate temperature 720℃, oxygen pressure 13.3 Pa, laser energy density 1.5 J / cm², and a total number of laser pulses of 3600.

[0015] Furthermore, the thickness of the LaNiO3 conductive film is approximately 15 nm.

[0016] Furthermore, the PMN-PT single crystal substrate is (1-x)Pb(Mg1 / 3Nb2 / 3)O3-xPbTiO3, where x=0.3 and the thickness is 0.5mm.

[0017] Another object of the present invention is to provide a method for preparing a PMN-PT-based lanthanum titanate nickel oxide heterostructure, comprising the following steps: (1) Preparation of high-purity SrTiO3 ceramic target: 99.99% SrCO3 and TiO2 powder were mixed, pre-calcined in a muffle furnace at 1250℃ for 5 hours, and then formally calcined at 1350℃ for 5 hours. The heating and cooling rate was strictly controlled at 5℃ / min to finally obtain a dense SrTiO3 ceramic target.

[0018] (2) Preparation of high-purity LaNiO3 ceramic target: 99.99% La2O3 (pre-dried) was mixed with NiO powder, pre-calcined in a muffle furnace at 1200℃ for 10 hours, and then formally calcined at 1350℃ for 12 hours. The heating and cooling rate was strictly controlled at 5℃ / min to obtain a pure phase dense LaNiO3 ceramic target.

[0019] (3) SrTiO3 buffer layer pulsed laser deposition growth: SrTiO3 buffer layer was grown on the polished surface of PMN-PT substrate at 720±10℃, oxygen pressure 13.3±0.5Pa, laser energy density 1.5J / cm², pulse number 3600, and laser pulse repetition frequency 5Hz. Then, it was annealed at 720℃ for 30 minutes at oxygen pressure 0.6atm (standard atmospheric pressure, about 60.8kPa), with a heating rate of 10℃ / min and a cooling rate of 10℃ / min.

[0020] (4) Pulsed laser deposition growth of LaNiO3 thin film: In-situ growth on the SrTiO3 buffer layer, substrate temperature 600±5℃, oxygen pressure 27±1Pa, laser energy density 1.7J / cm², pulse number 1700, frequency 4Hz, and cooling rate 10℃ / min after growth.

[0021] Furthermore, in the LaNiO3 thin film growth step, the heating rate is 20℃ / min and the cooling rate is 10℃ / min, and both the growth and cooling processes are carried out in an oxygen-rich atmosphere to prevent the generation of oxygen vacancies.

[0022] Furthermore, the pulsed laser deposition uses a KrF excimer laser with a wavelength of 248 nm, the distance between the target and the substrate is 45-55 mm, and the laser repetition frequency is 5 Hz when growing the SrTiO3 buffer layer and 4 Hz when growing the LaNiO3 thin film.

[0023] Another object of the present invention is to provide the application of the aforementioned PMN-PT-based strontium titanate-lanthanum nickelate heterostructure as a conductive electrode or buffer layer in electric field-controlled oxide electronic devices.

[0024] Furthermore, the electric field-controlled oxide electronic device includes a piezoelectric strain sensor, a Mott transistor, or a ferroelectric field-effect transistor, and the heterostructure is used as a low-loss source / drain electrode or a strain transfer layer.

[0025] Based on the above technical solutions and the technical problems solved, the advantages and positive effects of the technical solution to be protected by this invention are as follows: (1) By employing a two-step stepped sintering process for the target material, the stoichiometric accuracy of the thin film growth is ensured from the source. Addressing the issues of moisture absorption and compositional deviation in LaNiO3 targets, this invention adopts a strategy of "long-term stepped calcination at 1200℃ / 10h + 1350℃ / 12h, with a limited slow heating and cooling rate of 5℃ / min." This process ensures sufficient diffusion of La and Ni elements in the solid-state reaction, eliminating micro-component segregation. The high-density target material significantly reduces the large-particle sputtering phenomenon during pulsed laser deposition (PLD) technology, providing the material basis for obtaining ultra-low resistivity thin films.

[0026] (2) This invention overcomes the technical challenge of growing conductive oxide films on PMN-PT single-crystal substrates, which often results in films with high resistivity. In existing technologies, growing films such as LNO on PMN-PT typically faces the problem of high surface resistance (greater than 1000Ω), primarily due to lattice stress relaxation at the interface and interdiffusion of lead (Pb) in the substrate. This invention, by introducing a buffer layer, discovered the critical process window for LaNiO3 film growth (substrate temperature 600±5℃, oxygen pressure 27±1Pa, laser energy density 1.7J / cm²) through extensive experiments. Experimental data show that this process window is highly sensitive. When the temperature exceeds 600℃, Pb volatilization intensifies on the PMN-PT substrate, leading to interface contamination; when the temperature is too low, the crystal quality deteriorates. Simultaneously, the specific oxygen pressure of 27Pa achieves a delicate balance between suppressing oxygen vacancy formation and maintaining the correct valence state of Ni ions. Under this specific window, the surface resistance of the thin film prepared by this invention is stable in the range of less than 600Ω, which is more than 50% lower than that of samples under conventional process conditions.

[0027] (3) By constructing an STO buffer interface, the interface defect problem of large mismatch epitaxial growth was effectively solved. There is a huge lattice mismatch of about 4.7% between PMN-PT and LaNiO3. The SrTiO3 buffer layer introduced in this invention decomposes the one-time large mismatch stress into two smaller stress steps, promoting the growth of the step flow mode. More importantly, the dense STO buffer layer acts as a physical barrier layer, effectively cutting off the diffusion path of volatile Pb elements in the PMN-PT substrate to the functional layer, avoiding the degradation of LNO conductivity caused by Pb ion doping. X-ray diffraction (XRD) and X-ray reflectivity (XRR) curve tests confirmed that the heterostructure interface is clear, no impurity phase is generated, and the surface roughness of the film is greatly reduced, providing an atomically smooth interface for strain transfer of subsequent devices.

[0028] (4) The process of this invention has excellent repeatability, with the standard deviation of resistance of multiple batches of samples being <8%. Through systematic process optimization, it provides a repeatable and scalable PMN-PT / LNO integrated technology solution, which has clear industrial application prospects and meets the requirements of subsequent industrial production.

[0029] (5) This invention fills the technological gap in the epitaxial growth of high-quality conductive oxides on substrates with large lattice mismatch and high volatility. In existing technologies at home and abroad, the growth of LaNiO3 thin films is mostly concentrated on substrates with good stability such as SrTiO3 or LaAlO3. However, on complex substrates such as PMN-PT, which are extremely sensitive to temperature due to lead content and have a lattice mismatch of up to 4.7%, there has been a lack of a mature and standardized direct epitaxial growth process. This invention establishes for the first time a standard process for preparing atomically flat, impurity-free conductive thin films on PMN-PT by combining a "high-density target material + STO ultrathin buffer + low-temperature oxygen-rich window".

[0030] (6) The "PMN-PT-based high-conductivity LaNiO3 thin film preparation technology" proposed in this invention also has extremely high potential for commercialization and significant commercial value. Utilizing the large piezoelectric strain of PMN-PT to regulate the metal-insulator phase transition (MIT) of associated oxides (such as nickelates) is a cutting-edge direction for developing next-generation low-power transistors and non-volatile memories. This invention solves the core pain points of poor heterojunction interface quality and large leakage current, providing a standardized material preparation scheme for the development of new logic devices and neuromorphic computing hardware based on strain regulation. This is conducive to promoting the industrialization process of next-generation Motortronics devices and has forward-looking value in the post-Moore's Law semiconductor market. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the PMN-PT-based lanthanum titanate-tungsten titanate heterostructure provided in an embodiment of the present invention.

[0032] Figure 2 This is a flowchart of the method for preparing PMN-PT-based strontium nickelate heterostructures provided in this embodiment of the invention.

[0033] Figure 3 This is a temperature curve of SrTiO3 target preparation in Example 1 of the present invention (1250℃ / 5h→1350℃ / 5h).

[0034] Figure 4 This is a temperature curve of LaNiO3 target preparation in Example 1 of the present invention (1200℃ / 10h→1350℃ / 12h).

[0035] Figure 5 The XRD (X-ray diffraction θ-2θ linked scanning (θ is the incident angle, 2θ is the diffraction angle)) pattern of Example 1 provided in this embodiment of the invention shows the diffraction peaks of the SrTiO3 buffer layer and the LaNiO3 film.

[0036] Figure 6 This is an X-ray reflectance (XRR) curve of Embodiment 1 provided in this invention.

[0037] Figure 7 This is a bar chart comparing the surface resistance test results of Example 1 and Comparative Examples 1-3 provided in this invention.

[0038] Figure 8 This is a trend graph of the surface resistance of LaNiO3 thin film at different temperatures provided in the embodiments of the present invention, showing that 600℃ is the optimal value.

[0039] Figure 9 This is a trend diagram of the surface resistance of LaNiO3 thin film under different oxygen pressures provided in the embodiments of the present invention, showing that 27 Pa is the optimal value. Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0041] like Figure 1 As shown, the PMN-PT-based lanthanum titanate nickel oxide heterostructure provided in this embodiment of the invention includes: {001} oriented PMN-PT single crystal substrate.

[0042] Strontium titanate (SrTiO3) buffer layer.

[0043] Lanthanum nickelate (LaNiO3) conductive thin film layer.

[0044] The LaNiO3 conductive thin film layer is obtained by pulsed laser deposition under a specific process window, which is: substrate temperature 600±5℃, laser energy density 1.7J / cm², oxygen pressure 27±1Pa, so that the surface resistance of the LaNiO3 conductive thin film at 20℃ is about 500Ω.

[0045] The SrTiO3 buffer layer provided in this embodiment of the invention has a thickness of 30-40 nm and is obtained by pulsed laser deposition under the conditions of substrate temperature 720℃, oxygen pressure 13.3 Pa, laser energy density 1.5 J / cm², and pulse number 3600.

[0046] The thickness of the LaNiO3 conductive film provided in this embodiment of the invention is approximately 15 nm.

[0047] The PMN-PT single crystal substrate provided in this embodiment of the invention is (1-x)Pb(Mg1 / 3Nb2 / 3)O3-xPbTiO3, where x=0.3 and the thickness is 0.5mm.

[0048] like Figure 2 As shown, the method for preparing a PMN-PT-based strontium nickelate heterostructure of the present invention includes the following steps: S101, Preparation of high-purity SrTiO3 ceramic target: A dense SrTiO3 ceramic target was obtained by mixing 99.99% SrCO3 and TiO2 powders, pre-calcining at 1250℃ for 5 hours in a muffle furnace, and then formally calcining at 1350℃ for 5 hours with the heating and cooling rate strictly controlled at 5℃ / min.

[0049] S102, Preparation of high-purity LaNiO3 ceramic target: 99.99% La2O3 (pre-dried) was mixed with NiO powder, pre-calcined in a muffle furnace at 1200℃ for 10 hours, and then formally calcined at 1350℃ for 12 hours. The heating and cooling rates were strictly controlled at 5℃ / min to obtain a pure-phase dense LaNiO3 ceramic target.

[0050] S103, SrTiO3 buffer layer pulsed laser deposition growth: On the polished surface of a PMN-PT substrate, a SrTiO3 buffer layer was grown at 720±10℃, oxygen pressure 13.3±0.5Pa, laser energy density 1.5J / cm², pulse number 3600, and frequency 5Hz. Subsequently, it was annealed at 720℃ for 30 minutes under an oxygen pressure of 0.6atm, with a heating rate of 10℃ / min and a cooling rate of 10℃ / min.

[0051] S104, LaNiO3 thin film pulsed laser deposition growth: In-situ growth was carried out on the SrTiO3 buffer layer at a substrate temperature of 600±5℃, an oxygen pressure of 27±1Pa, a laser energy density of 1.7J / cm², a pulse number of 1700, and a frequency of 4Hz. After growth, the cooling rate was 10℃ / min.

[0052] In the LaNiO3 thin film growth step provided in this embodiment of the invention, the heating rate is 20℃ / min and the cooling rate is 10℃ / min, and both the growth process and the cooling process are carried out in an oxygen-rich atmosphere to prevent the generation of oxygen vacancies.

[0053] The pulsed laser deposition provided in this embodiment of the invention uses a KrF excimer laser with a wavelength of 248 nm, a target-to-substrate distance of 45-55 mm, and a laser repetition frequency of 5 Hz during SrTiO3 buffer layer growth and 4 Hz during LaNiO3 thin film growth.

[0054] The application of the PMN-PT-based strontium titanate nickelate heterostructure provided in this invention as a conductive electrode or buffer layer in electric field-controlled oxide electronic devices.

[0055] The electric field-controlled oxide electronic device provided in this embodiment of the invention includes a piezoelectric strain sensor, a Mott transistor or a ferroelectric field-effect transistor, wherein the heterostructure is used as a low-loss source / drain electrode or a strain transfer layer.

[0056] This invention provides a PMN-PT-based strontium titanate-lanthanum nickelate heterostructure, comprising, from bottom to top, a PMN-PT ferroelectric single crystal substrate layer, a strontium titanate buffer layer, and a lanthanum nickelate conductive thin film layer. The PMN-PT ferroelectric single crystal substrate is preferably a single crystal structure with a {001} crystal orientation to ensure a stable and reversible in-plane strain response under an applied electric field. Exemplarily, the PMN-PT single crystal has a lead-magnesium-niobium titanate system, wherein the molar fraction of lead titanate is 0.3, and the single crystal thickness is 0.5 mm, which ensures both mechanical stability and electric field loading efficiency.

[0057] A strontium titanate buffer layer is deposited on the surface of the PMN-PT single crystal substrate. This strontium titanate buffer layer is used to adjust the lattice matching relationship between the ferroelectric single crystal and the upper conductive oxide layer, and plays a transition and mitigation role during strain transfer. Exemplarily, the thickness of the strontium titanate buffer layer can be selected as any one of 25 nm, 35 nm, or 40 nm, thereby covering the lower, median, and upper limits to verify the stability and repeatability of the heterostructure under different thickness conditions.

[0058] In the specific preparation process, the strontium titanate buffer layer can be grown by pulsed laser deposition. Exemplarily, on a PMN-PT single-crystal polished surface, the substrate is heated to approximately 720 degrees Celsius, and deposition is performed using laser pulses with a laser energy density of approximately 1.5 joules per square centimeter in an atmosphere with an oxygen partial pressure of approximately 13.3 Pa. The number of pulses is 3600, exemplarily. After deposition, annealing can be performed in an oxygen-rich environment to further improve the film crystallinity. The annealing temperature is selected as 720 degrees Celsius, and the annealing time is 30 minutes, exemplarily.

[0059] A lanthanum nickelate conductive thin film layer is formed above the strontium titanate buffer layer. As a conductive functional layer in the heterostructure, the electrical properties of the lanthanum nickelate conductive thin film layer directly affect the overall device's control performance. For example, the thickness of the lanthanum nickelate conductive thin film is approximately 15 nanometers.

[0060] In an exemplary embodiment, the lanthanum nickelate conductive film is obtained by in-situ growth via pulsed laser deposition within a specific process window. This process window exemplarily includes: a substrate temperature controlled at approximately 600 degrees Celsius, allowing for process fluctuations of no more than 5 degrees Celsius; an oxygen partial pressure controlled at approximately 27 Pa; and a laser energy density of approximately 1.7 joules per square centimeter. The lanthanum nickelate conductive film grown under these process conditions exhibits stable surface resistivity characteristics at 20 degrees Celsius, with an exemplary surface resistivity distribution of approximately 500 ohms.

[0061] In a further embodiment, to suppress oxygen vacancy defects in the conductive film, the growth process of the lanthanum nickelate conductive film and the subsequent cooling process are both carried out in an oxygen-rich atmosphere. For example, the heating rate can be selected as 20 degrees Celsius per minute, and the cooling rate can be selected as 10 degrees Celsius per minute, to balance film density and interface stability.

[0062] In some embodiments, the pulsed laser deposition system can employ an excimer laser source, exemplarily with a laser wavelength of 248 nanometers, and the distance between the target and the substrate can be set in the range of 45 mm to 55 mm. During the deposition of different layers, the laser repetition frequency can be adjusted according to the material properties; for example, 5 Hz can be selected for the deposition of a strontium titanate buffer layer, and 4 Hz can be selected for the deposition of a lanthanum nickelate conductive thin film.

[0063] Through the aforementioned structural design and process synergy, the PMN-PT-based strontium titanate-lanthanum nickelate heterostructure provided in this invention can effectively transfer ferroelectric single-crystal strain to the conductive oxide layer under an applied electric field, thereby regulating the carrier transport behavior of the conductive layer. Based on this, the heterostructure can be exemplary used as a conductive electrode or strain transfer layer in electric field-controlled oxide electronic devices, such as piezoelectric strain sensors, Mott-type control devices, or ferroelectric field-effect control devices, serving as a low-loss source / drain electrode or functional buffer layer.

[0064] like Figure 3 , Figure 4 Example 1 Target preparation: SrTiO3 target material: 99.99% SrCO3 and TiO2 powder are mixed, ground and dried, and then calcined in a muffle furnace in stages: 1250℃ for 5h → 1350℃ for 5h, with the heating and cooling rate strictly controlled at 5℃ / min.

[0065] LaNiO3 target material: 99.99% La2O3 and NiO powder are mixed, ground and dried, and then calcined in a muffle furnace in a stepwise manner: 1200℃ for 10h → 1350℃ for 12h, with the heating and cooling rate strictly controlled at 5℃ / min. XRD detection showed no impurities.

[0066] Heterogeneous structure growth: A 0.5mm thick PMN-PT single crystal substrate was selected and transferred to the PLD system (KrF laser λ=248nm).

[0067] SrTiO3 buffer layer growth: substrate temperature 720℃, oxygen pressure 13.3Pa, laser energy density 1.5J / cm², pulse number 3600, frequency 5Hz, growth time 12min. Subsequently, annealing was carried out at 0.6atm oxygen pressure and 720℃ for 30min, with a heating rate of 10℃ / min and a cooling rate of 10℃ / min.

[0068] LaNiO3 thin film growth: Replace the LaNiO3 ceramic target, set the temperature to 600℃, oxygen pressure to 27Pa, laser energy density to 1.7J / cm², pulse number to 1700, frequency to 4Hz, and growth time to 7min. After growth, cool down to room temperature at a rate of 10℃ / min.

[0069] Structural characterization: XRD θ-2θ scan ( Figure 5 The sample clearly shows the SrTiO3(002) peak (2θ=46.8°) and the LaNiO3(002) peak (2θ=47.6°), with no impurity phase peaks.

[0070] XRR curve ( Figure 6 The fitting results showed that the thickness of SrTiO3 was approximately 35 nm, and the thickness of LaNiO3 was approximately 15 nm.

[0071] Figure 7 A bar chart comparing the surface resistance test results of Example 1 and Comparative Examples 1-3.

[0072] Figure 8 The surface resistivity of LaNiO3 thin films varies at different temperatures, showing that 600℃ is the optimal value.

[0073] Figure 9 The surface resistance of LaNiO3 thin films under different oxygen pressures shows that 27 Pa is the optimal value.

[0074] Example 2 Target preparation: SrTiO3 target material: 99.99% SrCO3 and TiO2 powder are mixed, ground and dried, and then calcined in a muffle furnace in stages: 1250℃ for 5h → 1350℃ for 5h, with the heating and cooling rate strictly controlled at 5℃ / min.

[0075] LaNiO3 target material: 99.99% La2O3 and NiO powder are mixed, ground and dried, and then calcined in a muffle furnace in stages: 1200℃ for 10h → 1350℃ for 12h, with the heating and cooling rate strictly controlled at 5℃ / min.

[0076] Heterogeneous structure growth: A 0.5mm thick PMN-PT single crystal substrate was selected and transferred to the PLD system (KrF laser λ=248nm).

[0077] SrTiO3 buffer layer growth: substrate temperature 720℃, oxygen pressure 13.3Pa, laser energy density 1.5J / cm², pulse number 2600, frequency 5Hz, growth time 12min. Subsequently, annealing was carried out at 0.6atm oxygen pressure and 720℃ for 30min, with a heating rate of 10℃ / min and a cooling rate of 10℃ / min.

[0078] LaNiO3 thin film growth: Replace the LaNiO3 ceramic target, set the temperature to 600℃, oxygen pressure to 27Pa, laser energy density to 1.7J / cm², pulse number to 1700, frequency to 4Hz, and growth time to 7min. After growth, cool down to room temperature at a rate of 10℃ / min.

[0079] Example 3 Target preparation: SrTiO3 target material: 99.99% SrCO3 and TiO2 powder are mixed, ground and dried, and then calcined in a muffle furnace in stages: 1250℃ for 5h → 1350℃ for 5h, with the heating and cooling rate strictly controlled at 5℃ / min.

[0080] LaNiO3 target material: 99.99% La2O3 and NiO powder are mixed, ground and dried, and then calcined in a muffle furnace in stages: 1200℃ for 10h → 1350℃ for 12h, with the heating and cooling rate strictly controlled at 5℃ / min.

[0081] Heterogeneous structure growth: A 0.5mm thick PMN-PT single crystal substrate was selected and transferred to the PLD system (KrF laser λ=248nm).

[0082] SrTiO3 buffer layer growth: substrate temperature 720℃, oxygen pressure 13.3Pa, laser energy density 1.5J / cm², pulse number 4100, frequency 5Hz, growth time 12min. Subsequently, annealing was carried out at 0.6atm oxygen pressure and 720℃ for 30min, with a heating rate of 10℃ / min and a cooling rate of 10℃ / min.

[0083] LaNiO3 thin film growth: Replace the LaNiO3 ceramic target, set the temperature to 600℃, oxygen pressure to 27Pa, laser energy density to 1.7J / cm², pulse number to 1700, frequency to 4Hz, and growth time to 7min. After growth, cool down to room temperature at a rate of 10℃ / min.

[0084] Comparative Example 1 Target preparation: SrTiO3 target material: 99.99% SrCO3 and TiO2 powder are mixed, ground and dried, and then calcined in a muffle furnace in stages: 1250℃ for 5h → 1350℃ for 5h, with the heating and cooling rate strictly controlled at 5℃ / min.

[0085] LaNiO3 target material: 99.99% La2O3 and NiO powder are mixed, ground and dried, and then calcined in a muffle furnace in stages: 1200℃ for 10h → 1350℃ for 12h, with the heating and cooling rate strictly controlled at 5℃ / min.

[0086] Heterogeneous structure growth: A 0.5mm thick PMN-PT single crystal substrate was selected and transferred to the PLD system (KrF laser λ=248nm).

[0087] SrTiO3 buffer layer growth: substrate temperature 720℃, oxygen pressure 55Pa, laser energy density 1.5J / cm², pulse number 3600, frequency 5Hz, growth time 12min. Subsequently, annealing was carried out at 0.6atm oxygen pressure and 720℃ for 30min, with a heating rate of 10℃ / min and a cooling rate of 10℃ / min.

[0088] LaNiO3 thin film growth: Replace the LaNiO3 ceramic target, set the temperature to 600℃, oxygen pressure to 27Pa, laser energy density to 1.7J / cm², pulse number to 1700, frequency to 4Hz, and growth time to 7min. After growth, cool down to room temperature at a rate of 10℃ / min.

[0089] Comparative Example 2 Target preparation: SrTiO3 target material: 99.99% SrCO3 and TiO2 powder are mixed, ground and dried, and then calcined in a muffle furnace in stages: 1250℃ for 5h → 1350℃ for 5h, with the heating and cooling rate strictly controlled at 5℃ / min.

[0090] LaNiO3 target material: 99.99% La2O3 and NiO powder are mixed, ground and dried, and then calcined in a muffle furnace in stages: 1200℃ for 10h → 1350℃ for 12h, with the heating and cooling rate strictly controlled at 5℃ / min.

[0091] Heterogeneous structure growth: A 0.5 mm thick PMN-PT single crystal substrate was selected and transferred to the PLD system (KrF laser λ=248 nm).

[0092] SrTiO3 buffer layer growth: substrate temperature 720℃, oxygen pressure 13.3Pa, laser energy density 1.5J / cm², pulse number 3600, frequency 5Hz, growth time 12min. Subsequently, annealing was carried out at 0.6atm oxygen pressure and 720℃ for 30min, with a heating rate of 10℃ / min and a cooling rate of 10℃ / min.

[0093] LaNiO3 thin film growth: Replace the LaNiO3 ceramic target, set the temperature to 500℃, oxygen pressure to 27Pa, laser energy density to 1.7J / cm², pulse number to 1700, frequency to 4Hz, and growth time to 7min. After growth, cool down to room temperature at a rate of 10℃ / min.

[0094] Comparative Example 3 Target preparation: SrTiO3 target material: 99.99% SrCO3 and TiO2 powder are mixed, ground and dried, and then calcined in a muffle furnace in stages: 1250℃ for 5h → 1350℃ for 5h, with the heating and cooling rate strictly controlled at 5℃ / min.

[0095] LaNiO3 target material: 99.99% La2O3 and NiO powder are mixed, ground and dried, and then calcined in a muffle furnace in stages: 1200℃ for 10h → 1350℃ for 12h, with the heating and cooling rate strictly controlled at 5℃ / min.

[0096] Heterogeneous structure growth: A 0.5mm thick PMN-PT single crystal substrate was selected and transferred to the PLD system (KrF laser λ=248nm).

[0097] SrTiO3 buffer layer growth: substrate temperature 720℃, oxygen pressure 13.3Pa, laser energy density 1.5J / cm², pulse number 3600, frequency 5Hz, growth time 12min. Subsequently, annealing was carried out at 0.6atm oxygen pressure and 720℃ for 30min, with a heating rate of 10℃ / min and a cooling rate of 10℃ / min.

[0098] LaNiO3 thin film growth: Replace the LaNiO3 ceramic target, set the temperature to 600℃, oxygen pressure to 37Pa, laser energy density to 1.7J / cm², pulse number to 1700, frequency to 4Hz, and growth time to 7min. After growth, cool down to room temperature at a rate of 10℃ / min.

[0099] The PMN-PT-based strontium titanate / lanthanum nickelate heterostructure prepared by this invention has broad application prospects in the following fields due to its low resistivity, dynamic electric field control capability, and excellent process repeatability: 1. As a core component of high-performance piezoelectric electronic transistors (PET): By utilizing the piezoelectric strain of PMN-PT to modulate the conductivity of LNO, the driving voltage of the device can be reduced, resulting in faster response speed and lower power consumption.

[0100] 2. Serving as an experimental platform for strongly correlated electron systems ("Mottronics" basic research): The academic community has a great need for high-quality, strain-tunable strongly correlated oxide thin film samples. The heterojunction mentioned in this invention can itself serve as a high-end consumable (substrate product) for studying the metal-insulator phase transition mechanism or developing new quantum devices, providing an ideal material platform for studying strain-tuned metal-insulator phase transitions (MIT).

[0101] 3. Applications in Mott FETs / Steep-slope Transistors: Traditional MOSFETs are limited by a subthreshold swing limit of 60mV / decade. Using PMN-PT / STO / LNO structures, channel resistance can be controlled via strain rather than traditional electrostatic induction. If the LNO is made thin enough (close to the metal-insulator phase transition boundary), even a small strain can trigger a large resistance change.

[0102] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications, equivalent substitutions, and improvements made by those skilled in the art within the scope of the technology disclosed in the present invention, and within the spirit and principles of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. An oxide heterostructure based on a ferroelectric single crystal substrate, characterized in that, The heterostructure, from bottom to top, comprises a ferroelectric single crystal substrate layer, a strontium titanate buffer layer, and a lanthanum nickelate conductive oxide layer. The ferroelectric single crystal substrate is a lead-magnesium niobium titanate single crystal with a defined crystal orientation. The strontium titanate buffer layer is used to achieve lattice matching and continuous strain transfer between the ferroelectric single crystal and the lanthanum nickelate conductive oxide layer. The lanthanum nickelate conductive oxide layer exhibits a stable metallic conductive state at room temperature. The electrical properties of the lanthanum nickelate conductive oxide layer can be reversibly controlled by driving polarization strain through the electric field of the ferroelectric single crystal substrate.

2. The heterostructure of claim 1, wherein, The ferroelectric single crystal substrate is a lead-magnesium-niobium titanate single crystal with a lead titanate molar fraction of 0.

3.

3. The heterostructure as described in claim 1, characterized in that, The strontium titanate buffer layer is a single-crystal epitaxial structure with a thickness ranging from 25 nanometers to 40 nanometers.

4. The heterostructure as described in claim 1, characterized in that, The thickness of the lanthanum nickelate conductive oxide layer is approximately 15 nanometers.

5. A method for growing an oxide thin film with a heterostructure as described in any one of claims 1 to 4, characterized in that, A lanthanum nickelate conductive oxide layer was grown on the surface of a strontium titanate buffer layer using pulsed laser deposition. By synergistically controlling the deposition temperature, oxygen partial pressure, and laser energy density, the surface resistivity of the formed lanthanum nickelate conductive oxide layer was stably distributed at around 500 ohms at 20 degrees Celsius. This allows for the construction of a conductive oxide layer that combines low defect density with high strain response sensitivity.

6. The growth method as described in claim 5, characterized in that, The deposition temperature of the lanthanum nickelate conductive oxide layer is controlled at 600 degrees Celsius, with an allowable deviation of no more than 5 degrees Celsius.

7. The growth method as described in claim 5, characterized in that, The growth process of the lanthanum nickelate conductive oxide layer is carried out in an oxygen-rich atmosphere, and the oxygen environment is continuously maintained during the cooling process after the growth is completed to suppress the formation of oxygen vacancies.

8. The application of the heterostructure according to any one of claims 1 to 4 in an electric field-controlled oxide electronic device, characterized in that, The reversible strain generated in the ferroelectric single-crystal substrate under an applied electric field is transferred to the lanthanum nickelate conductive oxide layer through a strontium titanate buffer layer. This enables non-thermal control of the carrier transport characteristics of conductive channels.

9. The application as described in claim 8, characterized in that, The heterostructure is used as the source / drain electrode structure in the electric field control device to reduce ohmic losses during device operation.

10. The application as described in claim 8, characterized in that, The electric field-controlled oxide electronic devices include piezoelectric strain sensors, Mott-type control devices, or ferroelectric field effect control devices.

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