Multimode multi-frequency power amplifier

Abstract

This invention relates to the field of wireless communication technology and provides a multi-mode multi-frequency power amplifier. The multi-mode multi-frequency power amplifier includes: a substrate, a first power amplifier, a first output matching circuit, a second power amplifier, a second output matching circuit, and a switching chip. The switching chip includes a first switching unit, a second switching unit, and a third switching unit. The first output matching circuit includes a first output matching unit, a first inductor, a control switch, and a first harmonic suppression unit. The normally open terminal of the control switch is connected to and grounded to the second terminal of the first harmonic suppression unit. The second output matching circuit includes a second output matching unit, a second inductor, and a second harmonic suppression unit. The first inductor is coupled to the second inductor. When the third switching unit is working, the control switch is open; when the third switching unit is not working, the first and second switching units are working, and the control switch is on. The multi-mode multi-frequency power amplifier of this invention has good isolation.

Description

Technical Field

[0001] This invention relates to the field of wireless communication technology, and in particular to a multimode multi-frequency power amplifier. Background Technology

[0002] In 5G communication systems, multi-mode multi-band (MMMB) power amplifiers (PAs) need to implement carrier aggregation (CA) on the MB (mid-band, frequency range from 1710MHz to 2025MHz) and HB (high-band, frequency range from 2300MHz to 2690MHz). One operating scenario is that the MBPA is in transmit mode, while the HB output port and HBRX receiver port are connected and in receive mode. Part of the MB's main frequency falls within the HBRX receiver band, interfering with the received signal and degrading receiver sensitivity. Therefore, 5G communication systems have strict requirements on the isolation level of the HBRX receiver port when the MB is in transmit mode.

[0003] Most multimode multi-frequency power amplifiers in related technologies are packaged in a 4.8mm x 6.3mm size, with the MB and HB distributed in different areas, providing ample isolation space and making it easy to achieve a good level of isolation. However, for smaller multimode multi-frequency power amplifiers with a 3mm x 3mm package, the lack of sufficient isolation space between the MB and HB leads to significant energy leakage to the HBRX line when the MB is in transmit mode. Therefore, optimized isolation design is necessary.

[0004] like Figure 1-2 As shown, the multimode multi-frequency power amplifier of the relevant technology generally includes an HB power amplifier, an HB output matching circuit, an MB power amplifier, an MB output matching circuit, and a switching chip. The HB output matching circuit includes inductor L2, and the MB power amplifier includes inductor L4. The spacing between the two inductors is insufficient, resulting in severe mutual coupling. When the MB is working, some MB power is coupled to the HB output matching circuit through the coupling path between L4 and L2. When the MBTX1 port outputs power, the MB energy is coupled to the HBTX1 port and the HBRX port through the coupling relationship between the gold wires L5 and L3 (the gold wires of the HBTX1 port) and the gold wire L1 (the gold wires of the HBRX port), leading to a deterioration of the HB isolation.

[0005] However, the aforementioned multimode multi-frequency power amplifiers reduce spatial radiation by increasing the spatial distance between the MB circuit and the HBRX circuit; or by using grounded copper foil on the substrate to isolate the MB output matching line from the HBRX circuit, thereby increasing the distance between the MB output port, the HB output port, and the HBRX port; however, these methods are difficult to achieve the improvement target in a 3mm×3mm MMMB PA. Summary of the Invention

[0006] To address the shortcomings of the existing technologies, this invention proposes a multimode multi-frequency power amplifier to solve the problems of poor isolation and large size of existing multimode multi-frequency power amplifiers.

[0007] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0008] This invention provides a multi-mode multi-frequency power amplifier, comprising: a substrate, a first power amplifier, a first output matching circuit, a second power amplifier, a second output matching circuit, and a switching chip disposed on the substrate; the input terminals of the first power amplifier and the second power amplifier are respectively used to receive radio frequency signals; the output terminal of the first power amplifier is connected to the input terminal of the first output matching circuit, and the output terminal of the first output matching circuit is connected to the switching chip; the output terminal of the second power amplifier is connected to the input terminal of the second output matching circuit, and the output terminal of the second output matching circuit is connected to the switching chip; the first power amplifier is used to amplify the radio frequency signal at a high frequency, and the first output matching circuit is used to perform impedance matching on the amplified high-frequency signal before outputting it; the second power amplifier is used to amplify the radio frequency signal at a mid-frequency, and the second output matching circuit is used to perform impedance matching on the amplified mid-frequency signal before outputting it. The switching chip includes a first switching unit, a second switching unit, and a third switching unit. The input terminal of the first switching unit is connected to the output terminal of the first output matching circuit, and the output terminal of the first switching unit is used to connect to the high-frequency signal transmitter and the input terminal of the second switching unit, respectively. The output terminal of the second switching unit is connected to the high-frequency signal receiver. The input terminal of the third switching unit is connected to the output terminal of the second output matching circuit, and the output terminal of the third switching unit is used to connect to the intermediate frequency signal transmitter. The first output matching circuit includes a first output matching unit, a first inductor, a control switch, and a first harmonic suppression unit. The input terminal of the first output matching unit serves as the input terminal of the first output matching circuit. The output terminal of the first output matching unit is connected to the first terminal of the first inductor. The second terminal of the first inductor is connected to the common terminal of the control switch and the first terminal of the first harmonic suppression unit, and serves as the output terminal of the first output matching circuit. The normally open terminal of the control switch is connected to the second terminal of the first harmonic suppression unit and grounded. The second output matching circuit includes a second output matching unit, a second inductor, and a second harmonic suppression unit. The input terminal of the second output matching unit serves as the input terminal of the second output matching circuit. The output terminal of the second output matching unit is connected to the first terminal of the second inductor. The second terminal of the second inductor is connected to the first terminal of the second harmonic suppression unit and serves as the output terminal of the second output matching circuit. The second terminal of the second harmonic suppression unit is connected to and grounded. The first inductor is coupled to the second inductor. When the third switching unit is working, the control switch is open. When the third switching unit is not working, the first switching unit and the second switching unit are working, and the control switch is turned on to conduct the intermediate frequency signal coupled by the first inductor to ground.

[0009] Preferably, the first inductor includes a first trace and a second trace connected in sequence, the first trace being integrated on the substrate and the second trace being integrated on the switch chip; The second inductor includes a third trace and a fourth trace connected in sequence, the third trace being integrated on the substrate and the fourth trace being integrated on the switch chip.

[0010] Preferably, the first switching unit includes a first switch, a second switch, a third inductor, and a fourth inductor; the common terminal of the first switch serves as the input terminal of the first switching unit, the normally open terminal of the first switch is connected to the common terminal of the second switch and the first terminal of the third inductor, the second terminal of the third inductor is connected to the high-frequency signal transmitting terminal, the normally open terminal of the second switch is grounded after being connected in series with the fourth inductor, and the normally open terminal of the first switch also serves as the output terminal of the first switching unit; The second switching unit includes a third switch, a fourth switch, and a fifth inductor; the first end of the fifth inductor serves as the input end of the second switching unit, the second end of the fifth inductor is connected to the common end of the third switch, the normally open end of the third switch is connected to the high-frequency signal receiving end and the common end of the fourth switch, and the normally open end of the fourth switch is grounded.

[0011] Preferably, the third switching unit includes a fifth switch, a sixth switch, a sixth inductor, and a seventh inductor; the common terminal of the fifth switch serves as the input terminal of the third switching unit, the normally open terminal of the fifth switch is connected to the common terminal of the sixth switch and the first terminal of the sixth inductor, the second terminal of the sixth inductor is connected to the intermediate frequency signal transmitter, the normally open terminal of the sixth switch is grounded after being connected in series with the seventh inductor, and the normally open terminal of the fifth switch also serves as the output terminal of the third switching unit.

[0012] Preferably, the first switching unit includes multiple units arranged in parallel, and the third switching unit includes multiple units arranged in parallel.

[0013] Preferably, the first harmonic suppression unit includes a first capacitor and an eighth inductor. The first terminal of the first capacitor serves as the first terminal of the first harmonic suppression unit, the second terminal of the first capacitor is connected to the first terminal of the eighth inductor, and the second terminal of the eighth inductor is grounded.

[0014] Preferably, the second harmonic suppression unit includes a second capacitor and a ninth inductor. The first terminal of the second capacitor serves as the first terminal of the second harmonic suppression unit, and the second terminal of the second capacitor is connected to the first terminal of the ninth inductor. The second terminal of the ninth inductor is grounded.

[0015] Preferably, the second capacitor is disposed on the switching chip, and the ninth inductor is connected to the ground terminal of the substrate.

[0016] Preferably, the high-frequency signal transmitter and the high-frequency signal receiver are located above the switching chip, and the intermediate frequency signal transmitter is located below the switching chip.

[0017] Preferably, the first output matching unit includes a third capacitor, a fourth capacitor, a tenth inductor, and an eleventh inductor; the first terminal of the third capacitor is connected to the first terminal of the fourth capacitor and serves as the input terminal of the first output matching unit, and the second terminal of the third capacitor is grounded after being connected in series with the tenth inductor; the second terminal of the fourth capacitor is connected to the first terminal of the eleventh inductor and serves as the output terminal of the first output matching unit, and the second terminal of the eleventh inductor is grounded. The second output matching unit includes a fifth capacitor, a sixth capacitor, a twelfth inductor, and a thirteenth inductor; the first terminal of the fifth capacitor is connected to the first terminal of the sixth capacitor and serves as the input terminal of the second output matching unit, and the second terminal of the fifth capacitor is grounded after being connected in series with the twelfth inductor; the second terminal of the sixth capacitor is connected to the first terminal of the thirteenth inductor and serves as the output terminal of the second output matching unit, and the second terminal of the thirteenth inductor is grounded.

[0018] Compared with related technologies, in the embodiments of the present invention, the input terminal of the first switching unit of the switching chip is connected to the output terminal of the first output matching circuit, the output terminal of the first switching unit is used to connect to the input terminal of the high-frequency signal transmitter and the second switching unit respectively, and the output terminal of the second switching unit is connected to the high-frequency signal receiver; the input terminal of the third switching unit is connected to the output terminal of the second output matching circuit, and the output terminal of the third switching unit is used to connect to the intermediate frequency signal transmitter; the output terminal of the first output matching unit is connected to the first terminal of the first inductor, the second terminal of the first inductor is connected to the common terminal of the control switch and the first terminal of the first harmonic suppression unit respectively, and serves as the output terminal of the first output matching circuit; the normally open terminal of the control switch is connected to the first harmonic suppression unit. The second terminal of the first inductor is connected to and grounded; the output terminal of the second output matching unit of the second output matching circuit is connected to the first terminal of the second inductor, the second terminal of the second inductor is connected to the first terminal of the second harmonic suppression unit and serves as the output terminal of the second output matching circuit, and the second terminal of the second harmonic suppression unit is connected to and grounded; the first inductor is coupled to the second inductor, and when the third switching unit is working, the control switch is open; when the third switching unit is not working, the first switching unit and the second switching unit are working, and the control switch is turned on, so as to conduct and ground the intermediate frequency signal coupled by the first inductor, so that the transmitting port of the intermediate frequency power amplifier and the receiving port of the high frequency power amplifier are far apart from each other, which greatly improves the isolation of the MBTX port to the HBRX port. Attached Figure Description

[0019] The present invention will now be described in detail with reference to the accompanying drawings. The above and other aspects of the present invention will become clearer and more readily understood through the detailed description following the accompanying drawings. In the drawings: Figure 1 This is a chip layout diagram of a conventional multimode multifrequency power amplifier. Figure 2 The circuit diagram is for a multi-mode multi-frequency power amplifier in the prior art; Figure 3 A circuit diagram of a multimode multi-frequency power amplifier provided in an embodiment of the present invention; Figure 4 Chip layout of a multimode multi-frequency power amplifier provided in an embodiment of the present invention Figure 1 ; Figure 5 Chip layout of a multimode multi-frequency power amplifier provided in an embodiment of the present invention Figure 2 .

[0020] Among them, 100 is a multi-mode multi-frequency power amplifier, 1 is a substrate, 2 is a first power amplifier, 3 is a first output matching circuit, 31 is a first output matching unit, 32 is a first harmonic suppression unit, 4 is a second power amplifier, 5 is a second output matching circuit, 51 is a second output matching unit, 52 is a second harmonic suppression unit, 6 is a switching chip, 61 is a first switching unit, 62 is a second switching unit, 63 is a third switching unit, 7 is a first trace, 8 is a second trace, 9 is a third trace, and 10 is a fourth trace. Detailed Implementation

[0021] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein in the specification of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "comprising" and "having," and any variations thereof, in the specification, claims, and foregoing drawings of this application, are intended to cover non-exclusive inclusion. The terms "first," "second," etc., in the specification, claims, or foregoing drawings of this application are used to distinguish different objects, not to describe a particular order.

[0022] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0023] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0024] Example 1 Please see Figures 2-5As shown, this embodiment of the invention provides a multi-mode multi-frequency power amplifier 100, which includes: a substrate 1, a first power amplifier 2, a first output matching circuit 3, a second power amplifier 4, a second output matching circuit 5, and a switching chip 6 disposed on the substrate 1; the input terminals of the first power amplifier 2 and the second power amplifier 4 are respectively used to receive radio frequency signals; the output terminal of the first power amplifier 2 is connected to the input terminal of the first output matching circuit 3, and the output terminal of the first output matching circuit 3 is connected to the switching chip 6; the output terminal of the second power amplifier 4 is connected to the input terminal of the second output matching circuit 5, and the output terminal of the second output matching circuit 5 is connected to the switching chip 6; the first power amplifier 2 is used to amplify the radio frequency signal at high frequencies, and the first output matching circuit 3 is used to perform impedance matching on the amplified high-frequency signal before outputting it; the second power amplifier 4 is used to amplify the radio frequency signal at intermediate frequencies, and the second output matching circuit 5 is used to perform impedance matching on the amplified intermediate-frequency signal before outputting it. The first power amplifier 2 is a multi-stage power amplification module, and the second power amplifier 4 is a multi-stage power amplification module, such as 2-stage or 3-stage, with the same number of stages.

[0025] The switching chip 6 includes a first switching unit 61, a second switching unit 62, and a third switching unit 63. The input terminal of the first switching unit 61 is connected to the output terminal of the first output matching circuit 3, and the output terminal of the first switching unit 61 is used to connect to the high-frequency signal transmitter HBTX1 and the input terminal of the second switching unit 62, respectively. The output terminal of the second switching unit 62 is connected to the high-frequency signal receiver HBRX1. The input terminal of the third switching unit 63 is connected to the output terminal of the second output matching circuit 5, and the output terminal of the third switching unit 63 is used to connect to the intermediate frequency signal transmitter MBTX1. Radio frequency signals are input to the first power amplifier 2 (high-frequency link) and the second power amplifier 4 (intermediate frequency link), respectively. After amplification, the high-frequency signal undergoes impedance matching and harmonic suppression by the first output matching circuit 3 before being sent to the first switching unit 61 of the switching chip 6. After amplification, the intermediate frequency signal is processed by the second output matching circuit 5 and sent to the third switching unit 63. Finally, the signals are transmitted and received externally through the high-frequency transmitter / receiver and the intermediate frequency signal transmitter MBTX1, respectively.

[0026] The first output matching circuit 3 includes a first output matching unit 31, a first inductor L1, a control switch K, and a first harmonic suppression unit 32. The input terminal of the first output matching unit 31 serves as the input terminal of the first output matching circuit 3. The output terminal of the first output matching unit 31 is connected to the first terminal of the first inductor L1. The second terminal of the first inductor L1 is connected to the common terminal of the control switch K and the first terminal of the first harmonic suppression unit 32, and serves as the output terminal of the first output matching circuit 3. The normally open terminal of the control switch K is connected to the second terminal of the first harmonic suppression unit 32 and grounded. By adding a control switch K at the rear end of the first inductor L1, the coupled intermediate frequency signal is grounded during high-frequency operation, suppressing intermediate frequency energy crosstalk to the high-frequency receiving path from the source. This achieves an isolation of 50dB between the intermediate frequency and the high-frequency signal receiving terminal HBRX1, which is superior to existing comparative solutions. This significantly optimizes the isolation between the intermediate frequency and the high-frequency signal receiving terminal HBRX1.

[0027] The second output matching circuit 5 includes a second output matching unit 51, a second inductor L2, and a second harmonic suppression unit 52. The input terminal of the second output matching unit 51 serves as the input terminal of the second output matching circuit 5. The output terminal of the second output matching unit 51 is connected to the first terminal of the second inductor L2. The second terminal of the second inductor L2 is connected to the first terminal of the second harmonic suppression unit 52 and serves as the output terminal of the second output matching circuit 5. The second terminal of the second harmonic suppression unit 52 is connected to and grounded. The first inductor L1 is coupled to the second inductor L2. When the third switching unit 63 is working, the control switch K is open. When the third switching unit 63 is not working, the first switching unit 61 and the second switching unit 62 are working, and the control switch K is turned on to conduct and ground the intermediate frequency signal coupled by the first inductor L1. To address the intermediate frequency crosstalk signal generated by the wire coupling between the first inductor L1 and the second inductor L2, the control switch K is used to achieve grounding, solving the problem of isolation degradation caused by the coupling path and ensuring that the high-frequency and intermediate frequency links do not interfere with each other. By integrating the first harmonic suppression unit 32 and the second harmonic suppression unit 52 through the first output matching circuit 3 and the second output matching circuit 5 respectively, high-order harmonics are effectively filtered out while completing RF signal impedance matching and reducing signal reflection, thereby improving the quality of the amplified signal and the stability of the power amplifier. Simultaneously, this circuit structure, combined with the optimized layout of the substrate 1 and chip ports (grounding point away from high-frequency ports, ports and gold wires staggered), achieves excellent isolation performance in a miniaturized 3mm×3mm multimode multifrequency power amplifier 100 product, overcoming the isolation performance bottleneck under the premise of miniaturized packaging. The first inductor L1 and the second inductor L2 are mutually inductively coupled.

[0028] Specifically, when the intermediate frequency band is operating and the high frequency band is not operating, the third switching unit 63 is turned on, and the first switching unit 61 and the second switching unit 62 are turned off. The intermediate frequency amplified signal is transmitted to the switching chip 6 through the second output matching unit 51 and the second inductor L2, and is output by the intermediate frequency signal transmitter MBTX1. At this time, the control switch K is open and not connected to the high frequency link, so it will not affect the static operating state of the high frequency circuit. At the same time, the second harmonic suppression unit 52 filters out the harmonics of the intermediate frequency signal. The energy generated when the intermediate frequency band is operating is only transmitted within the intermediate frequency path, and there is no redundant energy crosstalk to the high frequency transceiver port.

[0029] When the high-frequency band is operating and the intermediate-frequency band is not, the first switching unit 61 and the second switching unit 62 are turned on, and the third switching unit 63 is turned off. The high-frequency amplified signal is transmitted to the switching chip 6 through the first output matching unit 31 and the first inductor L1; at the same time, the control switch K is turned on. Since the first inductor L1 and the second inductor L2 are coupled, some intermediate-frequency spurious signals will be coupled out. This part of the signal is directly discharged to ground through the turned-on control switch K, preventing intermediate-frequency energy from interfering with the high-frequency signal transmitter HBTX1 and the high-frequency signal receiver HBRX1; thus, the isolation level of the intermediate-frequency signal transmitter MBTX1 to the high-frequency signal receiver HBRX1 of the 3mm x 3mm small-size MMMBPA product is greatly optimized. The first harmonic suppression unit 32 synchronously filters out the high-order harmonics of the high-frequency signal to ensure the purity of the output signal.

[0030] In this embodiment, when HB is not working and MB is working, and the HBTX and HBRX ports are connected, the control switch K turns on, conducting the MB signal coupled from the second inductor L2 to ground, thus greatly optimizing the isolation of MB from HBRX. Because MB frequency energy is conducted to ground when the control switch K is on, the grounding position of this control switch K must not be close to the HBTX port, such as... Figure 3 As shown, the grounding position G of the control switch K is far away from the HBTX port and connected to the grounding position of the ground switch tube, thereby greatly optimizing the isolation.

[0031] In this embodiment, the first inductor L1 includes a first trace 7 and a second trace 8 connected in sequence. The first trace 7 is integrated on the substrate 1, and the second trace 8 is integrated on the switch chip 6. The second inductor L2 includes a third trace 9 and a fourth trace 10 connected in sequence. The third trace 9 is integrated on the substrate 1, and the fourth trace 10 is integrated on the switch chip 6. The first inductor L1 is formed by the first trace 7 integrated on the substrate 1 and the second trace 8 integrated on the switch chip 6, constituting a complete inductor structure. Similarly, the second inductor L2 is formed by the combination of the third trace 9 on the substrate 1 and the fourth trace 10 on the switch chip 6. The two traces together achieve impedance matching and harmonic suppression functions of the inductor, and the first inductor L1 and the second inductor L2 are coupled through wire bonding between the chip traces and the traces on the substrate 1. When operating in the high-frequency band, the first switching unit 61 and the second switching unit 62 are turned on. The high-frequency signal is transmitted to the switching chip 6 via the first inductor L1, which is formed by the first trace 7 on the substrate 1 and the second trace 8 on the switching chip 6. At this time, the control switch K is turned on, and the intermediate frequency crosstalk signal generated by the coupling between the first inductor L1 and the second inductor L2 is discharged to ground through the turned-on control switch K. The two-segment inductor structure does not affect the normal transmission of the high-frequency signal or the absorption of the crosstalk signal to ground. When operating in the intermediate frequency band, the third switching unit 63 is turned on, and the intermediate frequency signal is transmitted to the switching chip 6 via the second inductor L2, which is formed by the third trace 9 on the substrate 1 and the fourth trace 10 on the switching chip 6. The control switch K is turned off to avoid affecting the intermediate frequency path. The second inductor L2, which is formed by the two-segment trace, normally completes the impedance matching and harmonic suppression of the intermediate frequency signal. At the same time, the coupling relationship between the inductors remains stable, providing a structural basis for crosstalk suppression. This significantly saves layout space, avoiding excessively long inductor traces on a single carrier and perfectly adapting to the compact layout of 3mm×3mm small-size MMMBPA products. Meanwhile, the coupling of the first inductor L1 and the second inductor L2 is mainly achieved through in-chip routing and wire bonding, resulting in higher routing precision and easier control of coupling spacing. This reduces disordered stray coupling, allowing for more accurate dissipation of intermediate frequency crosstalk signals and further ensuring high isolation (50dB) between the MB and HBRX.

[0032] In this embodiment, the first switching unit 61 includes a first switch B, a second switch C, a third inductor L3, and a fourth inductor L4. The common terminal of the first switch B serves as the input terminal of the first switching unit 61. The normally open terminal of the first switch B is connected to the common terminal of the second switch C and the first terminal of the third inductor L3. The second terminal of the third inductor L3 is connected to the high-frequency signal transmitter HBTX1. The normally open terminal of the second switch C is grounded after being connected in series with the fourth inductor L4. The normally open terminal of the first switch B also serves as the output terminal of the first switching unit 61.

[0033] The second switching unit 62 includes a third switch A, a fourth switch F, and a fifth inductor L5; the first end of the fifth inductor L5 serves as the input end of the second switching unit 62, the second end of the fifth inductor L5 is connected to the common end of the third switch A, the normally open end of the third switch A is connected to the common end of the high-frequency signal receiving end HBRX1 and the fourth switch F respectively, and the normally open end of the fourth switch F is grounded.

[0034] Specifically, in the high-frequency transmission (HBTX) working state, the first switch B is turned on, the second switch C is turned off, and the grounding branch where the fourth inductor L4 is located is in the open state; the HB signal processed by the first output matching circuit 3 is input from the common terminal of the first switch B, and transmitted directly to the high-frequency signal transmitter HBTX1 for external transmission through the normally open terminal and the third inductor L3; at this time, the second switch unit 62 does not participate in the transmission path, and the fifth inductor L5, the third switch A, and the fourth switch F only serve as isolation branches to prevent the transmitted signal from entering the receiver.

[0035] In the high-frequency receiver (HBRX) operating state, the first switch B is on, the third switch A is on, and the fourth switch F is off. The external high-frequency received signal is input from the high-frequency signal receiving terminal HBRX1, and flows back to the internal high-frequency receiving path through the third switch A, the fifth inductor L5, and the first switch B. The grounding branches where the second switch C and the fourth switch F are located are both off, ensuring lossless transmission of the received signal and blocking direct crosstalk between the transmitter and receiver. By connecting the fourth inductor L4 in series between the second switch C and ground, and connecting the fifth inductor L5 in series at the front end of the receiving path, both RF choke and impedance matching functions are achieved, and high-frequency isolation is formed when the switches are off, avoiding loss of useful signals by the grounding branch. At the same time, it provides a path to ground for spurious signals when interference needs to be discharged.

[0036] In this embodiment, the third switching unit 63 includes a fifth switch D, a sixth switch I, a sixth inductor L6, and a seventh inductor L7. The common terminal of the fifth switch D serves as the input terminal of the third switching unit 63. The normally open terminal of the fifth switch D is connected to the common terminal of the sixth switch I and the first terminal of the sixth inductor L6. The second terminal of the sixth inductor L6 is connected to the intermediate frequency signal transmitter MBTX1. The normally open terminal of the sixth switch I is grounded after being connected in series with the seventh inductor L7. The normally open terminal of the fifth switch D also serves as the output terminal of the third switching unit 63. The third switching unit 63 forms the core switching and matching network for the intermediate frequency transmission path. It is composed of the fifth switch D, the sixth switch I, the sixth inductor L6, and the seventh inductor L7. With the coordination of high / intermediate frequency operating timing, it achieves path selection, impedance matching, and interference discharge. In the non-operating state, the sixth switch I and the seventh inductor L7 form an RF grounding absorption network, which effectively suppresses crosstalk from high-frequency signals to the intermediate frequency link. With the overall circuit, it can stably achieve an isolation level of 50dB, which is superior to conventional comparative schemes. Furthermore, the sixth inductor L6 optimizes intermediate frequency output matching and reduces signal reflection; the seventh inductor L7, when grounded, can suppress high-order harmonics and spurious coupling interference, reducing signal oscillation and self-excitation risks during mode switching.

[0037] In this embodiment, the first switching unit 61 comprises multiple units connected in parallel, and the third switching unit 63 comprises multiple units connected in parallel. The multiple parallel first switching units 61 and third switching units 63 can support independent or parallel operation of multiple high-frequency and intermediate-frequency signal transmitter MBTX1 ports, covering a wider range of frequency band combinations and perfectly adapting to the multi-channel application scenarios of the multi-mode multi-frequency power amplifier 100. Simultaneously, each parallel branch has an independent interference suppression structure, ensuring that the MB to HBRX isolation reaches 50dB even with multiple parallel operations. The isolation performance will not deteriorate due to the increase in the number of branches, resulting in better performance than traditional single-channel switching structures.

[0038] In this embodiment, the first harmonic suppression unit 32 includes a first capacitor C1 and an eighth inductor L8. The first end of the first capacitor C1 serves as the first end of the first harmonic suppression unit 32, and the second end of the first capacitor C1 is connected to the first end of the eighth inductor L8. The second end of the eighth inductor L8 is grounded. By forming a series resonant network with the first capacitor C1 and the eighth inductor L8, the resonant point is configured at the second / third harmonic frequencies of the high-frequency signal. When the high-frequency fundamental signal is transmitted through the first output matching circuit 3, because the frequency deviates from the resonant point, the network presents a high impedance to the fundamental wave, thus not losing useful power; while the high-order harmonics generated by high-frequency amplification fall into the resonant frequency band, the network presents a low impedance conduction and grounding, directly discharging the harmonic energy to the ground, thereby achieving high-frequency harmonic filtering. At the same time, this series LC network can suppress the harmonic components of the intermediate frequency spurious signal coupled through the first inductor L1 and the second inductor L2, and further reduce intermediate frequency crosstalk in conjunction with the control switch K.

[0039] In this embodiment, the second harmonic suppression unit 52 includes a second capacitor C2 and a ninth inductor L9. The first end of the second capacitor C2 serves as the first end of the second harmonic suppression unit 52, and the second end of the second capacitor C2 is connected to the first end of the ninth inductor L9, with the second end of the ninth inductor L9 grounded. The second capacitor C2 and the ninth inductor L9 form a series resonant network, resonating at the higher harmonic frequencies of the intermediate frequency (IF) signal. The IF fundamental signal passes smoothly through the second output matching circuit 5, while the higher harmonics are absorbed by the LC network resonant ground, ensuring the purity of the IF output signal spectrum and reducing the inductance of IF harmonics into the high-frequency receiver (HBRX) path through wiring and inductor coupling, thus optimizing isolation at the harmonic level. Furthermore, in non-operating modes (e.g., MB is operating, HB is off), the two harmonic suppression units can still attenuate the harmonics of stray signals from different frequency bands coupled to this link, forming a multi-level suppression system with switch grounding and port layout optimization, preventing harmonic components from degrading the MB's isolation from HBRX.

[0040] In this embodiment, the second capacitor C2 is disposed on the switching chip 6, and the ninth inductor L9 is connected to the ground terminal of the substrate 1. By embedding the second capacitor C2 on the switching chip 6, the space required for external capacitors on the surface of the substrate 1 is eliminated, significantly improving layout utilization to meet the requirements of the 3mm×3mm small-size MMMBPA package. The ninth inductor L9 is grounded via the substrate 1, and the grounding point is far from the high-frequency HB port, preventing the coupling of intermediate frequency discharge energy to the HBRX port from the grounding path, effectively ensuring a high isolation of 50dB between the MB and HBRX. Therefore, by placing the second capacitor C2 on the switching chip 6, its grounding method is to connect it to the ground of the substrate 1 through the ninth inductor L9. Since the grounding point of the ninth inductor L9 has MB energy input ground, the grounding position F of the ninth inductor L9 should not be close to the HB port and should be as far away as possible to improve isolation.

[0041] In this embodiment, the high-frequency signal transmitter HBTX1 and the high-frequency signal receiver HBRX1 are located above the switching chip 6, and the intermediate frequency (IF) signal transmitter MBTX1 is located below the switching chip 6. By adopting an upper and lower partition layout for the RF ports of the switching chip 6, the high-frequency signal transmitter HBTX1 and the high-frequency signal receiver HBRX1 are arranged in the upper region of the switching chip 6, and the IF signal transmitter MBTX1 is arranged in the lower region of the chip. Spatial isolation between the high-frequency and IF ports is achieved through physical separation. This increases the physical distance between the high-frequency and IF ports, spatially reducing the coupling of RF energy to the high-frequency transceiver through internal chip traces, substrate 1 parasitics, and spatial radiation when the IF signal transmitter MBTX1 is working, thus reducing crosstalk of the MB signal to the HBRX port. The gold wires of the high-frequency port and the IF port are located in the upper and lower regions of the chip, respectively, and the traces are naturally staggered and no longer parallel or closely parallel, fundamentally reducing the mutual inductive coupling between the gold wires and preventing IF energy from directly entering the high-frequency receiving path through gold wire coupling.

[0042] In this embodiment, the first output matching unit 31 includes a third capacitor C3, a fourth capacitor C4, a tenth inductor L10, and an eleventh inductor L11. The first terminal of the third capacitor C3 is connected to the first terminal of the fourth capacitor C4 and serves as the input terminal of the first output matching unit 31. The second terminal of the third capacitor C3 is grounded after being connected in series with the tenth inductor L10. The second terminal of the fourth capacitor C4 is connected to the first terminal of the eleventh inductor L11 and serves as the output terminal of the first output matching unit 31. The second terminal of the eleventh inductor L11 is grounded. By connecting the third capacitor C3 and the tenth inductor L10 in series and grounding them, and connecting them in parallel with the fourth capacitor C4 and the eleventh inductor L11, a high-frequency LC matching network is formed. This network matches the output impedance of the high-frequency power amplifier to the target impedance (typically 50Ω) of the input terminal of the switching chip 6, ensuring low reflection and high-efficiency transmission of high-frequency signals. The third capacitor C3 and the fourth capacitor C4 serve as DC isolation, preventing the DC bias voltage of the high-frequency power amplifier from being introduced into the subsequent switching chip 6 circuit. The tenth inductor L10 and the eleventh inductor L11, while achieving matching, can suppress stray signals and higher harmonics other than the high-frequency fundamental wave, thereby reducing the transmission of harmonic components to subsequent stages.

[0043] The second output matching unit 51 includes a fifth capacitor C5, a sixth capacitor C6, a twelfth inductor L12, and a thirteenth inductor L13; the first terminal of the fifth capacitor C5 is connected to the first terminal of the sixth capacitor C6 and serves as the input terminal of the second output matching unit 51, and the second terminal of the fifth capacitor C5 is grounded after being connected in series with the twelfth inductor L12; the second terminal of the sixth capacitor C6 is connected to the first terminal of the thirteenth inductor L13 and serves as the output terminal of the second output matching unit 51, and the second terminal of the thirteenth inductor L13 is grounded. The fifth capacitor C5 and the twelfth inductor L12 are connected in series and grounded, while the sixth capacitor C6 and the thirteenth inductor L13 are connected in parallel and grounded to form an LC matching network adapted to the intermediate frequency band. Its function is the same as that of the high-frequency matching unit: to accurately match the output impedance of the intermediate frequency power amplifier, ensuring efficient transmission of the intermediate frequency power signal to the switching chip 6; the fifth capacitor C5 and the sixth capacitor C6 provide DC isolation, and the twelfth inductor L12 and the thirteenth inductor L13 help suppress intermediate frequency harmonics and spurious interference. Moreover, the two matching networks are independent of each other and do not affect each other during operation. The grounding inductors of the first output matching unit 31 and the second output matching unit 51 can be optimized through the layout of the substrate 1, keeping the grounding point away from the high-frequency transceiver port, avoiding the grounding return current of the intermediate frequency matching network from coupling to the high-frequency receiving path. Combined with the port partitioning and switch discharge structure, the crosstalk of the MB signal to HBRX is further reduced.

[0044] It should be noted that the various embodiments described above with reference to the accompanying drawings are merely illustrative of the present invention and not intended to limit its scope. Those skilled in the art should understand that any modifications or equivalent substitutions made to the present invention without departing from its spirit and scope should be included within the scope of the present invention. Furthermore, unless the context otherwise requires, words appearing in the singular include those in the plural, and vice versa. Additionally, unless specifically stated otherwise, all or part of any embodiment may be used in conjunction with all or part of any other embodiment.

Claims

1. A multi-mode multi-band power amplifier, the multi-mode multi-band power amplifier comprising: A substrate, a first power amplifier, a first output matching circuit, a second power amplifier, a second output matching circuit, and a switching chip disposed on the substrate; The input terminals of the first power amplifier and the second power amplifier are respectively used to receive radio frequency signals. The output terminal of the first power amplifier is connected to the input terminal of the first output matching circuit, and the output terminal of the first output matching circuit is connected to the switching chip. The output terminal of the second power amplifier is connected to the input terminal of the second output matching circuit, and the output terminal of the second output matching circuit is connected to the switching chip. The first power amplifier is used to amplify the radio frequency signal at a high frequency, and the first output matching circuit is used to perform impedance matching on the amplified high-frequency signal before outputting it. The second power amplifier is used to amplify the radio frequency signal at an intermediate frequency, and the second output matching circuit is used to perform impedance matching on the amplified intermediate frequency signal before outputting it. Its characteristic is that... The switching chip includes a first switching unit, a second switching unit, and a third switching unit. The input terminal of the first switching unit is connected to the output terminal of the first output matching circuit, and the output terminal of the first switching unit is used to connect to the high-frequency signal transmitter and the input terminal of the second switching unit, respectively. The output terminal of the second switching unit is connected to the high-frequency signal receiver. The input terminal of the third switching unit is connected to the output terminal of the second output matching circuit, and the output terminal of the third switching unit is used to connect to the intermediate frequency signal transmitter. The first output matching circuit includes a first output matching unit, a first inductor, a control switch, and a first harmonic suppression unit; the input terminal of the first output matching unit serves as the input terminal of the first output matching circuit, the output terminal of the first output matching unit is connected to the first terminal of the first inductor, the second terminal of the first inductor is connected to the common terminal of the control switch and the first terminal of the first harmonic suppression unit respectively and serves as the output terminal of the first output matching circuit, and the normally open terminal of the control switch is connected to the second terminal of the first harmonic suppression unit and grounded; The second output matching circuit includes a second output matching unit, a second inductor, and a second harmonic suppression unit. The input terminal of the second output matching unit serves as the input terminal of the second output matching circuit. The output terminal of the second output matching unit is connected to the first terminal of the second inductor. The second terminal of the second inductor is connected to the first terminal of the second harmonic suppression unit and serves as the output terminal of the second output matching circuit. The second terminal of the second harmonic suppression unit is connected to and grounded. The first inductor is coupled to the second inductor. When the third switching unit is working, the control switch is open. When the third switching unit is not working, the first switching unit and the second switching unit are working, and the control switch is turned on to conduct the intermediate frequency signal coupled by the first inductor to ground.

2. The multi-mode multi-band power amplifier of claim 1, wherein, The first inductor includes a first trace and a second trace connected in sequence. The first trace is integrated on the substrate, and the second trace is integrated on the switch chip. The second inductor includes a third trace and a fourth trace connected in sequence, the third trace being integrated on the substrate and the fourth trace being integrated on the switch chip.

3. The multi-mode multi-band power amplifier of claim 1, wherein, The first switching unit includes a first switch, a second switch, a third inductor, and a fourth inductor; the common terminal of the first switch serves as the input terminal of the first switching unit; the normally open terminal of the first switch is connected to the common terminal of the second switch and the first terminal of the third inductor; the second terminal of the third inductor is connected to the high-frequency signal transmitting terminal; the normally open terminal of the second switch is grounded after being connected in series with the fourth inductor; and the normally open terminal of the first switch also serves as the output terminal of the first switching unit. The second switching unit includes a third switch, a fourth switch, and a fifth inductor; the first end of the fifth inductor serves as the input end of the second switching unit, the second end of the fifth inductor is connected to the common end of the third switch, the normally open end of the third switch is connected to the high-frequency signal receiving end and the common end of the fourth switch, and the normally open end of the fourth switch is grounded.

4. The multi-mode multi-band power amplifier of claim 1, wherein, The third switching unit includes a fifth switch, a sixth switch, a sixth inductor, and a seventh inductor; the common terminal of the fifth switch serves as the input terminal of the third switching unit, the normally open terminal of the fifth switch is connected to the common terminal of the sixth switch and the first terminal of the sixth inductor, the second terminal of the sixth inductor is connected to the intermediate frequency signal transmitter, the normally open terminal of the sixth switch is grounded after being connected in series with the seventh inductor, and the normally open terminal of the fifth switch also serves as the output terminal of the third switching unit.

5. The multi-mode multi-band power amplifier of claim 1, wherein, The first switching unit includes multiple units arranged in parallel, and the third switching unit includes multiple units arranged in parallel.

6. The multi-mode multi-band power amplifier of claim 1, wherein, The first harmonic suppression unit includes a first capacitor and an eighth inductor. The first terminal of the first capacitor serves as the first terminal of the first harmonic suppression unit, and the second terminal of the first capacitor is connected to the first terminal of the eighth inductor. The second terminal of the eighth inductor is grounded.

7. The multi-mode multi-band power amplifier of claim 1, wherein, The second harmonic suppression unit includes a second capacitor and a ninth inductor. The first terminal of the second capacitor serves as the first terminal of the second harmonic suppression unit, and the second terminal of the second capacitor is connected to the first terminal of the ninth inductor. The second terminal of the ninth inductor is grounded.

8. The multi-mode multi-band power amplifier of claim 7, wherein, The second capacitor is disposed on the switching chip, and the ninth inductor is connected to the ground terminal of the substrate.

9. The multi-mode multi-band power amplifier of claim 1, wherein, The high-frequency signal transmitter and the high-frequency signal receiver are located above the switching chip, and the intermediate-frequency signal transmitter is located below the switching chip.

10. The multimode multi-frequency power amplifier according to claim 1, characterized in that, The first output matching unit includes a third capacitor, a fourth capacitor, a tenth inductor, and an eleventh inductor; the first terminal of the third capacitor is connected to the first terminal of the fourth capacitor and serves as the input terminal of the first output matching unit, and the second terminal of the third capacitor is grounded after being connected in series with the tenth inductor; the second terminal of the fourth capacitor is connected to the first terminal of the eleventh inductor and serves as the output terminal of the first output matching unit, and the second terminal of the eleventh inductor is grounded. The second output matching unit includes a fifth capacitor, a sixth capacitor, a twelfth inductor, and a thirteenth inductor; the first terminal of the fifth capacitor is connected to the first terminal of the sixth capacitor and serves as the input terminal of the second output matching unit, and the second terminal of the fifth capacitor is grounded after being connected in series with the twelfth inductor; the second terminal of the sixth capacitor is connected to the first terminal of the thirteenth inductor and serves as the output terminal of the second output matching unit, and the second terminal of the thirteenth inductor is grounded.

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