Silicon wafer surface treatment method, photovoltaic cell and preparation method

By forming a pyramid-shaped protrusion structure on the surface of a silicon wafer and etching it into a tower base-shaped protrusion structure, the problem of fabricating ultra-small tower base structures in the prior art is solved, which improves the optical performance and cell conversion efficiency of photovoltaic cells, while reducing the manufacturing cost.

CN122340941APending Publication Date: 2026-07-03ZHEJIANG AIKO SOLAR ENERGY TECH CO LTD +2

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
ZHEJIANG AIKO SOLAR ENERGY TECH CO LTD
Filing Date
2026-04-20
Publication Date
2026-07-03

AI Technical Summary

Technical Problem

Existing technologies make it difficult to fabricate silicon wafer surfaces in back-contact photovoltaic cells that meet the size requirements of tower-shaped protrusion structures for different functional areas. In particular, the fabrication of ultra-small tower-shaped structures is difficult, resulting in surface damage that cannot be effectively removed, affecting the flatness and contact reliability of subsequent metal grid line printing.

Method used

The pyramid-shaped protrusions are formed by a texturing process, followed by a chemical polishing process to etch the base-shaped protrusions, and then a cleaning process to remove surface damage. This process controls the size and distribution density of the base-shaped protrusions and avoids additional pre-polishing steps.

Benefits of technology

This technology enables the formation of small-sized tower-shaped protrusions on the surface of silicon wafers, improving the optical reflection and conversion efficiency of photovoltaic cells, reducing process costs, and avoiding resource waste.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention provides a silicon wafer surface treatment method, a photovoltaic cell, and a fabrication method. The silicon wafer surface treatment method includes: performing a texturing process on the surface of the silicon wafer to be treated to form multiple pyramid-shaped protrusions on the surface; performing a first cleaning process on the surface to be treated; and performing a chemical polishing process on a designated area of ​​the surface to be treated to etch the pyramid-shaped protrusions in the designated area into base-shaped protrusions. The silicon wafer surface treatment method provided by this invention can form small base-shaped protrusions on the silicon wafer surface and reduce surface damage.
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Description

Technical Field

[0001] This invention relates to the field of photovoltaic manufacturing technology, and in particular to a silicon wafer surface treatment method, a photovoltaic cell, and a preparation method thereof. Background Technology

[0002] In back-contact photovoltaic cells, the light-receiving surface has a pyramidal light-trapping texture, while specific areas of the back-contact surface require polished surfaces with multiple pyramidal protrusions. The size of these protrusions directly affects back-side optical reflection and metal contact resistance. However, in practical designs, different functional areas have different requirements for the size of the surface protrusions. Specifically, some require larger protrusions to optimize contact, while others require extremely small protrusions or even nearly completely flat surfaces to achieve efficient internal reflection of light from the back side.

[0003] Currently, fabricating larger tower bases is relatively easy, while achieving ultra-small tower base surfaces is more difficult. Existing polishing methods, in pursuit of ultra-small tower bases, often fail to effectively remove cutting damage layers, surface residues, and slicing line marks due to insufficient thinning, resulting in decreased surface passivation quality and affecting the flatness and contact reliability of subsequent metal grid line printing. Summary of the Invention

[0004] This invention provides a silicon wafer surface treatment method, a photovoltaic cell and a preparation method, which aims to form a small tower-like protrusion structure on the silicon wafer surface and reduce surface damage to the silicon wafer.

[0005] This invention provides a method for surface treatment of silicon wafers, comprising the following steps:

[0006] A texturing process is performed on the surface of the silicon wafer to be processed, so as to form multiple pyramid-shaped protrusions on the surface to be processed.

[0007] The surface to be treated is subjected to a first cleaning process;

[0008] A chemical polishing process is performed on a designated area of ​​the surface to be treated to etch the pyramid-shaped protrusions in the designated area into a base-shaped protrusion structure.

[0009] Optionally, after completing the texturing process on the surface of the silicon wafer, the reflectivity of the surface to be treated is 7% to 20%.

[0010] Optionally, the step of texturing the surface of the silicon wafer to be treated specifically includes the following steps:

[0011] The surface to be treated is immersed in a texturing solution and maintained for a first process duration; wherein the texturing solution includes a first alkaline solution and a nucleating agent.

[0012] Optionally, the mass fraction of the first alkaline solution is 0.1% to 2%;

[0013] The duration of the first process is 200s~450s.

[0014] Optionally, the step of performing a chemical polishing process on a designated area of ​​the surface to be treated specifically includes the following steps:

[0015] The surface to be treated, after oxidation cleaning, is immersed in a chemical polishing solution and maintained for the second process duration; wherein, the chemical polishing solution includes a second alkaline solution and a defoaming agent.

[0016] Optionally, the mass fraction of the second alkaline solution is 0.05% to 1.5%;

[0017] The second process takes 50s to 500s.

[0018] Optionally, the step of performing the first cleaning process on the silicon wafer specifically includes the following steps:

[0019] At least one oxidation cleaning and at least one pure water cleaning.

[0020] Optionally, the oxidation cleaning specifically includes the following steps:

[0021] The silicon wafer is placed in a mixture of alkaline cleaning solution and oxidizing solution and maintained for a first cleaning time.

[0022] The alkaline cleaning solution has a mass fraction of 0.01% to 1.5%, the oxidizing solution has a mass fraction of 0.05% to 2.5%, and the first cleaning time is 50s to 500s.

[0023] Optionally, the oxidation cleaning specifically includes the following steps:

[0024] The silicon wafer is placed in an acidic cleaning solution and maintained for a second cleaning time, while ozone is introduced into the acidic cleaning solution.

[0025] The acidic cleaning solution has a mass fraction of 0.01% to 0.25%, and the second cleaning time is 90s to 300s.

[0026] Optionally, after completing the step of performing chemical polishing on a designated area of ​​the surface to be treated, the silicon wafer surface treatment method further includes the following steps:

[0027] A second cleaning process is then performed on the surface to be treated.

[0028] As another technical solution, the present invention also provides a method for preparing photovoltaic cells, which includes the following steps:

[0029] The silicon wafer to be treated is surface-treated using the silicon wafer surface treatment method described above.

[0030] As another technical solution, the present invention also provides a photovoltaic cell, which includes a silicon wafer treated by the silicon wafer surface treatment method described above;

[0031] Multiple tower-shaped protrusions are distributed in a designated area on the surface of the silicon wafer, and the diagonal length of the top surface of each tower-shaped protrusion is 1μm to 10μm.

[0032] The present invention has the following beneficial effects:

[0033] The silicon wafer surface treatment method provided in this invention proposes to first perform a texturing process on the surface of the silicon wafer to be treated, then perform a first cleaning process on the surface to be treated, and then perform a chemical polishing process on a designated area of ​​the surface to be treated. This process first forms a pyramid-shaped protrusion structure on the surface of the silicon wafer to be treated, and then removes the apex of the pyramid-shaped protrusion structure to form a base-shaped protrusion structure. In this way, the etching depth can be increased while avoiding the base-shaped protrusion structure from being too large, so as to remove surface damage on the silicon wafer surface as much as possible. Attached Figure Description

[0034] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used together with the embodiments of the invention to explain the invention and do not constitute a limitation thereof. The above and other features and advantages will become more apparent to those skilled in the art from the detailed description of exemplary embodiments with reference to the accompanying drawings, in which:

[0035] Figure 1 These are electron microscope images of the silicon wafer surface after processing using the tower base fabrication process proposed in the relevant technical solution;

[0036] Figure 2 A flowchart of a silicon wafer surface treatment method provided in an embodiment of the present invention;

[0037] Figure 3 This is a side-view electron microscope image of a silicon wafer surface after texturing process provided in this embodiment of the invention;

[0038] Figure 4 This is a front-view electron microscope image of a silicon wafer surface after being treated by the silicon wafer surface treatment method provided in the embodiments of the present invention;

[0039] Figure 5 This is a magnified electron microscope image of a silicon wafer surface after being treated by the silicon wafer surface treatment method provided in this embodiment of the invention.

[0040] Figure 6An isometric electron microscope image of a silicon wafer surface after being treated by the silicon wafer surface treatment method provided in this embodiment of the invention;

[0041] Figure 7 This is a side-view electron microscope image of a silicon wafer surface after being treated by the silicon wafer surface treatment method provided in the embodiments of the present invention;

[0042] Figure 8 Another flowchart of a silicon wafer surface treatment method provided in an embodiment of the present invention. Detailed Implementation

[0043] To enable those skilled in the art to better understand the technical solutions of the present invention, exemplary embodiments of the present invention are described below in conjunction with the accompanying drawings, including various details of the embodiments of the present invention to aid understanding. These should be considered merely exemplary. Therefore, those skilled in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present invention. Similarly, for clarity and brevity, descriptions of well-known functions and structures are omitted in the following description.

[0044] Where there is no conflict, the various embodiments of the present invention and the features thereof may be combined with each other.

[0045] As used herein, the term “and / or” includes any and all combinations of one or more related enumerated entries.

[0046] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used herein, the singular forms “a” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “made of” are used in this specification, the presence of the stated feature, integral, step, operation, element, and / or component is specified, but the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof is not excluded. Terms such as “connected” or “linked” are not limited to physical or mechanical connections but can include electrical connections, whether direct or indirect.

[0047] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having the meaning consistent with their meaning in the context of the relevant art and the invention, and will not be interpreted as having an idealized or overly formal meaning unless expressly so defined herein.

[0048] In this specification, "pyramid-shaped protrusion structure" refers to a microscopic protrusion morphology of a four-sided pyramid with multiple inclined sides formed on the surface of a silicon wafer. Because the structure is similar in shape to a pyramid, in the photovoltaic manufacturing field, structures with the above basic characteristics are conventionally described as "pyramid-shaped". However, it is not required that the structure be completely consistent with the ideal pyramid in geometry in terms of size, sharpness of edges and corners or absolute flatness of sides.

[0049] Furthermore, in this specification, "tower-shaped protrusion structure" refers to a frustum-shaped microscopic protrusion formed on the surface of a silicon wafer, having multiple inclined sides and a top plane. Since this structure is similar in shape to the base of a pyramid, in the photovoltaic manufacturing field, structures with the above basic characteristics are conventionally described as "tower-shaped," rather than requiring them to have a geometric shape that is completely consistent with the base of a pyramid in architecture.

[0050] In relevant technical solutions, the fabrication process of the tower base typically employs at least one chemical polishing step. Specifically, the chemical polishing solution used in the chemical polishing step can perform anisotropic etching on the silicon wafer surface, utilizing the characteristic that silicon unit cells are diamond cubic crystals to etch multiple tower base-like protrusion structures on the silicon wafer surface. Specifically, the final fabricated tower base-like protrusion structure is the unetched structure remaining on the silicon wafer surface after the etching reaction. Therefore, the top surface size of the tower base-like protrusion structure depends on the reaction range of the anisotropic etching, and the height of the tower base-like protrusion structure depends on the reaction depth of the anisotropic etching. Thus, to etch small-sized tower base-like protrusion structures, it is necessary to expand the reaction range of the anisotropic etching.

[0051] If the anisotropic etching range is increased by extending the etching reaction time, the top surface area of ​​the remaining tower-shaped protrusions will become smaller and smaller as the polishing process progresses. However, this will lead to excessively large distances between adjacent tower-shaped protrusions, resulting in an excessively low distribution density of tower-shaped protrusions. Furthermore, there is a risk that the top surface size of the tower-shaped protrusions may become too small or even disappear.

[0052] However, if the anisotropic etching reaction range is increased by increasing the reaction site density, the chemical polishing process needs to be shortened to minimize the etching depth of the anisotropic etching, thereby preventing the top surface of the tower-like protrusion structure from disappearing and forming a pyramid-like protrusion structure. But, if... Figure 1As shown, silicon wafers inevitably have surface damage such as pits, scratches, or residues. Therefore, shortening the chemical polishing process makes it difficult to remove all these surface damages, resulting in surface defects remaining on the wafer surface after the base fabrication process. This can lead to problems in subsequent passivation and metal grid printing processes. If pre-polishing is performed on the wafer surface before base fabrication—that is, isotropic etching of the entire wafer surface before base fabrication—a thicker layer of surface damage needs to be removed to ensure complete removal. This increases process costs and wastes resources.

[0053] It is evident that the tower base fabrication process employed in the relevant technical solutions makes it difficult to fabricate silicon wafer surfaces with minimal surface damage and a high-density distribution of small tower base structures.

[0054] To address the aforementioned technical problems, embodiments of the present invention provide a silicon wafer surface treatment method, such as... Figure 2 As shown, the method includes:

[0055] S1: A texturing process is performed on the surface of the silicon wafer to be treated, so as to form multiple pyramid-shaped protrusions on the surface to be treated.

[0056] S2: Perform the first cleaning process on the surface to be treated to remove residual chemicals and reaction byproducts.

[0057] S3: Perform a chemical polishing process on a specified area of ​​the surface to be treated to etch the pyramid-shaped protrusions in the specified area into a base-shaped protrusion.

[0058] Specifically, the texturing process used in step S1 utilizes the characteristic that silicon cells have a diamond cubic structure and different atomic densities on different crystal planes to achieve anisotropic etching of the silicon wafer, thereby etching multiple patterns such as... Figure 3 The pyramid-shaped protrusions shown correspond to the (111) crystal plane of the silicon cell on multiple sides, thus forming a macroscopic "textured" surface on the silicon wafer. By controlling the progress of the texturing process, the height, base size, and distribution density of the pyramid-shaped protrusions can be controlled; moreover, surface damage on the silicon wafer can also be etched away during the texturing process, thereby achieving surface thinning or removal. The chemical polishing process used in step S3 can perform isotropic etching on the surface of the silicon wafer with multiple pyramid-shaped protrusions to etch away the apex portions of the multiple pyramid-shaped protrusions, leaving only the base portions, thus forming multiple pyramid-shaped protrusions. Figures 4 to 7The tower-like protrusion structure shown; moreover, chemical polishing can further remove surface damage to the silicon wafer, thereby further thinning the surface damage or achieving complete removal of surface damage.

[0059] This invention proposes a method of first forming a pyramid-shaped protrusion structure and then removing the apex of the pyramid-shaped protrusion structure to form a base-shaped protrusion structure. This method can increase the etching depth while avoiding an excessively large base-shaped protrusion structure. This allows for the fabrication of small-sized base-shaped protrusion structures while minimizing surface damage on the silicon wafer. Furthermore, the silicon wafer surface treatment method proposed in this invention eliminates the need for an additional pre-polishing step to remove surface damage. Instead, the original surface damage can be removed during the texturing and chemical polishing processes, thereby reducing process costs and avoiding resource waste.

[0060] Moreover, such as Figure 5 As shown, the silicon wafer surface treatment method proposed in this embodiment of the invention can achieve a diagonal length of 1μm to 10μm for the top surface of each tower-shaped protrusion structure processed in a specified area on the silicon wafer surface. This size range is much smaller than the tower-shaped protrusion structures with a top surface diagonal length of 30μm to 50μm commonly found in related technologies. By reducing the top surface area of ​​the tower-shaped protrusions, the density of tower-shaped protrusions distributed per unit area of ​​silicon wafer can be increased, thereby increasing the total surface area of ​​multiple tower-shaped protrusions. Thus, when the surface to be treated is the light-receiving surface of the silicon wafer, the number of light emission events between the sides of the tower-shaped protrusions on the light-receiving surface can be increased, reducing the reflectivity of the entire designated area. When the surface to be treated is the backlighting surface of the silicon wafer, the contact area between the backlighting surface and the metal grid lines and doped layers can be increased, reducing the contact resistance of the metal grid lines and doped layers, thereby improving the conversion efficiency of the solar cell. When the surface to be treated is both sides of the silicon wafer, it can facilitate multiple reflections of incident light between the backlighting surface and the light-receiving surface, thereby improving light energy utilization and increasing the open-circuit current of the photovoltaic system.

[0061] Specifically, the designated area can be a local area on both sides of the silicon wafer, or the entire area on both sides of the silicon wafer, or a local area on the light-receiving surface of the silicon wafer, or the entire area on the light-receiving surface of the silicon wafer, or a local area on the backlight surface of the silicon wafer, or the entire area on the backlight surface of the silicon wafer.

[0062] In some embodiments, after the texturing process on the surface of the silicon wafer is completed, i.e., after step S1, the reflectivity of the silicon wafer surface is 7% to 20%. It should be noted that the reflectivity of the silicon wafer surface is correlated with the pyramid-shaped protrusion structure. Furthermore, when the reflectivity of the silicon wafer surface is 7% to 20%, the base width of the pyramid-shaped protrusion structure is 2 μm to 15 μm. Thus, the diagonal length of the pyramid-shaped protrusion structure formed in the subsequent chemical polishing process can reach 1 μm to 10 μm, and the height of the pyramid-shaped protrusion structure can meet the process requirements.

[0063] In some embodiments, the step of texturing the surface of the silicon wafer to be treated, i.e., step S1, specifically includes the following steps:

[0064] S11: Immerse the surface to be treated in the texturing solution and maintain it for the first process duration;

[0065] The texturing solution includes a first alkaline solution and a nucleating agent. Specifically, the first alkaline solution is used to react with the surface material of the silicon wafer in an etching reaction; the nucleating agent is used to form multiple nucleation points on the surface of the silicon wafer in the early stage of the etching reaction, so that the etching reaction starts from the nucleation points, thereby controlling the etching reaction density and thus controlling the distribution density of the pyramid-shaped protrusion structure.

[0066] In some specific embodiments, the first alkaline solution can be one of potassium hydroxide (KOH) solution, sodium hydroxide (NaOH) solution, ammonium hydroxide (NH4OH) solution and tetramethylammonium hydroxide (TMAH) solution. These alkaline solutions have a large difference in etching rate for the (100) crystal plane and the (111) crystal plane in the silicon cell structure, so as to achieve anisotropic etching of the silicon wafer surface, thereby effectively etching out the pyramid-shaped protrusion structure.

[0067] In some specific embodiments, the mass fraction of the first alkaline solution is 0.1% to 2%; the first process duration is 200s to 450s. Specifically, the higher the concentration of the first alkaline solution, the faster the etching rate; the longer the first process duration, the greater the etching depth, and consequently, the larger the size of the etched pyramid-shaped protrusion structure. The mass fraction range of the first alkaline solution and the range of the first process duration proposed in this embodiment can ensure that the etching range is not too deep, resulting in an excessively large pyramid-shaped protrusion structure, and that the etching depth is not too shallow, resulting in the inability to remove damage to the silicon wafer surface.

[0068] In some specific embodiments, the nucleating agent can be a polymer such as polyvinyl alcohol or PEO, which can form a polymer film covering the non-nucleation areas on the silicon wafer surface. This allows the first alkaline solution to preferentially etch the areas not covered by the polymer film; in other words, the areas not covered by the polymer film are the nucleation points. Specifically, since the nucleating agent concentration is related to the density of nucleation points formed on the silicon wafer surface, the nucleating agent concentration can be designed according to the actual density requirements of the tower-like protrusion structure.

[0069] In some specific embodiments, the texturing solution further includes a first surfactant, a first dispersant, and a first emulsifier; wherein, the first surfactant is used to reduce the overall surface tension of the texturing solution so that the texturing solution can be uniformly diffused on the silicon wafer surface, thereby ensuring that all parts of the silicon wafer to be treated can be in full contact with the texturing solution; the first dispersant is used to disperse the byproducts generated by the etching reaction, so as to avoid the byproducts from agglomerating and making it difficult to remove the byproducts in the subsequent first cleaning step, and also to avoid the byproducts from agglomerating and affecting the local etching reaction rate; the first emulsifier is used to promote the gas generated by the etching reaction to move away from the silicon wafer, so as to avoid bubbles remaining at the interface between the silicon wafer and the texturing solution, thereby avoiding the gas generated by the etching reaction from affecting the local etching reaction rate.

[0070] In some specific embodiments, the first surfactant may be one or a mixture of more of sodium dodecylbenzenesulfonate, fatty alcohol polyoxyethylene ether, or AEO-7.

[0071] In some specific embodiments, the first dispersant may be one or a mixture of carboxymethyl cellulose, hydroxyethyl cellulose and polyacrylamide.

[0072] In some specific embodiments, the first emulsifier may be one or a mixture of more of sodium sorbitan monostearate, polyethylene glycol, and organosilicon.

[0073] In some specific embodiments, the temperature of the texturing solution can be 65°C to 90°C. Specifically, the higher the temperature of the texturing solution, the higher the etching rate. However, if the temperature is too high, the etching rate of the texturing solution on different crystal planes of the silicon cell will tend to be uniform, which will lead to a decrease in the anisotropy ratio of the etching process, and may even prevent the formation of pyramidal bump structures. If the temperature is too low, the etching rate will be too low, which will lead to an excessively long process time. The temperature range of the texturing solution proposed in this embodiment can avoid both excessively high and excessively low temperatures, thereby enabling the formation of pyramidal bump structures in a shorter process time.

[0074] Furthermore, in some preferred embodiments, the temperature of the texturing solution can be 70°C to 80°C. Within this temperature range, the anisotropy ratio and etching rate of the etching process can be well balanced, thereby maximizing the etching rate while forming a pyramidal protrusion structure.

[0075] In some embodiments, the step of performing a chemical polishing process on a designated area of ​​the surface to be treated specifically includes the following steps:

[0076] S31: Immerse the surface to be treated after oxidation cleaning into a chemical polishing solution and maintain the second process duration;

[0077] The chemical polishing solution includes a second alkaline solution and a defoaming agent. Specifically, the second alkaline solution is used to etch the silicon wafer surface material, and since the chemical polishing process targets pyramid-shaped protrusions, the tips of these protrusions are preferentially etched. The defoaming agent reduces the surface tension of the second alkaline solution, allowing the gas generated during the etching reaction to quickly escape from the surface of the pyramid-shaped protrusions. This prevents air bubbles from affecting the contact between the second alkaline solution and the pyramid-shaped protrusions, thus achieving isotropic etching of the pyramid-shaped protrusions to create a smooth surface, i.e., the top surface of the pyramid-shaped protrusions.

[0078] In some related technical solutions, chemical polishing solutions typically use acidic polishing agents. However, the etching reaction between acidic oxidation solutions and silicon materials is extremely efficient. Therefore, using chemical polishing solutions containing acidic oxidation solutions can easily lead to difficulty in controlling the etching reaction progress, making it difficult to etch a square-like planar top surface at the top of the pyramid-shaped protrusion structure. It may even etch pits into the pyramid-shaped protrusion structure or between the pyramid-shaped protrusions, resulting in uncontrollable crystal phases. Therefore, compared with related technical solutions, the chemical polishing solution containing a second alkaline solution proposed in this embodiment can achieve a more precise etching reaction, and the etching progress is more controllable. This allows for more precise control over the height and top surface dimensions of the final etched pyramid-shaped protrusion structure.

[0079] In some specific embodiments, the defoaming agent may be one of diethylene glycol butyl ether, diethylene glycol propyl ether, and modified polyoxyethylene ether.

[0080] In some specific embodiments, the mass fraction of the second alkaline solution is 0.05% to 1.5%, and the second process duration is 50s to 500s. Specifically, the higher the concentration of the second alkaline solution, the faster the etching rate; the longer the second process duration, the greater the etching depth; and consequently, the greater the amount of material removed from the apex of the pyramid-shaped protrusion structure. Correspondingly, the height of the prepared pyramid-shaped protrusion structure is smaller, and the top surface size of the pyramid-shaped protrusion structure is larger. The mass fraction range of the second alkaline solution and the range of the second process duration proposed in this embodiment can ensure that the etching depth is not too deep, thus avoiding the pyramid-shaped protrusion structure being too small in height or too large in top surface size, and also preventing the etching depth from being too shallow, which would result in the inability to remove surface damage to the silicon wafer.

[0081] In some specific embodiments, the chemical polishing solution further includes a second surfactant, a second dispersant, and a second emulsifier. The second surfactant reduces the overall surface tension of the chemical polishing solution, allowing it to diffuse uniformly across the surface of the pyramidal protrusion structure, thus ensuring sufficient contact between the tip of the pyramidal protrusion and the chemical polishing solution. The second dispersant disperses byproducts generated during the etching reaction, preventing them from agglomerating and hindering subsequent cleaning steps, and also preventing agglomeration from affecting the local etching reaction rate. The second emulsifier promotes the removal of gas generated during the etching reaction from the pyramidal protrusion structure, preventing bubbles from remaining at the interface between the pyramidal protrusion surface and the chemical polishing solution, thereby preventing the gas generated during the etching reaction from affecting the local etching reaction rate.

[0082] In some specific embodiments, the second surfactant may be one or a mixture of more of potassium perfluorobutyl sulfonate, potassium perfluorohexyl sulfonate, and potassium perfluorooctyl sulfonate.

[0083] In some specific embodiments, the second dispersant may be one or a mixture of carboxymethyl cellulose, hydroxyethyl cellulose and polyacrylamide.

[0084] In some specific embodiments, the second emulsifier may be one or a mixture of sodium sorbitan monostearate and polyethylene glycol.

[0085] In some embodiments, the step of performing the first cleaning process on the silicon wafer, namely step S2 above, specifically includes the following steps:

[0086] S21: At least one oxidation cleaning and at least one pure water cleaning, to use oxidation cleaning to remove residual texturing solution and reaction byproducts, and oxidation cleaning also helps to reduce surface damage on the silicon wafer surface, and use pure water cleaning to remove byproducts generated by oxidation cleaning and oxidation cleaning agents.

[0087] Specifically, if both oxidation cleaning and pure water cleaning are performed multiple times, then oxidation cleaning and pure water cleaning can be performed alternately in a cycle.

[0088] In some specific embodiments, the above-mentioned oxidation cleaning specifically includes the following steps:

[0089] S211: Place the texturized silicon wafer into a mixed solution of alkaline cleaning solution and oxidizing solution, and maintain the first cleaning time;

[0090] The alkaline cleaning solution has a mass fraction of 0.01% to 1.5%, the oxidizing solution has a mass fraction of 0.05% to 2.5%, and the first cleaning time is 50s to 500s.

[0091] In some specific embodiments, the alkaline cleaning solution used in step S211 can be one of potassium hydroxide solution, sodium hydroxide solution, ammonium hydroxide solution and tetramethylammonium hydroxide solution; the oxidizing solution can be one of hydrogen peroxide, hypochlorous acid solution and sodium hypochlorite solution.

[0092] Alternatively, in some other specific embodiments, the above-mentioned oxidation cleaning specifically includes the following steps:

[0093] S212: The texturized silicon wafer is placed in an acidic cleaning solution and kept for the second cleaning time. At the same time, ozone is introduced into the acidic cleaning solution to enhance the oxidizing property of the acidic cleaning solution, thereby achieving oxidation cleaning.

[0094] The acidic cleaning solution has a mass fraction of 0.01% to 0.25%, and the second cleaning time is 90s to 300s.

[0095] In some specific embodiments, the alkaline cleaning solution used in step S212 above can be a hydrofluoric acid (HF) solution or a hydrochloric acid (HCl) solution; the concentration of ozone can be 5 ppm to 50 ppm.

[0096] In some embodiments, such as Figure 8 As shown, after completing the chemical polishing process on the designated area of ​​the surface to be treated, i.e., after completing step S3 above, the silicon wafer surface treatment method further includes:

[0097] S4: Perform a second cleaning process on the surface to be treated to remove residues on the silicon wafer surface; the residues include chemical polishing solutions and reaction byproducts.

[0098] In some specific embodiments, similar to the first cleaning process described above, the second cleaning process specifically includes the following steps:

[0099] S41: At least one oxidation cleaning and at least one pure water cleaning are performed to remove residual chemical polishing solutions and reaction byproducts using oxidation cleaning, which also helps reduce surface damage on the silicon wafer surface. Pure water cleaning removes byproducts and oxidation cleaning agents generated during oxidation cleaning. Specifically, if both oxidation cleaning and pure water cleaning are performed multiple times, they can be alternated in a cycle.

[0100] In some specific embodiments, the above-mentioned oxidation cleaning specifically includes the following steps:

[0101] S411: Place the texturized silicon wafer into a mixed solution of alkaline cleaning solution and oxidizing solution, and maintain the first cleaning time.

[0102] The alkaline cleaning solution has a mass fraction of 0.01% to 1.5%, the oxidizing solution has a mass fraction of 0.05% to 2.5%, and the first cleaning time is 50s to 500s.

[0103] In some specific embodiments, the alkaline cleaning solution used in step S411 can be one of potassium hydroxide solution, sodium hydroxide solution, ammonium hydroxide solution and tetramethylammonium hydroxide solution; the oxidizing solution can be one of hydrogen peroxide, hypochlorous acid solution and sodium hypochlorite solution.

[0104] Alternatively, in some other specific embodiments, the above-mentioned oxidation cleaning specifically includes the following steps:

[0105] S412: The texturized silicon wafer is placed in an acidic cleaning solution and kept for the second cleaning time, while ozone is introduced into the acidic cleaning solution.

[0106] The acidic cleaning solution has a mass fraction of 0.01% to 0.25%, and the second cleaning time is 90s to 300s.

[0107] In some specific embodiments, the alkaline cleaning solution used in step S412 above can be a hydrofluoric acid solution or a hydrochloric acid solution; the concentration of ozone can be 5ppm to 50ppm.

[0108] In some specific embodiments, such as Figure 8 As shown, after completing the second cleaning process on the surface to be treated, i.e., after completing step S4 above, the silicon wafer surface treatment method further includes the following steps:

[0109] S5: Perform at least one pure water rinse on the silicon wafer to remove residual alkaline or acidic solutions, inorganic and organic matter from the surface of the silicon wafer;

[0110] S6: Perform at least one acid cleaning on the silicon wafer to remove any oxide layer and metal ions that may be present on the silicon wafer surface, thereby improving the cleanliness of the silicon wafer surface;

[0111] S7: Perform at least one pure water rinse on the silicon wafer to remove residual acidic cleaning agents, inorganic and organic substances from the surface of the silicon wafer;

[0112] S8: Dry the silicon wafer to obtain a clean silicon wafer with multiple tower-like protrusions on the surface.

[0113] As another technical solution, embodiments of the present invention also provide a method for preparing photovoltaic cells, which includes the following steps:

[0114] The silicon wafer to be treated is surface-treated using the silicon wafer surface treatment method described above.

[0115] Furthermore, in some embodiments, after the surface treatment of the silicon wafer is completed, the method for preparing photovoltaic cells further includes:

[0116] A PN junction structure and a gate line structure are fabricated on the treated silicon wafer surface.

[0117] As another technical solution, this embodiment also provides a photovoltaic cell, which includes a silicon wafer treated by the silicon wafer surface treatment method described above;

[0118] Multiple tower-shaped protrusions are distributed in a designated area on the surface of the silicon wafer. The diagonal length of the top surface of each tower-shaped protrusion is 1μm to 10μm, so that the total surface area of ​​the multiple tower-shaped protrusions is large, thereby increasing the contact area between the designated area on the silicon wafer surface and other structures, or reducing the reflectivity of the designated area on the silicon wafer surface.

[0119] It is understood that the various preparation method embodiments mentioned above in this invention can be combined with each other to form combined embodiments without violating the underlying principles and logic. Due to space limitations, these will not be elaborated upon further in this invention. Those skilled in the art will understand that the specific execution order of each step in the above preparation method of the specific embodiments should be determined based on its function and possible internal logic.

[0120] This document has described exemplary embodiments, and while specific terminology has been used, it is intended and should be interpreted only in a general illustrative sense and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in conjunction with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of the invention as set forth in the appended claims.

Claims

1. A method for treating the surface of a silicon wafer, characterized by, Includes the following steps: A texturing process is performed on the surface of the silicon wafer to be processed, so as to form multiple pyramid-shaped protrusions on the surface to be processed. The surface to be treated is subjected to a first cleaning process; A chemical polishing process is performed on a designated area of ​​the surface to be treated to etch the pyramid-shaped protrusions in the designated area into a base-shaped protrusion structure.

2. The method of claim 1, wherein the silicon wafer is a silicon wafer for a solar cell. After completing the texturing process on the surface of the silicon wafer, the reflectivity of the surface to be treated is 7%~20%.

3. The method of claim 1, wherein the silicon wafer is a silicon wafer for a solar cell. The texturing process for the surface of the silicon wafer to be treated specifically includes the following steps: The surface to be treated is immersed in a texturing solution and maintained for a first process duration; wherein the texturing solution includes a first alkaline solution and a nucleating agent.

4. The method of claim 3, wherein the silicon wafer is a silicon wafer for a solar cell. The mass fraction of the first alkaline solution is 0.1% to 2%; The duration of the first process is 200s~450s.

5. The method of claim 1, wherein the silicon wafer is a silicon wafer for a solar cell. The step of performing chemical polishing on a designated area of ​​the surface to be treated specifically includes the following steps: The surface to be treated, after oxidation cleaning, is immersed in a chemical polishing solution and maintained for the second process duration; wherein, the chemical polishing solution includes a second alkaline solution and a defoaming agent.

6. The method of claim 5, wherein the step of applying a chemical solution to the surface of the silicon wafer is performed by immersing the silicon wafer in the chemical solution. The mass fraction of the second alkaline solution is 0.05%~1.5%; The second process takes 50s to 500s.

7. The method of claim 1, wherein the silicon wafer is a silicon wafer for a solar cell. The first cleaning process for the silicon wafer specifically includes the following steps: At least one oxidation cleaning and at least one pure water cleaning.

8. The method of claim 7, wherein the step of applying a chemical solution to the surface of the silicon wafer is performed by immersing the silicon wafer in the chemical solution. The oxidation cleaning specifically includes the following steps: The silicon wafer is placed in a mixture of alkaline cleaning solution and oxidizing solution and maintained for a first cleaning time. The alkaline cleaning solution has a mass fraction of 0.01% to 1.5%, the oxidizing solution has a mass fraction of 0.05% to 2.5%, and the first cleaning time is 50s to 500s.

9. The silicon wafer surface treatment method according to claim 7, characterized in that, The oxidation cleaning specifically includes the following steps: The silicon wafer is placed in an acidic cleaning solution and maintained for a second cleaning time, while ozone is introduced into the acidic cleaning solution. The acidic cleaning solution has a mass fraction of 0.01% to 0.25%, and the second cleaning time is 90s to 300s.

10. The silicon wafer surface treatment method according to claim 1, characterized in that, In addition to the step of performing chemical polishing on a designated area of ​​the surface to be treated, the silicon wafer surface treatment method further includes the following steps: A second cleaning process is then performed on the surface to be treated.

11. A method for preparing a photovoltaic cell, characterized in that, Includes the following steps: The silicon wafer to be treated is surface treated using the silicon wafer surface treatment method as described in any one of claims 1-10.

12. A photovoltaic cell, characterized in that, This includes silicon wafers treated by the silicon wafer surface treatment method as described in any one of claims 1-10; Multiple tower-shaped protrusions are distributed in a designated area on the surface of the silicon wafer, and the diagonal length of the top surface of each tower-shaped protrusion is 1μm~10μm.