A wafer-level printing offset detection method

Abstract

This invention provides a wafer-level printing offset detection method, comprising: providing a first dummy wafer, the first dummy wafer having the same size as the wafer under test, and the chip size and arrangement on the first dummy wafer being the same as the chip size and arrangement on the wafer under test; printing alignment marks corresponding to individual chips on the back side of the first dummy wafer, and the arrangement of the alignment marks corresponding to the chip layout; obtaining a printing program for the wafer under test, and printing on the back side of the first dummy wafer according to the printing program; verifying whether the relative position between the printing program and the alignment marks meets preset requirements; if the verification result shows that the relative position relationship does not meet the preset requirements, it is determined that there is a position offset, and the printing process parameters are adjusted according to the offset information.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging, and more specifically, to a wafer-level printing offset detection method. Background Technology

[0002] The markings on the surface or back of semiconductor products carry critical information such as supplier, product model, production batch, and traceability codes, serving as a core means of product identification, quality management, and market traceability. Currently, the mainstream marking process is completed at the wafer stage before chip packaging: before the entire wafer is cut into individual chips (dies), laser marking equipment is used to uniformly etch markings on the back of the wafer according to a preset program in the corresponding area of ​​each chip.

[0003] Conventional wafer-level marking processes offer advantages such as high efficiency and consistency, but they have long suffered from a technical problem: because the back of a wafer typically lacks the optical alignment patterns (such as dicing lines and alignment marks) found on the front, marking equipment can only rely on mechanical coordinates for positioning. Therefore, after the marking process is completed, it is impossible to immediately and directly verify whether the marked content accurately falls within the predetermined area of ​​each chip; in other words, it is impossible to detect any positional offset in the marking.

[0004] Currently, the inspection of printed markings can only be postponed to subsequent processes—after the wafer has been diced into individual chips, at which point a visual inspection is performed on each chip. This delayed inspection means that if the marking equipment experiences a positioning deviation or a programming error, it cannot be detected during the entire pre-dicing process, causing the misalignment to be replicated across the entire wafer. Ultimately, this results in a large number of defective products being scrapped after dicing. Summary of the Invention

[0005] In view of the problems existing in the prior art of wafer-level printing detection, this application provides a wafer-level printing offset detection method that can efficiently detect the offset of printing position before wafer dicing.

[0006] To achieve the above and other related objectives, the present invention provides a wafer-level printing offset detection method, comprising:

[0007] S11: Provide a first dummy wafer, the first dummy wafer having the same size as the wafer under test, and the chip size and arrangement on the first dummy wafer being the same as the chip size and arrangement on the wafer under test;

[0008] S12: On the back of the first dummy chip, alignment marks are printed at positions corresponding to the chip, and the arrangement of the alignment marks corresponds to the arrangement of the chip;

[0009] S13: Obtain a printing program for printing on the wafer under test, and perform simulated printing on the back of the first dummy wafer according to the printing program;

[0010] S14: Check whether the relative position between the printed content on the back of the first fake film and the alignment mark meets the preset requirements;

[0011] S15: If the test results show that the relative positional relationship does not meet the preset requirements, it is determined that there is a positional offset, and the printing process parameters are adjusted according to the offset information.

[0012] Optionally, after printing alignment marks on the back of the first dummy film, step S2 also includes a calibration step:

[0013] The accuracy of the error between the alignment mark position on the back of the first dummy chip and the chip position on the front is measured.

[0014] If the error accuracy is greater than the preset error accuracy, the printing position of the alignment mark is readjusted until the error accuracy meets the preset error accuracy.

[0015] Optionally, the printing program includes: printing content information, coordinate information, and process parameters of the printing equipment.

[0016] Optionally, the alignment marks include: outer frame alignment marks, embedded alignment marks, or feature-based alignment marks.

[0017] Optionally, the alignment mark is a frame-type alignment mark, which has a shape similar to the shape of the chip, and the size of the frame-type alignment mark is greater than or equal to the size of the chip.

[0018] Optionally, S21: A second dummy wafer is provided, the second dummy wafer having the same size as the wafer under test, and the chip size and arrangement on the second dummy wafer being the same as the chip size and arrangement on the wafer under test;

[0019] S22: A light-transmitting film is provided on the back of the second dummy film;

[0020] S23: Cut along the second dummy wafer cutting path to form a grid-like cutting mark on the light-transmitting film that corresponds to the chip arrangement;

[0021] S24: Peel off the light-transmitting film with the grid-like cutting marks to obtain a transparent projection sheet;

[0022] S25: Cover the wafer to be tested with the transparent projection sheet, which has already been printed on the back, and align it;

[0023] S26: Observe the actual printed position on the wafer under test through the grid window of the transparent projection sheet to determine whether there is an offset.

[0024] Optionally, the light-transmitting film includes a highly transparent cutting tape.

[0025] Optionally, the first dummy wafer and the second dummy wafer are made using the same exposure mask as the wafer under test.

[0026] Optionally, it further includes: providing auxiliary alignment marks on the light-transmitting film that correspond to the alignment marks of the second dummy film.

[0027] As described above, the wafer-level printing offset detection method provided by the present invention has at least the following beneficial technical effects:

[0028] The wafer-level printing offset detection method provided by this invention offers two simple, efficient, and low-cost solutions. First, the detection process is moved forward to before the actual processing of the product wafer. By using a dummy wafer with alignment marks to simulate printing, it is possible to determine whether the printing equipment has deviated before the first product wafer is fed into the wafer. If an offset occurs, the equipment parameters or mechanisms can be calibrated, avoiding potential batch defects – a preventative measure. Second, after printing but before dicing, a transparent grid projection sheet is used for rapid inspection, enabling quick checking of the printing positions across the entire wafer before dicing. Both methods are based on physical template comparison, ensuring objective and consistent judgment standards. This effectively eliminates the subjectivity and volatility of manual visual inspection or algorithmic threshold settings, guaranteeing high reliability and stable yield of the detection results. Attached Figure Description

[0029] Figure 1 The flowchart shown is a wafer-level printing offset detection method provided in Embodiment 1 of the present invention.

[0030] Figure 2 The diagram shown is a schematic diagram of the first dummy structure provided in Embodiment 1.

[0031] Figure 3 The diagram shown is a schematic diagram of the first dummy structure provided in Embodiment 1.

[0032] Figure 4 The diagram shown is a schematic diagram of the second dummy structure provided in Embodiment 1.

[0033] Figure 5 The diagram shown is a schematic representation of the structure of the transparent projection sheet provided in Example 1 located on the wafer to be tested.

[0034] Reference numerals: 10, first fake film; 20, second fake film; 21, translucent film; 30, transparent slide; 31, grid-like cutting marks; 32, auxiliary alignment mark. Detailed Implementation

[0035] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0036] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Although the illustrations only show components related to the present invention and are not drawn according to the actual number, shape and size of the components, the shape, quantity, positional relationship and proportion of each component can be arbitrarily changed under the premise of realizing the technical solution of this invention, and the layout of the components may also be more complex.

[0037] Example 1

[0038] This embodiment provides a wafer-level marking offset detection method, such as... Figure 1 The diagram shows a flowchart of the wafer-level printing offset detection method provided in this embodiment; it includes the following steps: S11: Provide a first dummy wafer, the first dummy wafer having the same size as the wafer under test, and the chip size and arrangement on the first dummy wafer being the same as the chip size and arrangement on the wafer under test; S12: Print alignment marks on the back of the first dummy wafer at positions corresponding to the chips, and the arrangement of the alignment marks corresponding to the arrangement of the chips; S13: Obtain a printing program for printing on the wafer under test, and perform simulated printing on the back of the first dummy wafer according to the printing program; S14: Check whether the relative position between the printed content on the back of the first dummy wafer and the alignment marks meets preset requirements; S15: If the test result shows that the relative position relationship does not meet preset requirements, it is determined that there is a position offset, and the printing process parameters are adjusted according to the offset information.

[0039] Specifically, such as Figure 2 The diagram shows a schematic of the first dummy wafer structure provided in this embodiment. Step S11: A first dummy wafer 10 is provided. The first dummy wafer 10 has the same dimensions as the wafer under test, and the chip size and arrangement on the first dummy wafer 10 are the same as those on the wafer under test. Specifically, the first dummy wafer 10 is a silicon wafer manufactured using the same exposure mask as the wafer under test, and has the same dimensions, with a diameter of 200 mm or 300 mm. The chip size is 5 mm × 5 mm, arranged in a matrix.

[0040] like Figure 2As shown, in step S12: On the back of the first dummy chip 10, alignment marks corresponding to the chip positions are printed, and the arrangement of the alignment marks corresponds to the chip layout. Specifically, alignment marks corresponding to the size and position of a single chip are printed using a laser marking device, and the alignment marks correspond to the chip layout. Generally, the shape and size of the alignment marks are set according to actual testing needs, chip shape, and process precision requirements. Specifically, when the alignment mark correctly corresponds in space to the chip graphic area on the front of the first dummy chip 10, the mark can provide a clear positional reference for the subsequent actual printed content. By comparing the relative positional relationship (such as inclusion, alignment, centering, etc.) between the actual printed content and the alignment mark, it can be effectively determined whether the printed position has shifted. Generally, alignment marks include outer frame alignment marks, embedded alignment marks, or feature-based alignment marks. The outer frame alignment mark is a closed shape similar in shape to the chip and with a size greater than or equal to the chip size. For example, in this embodiment, the chip size is 5 mm × 5 mm, and the alignment mark is a square frame with a side length of 5 mm. When the printed text falls completely within the square frame, it indicates that the text has not been offset. Embedded or feature-based alignment marks include: central crosshair marks, L-shaped corner marks, and discrete point marks. Specifically, in this embodiment, a printing program is called or set, and its printing content is modified so that the square frame is the alignment mark. Using this program, the alignment mark is printed on the back of the first dummy chip 10 in the central area corresponding to each chip.

[0041] like Figure 2 As shown, after printing alignment marks on the back of the first dummy chip, a calibration step is also included: calculating the positional error between the alignment mark position on the back of the dummy chip and the chip position on the front of the dummy chip; if the positional error is greater than a preset error, the printing position of the alignment mark is readjusted until the preset error is met. Generally, the preset error accuracy should be controlled within the equipment accuracy. In this embodiment, the preset error accuracy between the position of the alignment mark on the back and the graphic position of the chip on the front is controlled within ±10 μm. Optionally, the method for calculating the error accuracy between the alignment mark position on the back of the dummy chip and the chip position on the front of the dummy chip includes: acquiring images of the front chip or the back using an optical microscope or alignment instrument, and performing superposition and comparison to obtain the offset; or dividing the dummy chip along the cutting path and directly observing the relative position of the alignment mark on the back and the graphic on the front of a single unit.

[0042] Step S13: Obtain the printing program for printing on the wafer under test, and perform simulated printing on the back of the first dummy wafer according to the printing program. Generally, the printing program includes a set of digital instructions to control the laser marking equipment for automated marking. Specifically, the printing program includes at least: printing content information, coordinate information, printing equipment, and process parameters for positioning marks. Specifically, the printing content includes necessary information such as supplier, product name, and batch number. In this embodiment, the printing content is illustrated using "ABCDE1234567890" as an example, and the positioning mark is illustrated using a circular mark set in the lower left corner. Specifically, the first dummy wafer 10 (i.e., the standard wafer) with the positioning alignment mark is placed into the laser marking equipment. The actual printing program for the product wafer (i.e., the program containing "ABCDE1234567890" and predetermined coordinates) is called, and the printing operation is performed on the back of the standard wafer, such as... Figure 3 As shown. At this point, the device will print characters at the predetermined coordinates.

[0043] Step S14: Verify whether the relative position between the printed text and the alignment mark meets the preset requirements. Generally, the preset requirements are related to the type of alignment mark used. The verification method typically includes manual visual inspection or inspection using an auxiliary vision system. For frame-type alignment marks, the preset requirement is that the printed text must fall entirely within the boundary of the alignment mark. Specifically, in this embodiment, a frame-type alignment mark (a square with a side length of 5 mm) is used. Therefore, it is necessary to verify whether the overall outline of the characters "ABCDE1234567890" is completely within the square, and whether the circular positioning mark is located at the lower left corner of the square. For embedded alignment marks or feature-based alignment marks, specific geometric features of the printed text must be aligned or coincident with the specified features of the alignment mark in position. Specifically, the minimum distance between the character boundary and the alignment mark boundary can be precisely measured to obtain the offset direction and offset distance.

[0044] Step S15: If the inspection result shows that the relative positional relationship does not meet the preset requirements, a positional offset is determined, and the printing process parameters are adjusted according to the offset information. Specifically, in this embodiment, if the inspection finds that the character falls completely within the alignment mark, the current equipment is determined to be accurately aligned and can be put into product wafer production. If the character is found to partially or completely exceed the frame (for example, the character is shifted 50 μm to the right), a positional offset is determined, and the printing process needs to be corrected. Then, steps S13-S14 can be repeated for verification until it is qualified. This method advances offset detection and correction before mass production, effectively preventing batch defects.

[0045] Optionally, the correction measures include: making corresponding compensation adjustments to the coordinate parameters in the control program of the printing equipment, or performing physical calibration on the mechanical alignment system of the equipment.

[0046] The wafer-level printing offset detection method provided in this embodiment also includes quickly inspecting the chip printing positions on the complete wafer after batch printing on the back of the wafer, including: S21: providing a second dummy wafer, the second dummy wafer having the same size as the wafer to be tested, and the chip size and arrangement on the second dummy wafer being the same as the chip size and arrangement on the wafer to be tested; S22: setting a light-transmitting film on the back of the second dummy wafer; S23: cutting along the cutting path of the second dummy wafer, leaving a grid-like cutting mark on the cutting patch corresponding to the chip layout; S24: peeling off the cutting patch with the grid-like cutting mark to obtain a transparent projection sheet; S25: covering the wafer to be tested with the back printing completed on the transparent projection sheet and aligning the two; S26: observing or detecting the actual printing position on the wafer through the grid window of the projection sheet to determine whether there is an offset.

[0047] Specifically, such as Figure 4 The diagram shows a schematic of the second dummy wafer structure provided in the embodiment. Step S21: A second dummy wafer 20 is provided. The second dummy wafer has the same chip size and layout as the wafer under test. Specifically, the second dummy wafer 20, similar to the first dummy wafer 10, is a silicon wafer manufactured using the same exposure mask as the wafer under test, and has the same size, with a diameter of 200 mm or 300 mm. Furthermore, the chip size and layout on the second dummy wafer 20 are exactly the same as those on the wafer under test. In this embodiment, a chip size of 5 mm × 5 mm, arranged in a matrix, is used as an example for illustration. Specifically, the second dummy wafer 20 has the same alignment marks as the wafer under test. Generally, alignment marks include a wafer V-shaped notch or a flat edge. In this embodiment, a V-shaped notch is used as an example for illustration.

[0048] Step S22: As Figure 4 As shown, a light-transmitting film 21 is disposed on the back side of the second dummy wafer 20; generally, the light-transmitting film 21 includes a high-transmittance cutting fabric commonly used in semiconductor cutting processes. Generally, the shape of the light-transmitting film 21 is circular or rectangular, and the size of the light-transmitting film 21 is greater than or equal to the size of the second dummy wafer 20.

[0049] Step S23: Cut along the dicing grooves of the second dummy wafer 20, leaving a grid-like cutting mark 31 on the light-transmitting film 21 that corresponds to the chip layout; specifically, a wafer dicing machine is used to cut along the dicing grooves on the second dummy wafer 20. The cutting depth must completely penetrate the silicon wafer but retain the bottom light-transmitting film 21, thereby leaving a grid-like cutting mark 31 on the light-transmitting film 21 that perfectly corresponds to the chip layout. Optionally, as... Figure 4 As shown, it also includes an auxiliary alignment mark 32 on the transparent film 21 that corresponds to the alignment mark of the second dummy film 20.

[0050] Step S24: Peel off the light-transmitting film 21 with the grid-shaped cutting marks thereon to obtain a transparent projection film 30; the cutting marks on the transparent projection film 30 correspond one-to-one with the chip sizes.

[0051] Step S25: As shown in Figure 5 the schematic structural diagram of the transparent projection film provided by the embodiment located on the wafer to be measured; cover the transparent projection film 30 on the wafer to be measured that has completed backside printing, and align the two; specifically, place the wafer that has completed backside printing with the printing side facing up, and perform mechanical or visual alignment by aligning the auxiliary alignment marks 32 on the transparent projection film 30 with the V-shaped notch (or flat edge) alignment marks on the product wafer, so that the grid window of the projection film is precisely aligned with the chip position on the backside of the wafer.

[0052] Step S26: Observe or detect the actual printing position on the product wafer through the grid window of the projection film to determine whether there is any deviation. Specifically, make an artificial comparison by an inspector, or observe the positional relationship between the printing content located under the transparent projection film 30 and the grid-shaped cutting marks 31 through its vision system; if the printing is completely inside the window and in a proper position, it is determined to be qualified; if the printing is significantly close to the window edge, partially blocked by the grid lines or completely deviated from the window, it can be immediately determined that there is a printing deviation at this position.

[0053] The wafer-level printing deviation detection method provided by this application achieves full-process quality control. Before actual printing, the equipment is pre-inspected and calibrated through a standard film with marks to avoid deviation from the source and prevent batch defects. After printing and before cutting, the transparent projection film can be used to quickly conduct a census of all printing positions on the entire wafer at one time and intuitively, with extremely high efficiency. The detection method is based on physical template comparison and realizes high-reliability detection at extremely low cost, significantly improving the production yield.

[0054] The above embodiments merely exemplarily illustrate the principles and effects of the present invention, rather than limiting the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. A wafer-level printing offset detection method, characterized in that, include: S11: Provide a first dummy wafer, the first dummy wafer having the same size as the wafer under test, and the chip size and arrangement on the first dummy wafer being the same as the chip size and arrangement on the wafer under test; S12: On the back of the first dummy chip, alignment marks are printed at positions corresponding to the chip, and the arrangement of the alignment marks corresponds to the arrangement of the chip; S13: Obtain a printing program for printing on the wafer under test, and perform simulated printing on the back of the first dummy wafer according to the printing program; S14: Check whether the relative position between the printed content on the back of the first fake film and the alignment mark meets the preset requirements; S15: If the test results show that the relative positional relationship does not meet the preset requirements, it is determined that there is a positional offset, and the printing process parameters are adjusted according to the offset information.

2. The wafer-level printing offset detection method according to claim 1, characterized in that, Step S2, after printing alignment marks on the back of the first dummy film, also includes a calibration step: Measure the positional error between the alignment mark position on the back of the first dummy chip and the chip position on the front; If the positional error is greater than the preset error, the printing position of the alignment mark is readjusted until the error accuracy meets the preset error.

3. The wafer-level printing offset detection method according to claim 1, characterized in that, The printing program includes: printing content information, coordinate information, and process parameters of the printing equipment.

4. The wafer-level printing offset detection method according to claim 1, characterized in that, The alignment marks include: outer frame alignment marks, embedded alignment marks, or feature-based alignment marks.

5. The wafer-level printing offset detection method according to claim 1, characterized in that, The alignment mark is an outer frame alignment mark, which has a shape similar to that of the chip, and the size of the outer frame alignment mark is greater than or equal to the size of the chip.

6. The wafer-level printing offset detection method according to claim 1, characterized in that, Also includes: S21: Provide a second dummy wafer, the second dummy wafer having the same size as the wafer under test, and the chip size and arrangement on the second dummy wafer being the same as the chip size and arrangement on the wafer under test; S22: A light-transmitting film is provided on the back of the second dummy film; S23: Cut along the second dummy wafer cutting path to form a grid-like cutting mark on the light-transmitting film that corresponds to the chip arrangement; S24: Peel off the light-transmitting film with the grid-like cutting marks to obtain a transparent projection sheet; S25: Cover the wafer to be tested with the transparent projection sheet, which has already been printed on the back, and align it; S26: Observe the actual printed position on the wafer under test through the grid window of the transparent projection sheet to determine whether there is an offset.

7. The wafer-level printing offset detection method according to claim 6, characterized in that, The light-transmitting film includes a high-transmittance cutting tape.

8. The wafer-level printing offset detection method according to claim 6, characterized in that, The first and second fake films are made using the same exposure mask as the wafer under test.

9. The wafer-level printing offset detection method according to claim 1, characterized in that, Also includes: An auxiliary alignment mark corresponding to the alignment mark of the second dummy film is provided on the light-transmitting film.

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