Magnetic field detection device, magnetic encoder, and magnetic field detection method

Abstract

Embodiments of the present application provide a magnetic field detection device, a magnetic encoder and a magnetic field detection method. The magnetic field detection device comprises at least one horizontal Hall device, a plurality of vertical Hall devices and a Hall selection circuit; the plurality of vertical Hall devices comprises at least one first Hall device and at least one second Hall device; the horizontal Hall device is used for detecting a magnetic field component in a third direction perpendicular to a chip plane; the first Hall device is arranged along a first direction of the chip plane and is used for detecting a magnetic field component in the first direction; the second Hall device is arranged along a second direction of the chip plane and is used for detecting a magnetic field component in the second direction; the first direction, the second direction and the third direction are perpendicular to each other; and the Hall selection circuit is used for selecting at least one Hall device in the at least one horizontal Hall device and the plurality of vertical Hall devices according to a control signal. The direction of detecting the magnetic field component is flexibly adjusted through the control signal, and three-dimensional magnetic field detection can be supported.

Description

Technical Field

[0001] This application relates to the field of magnetic field detection technology, and in particular to a magnetic field detection device, a magnetic encoder, and a magnetic field detection method. Background Technology

[0002] In fields such as industrial automation, robotics, consumer electronics, and automotive electronics, magnetic field detection technology is a core means of achieving position perception, motion control, and navigation positioning. For example, in motor drive control systems, magnetic encoders determine the real-time position and speed of the rotor by detecting changes in the magnetic field of permanent magnets, providing a core basis for high-precision closed-loop control; in robot joints and industrial robotic arms, magnetic field detection technology is used to monitor the rotation angle and trajectory of moving parts in real time, ensuring the accuracy and stability of movements; in consumer electronics such as smartphones and wearable devices, magnetic field sensors can detect the opening and closing status and spatial posture of the device, enabling intelligent human-machine interaction; in the field of automotive electronics, magnetic field sensors are widely used in key modules such as ABS (Anti-lock Braking System), EPS (Electric Power Steering), and electronic stability control systems, directly affecting driving safety and driving experience.

[0003] The core actuator for magnetic field detection is the Hall effect sensor, which is divided into horizontal and vertical Hall effect sensors. Horizontal Hall effect sensors are only sensitive to the magnetic field component perpendicular to the chip's sensing surface (Z-axis direction), and respond weakly to the magnetic field component parallel to the chip surface. Vertical Hall effect sensors are sensitive to the magnetic field component parallel to the chip surface (X-axis or Y-axis direction), but cannot effectively identify the magnetic field component perpendicular to the chip surface. Due to this limitation, traditional magnetic field detection technologies can typically only detect magnetic field components in a single direction, exhibiting significant limitations in complex three-dimensional magnetic field environments. For example, when a magnet rotates along three-dimensional space with a moving part, detection schemes relying solely on horizontal or vertical Hall effect sensors cannot comprehensively capture the dynamic changes of the magnetic field in multiple dimensions, easily leading to deviations in position and angle detection, and significantly reducing the system's detection accuracy and operational reliability.

[0004] Therefore, there is an urgent need to provide a magnetic field detection solution to solve the technical problems of existing technologies, such as the single detection direction and the difficulty in adapting to the needs of high-precision magnetic field sensing. Summary of the Invention

[0005] The magnetic field detection device, magnetic encoder, and magnetic field detection method provided in this application embodiment achieve flexible adjustment of magnetic field component detection by introducing a controlled selection circuit, support three-dimensional magnetic field detection, break through the limitations of traditional single-direction detection, improve detection accuracy and applicability, and meet the high-precision magnetic field sensing needs of multiple fields.

[0006] In a first aspect, embodiments of this application provide a magnetic field detection device, comprising: at least one horizontal Hall device, a plurality of vertical Hall devices, and a Hall selection circuit; the Hall selection circuit is connected to both the at least one horizontal Hall device and the plurality of vertical Hall devices; the at least one horizontal Hall device and the plurality of vertical Hall devices are integrated in the same chip; the plurality of vertical Hall devices include at least one first Hall device and at least one second Hall device; the horizontal Hall device is used to detect a magnetic field component in a third direction perpendicular to the chip plane; the first Hall device is disposed along a first direction of the chip plane and is used to detect the magnetic field component in the first direction; the second Hall device is disposed along a second direction of the chip plane and is used to detect the magnetic field component in the second direction; the first direction, the second direction, and the third direction are perpendicular to each other; the Hall selection circuit is used to select at least one Hall device among the at least one horizontal Hall device and the plurality of vertical Hall devices according to a control signal to realize the detection of the magnetic field component in the corresponding direction.

[0007] In one possible implementation, the number of horizontal Hall devices, the first Hall device, and the second Hall device are both even.

[0008] In one possible implementation, the Hall selection circuit is specifically used to: select at least one group of Hall devices according to a control signal; each group of Hall devices includes two Hall devices of the same type.

[0009] In one possible implementation, there are two horizontal Hall devices, two first Hall devices, and two second Hall devices; the control signal is a two-bit digital signal; the Hall selection circuit includes a four-way multiplexer for selecting four Hall devices; the four-way multiplexer is divided into two groups, the first group of multiplexers is controlled by the low-order signal of the control signal, and the second group of multiplexers is controlled by the high-order signal of the control signal.

[0010] In one possible implementation, the device further includes a rotating current circuit and a differential amplifier circuit; the rotating current circuit is connected to the Hall selection circuit and is used to periodically change the bias current direction of at least one group of Hall devices selected by each Hall selection circuit so that the offset voltage of the output signal of the same group of Hall devices is in a differential form; the differential amplifier circuit is connected to the Hall selection circuit and is used to differentially amplify the output signal of each selected group of Hall devices to suppress the offset voltage of the output signal of the same group of Hall devices.

[0011] In one possible implementation, the differential amplifier circuit includes: at least one group of instrumentation amplifiers and a fully differential operational amplifier; each group of instrumentation amplifiers includes two instrumentation amplifiers; the input terminals of the two instrumentation amplifiers in the same group are respectively cross-connected to the positive and negative output terminals of the corresponding group of Hall devices; the non-inverting input terminal of the fully differential operational amplifier is connected to the output terminal of one instrumentation amplifier in each group through a first resistor, and the inverting input terminal is connected to the output terminal of the other instrumentation amplifier in each group through a second resistor; the non-inverting output terminal and the inverting output terminal of the fully differential operational amplifier are respectively connected to its inverting input terminal and its non-inverting input terminal through a third resistor and a fourth resistor.

[0012] In one possible implementation, the rotating current circuit is specifically used to: periodically switch the bias current direction of at least one group of Hall devices in a clockwise or counterclockwise direction under the control of a four-phase non-overlapping clock, so as to shift the offset voltage of at least one group of Hall devices to the frequency of the four-phase non-overlapping clock; wherein the four-phase non-overlapping clock phases of two Hall devices in the same group are complementary, so that the offset voltages output by the two Hall devices in the same group are out of phase.

[0013] In one possible implementation, the device further includes a controller; the controller generates a control signal based on the magnetic field components detected over historical time.

[0014] Secondly, embodiments of this application provide a magnetic encoder, including a signal processing unit and a magnetic field detection device provided in the first aspect and / or various possible embodiments of the first aspect; the signal processing unit is used to perform vector merging on the magnetic field component signals output by the magnetic field detection device, and to calculate and encode the rotation angle based on the vector merging result.

[0015] Thirdly, embodiments of this application provide a magnetic field detection method, applied to the magnetic field detection device provided in the first aspect and / or various possible embodiments of the first aspect. The method includes: receiving a control signal; inputting the control signal into a Hall selection circuit to select a Hall device integrated in a chip; and acquiring the magnetic field component signal output by the selected Hall device.

[0016] In one possible implementation, the method further includes generating a control signal based on the magnetic field components detected over historical time.

[0017] Fourthly, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, are used to implement the third aspect and / or various possible implementations of the third aspect.

[0018] Fifthly, embodiments of this application provide a computer program product, including a computer program that, when executed by a processor, implements the third aspect and / or various possible implementations of the third aspect.

[0019] The magnetic field detection device, magnetic encoder, and magnetic field detection method provided in this application solve the problem of traditional technologies that require multiple independent sensors or external signal synthesis circuits to achieve three-dimensional magnetic field detection by integrating horizontal and vertical Hall devices into a single chip and combining them with the dynamic selection of Hall devices by a Hall selection circuit. The collaborative operation of the horizontal and vertical Hall devices allows a single chip to simultaneously sense three-dimensional magnetic field components without the need for additional independent sensors, significantly reducing system complexity and hardware costs, while avoiding signal synchronization errors between multiple chips. The Hall selection circuit can dynamically select different combinations of Hall devices according to control signals, supporting not only three-dimensional magnetic field detection but also improving the flexibility of magnetic field detection. It can adapt to the detection needs of different application scenarios without hardware modifications, significantly improving the versatility of the device. Furthermore, chip-level integration shortens the signal transmission path, effectively suppresses external electromagnetic interference, improves detection accuracy, and reduces system size, making it suitable for space- and cost-sensitive applications such as industrial automation, automotive electronics, and precision instruments. Attached Figure Description

[0020] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0021] Figure 1a This is a schematic diagram of the working principle of a horizontal Hall effect device.

[0022] Figure 1b This is a schematic diagram of the working principle of a vertical Hall effect device.

[0023] Figure 2 A schematic diagram of the magnetic field detection device provided in this application;

[0024] Figure 3a This is a schematic diagram of the magnetic field distribution around a magnet as it rotates around the X-axis.

[0025] Figure 3b A schematic diagram illustrating the principle of joint detection by horizontal and vertical Hall devices provided in this application embodiment;

[0026] Figure 4 A schematic diagram showing the arrangement of Hall devices provided in the embodiments of this application;

[0027] Figure 5 This is a schematic diagram of the Hall selection circuit provided in the embodiments of this application;

[0028] Figure 6 This is a schematic diagram of another magnetic field detection device provided in an embodiment of this application;

[0029] Figure 7a A waveform diagram of the four-phase non-overlapping clock inputs for selecting circuits 1 and 3;

[0030] Figure 7b A waveform diagram of the four-phase non-overlapping clock for selecting circuits 2 and 4;

[0031] Figure 8 The equivalent circuit diagram for the offset voltage analysis of the Hall device under the action of the rotating current circuit shown in Figure 7 is shown in Figure 7.

[0032] Figure 9 Waveforms of the offset voltages output by selection circuits 1 and 2;

[0033] Figure 10 This is a schematic diagram of the differential amplifier circuit provided in the embodiments of this application;

[0034] Figure 11a and Figure 11b The waveforms of the output signals of horizontal Hall devices Z1 and Z2 under the control of the rotating current circuit are shown respectively.

[0035] Figure 12a and Figure 12b The waveforms of the output signals of horizontal Hall devices Z1 and Z2 after passing through the instrumentation amplifier are shown below.

[0036] Figure 13a and Figure 13b The waveforms of the input signals at the non-inverting and inverting input terminals of the fully differential operational amplifier are shown respectively.

[0037] Figure 14a and Figure 14b The waveforms of the output signals at the non-inverting and inverting output terminals of the fully differential operational amplifier are shown respectively.

[0038] Figure 15 The waveform diagram shows the Hall differential signal output by the fully differential operational amplifier.

[0039] Icon labels:

[0040] 20 - Magnetic field detection device;

[0041] 210-Horizontal Hall effect device;

[0042] 220 - Vertical Hall effect device; 221 - First Hall effect device; 222 - Second Hall effect device;

[0043] 230-Hall Selector Circuit;

[0044] 240-Rotating current circuit;

[0045] 250 - Differential amplifier circuit; 251 - Instrumentation amplifier; 252 - Fully differential operational amplifier; R1 - First resistor; R2 - Second resistor; R3 - Third resistor; R4 - Fourth resistor.

[0046] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0047] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0048] In fields such as industrial automation, robot control, automotive electronics, and precision instruments, three-dimensional magnetic field detection technology is widely used for real-time monitoring of rotation angles, positions, and motion trajectories. Magnetic field detection mainly relies on two types of Hall devices: horizontal Hall devices and vertical Hall devices.

[0049] Figure 1a This is a schematic diagram of the working principle of a horizontal Hall effect device. Figure 1b This is a schematic diagram illustrating the working principle of a vertical Hall effect device.

[0050] like Figure 1a As shown, in a magnetic encoder, a horizontal Hall device is integrated on the chip surface. Its bias electrode and Hall voltage output electrode are both arranged parallel to the chip plane. The bias current is injected along the chip plane direction and is sensitive to the magnetic field component perpendicular to the chip direction, i.e., the Z-axis direction. It generates a Hall voltage output in the direction perpendicular to the current and the magnetic field to detect the vertical magnetic field component, i.e., the Z-axis magnetic field component.

[0051] like Figure 1b As shown, the sensitive structure (vertical Hall active region) of the vertical Hall device is perpendicular to the chip surface. The bias electrode and the Hall voltage output electrode are arranged perpendicular to the chip plane, and the current is injected in a direction perpendicular to the chip plane (from bias in to bias out). This device is sensitive to the magnetic field component in the X-axis or Y-axis direction parallel to the chip surface, and generates a Hall voltage output in a direction perpendicular to both the current and the magnetic field to detect the horizontal magnetic field component in the X-axis or Y-axis direction.

[0052] Depend on Figure 1a and Figure 1b It is known that horizontal Hall devices and vertical Hall devices have the drawback of only being able to detect magnetic fields in a single direction. That is, horizontal Hall devices can only detect magnetic fields in the vertical direction, and vertical Hall devices can only detect magnetic fields in the horizontal direction. They cannot simultaneously sense changes in magnetic fields in three-dimensional space.

[0053] To achieve three-dimensional magnetic field detection, existing technologies typically require the integration of multiple independent Hall devices, namely horizontal and vertical Hall devices integrated into two chips, and signal synthesis via external circuitry. This results in high hardware costs, complex wiring, and significant challenges in signal synchronization.

[0054] Based on this, this application provides a magnetic field detection device that integrates horizontal and vertical Hall devices into the same chip and uses a controlled selection circuit to flexibly select the Hall device. This not only achieves low-cost, high-precision three-dimensional magnetic field detection, but also allows for dynamic switching of detection modes according to the scene, improving versatility and adaptability.

[0055] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0056] Figure 2 A schematic diagram of the magnetic field detection device provided in this application is shown below. Figure 2 As shown, the magnetic field detection device 20 includes: at least one horizontal Hall device 210, a plurality of vertical Hall devices 220, and a Hall selection circuit 230.

[0057] The Hall selection circuit 230 is connected to at least one horizontal Hall device 210 and multiple vertical Hall devices 220. The at least one horizontal Hall device 210 and multiple vertical Hall devices 220 are integrated into the same chip. The multiple vertical Hall devices 220 include at least one first Hall device 221 and at least one second Hall device 222. The horizontal Hall device 210 is used to detect the magnetic field component in a third direction perpendicular to the chip plane, i.e., the Z-axis direction. The first Hall device 221 is arranged along a first direction of the chip plane, such as the X-axis direction, and is used to detect the magnetic field component in the first direction. The second Hall device is arranged along a second direction of the chip plane, such as the Y-axis direction, and is used to detect the magnetic field component in the second direction. The first direction, the second direction, and the third direction are all perpendicular to each other. The Hall selection circuit 230 is used to select at least one Hall device from at least one horizontal Hall device 210 and multiple vertical Hall devices 220 according to a control signal to achieve the detection of the magnetic field component in the corresponding direction.

[0058] The Hall selection circuit 230 is connected to the horizontal Hall device 210 and multiple vertical Hall devices 220. Based on a control signal, it dynamically selects at least one of the horizontal Hall device 210, the first vertical Hall device 220, and the second vertical Hall device 220 to detect the magnetic field components in the corresponding direction. For example, when the control signal selects the horizontal Hall device 210 and the first vertical Hall device 220, the device can simultaneously detect the magnetic field components in the Z-axis and X-axis directions; when the control signal selects the horizontal Hall device 210 and the second vertical Hall device 220, the device can simultaneously detect the magnetic field components in the Z-axis and Y-axis directions. Through the dynamic configuration of the Hall selection circuit 230, the device can flexibly switch the detection direction in different application scenarios without the need for additional independent sensors or external signal synthesis circuits.

[0059] The horizontal Hall effect device 210 is arranged parallel to the chip surface, while the vertical Hall effect device 220 is arranged perpendicular to the chip surface. Specifically, the first Hall effect device 221 and the second Hall effect device 222 in the vertical Hall effect chip are arranged orthogonally to each other within the chip, with their sensing axes corresponding to the X-axis and Y-axis respectively, and both perpendicular to the Z-axis sensing direction of the horizontal Hall effect device 210, thus forming a three-dimensional orthogonal magnetic field detection layout on the same chip.

[0060] The control signal can be a digital level signal, a communication bus instruction, a register configuration signal, etc., used to instruct the Hall selection circuit 230 to select a target Hall device, such as selecting a horizontal Hall device 210, selecting a vertical Hall device 220, or selecting multiple Hall devices.

[0061] One possible implementation is that when the control signal is in a first level state, such as a high level state, all horizontal Hall devices 210 and the first Hall device 221 are selected; when the control signal is in a second level state, all horizontal Hall devices 210 and the second Hall device 222 are selected; when the control signal is in a third level state, only all horizontal Hall devices 210 are selected.

[0062] The Hall effect selection circuit 230 is a controlled selection circuit. Its input terminal is used to input control signals, and its output terminal is connected to each Hall effect device, specifically to the bias and signal output path of each Hall effect device. The Hall effect selection circuit 230 can be implemented using a multiplexer (MUX), or it can be implemented using an analog switch array, a gating control circuit, or other structures.

[0063] Hall devices are classified into three categories based on the detected (or sensitive) magnetic field component: horizontal Hall device 210, first Hall device 221, and second Hall device 222. In some embodiments, Hall selection circuit 230 is used to select at least two types of Hall devices under the control of a control signal.

[0064] In some embodiments, there are multiple horizontal Hall devices 210. The Hall selection circuit 230 is used to select multiple Hall devices under the control of a control signal. It can be multiple horizontal Hall devices 210, multiple first Hall devices 221, or multiple second Hall devices 222, thereby realizing unidirectional magnetic field detection, or it can select multiple types of Hall devices, thereby realizing multidirectional detection.

[0065] The following explanation uses the detection of magnetic field components along the Z and Y axes as an example. Figure 3a This is a schematic diagram of the magnetic field distribution around a magnet as it rotates around the X-axis. Figure 3b This is a schematic diagram illustrating the principle of joint detection using a horizontal Hall effect device and a vertical Hall effect device, as provided in an embodiment of this application.

[0066] like Figure 3a As shown, when the magnet in the magnetic encoder rotates around the X-axis, the magnetic field around it is distributed in three-dimensional space. The magnetic field vector B simultaneously contains a magnetic field component Bz (Z-axis component) perpendicular to the chip surface and a magnetic field component By (Y-axis component) parallel to the chip surface. This magnetic field will simultaneously act on the horizontal Hall device 210 and the vertical Hall device 220 integrated on the chip.

[0067] like Figure 3b As shown, the horizontal Hall device 210 is sensitive to the magnetic field component Bz perpendicular to the chip surface, outputting corresponding Hall voltages Vhall_p2 and Vhall_n2; the vertical Hall device 220 is sensitive to the magnetic field component By parallel to the chip surface, outputting corresponding Hall voltages Vhall_p1 and Vhall_n1. By combining the detection results of the horizontal Hall device 210 and the vertical Hall device 220, a complete perception of the three-dimensional magnetic field can be achieved, providing basic data for subsequent angle calculation and position detection.

[0068] The magnetic field detection device provided in this application integrates a horizontal Hall effect device 210 and a vertical Hall effect device 220 onto the same chip, and combines this with the dynamic selection of Hall effect devices by the Hall effect selection circuit 230. This solves the problem of traditional technologies that require multiple independent sensors or external signal synthesis circuits to achieve three-dimensional magnetic field detection. The collaborative operation of the horizontal Hall effect device 210 and the vertical Hall effect device enables a single chip to simultaneously sense three-dimensional magnetic field components without the need for additional independent sensors, significantly reducing system complexity and hardware costs, while avoiding the problem of signal synchronization errors between multiple chips. The Hall effect selection circuit 230 can dynamically select different combinations of Hall effect devices according to control signals, not only supporting three-dimensional magnetic field detection but also improving the flexibility of magnetic field detection. It can adapt to the detection needs of different application scenarios without hardware modifications, significantly improving the versatility of the device. In addition, chip-level integration shortens the signal transmission path, effectively suppresses external electromagnetic interference, improves detection accuracy, and reduces system size, making it suitable for space- and cost-sensitive applications such as industrial automation, automotive electronics, and precision instruments.

[0069] In some embodiments, a differential detection structure can be introduced to reduce detection noise. The number of various Hall devices is always an even number, such as 2 or 4. By using differential output for Hall devices of the same type, they output Hall voltage signals that are differential to each other, suppressing common-mode noise and environmental interference, improving the signal-to-noise ratio, and thus improving the accuracy of magnetic field detection.

[0070] In one possible implementation, the number of horizontal Hall devices 210, the first Hall device 221, and the second Hall device 222 are all even; the Hall selection circuit 230 is specifically used to: select at least one group of Hall devices according to the control signal; each group of Hall devices includes two Hall devices of the same type.

[0071] The number of horizontal Hall devices 210, first Hall devices 221 and second Hall devices 222 can be equal or unequal, as long as their respective numbers are even. There are at least 2 Hall devices of each type to ensure that at least one differential detection unit can be formed.

[0072] In some embodiments, Hall devices of the same type can be arranged in a mirror image with the chip center as the axis of symmetry.

[0073] By pairing two Hall devices of the same type and in the same sensitive direction, the offset voltage of the devices themselves, process deviations, and common-mode interference introduced from the outside can be effectively offset, thereby further improving the linearity and accuracy of magnetic field detection without increasing the complexity of the circuit.

[0074] A differential detection structure is used to form a differential pair of two Hall effect devices of the same type and with the same sensitivity direction, allowing them to operate in the same magnetic field and noise environment. One device serves as the positive output, and the other as the inverting output; the two signals are then differentially processed in subsequent circuits.

[0075] Since the external common-mode noise, power supply interference, temperature drift, and device offset voltage are basically the same in the two signals, they can cancel each other out when performing differential operations, leaving only the true magnetic field differential signal, thereby significantly reducing detection noise and improving the signal-to-noise ratio and detection accuracy.

[0076] The differential detection structure can be implemented using a differential amplifier circuit 250, a differential operational amplifier, a programmable gain amplifier, etc.

[0077] To further eliminate the offset voltage of the Hall devices themselves, a rotating current circuit 240 can be set up. The rotating current circuit 240 is connected to the Hall selection circuit 230 and the bias terminals of each Hall device, and is used to periodically switch the bias current direction of the Hall devices in the same differential group. In conjunction with the differential detection structure, it can further cancel device offset, low-frequency noise and temperature drift, and significantly improve the accuracy and stability of magnetic field detection.

[0078] In one possible implementation, there are two horizontal Hall devices 210, two first Hall devices 221, and two second Hall devices 222; the control signal is a two-bit digital signal; the Hall selection circuit 230 includes a four-way multiplexer for selecting four Hall devices; the four-way multiplexer is divided into two groups, the first group of multiplexers is controlled by the low-order signal of the control signal, and the second group of multiplexers is controlled by the high-order signal of the control signal.

[0079] The control signal can be represented as a 2-bit HALL_SEL<1:0>. The Hall selection circuit 230 selects four Hall devices, including two groups of Hall devices, which are selected by two of the multiplexers.

[0080] Each group of Hall devices consists of two Hall devices of the same type and in the same sensitive direction, forming a differential detection unit, each corresponding to a differential output signal. Two multiplexers connect the outputs of the corresponding differential detection units to subsequent differential processing circuits, such as differential amplifier circuit 250, to achieve differential sampling and noise suppression of the selected magnetic field component.

[0081] By using different level combinations of the two control signals HALL_SEL<1:0>, the horizontal Hall device 210, the first vertical Hall device 220, or the second vertical Hall device 220 can be independently selected to achieve flexible switching detection of single-axis or multi-axis magnetic field components.

[0082] Figure 4This is a schematic diagram of the arrangement of Hall devices provided in the embodiments of this application, as shown below. Figure 4 As shown, the same chip integrates 6 Hall devices. Among them, the Hall devices marked Z1 and Z2 are the aforementioned horizontal Hall devices 210, the Hall devices marked X1, X2, Y1, and Y2 are the aforementioned vertical Hall devices 220, the Hall devices marked X1 and X2 are the first Hall devices 221, which are placed along the direction parallel to the X-axis, and the Hall devices marked Y1 and Y2 are the second Hall devices 222, which are placed along the direction parallel to the Y-axis.

[0083] Each Hall effect device has four pins, labeled A, B, C, and D. For example, the four pins corresponding to horizontal Hall effect devices Z1 and Z2 are Z1_A, Z1_B, Z1_C, and Z1_D, respectively, and Z2_A, Z2_B, Z2_C, and Z2_D.

[0084] Hall devices labeled Z1 and Z2 form a differential detection unit, Hall devices labeled X1 and X2 form a differential detection unit, and Hall devices labeled Y1 and Y2 form a differential detection unit.

[0085] Figure 5 This is a schematic diagram of the Hall selection circuit provided in the embodiments of this application, corresponding to... Figure 4 The combination of Hall devices provided in the illustrated embodiments, such as Figure 5 As shown, Hall selection circuit 230 is a four-way multiplexer, referred to as selection circuit 1 to selection circuit 4. The core of each selection circuit is a 2-to-1 analog multiplexer (MUX2_1), whose input terminals are connected to the pins of two different types of Hall devices. Selection circuit 1 selects Hall devices X1 and Z1, which are connected to the pins of X1_A, X1_B, X1_C, X1_D and Z1_A, Z1_B, Z1_C, Z1_D, respectively. The output terminal is connected to the subsequent signal processing circuit, such as a differential amplifier circuit or a rotating current circuit.

[0086] Selection circuit 1 and selection circuit 2 constitute the first group, which is controlled by the low-order signal of the control signal to control HALL_SEL. <0> When HALL_SEL <0> When = 0, the first Hall device 221 is selected, namely the vertical Hall device 220 marked with X1 and X2, that is, the X1_A, X1_B, X1_C, X1_D, and X2_A, X2_B, X2_C, X2_D pins are selected to detect the magnetic field component in the X-axis direction; when HALL_SEL = 0, the first Hall device 221 is selected, namely the vertical Hall device 220 marked with X1 and X2, that is, the X1_A, X1_B, X1_C, X1_D, and X2_D pins are selected to detect the magnetic field component in the X-axis direction; when HALL_SEL = 0, the first Hall device 221 is selected, namely the vertical Hall device 220 marked with X1 and X2, namely the X1_A, X1_B, X1_C, X1_D, and X2_A, X2_B, X2_C, X2_D pins are selected to detect the magnetic field component in the X-axis direction; when HALL_SEL = 0, the first Hall device 221 is selected, namely the vertical Hall device 220 marked with X1 and X2, namely the X1_A, X1_B, X1_C, X1_D, and .... <0> When = 1, the horizontal Hall device 210 is selected, that is, the vertical Hall device 220 marked with Z1 and Z2 is selected, that is, the Z1_A, Z1_B, Z1_C, Z1_D, and Z2_A, Z2_B, Z2_C, Z2_D pins are selected to detect the magnetic field component in the Z-axis direction.

[0087] Selection circuits 3 and 4 constitute the second group, which is controlled by the high-order signal of the control signal to control HALL_SEL. <1> When HALL_SEL <1> When = 0, the second Hall device 222 is selected, namely the vertical Hall device 220 marked with Y1 and Y2, that is, the Y1_A, Y1_B, Y1_C, Y1_D and Y2_A, Y2_B, Y2_C, Y2_D pins are selected to detect the magnetic field component in the Y-axis direction; when HALL_SEL <1> When = 1, the horizontal Hall device 210 is selected, that is, the vertical Hall device 220 marked with Z1 and Z2 is selected, that is, the Z1_A, Z1_B, Z1_C, Z1_D, and Z2_A, Z2_B, Z2_C, Z2_D pins are selected to detect the magnetic field component in the Z-axis direction.

[0088] The outputs of selection circuit 1 and selection circuit 3 together form a set of differential signals, corresponding to the X-axis or Z-axis magnetic field components; the outputs of selection circuit 2 and selection circuit 4 together form a set of differential signals, corresponding to the Y-axis or Z-axis magnetic field components.

[0089] The truth table for the control signal HALL_SEL<1:0> is shown in Table 1:

[0090] Table 1 Truth Table of Control Signals

[0091]

[0092] To detect changes in a three-dimensional magnetic field, the control signal HALL_SEL<1:0> can be set to 01 or 10, thus employing a combination of two horizontal Hall effect sensors 210 and two vertical Hall effect sensors 220. For example, when HALL_SEL<1:0>=01, circuits 1-4 are connected to Hall effect sensors labeled Z1, Z2, Y1, and Y2 respectively, enabling the detection of magnetic field components in the Y and Z axes. Correspondingly, to detect magnetic field components in the Z and X axes, HALL_SEL<1:0>=10 is sufficient. If only a unidirectional magnetic field component needs to be detected, such as a horizontal or vertical magnetic field component, HALL_SEL<1:0> can be set to 11 or 00. This design allows for different magnetic field detection modes to be provided according to actual detection needs, offering high flexibility.

[0093] By limiting the number of Hall devices of each type to two, using a 2-bit digital control signal and a four-way grouped controlled multiplexer to achieve magnetic field detection, hardware costs are reduced. At the same time, two Hall devices of the same type can form a differential detection unit, which can effectively cancel common-mode noise, device offset, process deviation, etc. through subsequent differential processing, thereby improving the detection signal-to-noise ratio and accuracy. The multiplexer can flexibly select different combinations of Hall devices, simplifying the control logic, reducing chip size and hardware costs, and improving circuit reliability and integration.

[0094] Since the Hall voltages Vhall of two identical Hall devices are in phase, common-mode noise or interference cannot be eliminated. To improve noise immunity, the device may also include a noise-immune amplifier circuit based on rotating current. Figure 6 This is a schematic diagram of another magnetic field detection device provided in an embodiment of this application, as shown below. Figure 6 As shown, in this embodiment, the magnetic field detection device 20 further includes a rotating current circuit 240 and a differential amplifier circuit 250.

[0095] The rotating current circuit 240 is connected to the Hall selection circuit 230 and is used to periodically change the bias current direction of at least one group of Hall devices selected by each Hall selection circuit 230 so that the offset voltage of the output signal of the same group of Hall devices is in a differential form, that is, the polarities are nearly opposite, that is, the phase difference is about 180°, for example, the phase difference is located at 180°±1°; the differential amplifier circuit 250 is connected to the Hall selection circuit 230 and is used to differentially amplify the output signal of each group of selected Hall devices to suppress the offset voltage of the output signal of the same group of Hall devices.

[0096] The input terminal of the rotating current circuit 240 is connected to the output terminal of the Hall selection circuit 230, and the output terminal is connected to the bias current terminal of each Hall device.

[0097] The rotating current circuit 240 can employ a switch array structure driven by two opposite clocks. The core of this approach consists of two opposite clock generation modules and two sets of complementary MOSFET switches. The two opposite clocks periodically and alternately output high levels, controlling the on and off states of the two sets of MOSFET switches respectively, thereby alternately switching the bias current direction of the Hall effect device. Its switching period is consistent with the clock period.

[0098] The rotating current circuit 240 can adopt a programmable logic controlled current direction switching circuit, with a microcontroller unit or programmable logic device as the control core, replacing the fixed clock generation method. It outputs periodic control signals through a preset program to drive the MOS transistor switching array to change the direction of the Hall device bias current.

[0099] In some embodiments, the rotating current circuit 240 can be implemented by a four-phase non-overlapping clock generation module in conjunction with a switch array. The four-phase non-overlapping clock generation module outputs four non-overlapping clock signals with phases 90 degrees apart. After being processed by decoding logic, these clock signals control the on / off timing of multiple sets of MOS transistor switches, thereby achieving high-precision and high-stability periodic switching of the bias current direction of the Hall device.

[0100] The differential amplifier circuit 250 works in conjunction with the Hall selection circuit 230 and the rotating current circuit 240. Its input terminal is electrically connected to the output terminal of the Hall selection circuit 230. It receives the two output signals of each group of Hall devices after selection and performs differential operation and amplitude amplification on the two signals. The differential amplifier circuit 250 can effectively suppress common-mode noise (such as power supply interference and environmental electromagnetic interference) with the same amplitude and polarity in the two signals through differential operation of the output signals of the same group of Hall devices, and obtain a differential signal. By amplifying the amplitude of the differential signal, the differential component in the signal that reflects the actual magnetic field change is improved. Combined with the differential form offset voltage converted by the rotating current circuit 240, the offset voltage is canceled, thereby improving the signal-to-noise ratio and detection accuracy of the magnetic field detection signal, and providing a stable and clear Hall differential signal for subsequent signal processing such as filtering and analog-to-digital conversion.

[0101] The differential amplifier circuit 250 can be equipped with an operational amplifier with a high common-mode rejection ratio.

[0102] In one possible implementation, a differential amplifier circuit 250 with dual-ended input and single-ended output can be used. The output terminals of the selected Hall devices in the same group are respectively used as the positive and negative input terminals of the operational amplifier. The positive and negative input terminals are respectively connected to the non-inverting and inverting input terminals of the operational amplifier through resistors. The inverting input terminal is connected to the output terminal of the operational amplifier through a resistor, and the non-inverting input terminal is grounded through a resistor.

[0103] In one possible implementation, the differential amplifier circuit 250 can be an integrated differential amplifier chip.

[0104] By coordinating the design of the rotating current circuit 240 and the differential amplifier circuit 250, the offset voltage of the Hall devices is eliminated and common-mode noise is suppressed. The rotating current circuit 240 periodically changes the current direction to make the offset voltages of the same group of Hall devices complementary in phase, forming a differential signal; the differential amplifier circuit 250 further suppresses noise and improves the signal-to-noise ratio through cross-connection and differential amplification characteristics.

[0105] In one possible implementation, the rotating current circuit 240 is specifically used to: periodically switch the bias current direction of at least one group of Hall devices in a clockwise or counterclockwise direction under the control of a four-phase non-overlapping clock, so as to shift the offset voltage of at least one group of Hall devices to the frequency of the four-phase non-overlapping clock; wherein the four-phase non-overlapping clock phases of two Hall devices in the same group are complementary, so that the offset voltage output by the two Hall devices in the same group is out of phase.

[0106] In this context, a four-phase non-overlapping clock refers to a clock signal with four phases that switch sequentially without overlap, denoted as SPIN_CLC1 to SPIN_CLC4. Phase complementarity means that two signals are 180° out of phase.

[0107] A four-phase non-overlapping clock signal can be output from the four-phase non-overlapping clock generation module in the rotating current circuit 240. This four-phase non-overlapping clock signal is used to control the Hall devices selected by the Hall selection circuit 230 to periodically switch the current direction. The Hall selection circuit 230 causes the bias current direction of the Hall devices in the same group (such as Z1 and Z2) to switch alternately, and their offset voltage polarity to reverse periodically, forming a differential signal. The non-overlapping characteristic of the four-phase non-overlapping clock ensures the synchronization of current switching and avoids signal interference.

[0108] Figure 7a A waveform diagram of the four-phase non-overlapping clock inputs to select circuits 1 and 3. Figure 7b A waveform diagram of the four-phase non-overlapping clock for selecting inputs 2 and 4 of the circuit is shown below. Figure 7a and 7b As shown, in the four-phase non-overlapping clock, the rising edge of each clock signal lags by 90° sequentially, with phases from Ph1 to Ph4. The four-phase non-overlapping clocks (SPIN_CLK1 to SPIN_CLK4) of selection circuits 1 and 3 in Hall effect selection circuit 230 are identical, as are the four-phase non-overlapping clocks of selection circuits 2 and 4. to It is consistent, and its phase is delayed by 3 phases, or 270°, compared to the phase delay of the four-phase non-overlapping clocks of selection circuits 1 and 3.

[0109] Figure 8 The equivalent circuit diagram for the offset voltage analysis of the Hall device under the action of the rotating current circuit shown in Figure 7 is as follows: Figure 8 As shown, in phases Ph1 to Ph4, the bias current direction of the Hall bridge switches periodically with the clock. The Hall bridge includes one branch with resistance R + ΔR and three branches with resistance R. Under the control of the four-phase non-overlapping clocks SPIN_CLK1 to SPIN_CLK4, the offset voltage Vos in phases Ph1 and Ph3 is: In phases Ph2 and Ph4, the polarity is reversed, and the offset voltage Vos is: .

[0110] The selection circuits 1 and 2 select a group of Hall effect devices in SPIN_CLK1 to SPIN_CLK4, and to Under the control of the bias current, the direction of the bias current is changed periodically, so that the polarity of the offset voltage Vos of each selected group of Hall devices is also changed periodically.

[0111] Figure 9 The waveforms of the offset voltages output by circuits 1 and 2 are shown below. Figure 9 As shown, under the control of the four-phase non-overlapping clocks SPIN_CLK1~SPIN_CLK4, the offset voltage Vos1 output by selection circuit 1 and the offset voltage Vos2 output by selection circuit 2 exhibit complementary phase and opposite polarity differential characteristics: in the Ph1 and Ph3 phases, Vos1 has a positive amplitude. Vos2 is a negative amplitude. In the Ph2 and Ph4 phases, Vos1 flips to negative polarity, and Vos2 flips to positive polarity; the two have the same amplitude and are about 180° out of phase, forming a differential pair.

[0112] By employing a four-phase non-overlapping clock and a phase complementary design, the efficiency and stability of offset voltage shifting are improved. The non-overlapping characteristic of the four-phase non-overlapping clock ensures the synchronization of current switching and avoids signal interference; the phase complementary design causes the polarity of the offset voltage of the same group of Hall devices to periodically reverse, forming a differential signal, thereby further suppressing common-mode noise in the differential amplifier circuit 250. For example, in a high-speed rotating magnet scenario, a traditional fixed-phase clock may cause current switching delay, while the dynamic switching of the four-phase non-overlapping clock ensures the accuracy of offset voltage shifting, thereby improving detection accuracy.

[0113] Figure 10 This is a schematic diagram of the differential amplifier circuit provided in the embodiments of this application, as shown below. Figure 10 As shown, the differential amplifier circuit 250 includes: at least one set of instrumentation amplifiers 251 ( Figure 10(Taking two groups as an example) and a fully differential operational amplifier 252; each group of instrumentation amplifiers 251 includes two instrumentation amplifiers 251, namely instrumentation amplifiers 251-1 and 251-2; the input terminals of the two instrumentation amplifiers 251 in the same group are cross-connected to the positive and negative output terminals of the corresponding group of Hall devices, respectively. Taking selection circuit 1 and selection circuit 2 as examples, the positive output terminal Vhall1_p1 of the Hall device is connected to the non-inverting input terminal (+) of instrumentation amplifier 251-1, the negative output terminal Vhall1_n1 of the Hall device is connected to the non-inverting input terminal of instrumentation amplifier 251-2, the positive output terminal Vhall1_p2 of the Hall device is connected to the non-inverting input terminal of instrumentation amplifier 251-2, and the negative output terminal Vhall1_n2 is connected to the non-inverting input terminal of instrumentation amplifier 251-1. This cross-connection method allows the inverting offset voltages output by the two Hall devices in the same group to undergo preliminary differential processing at the instrumentation amplifier 251 stage.

[0114] The number of groups of instrumentation amplifier 251 is the same as the number of groups of Hall devices selected by Hall selection circuit 230, and is used to perform preliminary differential processing on the signals output by one group of Hall devices respectively.

[0115] The non-inverting input of the fully differential operational amplifier 252 is connected to the output of one of the instrumentation amplifiers 251 in each group of instrumentation amplifiers 251 through a first resistor R1, and the inverting input is connected to the output of another instrumentation amplifier in each group of instrumentation amplifiers through a second resistor R2. The non-inverting output and inverting output of the fully differential operational amplifier 252 are connected to its inverting input and non-inverting input through a third resistor R3 and a fourth resistor R4, respectively, forming a closed-loop negative feedback structure to set the differential gain and stabilize the output.

[0116] The differential amplifier circuit 250 with the above structure can realize two-stage amplification of the differential offset voltage and Hall signal after the rotating current processing. The instrumentation amplifier 251 realizes high input impedance and low noise pre-amplification, and at the same time uses cross connection to suppress common mode noise. The fully differential operational amplifier 252 further amplifies the differential signal and converts the single-ended output into a fully differential input to cancel the offset voltage of the same group of Hall devices and improve the signal-to-noise ratio of the magnetic field detection signal, i.e., the Hall differential signal.

[0117] In some embodiments, the differential amplifier circuit 250 further includes an adaptive gain adjustment module for dynamically adjusting the gain of the differential amplifier circuit 250 based on the amplitude of the received Hall device output signal. For example, when a weak magnetic field signal is detected, the gain adjustment module increases the gain to enhance resolution; when a strong magnetic field signal is detected, the gain decreases to avoid overload.

[0118] Gain ranges can be preset for different detection directions to adapt to differences in magnetic field strength.

[0119] Figure 11a and Figure 11b The waveforms of the output signals of horizontal Hall devices Z1 and Z2 under the control of the rotating current circuit are shown respectively. Figure 12a and Figure 12b The waveforms of the output signals of horizontal Hall devices Z1 and Z2 after passing through the instrumentation amplifier are shown below. Figure 13a and Figure 13b The waveforms are shown for the input signals at the non-inverting and inverting input terminals of a fully differential operational amplifier, respectively. Figure 14a and Figure 14b The waveforms are shown for the output signals at the non-inverting and inverting output terminals of a fully differential operational amplifier, respectively. Figure 15 The waveform diagram shows the Hall differential signal output by the fully differential operational amplifier.

[0120] As the magnet rotates along the X-axis, the magnetic field component along the Z-axis detected by the horizontal Hall device 210 will exhibit a sinusoidal waveform, generating a sinusoidal Hall voltage. This voltage is then superimposed on the offset voltage shifted by the rotating current circuit 240 and output, with the waveform shown below. Figure 11a and Figure 11b As shown. The rotating current circuit 240 includes two paths, which are respectively connected to the two instrumentation amplifiers 251 in the instrumentation amplifier group 251. The waveforms of the differential output signals of Vhall_p1-Vhall_n1 and Vhall_p2-Vhall_n2 after being amplified by the instrumentation amplifiers 251 are shown below. Figure 12a and Figure 12b As shown in the figure, after processing by instrumentation amplifier 251, the Hall component and the offset component in the signal maintain an anti-phase differential relationship.

[0121] Reference Figure 10 As shown in the connection diagram, the signal, after secondary amplification by instrumentation amplifier 251, is output to fully differential operational amplifier 252. At this time, the Hall voltage components of the two input signals received at the non-inverting input terminal of fully differential operational amplifier 252 tend to be consistent, while the offset voltage components are out of phase, corresponding to the input signal waveforms as shown below. Figure 13a and Figure 13b As shown, after the summation operation inside the fully differential operational amplifier 252, the offset voltage at the input terminal is largely canceled out, becoming almost zero. Similarly, the signal characteristics received at the inverting input terminal of the fully differential operational amplifier 252 are symmetrical to those at the non-inverting input, with the corresponding waveform as shown below. Figure 14a and 14b As shown. Ultimately, the fully differential operational amplifier 252 outputs a Hall differential signal that completely eliminates offset voltage and reflects only the actual magnetic field changes, as shown. Figure 15 As shown.

[0122] In one possible implementation, the magnetic field detection device further includes a controller for generating the aforementioned control signal.

[0123] In some embodiments, the controller has a preset magnetic field detection timing sequence. According to the timing sequence, the combination of magnetic field components in the direction to be detected is determined sequentially, and a matching control signal timing sequence is generated. The Hall selection circuit 230 is controlled in an orderly manner to select the corresponding Hall device combination in the order of each control signal in the control signal timing sequence.

[0124] In one possible implementation, the controller is used to determine the aforementioned control signal based on the magnetic field components detected over historical time.

[0125] Specifically, the controller can predict the direction of the magnetic field component change that is greater at the next moment or the next time node based on the magnetic field component detected in historical time, and generate a control signal corresponding to the predicted direction of the magnetic field component change that is greater.

[0126] The controller can determine the target direction in which the magnetic field component has not changed for a long time based on the magnetic field component detected in historical time. Then, based on the target direction, it can determine the control signal for the next moment or time node so that the output magnetic field component does not include the magnetic field component in the target direction.

[0127] By introducing a controller that adaptively generates control signals based on historical magnetic field trends and amplitude fluctuations, the Hall effect sensors are precisely selected, allowing for flexible switching of magnetic field detection dimensions without manual intervention. This avoids invalid detections, improves the real-time performance and efficiency of 3D magnetic field detection, and closely matches the magnetic field variation patterns of magnet rotation, ensuring targeted detection.

[0128] This application also provides a magnetic encoder, including a signal processing unit and a magnetic field detection device 20 provided in any embodiment of this application.

[0129] This application also provides a magnetic field detection method, applied to the magnetic field detection device 20 provided in any embodiment of this application. The method includes: receiving a control signal; inputting the control signal into a Hall selection circuit 230, selecting a Hall device integrated in the chip through the Hall selection circuit 230; and acquiring the magnetic field component signal output by the selected Hall device.

[0130] In one possible implementation, the method further includes generating a control signal based on the magnetic field components detected over historical time.

[0131] This application also provides an electronic device comprising at least one processor and a memory. Optionally, the electronic device further includes a communication component. The processor, memory, and communication component are connected via a bus.

[0132] In the specific implementation process, at least one processor executes computer execution instructions stored in memory, causing at least one processor to execute the above-described magnetic field detection method.

[0133] The specific implementation process of the processor can be found in the above method embodiments, and its implementation principle and technical effect are similar, so it will not be repeated here.

[0134] In the above embodiments, it should be understood that the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), etc. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in this invention can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules within the processor.

[0135] The memory may include random access memory (RAM) and may also include non-volatile memory (NVM), such as at least one disk storage device.

[0136] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. Buses can be categorized as address buses, data buses, control buses, etc. For ease of illustration, the buses shown in the accompanying drawings are not limited to a single bus or a single type of bus.

[0137] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.

[0138] This application also provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the above-described method.

[0139] The aforementioned readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The readable storage medium can be any available medium accessible to a general-purpose or special-purpose computer.

[0140] An exemplary readable storage medium is coupled to a processor, enabling the processor to read information from and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can reside in an Application Specific Integrated Circuit (ASIC). Alternatively, the processor and the readable storage medium can exist as discrete components in the device.

[0141] The division of units is merely a logical functional division; in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.

[0142] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0143] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0144] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0145] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0146] Finally, it should be noted that other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein, and is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A magnetic field detection device, characterized in that, include: At least one horizontal Hall effect device, multiple vertical Hall effect devices, and a Hall effect selection circuit; The Hall selection circuit is connected to both the at least one horizontal Hall device and the plurality of vertical Hall devices; the at least one horizontal Hall device and the plurality of vertical Hall devices are integrated in the same chip; the plurality of vertical Hall devices include at least one first Hall device and at least one second Hall device; The horizontal Hall effect device is used to detect the magnetic field component in a third direction perpendicular to the chip plane. The first Hall device is disposed along a first direction of the chip plane and is used to detect the magnetic field component in the first direction; The second Hall effect sensor is disposed along a second direction on the chip plane and is used to detect the magnetic field component in the second direction; the first direction, the second direction, and the third direction are perpendicular to each other; The Hall selection circuit is used to select at least one Hall device from the at least one horizontal Hall device and the plurality of vertical Hall devices according to the control signal, so as to realize the detection of the magnetic field component in the corresponding direction.

2. The apparatus according to claim 1, characterized in that, The number of the horizontal Hall device, the first Hall device, and the second Hall device are all even numbers; The Hall selection circuit is specifically used for: Based on the control signal, at least one group of Hall devices is selected; each group of Hall devices includes two Hall devices of the same type.

3. The apparatus according to claim 2, characterized in that, The number of the horizontal Hall device, the first Hall device, and the second Hall device are all two; The control signal is a two-digit digital signal; the Hall selection circuit includes a four-way multiplexer for selecting four Hall devices. The four-way multiplexer is divided into two groups. The first group of multiplexers is controlled by the low-order signal of the control signal, and the second group of multiplexers is controlled by the high-order signal of the control signal.

4. The apparatus according to claim 2, characterized in that, It also includes rotating current circuits and differential amplifier circuits; The rotating current circuit is connected to the Hall selection circuit and is used to periodically change the bias current direction of at least one group of Hall devices selected by each Hall selection circuit so that the offset voltage of the output signal of the same group of Hall devices is in differential form. The differential amplifier circuit is connected to the Hall selection circuit and is used to differentially amplify the output signal of each selected group of Hall devices in order to suppress the offset voltage of the output signal of the same group of Hall devices.

5. The apparatus according to claim 4, characterized in that, The differential amplifier circuit includes: at least one set of instrumentation amplifiers and a fully differential operational amplifier; each set of instrumentation amplifiers includes two instrumentation amplifiers. The input terminals of the two instrumentation amplifiers in the same group are cross-connected to the positive and negative output terminals of the corresponding Hall devices, respectively. The non-inverting input of the fully differential operational amplifier is connected to the output of one instrumentation amplifier in each group of instrumentation amplifiers through a first resistor, and the inverting input is connected to the output of another instrumentation amplifier in each group of instrumentation amplifiers through a second resistor. The non-inverting and inverting output terminals of the fully differential operational amplifier are connected to its inverting and non-inverting input terminals respectively via a third resistor and a fourth resistor.

6. The apparatus according to claim 4, characterized in that, The rotating current circuit is specifically used for: Under the control of a four-phase non-overlapping clock, the bias current direction of the selected at least one group of Hall devices is periodically switched in a clockwise or counterclockwise direction to shift the offset voltage of the at least one group of Hall devices to the frequency of the four-phase non-overlapping clock; wherein, the four-phase non-overlapping clock phases of two Hall devices in the same group are complementary, so that the offset voltage output by the two Hall devices in the same group is out of phase.

7. The apparatus according to any one of claims 1-6, characterized in that, Also includes: Controller; The controller is used to generate the control signal based on the magnetic field components detected over historical time.

8. A magnetic encoder, characterized in that, It includes a signal processing unit and the magnetic field detection device according to any one of claims 1-7; The signal processing unit is used to perform vector merging on the magnetic field component signals output by the magnetic field detection device, and to calculate and encode the rotation angle based on the vector merging result.

9. A magnetic field detection method, characterized in that, The method, applied to the magnetic field detection device provided in any one of claims 1-7, comprises: Receive control signals; The control signal is input to the Hall selection circuit, which then selects the Hall device integrated in the chip. Acquire the magnetic field component signal output by the selected Hall device.

10. The method according to claim 9, characterized in that, The method further includes: The control signal is generated based on the magnetic field components detected over historical time.

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