Packaging structure and packaging method
By using a stacked packaging structure and optical coupling design, the problem of traditional packaging solutions failing to meet the integration and performance requirements of highly integrated optoelectronic products is solved. This achieves co-packaging of highly integrated photonic and electronic integrated circuit chips, optimizes electrical connection and optical coupling effects, and reduces production costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI XIZHI TECH CO LTD
- Filing Date
- 2024-12-25
- Publication Date
- 2026-07-07
AI Technical Summary
Traditional chip surface mount and wire bonding packaging solutions cannot meet the application requirements of optoelectronic products with higher integration, especially in terms of the integration and performance of photonic integrated circuit chips and electronic integrated circuit chips.
The packaging structure adopts a stacked arrangement, including a first substrate, an electronic integrated circuit chip, a photonic integrated circuit chip, and a second substrate. Electrical connection is achieved through a first connection line and a second connection line. A light source and an optical coupler for the photonic integrated circuit chip are set on the second substrate, and the optical coupling path is optimized by combining a lens and an isolator.
It achieves co-packaging of highly integrated photonic and electronic integrated circuit chips, optimizes electrical connection and optical coupling effects, reduces production costs, is compatible with existing equipment and processes, and improves the reliability and installation accuracy of the packaging structure.
Smart Images
Figure CN122349280A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and in particular to a packaging structure and packaging method. Background Technology
[0002] In more integrated optoelectronic products, traditional chip mounting and wire bonding packaging solutions are gradually failing to meet application requirements. Co-Packaged Optics (CPO) integrates photonic integrated circuit (PIC) chips and electronic integrated circuit (EIC) chips into a single package structure, which can improve data transmission rates and product integration. Summary of the Invention
[0003] This application provides a packaging structure and packaging method, aiming to provide a co-packaging structure for photonic integrated circuit chips and electronic integrated circuit chips with high integration and excellent performance.
[0004] According to a first aspect of this application, this application provides a packaging structure comprising: a first substrate, an electronic integrated circuit chip, a photonic integrated circuit chip, and a second substrate stacked sequentially; wherein the first substrate has a bearing surface close to the second substrate, and the second substrate has a first surface close to the first substrate and a second surface away from the first substrate; a first connecting line having a first end and a second end, the first end being electrically connected to the bearing surface of the first substrate, and the second end being electrically connected to the second surface of the second substrate; and a light source disposed on the second surface of the second substrate, the light source being electrically connected to the first connecting line, and the light source being optically coupled to the photonic integrated circuit chip.
[0005] In some embodiments, the packaging structure further includes: a second connecting line having a first end and a second end, wherein the first end is electrically connected to a first surface of the second substrate and is electrically connected to the first connecting line through a wiring structure of the second substrate; wherein the light source is electrically connected to the second end of the second connecting line to be electrically connected to the first connecting line and electrically connected to the first substrate via the first connecting line.
[0006] In some embodiments, the wiring structure includes conductive holes located within the second substrate.
[0007] In some embodiments, the first end of the first connecting line is electrically connected to the conductive hole through a portion of a wiring structure disposed on the second surface of the second substrate, and is electrically connected to the first end of the second connecting line via the conductive hole.
[0008] In some implementations, the first connecting line and the second connecting line are gold wires.
[0009] According to a second aspect of this application, this application also provides a packaging structure, comprising: a first substrate, an electronic integrated circuit chip, a photonic integrated circuit chip, and a second substrate stacked sequentially; wherein the first substrate has a bearing surface close to the second substrate, and the second substrate has a first surface close to the first substrate and a second surface away from the first substrate; a light source is disposed on the second surface of the second substrate, the light source is electrically connected to the first connecting line, and the light source is optically coupled to the photonic integrated circuit chip.
[0010] In some embodiments, the photonic integrated circuit chip includes an optical port, and the projection of the optical port onto the carrier surface does not overlap on a plane parallel to the carrier surface.
[0011] In some embodiments, the optical port extends beyond the edge of the bearing surface.
[0012] In some embodiments, the first substrate includes a first opening, and the optical port overlaps with the projection of the first opening on a plane parallel to the bearing surface.
[0013] In some embodiments, the photonic integrated circuit chip includes an optical port, which is an edge coupler.
[0014] In some embodiments, the projection of the light source onto the bearing surface does not overlap on a plane parallel to the bearing surface.
[0015] In some embodiments, the packaging structure further includes: a lens and an isolator arranged sequentially in the optical coupling path between the light source and the photonic integrated circuit chip; the lens and the isolator are fixed to a first surface of the second substrate.
[0016] In some embodiments, the projection of the lens onto the bearing surface does not overlap with the projection of the bearing surface on a plane parallel to the bearing surface, and the projection of the isolator onto the bearing surface does not overlap with the projection of the bearing surface.
[0017] In some embodiments, the first substrate includes a printed circuit board or an organic substrate.
[0018] In some embodiments, the second substrate includes a rigid substrate.
[0019] According to a third aspect of this application, this application also provides a packaging method suitable for manufacturing a packaging structure as described in any one of the first aspects above, comprising: fixing an electronic integrated circuit chip and a photonic integrated circuit chip together; providing a first substrate having a carrier surface; fixing a combination of the electronic integrated circuit chip and the photonic integrated circuit chip together to the first substrate, wherein the electronic integrated circuit chip is mounted to the carrier surface of the first substrate; providing a second substrate having a first surface and an opposing second surface; fixing the photonic integrated circuit chip and the second substrate together such that the first surface of the second substrate is close to the carrier surface of the first substrate; and mounting a light source on the first surface of the second substrate to form an optical coupling path between the light source and the photonic integrated circuit chip.
[0020] In some embodiments, the method further includes: fixing a first end of the first connecting line to the bearing surface of the first substrate, fixing a second end of the first connecting line to a second surface of the second substrate; and flipping the first substrate so that the bearing surface faces downward.
[0021] In some embodiments, the second substrate further has a wiring structure. After flipping the first substrate so that the bearing surface faces downward, the method further includes: fixing a first end of a second connecting line to a first surface of the second substrate, wherein the second connecting line is electrically connected to the second connecting line through the wiring structure, and electrically connecting a second end of the second connecting line to the light source.
[0022] In some embodiments, after providing the first substrate, the method further includes forming a first opening on the first substrate.
[0023] In some embodiments, the photonic integrated circuit chip, the light source, and the second connecting line are sequentially disposed in a horizontal direction on the second surface of the second substrate, and the first connecting line is disposed on the side of the second substrate that is close to the second connecting line and away from the photonic integrated circuit chip.
[0024] The technical effects achieved through one or more embodiments in the above-described embodiments of this application are multifaceted:
[0025] By stacking a first substrate, an electronic integrated circuit chip, a photonic integrated circuit chip, and a second substrate, along with a light source disposed on the second surface of the second substrate and electrically connected to the first substrate via a first connecting line, a packaging structure is achieved that co-packages the photonic integrated circuit chip and the electronic integrated circuit chip. While enabling the photonic integrated circuit chip to be flip-mounted onto the electronic integrated circuit chip via the second substrate, optical components such as the light source can also be disposed on the second substrate to form an optical coupling path between them and the photonic integrated circuit chip. This removes the limitations on the mounting position of optical components such as the light source and achieves better optical coupling. Furthermore, the arrangement of the first and second connecting lines optimizes the electrical connections and wire bonding of the overall packaging structure, while also making it easier to implement in the manufacturing process. Attached Figure Description
[0026] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.
[0027] Figure 1 A schematic diagram of the packaging structure of a photonic integrated circuit chip and an electronic integrated circuit chip is shown.
[0028] Figure 2 A schematic diagram of a packaging structure according to an embodiment of this application is shown;
[0029] Figure 3 A schematic diagram of a packaging structure according to another embodiment of this application is shown;
[0030] Figure 4 A schematic diagram of a packaging structure according to another embodiment of this application is shown;
[0031] Figure 5 A schematic diagram of a packaging structure according to another embodiment of this application is shown;
[0032] Figure 6 A schematic flowchart of a packaging method according to an embodiment of this application is shown;
[0033] Figure 7 A schematic diagram showing the fixed connection between a photonic integrated circuit chip and an electronic integrated circuit chip according to an embodiment of this application is shown;
[0034] Figure 8 This diagram illustrates a combination of an electronic integrated circuit chip and a photonic integrated circuit chip fixedly connected to a first substrate according to an embodiment of this application.
[0035] Figure 9 This diagram illustrates a fixed connection between a photonic integrated circuit chip and a second substrate according to an embodiment of this application.
[0036] Figure 10 A schematic diagram showing the first connecting line fixed according to an embodiment of this application is shown;
[0037] Figure 11 A schematic diagram is shown after the first substrate is flipped according to an embodiment of this application;
[0038] Figure 12 A schematic diagram showing the second connecting line fixed according to an embodiment of this application is shown.
[0039] The meanings of the reference numerals in the attached figures are as follows:
[0040] 10 First substrate
[0041] 11 First Opening
[0042] 20 Second substrate
[0043] 21 Wiring Structure
[0044] 30 Electronic integrated circuit chips
[0045] 40 Photonic Integrated Circuit Chips
[0046] 51 First connecting line
[0047] 52 Second connecting line
[0048] 60 light source
[0049] 61 Carrier board
[0050] 71 Isolator
[0051] 72 Lenses Detailed Implementation
[0052] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0053] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.
[0054] In the description of this application, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances. In this embodiment, the simulated display screen touch unit is connected to the head tracking unit to obtain the movement path of the sensing cursor in the display device.
[0055] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.
[0056] The following disclosure provides many different embodiments or examples for implementing different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.
[0057] Figure 1 A schematic diagram of a packaging structure for a photonic integrated circuit chip and an electronic integrated circuit chip is shown. The inventors of this application have discovered that in this shared packaging structure, a tungsten-copper substrate 80' is placed below the opening of the printed circuit board 10'. The photonic integrated circuit chip 40' is mounted on the tungsten-copper substrate 80', and the electronic integrated circuit chip 30' is flip-chip mounted on the photonic integrated circuit chip 40'. Related components such as the light source 60', lens 72', and isolator 71' are mounted near the light inlet of the photonic integrated circuit chip 40' on the tungsten-copper substrate 80'. However, as the number of channels in the electronic integrated circuit chip 30' and the rate per channel increases, the required number of pins also increases, and the above packaging structure is gradually becoming inadequate for new application requirements.
[0058] This application provides a packaging structure. Figure 2 A schematic diagram of a packaging structure according to an embodiment of this application is shown. The packaging structure includes a first substrate 10, a second substrate 20, an electronic integrated circuit chip 30, a photonic integrated circuit chip 40, and a light source 60, which are stacked sequentially. The first substrate 10 has a bearing surface close to the second substrate 20, and the second substrate 20 has a first surface close to the first substrate 10 and a second surface away from the first substrate 10. The light source 60 is disposed on the second surface of the second substrate 20, electrically connected to the bearing surface of the first substrate, and optically coupled to the photonic integrated circuit chip 40. It should be noted that the photonic integrated circuit chip 40 and the electronic integrated circuit chip 30 have an electrical bonding structure. Figure 2 (Not shown in the image), the electronic integrated circuit chip 30 and the first substrate 10 have an electrical bonding structure (…). Figure 2 (Not shown in the image), the photonic integrated circuit chip 40 is electrically connected to the electronic integrated circuit through a bonding structure to transmit current / signal, and the electronic integrated circuit chip 30 is electrically connected to the first substrate 10 through a bonding structure to transmit current / signal.
[0059] In some embodiments, the first substrate 10 may be a printed circuit board (PCB) or an organic substrate. Organic substrates use organic polymer materials as the matrix, such as polyimide (PI) or epoxy resin. Organic substrates have low dielectric constants and dielectric losses, making them suitable for high-speed signal transmission. The first substrate 10 may include a power supply and electronic devices. The power supply and electronic devices are electrically connected to conductive lines. The electronic devices may be resistors, capacitors, inductors, transistors, diodes, etc., which are not specified in this application.
[0060] exist Figure 2 In the illustrated embodiment, the electronic integrated circuit chip 30 is disposed on the bearing surface of the first substrate 10. The electronic integrated circuit chip 30 can be fixed to the first substrate 10 by means of welding or bonding, and is electrically connected to the conductive lines on the first substrate 10 through a bonding structure. Thus, the current / signal on the electronic integrated circuit chip 30 can be directly transmitted to the first substrate 10 without passing through the photonic integrated circuit chip 40. In some embodiments, the electronic integrated circuit chip 30 includes one or more active components and / or passive components. Examples of passive components include, but are not limited to, resistors, capacitors, and inductors. Examples of active components include, but are not limited to, diodes, field-effect transistors, and metal-oxide-semiconductor field-effect transistors.
[0061] exist Figure 2 In the illustrated embodiment, the photonic integrated circuit chip 40 is disposed on the electronic integrated circuit chip 30, relative to, for example Figure 1 In the embodiment shown, where the photonic integrated circuit chip 40' is disposed below the electronic integrated circuit chip 30', the photonic integrated circuit chip 40 does not restrict the placement of other optical or electrical components. The photonic integrated circuit chip 40 and the electronic integrated circuit chip 30 are electrically connected via a bonding structure for information exchange. The photonic integrated circuit chip 40 may include a substrate, an optical modulator, an optical waveguide, an optical coupling structure, and a photodetector, etc.
[0062] exist Figure 2 In the illustrated embodiment, the second substrate 20 is disposed on the photonic integrated circuit chip 40, having a first surface close to the first substrate 10 and a second surface away from the first substrate 10. In some embodiments, the second substrate 20 is a rigid substrate, exemplarily a ceramic substrate, and the second substrate 20 is used to support the light source 60 and the optical coupling component, so that the light signal emitted by the light source 60 is coupled to the photonic integrated circuit chip 40.
[0063] In some embodiments, the photonic integrated circuit chip 40 includes an optical port, the projection of which does not overlap with the projection of the carrier surface on a plane parallel to the carrier surface. The optical signal emitted by the light source 60 is coupled into the optical port via an optical coupling component, etc. The optical port receives the optical signal and transmits it to an optical structure such as an optical waveguide inside the photonic integrated circuit chip 40 for processing. Exemplarily, the optical port can be an edge coupler, which differs from a surface coupler in that the coupling process of the edge coupler occurs at the edge of the optical waveguide, the light transmission direction is parallel to the axis of the optical waveguide, and lateral coupling occurs when the optical signal enters through the edge coupler. Figure 2 In the embodiment shown, by rationally designing the positional relationship between the edge coupler and the light source 60, the light signal emitted by the light source 60 can be transmitted laterally to the photonic integrated circuit chip 40 through the optical coupling component using the edge coupler. This shortens the propagation path of the light signal, avoids the loss caused by refraction and reflection of the light signal using multiple optical coupling components, enhances its stability, and thus improves the optical coupling performance of the photonic integrated circuit chip 40.
[0064] exist Figure 2 In the illustrated embodiment, the second substrate 20 extends beyond the edge of the first substrate 10, and the optical port of the photonic integrated circuit chip 40 extends beyond the edge of the bearing surface. For the portion of the second substrate 20 extending beyond the first substrate 10, since there are no other devices in the space below it, there is a larger accommodating space. Mounting the light source 60 and optical coupling components on the first surface of this portion of the second substrate 20 allows for compatibility with light sources 60 and optical coupling components of various sizes. Furthermore, during packaging, the entire packaging structure can be flipped so that the first surface of the portion of the second substrate 20 extending beyond the first substrate 10 is exposed. The pick-and-place machine and optical coupling stage can then precisely position and mount the light source 60 and optical coupling components onto the second substrate 20 using conventional processes. This packaging structure not only compatibility with existing mounting equipment and processes, reducing production costs, but also maintains good mounting accuracy. In addition, since the light source 60 and optical coupling components are mounted simultaneously with the photonic integrated circuit chip 40 on the same rigid substrate, it helps maintain the stability and reliability of the optical coupling path, preventing displacement of the optical coupling path due to mechanical forces and reducing optical coupling efficiency.
[0065] exist Figure 2 In the embodiment shown, the projections of the light source 60 and the carrier surface do not overlap on a plane parallel to the carrier surface. For example, the light source 60 can be a laser chip. Since the laser chip is thinner than the photonic integrated circuit chip 40, if the laser chip is directly mounted on the first surface of the second substrate 20, the light signal emitted by the laser chip is difficult to couple to the optical port of the photonic integrated circuit chip 40. Therefore, the mounting position of the laser chip is adjusted by the carrier plate 61 so that the light signal emitted by the laser chip can enter the optical port through a shorter light transmission path.
[0066] exist Figure 2 In the illustrated embodiment, a lens 72 and an isolator 71 are sequentially arranged in the optical coupling path between the light source 60 and the photonic integrated circuit chip 40. The lens 72 and isolator 71 are fixed to the first surface of the second substrate 20. On a plane parallel to the bearing surface, the projections of the lens 72 and the bearing surface do not overlap. The projection of the isolator 71 and the bearing surface do not overlap. The optical signal emitted from the light source 60 passes through the lens 72 and the isolator 71 sequentially before entering the optical port. Both the lens 72 and the isolator 71 are optical coupling components. In the optical coupling path, the lens 72 is used to focus the diverging optical signal, thereby improving the optical coupling efficiency. The isolator 71 is used to prevent the reflected light from propagating backward, thereby avoiding interference from the reflected light to the light source 60 or other optical components.
[0067] Figure 3 A schematic diagram of a packaging structure according to another embodiment of this application is shown. This embodiment is similar to... Figure 2 The difference in the embodiment is that the first substrate 10 further includes a first opening 11, and the projection of the optical port and the first opening 11 overlaps on a plane parallel to the bearing surface. The first opening 11 penetrates the first substrate 10, and the optical port and light source 60 are exposed through the first opening 11. The light source 60 and the optical coupling assembly can be partially accommodated in the first opening 11, but the maximum height of the light source 60 and the optical coupling assembly should be less than the distance from the first surface of the second substrate 20 to the back surface (opposite surface of the bearing surface) of the first substrate 10. Relative to Figure 2 In the illustrated embodiment, since the photonic integrated circuit chip 40 does not need to extend beyond the edge of the first substrate 10, the mounting position of the photonic integrated circuit chip 40 on the first substrate 10 can be set more flexibly. Furthermore, the light source 60 and the optical port are located within the edge of the first substrate 10 and are protected by the first substrate 10, avoiding the problem that the light source 60 and the optical port are more easily damaged without protection when located outside the edge of the first substrate 10.
[0068] This application also provides a packaging structure. Figure 4A schematic diagram of a packaging structure according to another embodiment of this application is shown. The packaging structure includes a first substrate 10, an electronic integrated circuit chip 30, a photonic integrated circuit chip 40, a second substrate 20, and a first connecting line 51, which are stacked sequentially. The first substrate 10 has a bearing surface close to the second substrate 20, and the second substrate 20 has a first surface close to the first substrate 10 and a second surface away from the first substrate 10. The first connecting line 51 has a first end and a second end, the first end being electrically connected to the bearing surface of the first substrate 10, and the second end being electrically connected to the second surface of the second substrate 20. A light source 60 is disposed on the second surface of the second substrate 20, the light source 60 is electrically connected to the first connecting line 51, and the light source 60 is optically coupled to the photonic integrated circuit chip 40.
[0069] When bonding wires to a chip, conventional wire bonding techniques can bond wires to two planes with a height difference on the same side. When the first surface of the second substrate 20 is close to the first substrate 10, and the second surface of the second substrate 20 is far from the first substrate 10, the second surface of the second substrate 20 and the bearing surface of the first substrate 10 are on the same side, facilitating the use of conventional wire bonding techniques. For example, when electrically connecting the bearing surface of the first substrate 10 and the second surface of the second substrate 20 via a first connecting wire 51, one end of the first connecting wire 51 is fixed to the bearing surface of the first substrate 10, and the second end is fixed to the second surface of the second substrate 20 using a wire bonding device. Since coupling devices such as the light source 60 are disposed on the first surface of the second substrate 20, electrical signals on the second surface of the second substrate 20 also need to be transmitted to the first surface via a wiring structure 21. The wiring structure 21 may include a portion disposed on the second surface of the second substrate 20 and conductive vias penetrating the second substrate 20. For example, the portion of the wiring structure 21 disposed on the second surface of the second substrate 20 may be a planar metal wire, and the conductive via may be a through-hole filled with conductive metal.
[0070] Therefore, since the second surface of the second substrate and the bearing surface of the first substrate are on opposite sides, it is difficult to directly lay wires between them. The first connecting line is used to realize the electrical connection between the bearing surface of the first substrate and the second surface of the second substrate. Then, the light source is electrically connected to the first connecting line. This solves the problem that when the laser chip and the photonic integrated circuit chip are mounted on the second surface of the second substrate, they cannot be directly electrically connected to the bottom printed circuit board or organic substrate.
[0071] Therefore, the arrangement of the first connecting line 51 and the second connecting line 52 facilitates the need for wiring and provides a suitable electrical connection method.
[0072] exist Figure 4In the illustrated embodiment, the packaging structure further includes a second connecting line 52. The second connecting line 52 has a first end and a second end. Its first end is electrically connected to a first surface of the second substrate 20 and is electrically connected to the first connecting line 51 via the wiring structure 21 of the second substrate 20. The light source 60 is electrically connected to the second end of the second connecting line 52 to be electrically connected to the first connecting line 51, and then electrically connected to the first substrate 10 via the first connecting line 51. The second connecting line 52 can be positioned close to the light source 60. Figure 4 In the embodiment shown, the second connecting line 52 does not overlap with the projection of the bearing surface on a plane parallel to the bearing surface.
[0073] Specifically, the first end of the first connecting line 51 is electrically connected to a conductive hole through a portion of the wiring structure 21 disposed on the second surface of the second substrate 20, and is electrically connected to the first end of the second connecting line 52 via the conductive hole. For example, the first connecting line 51 and the second connecting line 52 are gold wires.
[0074] In some embodiments, the wiring structure 21 includes a multilayer conductive layer located inside the second substrate 20, and also includes conductive layers located on the first surface and the second surface of the second substrate 20.
[0075] Furthermore, the design of the second substrate 20 extending beyond the first substrate 10 allows the pick-and-place machine and coupling stage to be easily observed and packaged using a top-view camera.
[0076] Figure 5 A schematic diagram of a packaging structure according to another embodiment of this application is shown. This embodiment is similar to... Figure 4 The difference in the embodiment is that the first substrate 10 further includes a first opening 11, on a plane parallel to the bearing surface, the projection of the optical port and the first opening 11 overlaps. The first opening 11 penetrates the first substrate 10, and the optical port and light source 60 are exposed through the first opening 11. The light source 60 and the optical coupling assembly can be partially accommodated in the first opening 11, but the maximum height of the light source 60 and the optical coupling assembly should be less than the distance from the first surface of the second substrate 20 to the back surface (opposite surface of the bearing surface) of the first substrate 10. In addition, the design of the first substrate 10 including the first opening 11 allows the pick-and-place machine and coupling stage to be easily observed and packaged using a top-view camera.
[0077] exist Figure 4 In the illustrated embodiment, since the second substrate 20 extends beyond the edge of the first substrate 10, the first connecting line 51 can only be disposed on the side of the second substrate 20 closest to the first substrate 10, while the second connecting line 52 is disposed on the side of the second substrate 20 furthest from the first substrate 10. The distance between the first connecting line 51 and the second connecting line 52 is relatively large, requiring connection via a longer metal wire on the second surface of the second substrate 20. However... Figure 5In this embodiment, a photonic integrated circuit chip 40, an isolator 71, a lens 72, a light source 60, and a second connecting line 52 are sequentially disposed horizontally on the second surface of the second substrate 20. The first connecting line 51 can be disposed on the side of the second substrate 20 closer to the second connecting line 52 and further away from the photonic integrated circuit chip 40. However, when disposed on the side closer to the second connecting line 52 and further away from the photonic integrated circuit chip 40, the metal wires on the second surface of the second substrate 20 can be compared to... Figure 4 The embodiment is shorter, thus achieving a shorter electrical connection path between the light source and the first substrate, enhancing the reliability of the packaging structure and reducing production costs.
[0078] This application also provides a packaging method. Figure 6 A schematic flowchart of a packaging method according to an embodiment of this application is shown. The packaging method includes steps 101 to 104.
[0079] Step 101: Fix the electronic integrated circuit chip 30 and the photonic integrated circuit chip 40 together.
[0080] Step 102: Provide a first substrate 10, the first substrate 10 having a bearing surface; fix the combination of electronic integrated circuit chip 30 and photonic integrated circuit chip 40 to the first substrate 10, wherein the electronic integrated circuit chip 30 is mounted to the bearing surface of the first substrate 10.
[0081] Step 103: Provide a second substrate 20, which has a first surface and an opposing second surface; fix the photonic integrated circuit chip 40 and the second substrate 20 together so that the first surface of the second substrate 20 is close to the bearing surface of the first substrate 10.
[0082] Step 104: Mount the light source 60 on the first surface of the second substrate 20 to form an optical coupling path between the light source 60 and the photonic integrated circuit chip 40.
[0083] Figures 7 to 12 This is a schematic diagram of the structure of each step in the packaging method of this application embodiment. The packaging method of this application embodiment will be described in detail below with reference to the accompanying drawings.
[0084] Figure 7 A schematic diagram is shown showing the photonic integrated circuit chip 40 and the electronic integrated circuit chip 30 after being fixedly connected according to an embodiment of this application. The electronic integrated circuit chip 30 can be mounted on the photonic integrated circuit chip 40 through a chip packaging process to achieve the fixed connection between the two.
[0085] Figure 8This diagram illustrates a combination of an electronic integrated circuit chip 30 and a photonic integrated circuit chip 40, according to an embodiment of this application, fixedly connected to a first substrate 10. A first substrate 10 is provided, and the combination of the electronic integrated circuit chip 30 and the photonic integrated circuit chip 40 is mounted onto the first substrate 10. The electronic integrated circuit chip 30 is mounted onto the bearing surface of the first substrate 10, and is electrically connected to the first substrate 10. The electrical connection between the electronic integrated circuit chip 30 and the first substrate 10 can be achieved through wire bonding or flip-chip bonding, etc.
[0086] Figure 9 A schematic diagram is shown showing the photonic integrated circuit chip 40 and the second substrate 20 fixedly connected according to an embodiment of this application. A second substrate 20 is provided, having a first surface and an opposing second surface. The photonic integrated circuit chip 40 is fixed to the first surface of the second substrate 20 such that the first surface of the second substrate 20 is close to the bearing surface of the first substrate 10, and the second surface is away from the bearing surface of the first substrate 10.
[0087] Before mounting the light source 60 on the first surface of the second substrate 20 to form an optical coupling path between the light source 60 and the photonic integrated circuit chip 40, the above packaging method further includes fixing the first end of the first connecting line 51 to the bearing surface of the first substrate 10, fixing the second end of the first connecting line 51 to the second surface of the second substrate 20, and after fixing the first connecting line 51, flipping the first substrate 10 so that the bearing surface faces down.
[0088] Figure 10 A schematic diagram is shown after the first connecting line 51 is fixed according to an embodiment of this application. The first connecting line 51 can be a metal wire. The first end of the first connecting line 51 is soldered to the bearing surface of the first substrate 10 by wire bonding process, and the second end of the first connecting line 51 is soldered to the second surface of the second substrate 20.
[0089] Figure 11 A schematic diagram is shown after the first substrate 10 has been flipped according to an embodiment of this application. After the first substrate 10 is flipped, a portion of the first surface of the second substrate 20 is exposed. Figure 11 In the embodiment shown, the second substrate 20 extends beyond the edge of the first substrate 10.
[0090] After flipping the first substrate 10 so that the bearing surface faces down, the light source 60 and the like are fixed to the first surface of the second substrate 20. For example, the light source 60, the lens 72 and the isolator 71 are fixed to the first surface of the second substrate 20. The light source 60 can be a laser chip, and the laser chip can be fixed to the first surface of the second substrate 20 by the carrier plate 61.
[0091] After the light source 60 and the optical coupling assembly are fixed, the first end of the second connecting line 52 is fixed to the first surface of the second substrate 20, and the second end of the second connecting line 52 is electrically connected to the light source 60. The second substrate 20 includes a wiring structure 21, and the second connecting line 52 is electrically connected to the light source 60 through the wiring structure 21. Figure 12 A schematic diagram showing the second connecting line 52 fixed according to an embodiment of this application is shown.
[0092] In some embodiments, after providing the first substrate 10, the above-described packaging method further includes forming a first opening 11 on the first substrate 10. The packaging method for forming the first opening 11 is suitable for applications such as... Figure 3 or Figure 5 The packaging structure in the embodiment.
[0093] In the above packaging method, by flipping the entire assembly during packaging to expose the first surface of the second substrate 20, the pick-and-place machine and optical coupling stage can precisely position and mount the light source 60 and optical coupling components onto the second substrate 20 using conventional processes. This not only ensures compatibility with existing mounting equipment and processes, reducing production costs, but also maintains good mounting accuracy.
[0094] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0095] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. However, these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.
Claims
1. A packaging structure, characterized in that, include: A first substrate, an electronic integrated circuit chip, a photonic integrated circuit chip, and a second substrate are sequentially stacked; wherein, the first substrate has a bearing surface close to the second substrate, and the second substrate has a first surface close to the first substrate and a second surface away from the first substrate; A first connecting line has a first end and a second end, wherein the first end is electrically connected to the bearing surface of the first substrate, and the second end is electrically connected to the second surface of the second substrate; A light source is disposed on the second surface of the second substrate, the light source is electrically connected to the first connection line, and the light source is optically coupled to the photonic integrated circuit chip.
2. The packaging structure as described in claim 1, characterized in that, Also includes: The second connecting line has a first end and a second end. Its first end is electrically connected to the first surface of the second substrate and is electrically connected to the first connecting line through the wiring structure of the second substrate. The light source is electrically connected to the second end of the second connecting line to be electrically connected to the first connecting line and electrically connected to the first substrate via the first connecting line.
3. The packaging structure as described in claim 2, characterized in that, The wiring structure includes conductive holes located within the second substrate.
4. The packaging structure as described in claim 3, characterized in that, The first end of the first connecting line is electrically connected to the conductive hole through a part of the wiring structure disposed on the second surface of the second substrate, and is electrically connected to the first end of the second connecting line via the conductive hole.
5. The packaging structure as described in claim 2, characterized in that, The first connecting line and the second connecting line are gold wires.
6. A packaging structure, characterized in that, include: A first substrate, an electronic integrated circuit chip, a photonic integrated circuit chip, and a second substrate are sequentially stacked; wherein, the first substrate has a bearing surface close to the second substrate, and the second substrate has a first surface close to the first substrate and a second surface away from the first substrate; A light source is disposed on the second surface of the second substrate, the light source is electrically connected to the bearing surface of the first substrate, and the light source is optically coupled to the photonic integrated circuit chip.
7. The packaging structure as described in claim 1 or 6, characterized in that, The photonic integrated circuit chip includes an optical port, and the projection of the optical port onto the support surface does not overlap on a plane parallel to the support surface.
8. The packaging structure as described in claim 7, characterized in that, The optical port extends beyond the edge of the bearing surface.
9. The packaging structure as described in claim 7, characterized in that, The first substrate includes a first opening, and the optical port overlaps with the projection of the first opening on a plane parallel to the bearing surface.
10. The packaging structure as described in claim 1 or 6, characterized in that, The photonic integrated circuit chip includes an optical port, which is an edge coupler.
11. The packaging structure as described in claim 1 or 6, characterized in that, On a plane parallel to the bearing surface, the projection of the light source onto the bearing surface does not overlap.
12. The packaging structure as described in claim 1 or 6, characterized in that, Also includes: A lens and an isolator are arranged sequentially in the optical coupling path between the light source and the photonic integrated circuit chip; The lens and the isolator are fixed to the first surface of the second substrate.
13. The packaging structure as described in claim 12, characterized in that, On a plane parallel to the bearing surface, the projection of the lens onto the bearing surface does not overlap, and the projection of the isolator onto the bearing surface does not overlap.
14. The packaging structure as described in claim 1 or 6, characterized in that, The first substrate includes a printed circuit board or an organic substrate.
15. The packaging structure as described in claim 1 or 6, characterized in that, The second substrate includes a rigid substrate.
16. A packaging method, characterized in that, The packaging structure applicable to any one of claims 1 to 15 includes: The electronic integrated circuit chip and the photonic integrated circuit chip are fixedly connected; A first substrate is provided, the first substrate having a bearing surface; a combination of an electronic integrated circuit chip and a photonic integrated circuit chip is fixedly connected to the first substrate, wherein the electronic integrated circuit chip is mounted to the bearing surface of the first substrate; A second substrate is provided, the second substrate having a first surface and an opposing second surface; a photonic integrated circuit chip and the second substrate are fixedly connected such that the first surface of the second substrate is close to the bearing surface of the first substrate; A light source is mounted on the first surface of the second substrate to form an optical coupling path between the light source and the photonic integrated circuit chip.
17. The packaging method as described in claim 16, characterized in that, The first end of the first connecting line is fixed to the bearing surface of the first substrate, and the second end of the first connecting line is fixed to the second surface of the second substrate. Flip the first substrate so that the bearing surface faces downward.
18. The packaging method as described in claim 17, characterized in that, The second substrate also has a wiring structure. After flipping the first substrate so that the bearing surface faces downward, the method further includes: The first end of the second connecting line is fixed on the first surface of the second substrate, wherein the second connecting line is electrically connected to the second connecting line through a wiring structure, and the second end of the second connecting line is electrically connected to the light source.
19. The packaging method as described in claim 16, characterized in that, After providing the first substrate, the method further includes: A first opening is formed on the first substrate.
20. The packaging method as described in claim 16, characterized in that, The photonic integrated circuit chip, the light source, and the second connecting line are sequentially arranged in a horizontal direction on the second surface of the second substrate, and the first connecting line is disposed on the side of the second substrate that is close to the second connecting line and away from the photonic integrated circuit chip.