Bidirectional super buck-boost dual bus power conversion circuit based on phase-shift control

Abstract

The application provides a bidirectional Super buck-boost double bus power conversion circuit based on phase shift control, one end of a current collection circuit Rsense1 is connected with a high-voltage bus, the other end is connected with one end of an inductor L4, the other end of the inductor L4 is connected with the drain of a switch MOS tube Q1; one end of a current collection circuit Rsense2 is connected with a low-voltage bus, the other end is connected with the source of the switch MOS tube Q1 and the drain of a switch MOS tube Q2. The application has the advantages that energy can be bidirectionally supplied between different voltage buses of a space power supply, energy redundant resources are effectively utilized; the energy sharing of the high-voltage bus and the low-voltage bus in a "mobile phone direct connection satellite energy system" can be effectively solved, the redundant cost of the conversion circuit is reduced; meanwhile, the excess energy can be autonomously transmitted from one bus to another bus with insufficient energy; the current is continuous during the energy transmission process, which can effectively reduce the disturbance to the bus; and multiple buses can be connected in parallel for expansion.

Description

Technical Field

[0001] This invention relates to a power bus conversion technology in the aerospace field. Background Technology

[0002] Space power supplies primarily obtain electricity from solar energy during periods of sunshine, supplying the bus load through a power regulation unit, and storing excess energy in batteries for use during periods of shadow. Depending on the load power, ranging from below 2kW to above 5kW, the power supply bus voltage is generally 28V, 42V, or 100V. Currently, mainstream mature space power systems primarily use a single bus. When downstream load voltage requirements are diverse or power demands are high, a single bus with a secondary bus converter or an independent dual-bus platform may be used.

[0003] The drawback of a single bus is its inability to meet the diverse voltage requirements of downstream loads, necessitating secondary conversion. As space power supplies increasingly tend towards high-voltage, high-power platforms, when the bus voltage is 50V, 100V, or higher, the downstream platform loads may have low-voltage requirements. In such cases, there are few options for single-stage voltage conversion, requiring a secondary bus converter (see "Current Status of Airbus Space Power Control Technology" by Lü Hongqiang). However, this additional stage of conversion circuitry increases conversion losses and reduces conversion efficiency. Furthermore, during the conversion from a high-voltage bus to a low-voltage bus, the converter needs extremely high reliability to ensure the normal operation of the low-voltage bus, typically requiring a redundant design for the secondary bus converter, thus increasing redundancy costs. If independent dual buses are adopted, the voltage difference between the two buses makes it difficult to mutually replenish energy. To ensure reliability, each bus requires separate redundancy design, increasing costs. Furthermore, commonly used power supply topologies such as Super-buck and Super-boost circuits can only transmit energy in one direction. Bidirectional four-switch buck-boost converters (FSBBs) suffer from discontinuous square waves in their input or output current, causing significant disturbances to the buses. (See "A Brief Discussion on the Development of Space Converter Power Systems" by Liu Guoqi). To meet the needs of diversified energy supply while effectively utilizing redundant resources, the industry is also exploring mutual energy replenishment between independent buses. Summary of the Invention

[0004] This invention provides a bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control, which realizes bidirectional energy replenishment between buses with different voltages in the space power supply, without relying on the conversion of the secondary bus, thereby reducing conversion efficiency loss. At the same time, the bidirectional converter is only required when the buses need energy complementarity, so the requirements for converter power and reliability are low, and the redundant design cost can be reduced, thus overcoming the defects of the prior art.

[0005] This invention provides a bidirectional Super PLC based on phase-shift control. The buck-boost dual-bus power conversion circuit includes: a current acquisition circuit Rsense1, an inductor L4, a switching MOSFET Q1, a diode D5, a current acquisition circuit Rsense2, a switching MOSFET Q2, a diode D6, a capacitor C8, and an inductor L5. One end of the current acquisition circuit Rsense1 is connected to the high-voltage bus, and the other end is connected to one end of the inductor L4. The other end of the inductor L4 is connected to the drain of the switching MOSFET Q1 and one end of the capacitor C8. The anode of the diode D5 is connected to the source of the switching MOSFET Q1, and the cathode is connected to the drain of the switching MOSFET Q1. One end of the current acquisition circuit Rsense2 is connected to the low-voltage bus, and the other end is connected to the source of the switching MOSFET Q1 and the drain of the switching MOSFET Q2. The anode of the diode D6 is connected to the source of the switching MOSFET Q2, and the cathode is connected to the drain of the switching MOSFET Q2. One end of the inductor L5 is connected to the other end of the capacitor C8 and the source of the switching MOSFET Q2, and the other end is grounded.

[0006] Furthermore, this invention provides a bidirectional Super PLC based on phase-shift control. A buck-boost dual-bus power converter circuit may also have the following features: a control circuit, a logic conversion circuit, and an isolated drive output circuit; current acquisition circuits Rsense1 and Rsense2 send the acquired current to the control circuit; the control circuit controls the duty cycle of switching MOSFETs Q1 and Q2; when the duty cycle of switching MOSFET Q2 increases, the corresponding duty cycle of switching MOSFET Q1 decreases by the same amount; when the duty cycle of switching MOSFET Q1 is less than the steady-state duty cycle D voltage, the current transmitted from the high-voltage bus to the low-voltage bus will continue to decrease until it is transmitted in the reverse direction; the output terminal of the control circuit is connected to the input terminal of the logic conversion circuit, and the two sets of output terminals of the logic conversion circuit are respectively connected to the two input terminals of the isolated drive output circuit; the two sets of output terminals of the isolated drive output circuit are respectively connected to the gate G1 and source S1 of switching MOSFET Q1, and the gate G2 and source S2 of switching MOSFET Q2; the logic conversion circuit controls switching MOSFETs Q1 and Q2 to turn on complementaryly and ensures that switching MOSFETs Q1 and Q2 do not turn on simultaneously.

[0007] Furthermore, this invention provides a bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control, which may also have the following features: the control circuit includes: a constant current feedback regulation circuit from the high-voltage bus to the low-voltage bus, diode D11, chip U7, a constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus, diode D12, comparator U3, resistor R37, resistor R39, transistor Q3, resistor R17, hysteresis comparator U6, resistor R69, transistor Q6, resistor R11, resistor R22, resistor R27, hysteresis comparator U5, resistor R21, XOR circuit U4, OR gate OR1, resistor R19, transistor Q4, resistor R24, capacitor C15, resistor R22, resistor R27, and resistor R23; the input terminal of the constant current feedback regulation circuit from the high-voltage bus to the low-voltage bus is connected to a current acquisition circuit Rsense1. The high-voltage bus current collected is connected to the positive terminal of diode D11, and the negative terminal of diode D11 is connected to the phase-shift control signal input terminal COMP of chip U7; the input terminal of the constant current feedback regulation circuit from low-voltage bus to high-voltage bus is connected to the low-voltage bus current collected by current acquisition circuit Rsense2, one output terminal is connected to the positive terminal of diode D12, and the negative terminal of diode D12 is connected to the phase-shift control signal input terminal COMP of chip U7; the non-inverting input of comparator U3 is connected to the other output terminal of the constant current feedback regulation circuit from low-voltage bus to high-voltage bus; one end of resistor R37 is connected to the inverting input terminal of comparator U3, and the other end is connected to the rated voltage 7V; resistor R39... One end of resistor R17 is connected to the output of comparator U3, and the other end is connected to the base of transistor Q3; the collector of transistor Q3 is connected to the anode of diode D12, and the emitter is grounded; one end of resistor R17 is connected to the high-voltage over-discharge enable reference voltage Vref3, and the other end is connected to the non-inverting input of hysteresis comparator U6; the inverting input of hysteresis comparator U6 is connected to the high-voltage bus sampling voltage; one end of resistor R69 is connected to the output of hysteresis comparator U6, and the other end is connected to the base of transistor Q6; the collector of transistor Q6 is connected to the base of transistor Q3, and the emitter is grounded; one end of resistor R11 is connected to the other end of resistor R17, and the other end is connected to the output of hysteresis comparator U6; One end of resistor R22 is connected to the low-voltage bus sampling voltage, and the other end is connected to the positive input of hysteresis comparator U5; resistor R27 is connected to the low-voltage over-discharge enable reference voltage Vref4, and the other end is connected to the inverting input of hysteresis comparator U5; one end of resistor R21 is connected to the positive input of hysteresis comparator U5, and the other end is connected to the output; one input of XOR circuit U4 is connected to the output of hysteresis comparator U5, and the other input is connected to the output of hysteresis comparator U6; one input of OR gate OR1 is connected to the output of XOR circuit U4, and the other input is connected to the discharge current; one end of resistor R19 is connected to the output of OR gate OR1, and the other end is connected to the base of transistor Q4.One end of resistor R24 ​​is connected to the collector of transistor Q4, and the other end is connected to the SS input terminal of chip U7; one end of capacitor C15 is connected to the SS input terminal of chip U7, and the other end is grounded; one end of resistor R22 is connected to the SELSET AB input terminal of chip U7, and the other end is grounded; one end of resistor R27 is connected to the SELSET CD input terminal of chip U7, and the other end is grounded; one end of resistor R23 is connected to the COMP phase-shift control signal input terminal of chip U7, and the other end is grounded.

[0008] Furthermore, this invention provides a bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control, which may also have the following features: a constant current feedback regulation circuit from the high-voltage bus to the low-voltage bus, comprising: resistor R18, resistor R14, capacitor C18, operational amplifier U1, resistor R16, resistor R21, resistor R15, capacitor C14, and capacitor C13; one end of resistor R18 serves as a PI controller; the input terminal of the regulation circuit is connected to the high-voltage bus current collected by the current acquisition circuit Rsense1, and the other end is connected to the non-inverting input terminal of operational amplifier U1; one end of resistor R14 is connected to the non-inverting input terminal of operational amplifier U1, and the other end is grounded; the two ends of capacitor C18 are connected in parallel with the two ends of resistor R14; the current... One end of resistor R16 is connected to the reference voltage Vref1 corresponding to the constant current transfer control point from the high-voltage bus to the low-voltage bus, and the other end is connected to the inverting input terminal of operational amplifier U1; one end of resistor R21 is connected to the output terminal of operational amplifier U1, and the other end serves as the output terminal of the constant current feedback adjustment circuit from the high-voltage bus to the low-voltage bus, connected to the positive terminal of diode D11; one end of resistor R15 is connected to the inverting input terminal of operational amplifier U1, and the other end is connected to one end of capacitor C14; the other end of capacitor C14 is connected to the output terminal of operational amplifier U1; one end of capacitor C13 is connected to the inverting input terminal of operational amplifier U1, and the other end is connected to the output terminal of operational amplifier U1.

[0009] Furthermore, this invention provides a bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control, which may also have the following features: the constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus includes: resistor R8, resistor R24, capacitor C29, resistor R26, operational amplifier U2, resistor R7, resistor R28, resistor R25, capacitor C24, and capacitor C23; one end of resistor R8 serves as the input terminal of the constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus, connected to the low-voltage bus current collected by the current acquisition circuit Rsense2; the other end is connected to one end of resistor R26 and one end of resistor R24 ​​respectively; the other end of resistor R26 is connected to operational amplifier U2. The inverting input terminal of the operational amplifier U2 is connected; the other end of resistor R24 ​​is grounded; the two ends of capacitor C29 are connected in parallel with the two ends of resistor R24; one end of resistor R7 is connected to the reference voltage Vref2 corresponding to the constant current transfer control point from the low-voltage bus to the high-voltage bus, and the other end is connected to the non-inverting input terminal of operational amplifier U2; one end of resistor R28 is connected to the output terminal of operational amplifier U2, and the other end serves as one output terminal of the constant current feedback adjustment circuit from the low-voltage bus to the high-voltage bus and is connected to the positive terminal of diode D12; one end of resistor R25 is connected to the inverting input terminal of operational amplifier U2, and the other end is connected to one end of capacitor C24; the other end of capacitor C24 is connected to the output terminal of operational amplifier U2; one end of capacitor C23 is connected to the inverting input terminal of operational amplifier U2, and the other end is connected to the output terminal of operational amplifier U2. The output terminal of operational amplifier U2, serving as another output terminal of the constant current feedback adjustment circuit from the low-voltage bus to the high-voltage bus, is also connected to the non-inverting input terminal of operational amplifier U2.

[0010] Furthermore, this invention provides a bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control, which may also have the following features: the logic conversion circuit includes: AND gate &1, AND gate &2, AND gate &3, AND gate &4, OR gate OR2, and OR gate OR3; the OUT A output terminal of chip U7 serves as the first output terminal of the control circuit, and is connected to one input terminal of AND gate &1 and one input terminal of AND gate &2 respectively; the OUT B output terminal of chip U7 serves as the second output terminal of the control circuit, and is connected to one input terminal of AND gate &3 and one input terminal of AND gate &4 respectively; the OUT... The C output terminal serves as the third output terminal of the control circuit, connected to one input terminal of AND gate &2 and one input terminal of AND gate &3 respectively; the OUTD output terminal of chip U7 serves as the fourth output terminal of the control circuit, connected to one input terminal of AND gate &1 and one input terminal of AND gate &4 respectively; the two input terminals of OR gate OR2 are connected to the output terminals of AND gate &1 and AND gate &3 respectively, and the output terminal serves as one output terminal of the logic conversion circuit and is connected to one input terminal of the isolation drive output circuit; the two input terminals of OR gate OR3 are connected to the output terminals of AND gate &2 and AND gate &4 respectively, and the output terminal serves as the other output terminal of the logic conversion circuit and is connected to one input terminal of the isolation drive output circuit.

[0011] Furthermore, this invention provides a bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control, which may also have the following features: the isolated drive output circuit includes two sets of isolation transformers. One end of the input winding of one isolation transformer serves as one input terminal of the isolated drive output circuit and is connected to one output terminal of the logic conversion circuit, i.e., the output terminal of the OR gate OR2, while the other end of the input winding is grounded; the two ends of the output winding of this isolation transformer serve as one set of output terminals of the isolated drive output circuit, respectively connected to the gate G2 and source S2 of the switching MOSFET Q2; one end of the input winding of the other isolation transformer serves as another input terminal of the isolated drive output circuit and is connected to another output terminal of the logic conversion circuit, i.e., the output terminal of the OR gate OR3, while the other end of the input winding is grounded; the two ends of the output winding of this isolation transformer serve as another set of output terminals of the isolated drive output circuit, respectively connected to the gate G1 and source S1 of the switching MOSFET Q1.

[0012] Furthermore, the present invention provides a bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control, which may also have the following features: the chip U7 is a PWM (pulse width modulation) power management chip with phase-shift control, and UC1879 or UC28950 is selected.

[0013] Furthermore, the present invention provides a bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control, which may also have the following features: the voltage of the high-voltage bus is composed of a high-voltage solar array, diode D1, a DET / MPPT adjustment circuit and diode D3; the voltage of the low-voltage bus is composed of a high-voltage solar array, diode D2, a DET / MPPT adjustment circuit and diode D4.

[0014] Furthermore, the present invention provides a bidirectional Super buck-boost dual-bus power conversion circuit based on phase shift control, which may also have the following features: the current acquisition circuit Rsense1 is connected in series with a fuse F1; the current acquisition circuit Rsense2 is connected in series with a fuse F2.

[0015] This invention provides a bidirectional Super Buck-Boost dual-bus power conversion circuit based on phase-shift control, enabling bidirectional energy replenishment between buses of different voltage levels in a space power supply. Based on the phase-shift PWM mutual compensation output function, the circuit drives the switching transistors through logic transformation, improving the Super-Buck circuit into a bidirectional bus conversion circuit with unidirectional synchronous rectification buck + reverse Super-Boost synchronous rectification boost. This achieves bidirectional energy replenishment between buses of different voltage levels, effectively utilizing redundant energy resources. It effectively solves the energy sharing problem between the 100V high-voltage bus and the 42V low-voltage bus in a "mobile phone directly connected to satellite 100V MPPT energy system," reducing the redundancy cost of the conversion circuit. It uses the phase-shift control method commonly used in the industry for switching power supply management chips, with logic improvements to achieve synchronous rectification and improve topology conversion efficiency. Simultaneously, it employs dual-bus dual-loop constant current PI regulation compensation, enabling buses to autonomously transfer excess energy to buses with insufficient energy. This bidirectional circuit maintains continuous current during energy transfer, effectively reducing disturbances to the buses. Multiple buses can be connected in parallel using this bidirectional transmission circuit. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control in the embodiment.

[0017] Figure 2 This is a circuit diagram of the control circuit, logic transformation circuit, and isolated drive output circuit in the embodiment.

[0018] Figure 3 This is a diagram showing the driving logic transformation and switching transistor driving waveforms in the embodiment.

[0019] Figure 4 This is a control flowchart of the bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control in the embodiment. Detailed Implementation

[0020] The present invention will now be further described with reference to the accompanying drawings and specific embodiments.

[0021] Example

[0022] In this embodiment, the bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control includes: a current acquisition circuit Rsense1, a fuse F1, an inductor L4, a switching MOSFET Q1, a diode D5, a high-voltage battery, a high-voltage battery switch K1, a current acquisition circuit Rsense2, a fuse F2, a switching MOSFET Q2, a diode D6, a low-voltage battery, a low-voltage battery switch K2, a capacitor C8, an inductor L5, a control circuit, a logic conversion circuit, and an isolated drive output circuit.

[0023] The high-voltage bus on the left and the low-voltage bus on the right obtain energy from the solar array during the sunshine period and store excess energy in batteries. The function of the bidirectional Super Buck-Boost dual-bus power conversion circuit based on phase-shift control is to realize bidirectional energy transfer between the high-voltage and low-voltage buses, sharing excess energy. In this embodiment, the voltage of the high-voltage bus is composed of the high-voltage solar array, diode D1, DET / MPPT regulation circuit, and diode D3. The voltage of the low-voltage bus is composed of the high-voltage solar array, diode D2, DET / MPPT regulation circuit, and diode D4.

[0024] One end of the current acquisition circuit Rsense1 is connected to the high-voltage bus, and the other end is connected in series with fuse F1 and then to one end of inductor L4. The other end of inductor L4 is connected to the drain of switching MOSFET Q1 and one end of capacitor C8. The gate G1 and source S1 of switching MOSFET Q1 are connected to a set of output terminals of the isolated drive output circuit. The anode of diode D5 is connected to the source of switching MOSFET Q1, and the cathode is connected to the drain of switching MOSFET Q1.

[0025] One end of the current acquisition circuit Rsense2 is connected in series with fuse F2 and then to the low-voltage bus. The other end is connected to the source of switching MOSFET Q1 and the drain of switching MOSFET Q2. The gate G2 and source S2 of switching MOSFET Q2 are connected to another set of output terminals of the isolated drive output circuit. The anode of diode D6 is connected to the source of switching MOSFET Q2, and the cathode is connected to the drain of switching MOSFET Q2.

[0026] One end of inductor L5 is connected to the other end of capacitor C8 and the source of switching MOSFET Q2, while the other end is grounded. The positive terminal of the high-voltage battery is connected to one end of high-voltage battery switch K1, and the negative terminal is grounded. The other end of high-voltage battery switch K1 is connected to the high-voltage bus. The positive terminal of the low-voltage battery is connected to one end of low-voltage battery switch K2, and the negative terminal is grounded. The other end of low-voltage battery switch K2 is connected to the low-voltage bus.

[0027] The control circuit uses a dual-bus closed-loop feedback PI compensation for current regulation to control the switching duty cycle of switching MOSFETs Q1 and Q2, such as... Figure 3 The waveform shown demonstrates the autonomous allocation of excess energy between the two buses. When the duty cycle of MOSFET Q2 increases, the corresponding duty cycle of MOSFET Q1 decreases by the same amount. When the duty cycle of MOSFET Q1 is less than the steady-state duty cycle D (D = Vlow-voltage bus / Vhigh-voltage bus), the current transmitted from the high-voltage side (high-voltage bus) to the low-voltage side (low-voltage bus) continuously decreases until it reverses and is transmitted from the low-voltage side to the high-voltage side. Fuses F1 and F2 prevent short circuits between the two buses due to unexpected circuit faults. Current acquisition circuits Rsense1 and Rsense2 send the acquired current to the control circuit, achieving bidirectional constant current transmission between the two buses.

[0028] The output of the control circuit is connected to the input of the logic conversion circuit. The two sets of outputs of the logic conversion circuit are connected to the two inputs of the isolation drive output circuit, respectively. The two sets of outputs of the isolation drive output circuit are connected to the gate G1 and source S1 of the switching MOSFET Q1, and the gate G2 and source S2 of the switching MOSFET Q2, respectively. The logic conversion circuit controls the switching MOSFETs Q1 and Q2 to be turned on complementaryly within the range of 10% to 90%, and provides a fixed adjustable switching gap to ensure that the switching MOSFETs Q1 and Q2 do not conduct simultaneously.

[0029] In this embodiment, as Figure 2 As shown, the control circuit in this embodiment includes: a constant current feedback adjustment circuit from the high-voltage bus to the low-voltage bus, diode D11, chip U7, a constant current feedback adjustment circuit from the low-voltage bus to the high-voltage bus, diode D12, comparator U3, resistor R37, resistor R39, transistor Q3, resistor R17, hysteresis comparator U6, resistor R69, transistor Q6, resistor R11, resistor R22, resistor R27, hysteresis comparator U5, resistor R21, XOR circuit U4, OR gate OR1, resistor R19, transistor Q4, resistor R24, capacitor C15, resistor R22, resistor R27, and resistor R23.

[0030] In this embodiment, chip U7 is a PWM (Pulse Width Modulation) power management chip with phase shift control, and UC1879 or UC28950 can be selected.

[0031] The input terminal of the constant current feedback regulation circuit from the high-voltage bus to the low-voltage bus is connected to the high-voltage bus current collected by the current acquisition circuit Rsense1, and the output terminal is connected to the positive terminal of diode D11. The negative terminal of diode D11 is connected to the phase shift control signal input terminal COMP of chip U7.

[0032] The input terminal of the constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus is connected to the low-voltage bus current collected by the current acquisition circuit Rsense2. One output terminal is connected to the anode of diode D12, and the cathode of diode D12 is connected to the phase-shift control signal input terminal COMP of chip U7. The non-inverting input of comparator U3 is connected to the other output terminal of the constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus. One end of resistor R37 is connected to the inverting input terminal of comparator U3, and the other end is connected to the rated voltage of 7V. One end of resistor R39 is connected to the output terminal of comparator U3, and the other end is connected to the base of transistor Q3. The collector of transistor Q3 is connected to the anode of diode D12, and the emitter is grounded.

[0033] One end of resistor R17 is connected to the high-voltage over-discharge enable reference voltage Vref3, and the other end is connected to the non-inverting input of hysteresis comparator U6. The inverting input of hysteresis comparator U6 is connected to the high-voltage bus sampling voltage. One end of resistor R69 is connected to the output of hysteresis comparator U6, and the other end is connected to the base of transistor Q6. The collector of transistor Q6 is connected to the base of transistor Q3, and the emitter is grounded. One end of resistor R11 is connected to the other end of resistor R17, and the other end is connected to the output of hysteresis comparator U6.

[0034] One end of resistor R22 is connected to the low-voltage bus sampling voltage, and the other end is connected to the positive input of hysteresis comparator U5; resistor R27 is connected to the low-voltage over-discharge enable reference voltage Vref4, and the other end is connected to the inverting input of hysteresis comparator U5; one end of resistor R21 is connected to the positive input of hysteresis comparator U5, and the other end is connected to the output; one input of XOR circuit U4 is connected to the output of hysteresis comparator U5, and the other input is connected to the output of hysteresis comparator U6; one input of OR gate OR1 is connected to the output of XOR circuit U4, and the other input is connected to the discharge current; one end of resistor R19 is connected to the output of OR gate OR1, and the other end is connected to the base of transistor Q4; one end of resistor R24 ​​is connected to the collector of transistor Q4, and the other end is connected to the SS input of chip U7.

[0035] One end of capacitor C15 is connected to the SS input terminal of chip U7, and the other end is grounded; one end of resistor R22 is connected to the SELSET AB input terminal of chip U7, and the other end is grounded; one end of resistor R27 is connected to the SELSET CD input terminal of chip U7, and the other end is grounded; one end of resistor R23 is connected to the phase shift control signal input terminal COMP of chip U7, and the other end is grounded.

[0036] In this embodiment, the constant current feedback regulation circuit from the high-voltage bus to the low-voltage bus includes: resistor R18, resistor R14, capacitor C18, operational amplifier U1, resistor R16, resistor R21, resistor R15, capacitor C14, and capacitor C13.

[0037] One end of resistor R18 serves as the input terminal of the constant current feedback regulation circuit from the high-voltage bus to the low-voltage bus, connected to the high-voltage bus current acquired by the current acquisition circuit Rsense1. The other end is connected to the non-inverting input terminal of operational amplifier U1. One end of resistor R14 is connected to the non-inverting input terminal of operational amplifier U1, and the other end is grounded. The two ends of capacitor C18 are connected in parallel with the two ends of resistor R14. One end of resistor R16 is connected to the reference voltage Vref1 corresponding to the constant current transmission control point from the high-voltage bus to the low-voltage bus, and the other end is connected to the operational amplifier U1. The inverting input terminal of operational amplifier U1 is connected; one end of resistor R21 is connected to the output terminal of operational amplifier U1, and the other end is connected to the positive terminal of diode D11 as the output terminal of the constant current feedback regulation circuit from the high voltage bus to the low voltage bus; one end of resistor R15 is connected to the inverting input terminal of operational amplifier U1, and the other end is connected to one end of capacitor C14; the other end of capacitor C14 is connected to the output terminal of operational amplifier U1; one end of capacitor C13 is connected to the inverting input terminal of operational amplifier U1, and the other end is connected to the output terminal of operational amplifier U1.

[0038] The operational amplifier U1 and its surrounding resistors and capacitors constitute a PI (proportional-integral) regulation circuit in the constant current feedback regulation circuit from the high-voltage bus to the low-voltage bus. The high-to-low current I1 transmitted from the high-voltage bus is sampled by a voltage divider and then enters the non-inverting input of the operational amplifier U1. When I1 high-to-low is greater than Vref1, the output voltage of diode D11 increases.

[0039] In this embodiment, the constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus includes: resistor R8, resistor R24, capacitor C29, resistor R26, operational amplifier U2, resistor R7, resistor R28, resistor R25, capacitor C24, and capacitor C23.

[0040] One end of resistor R8 serves as the input terminal of the constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus, connected to the low-voltage bus current acquired by the current acquisition circuit Rsense2. The other end is connected to one end of resistor R26 and one end of resistor R24 ​​respectively; the other end of resistor R26 is connected to operational amplifier U2. The inverting input terminal of the operational amplifier U2 is connected; the other end of resistor R24 ​​is grounded; the two ends of capacitor C29 are connected in parallel with the two ends of resistor R24; one end of resistor R7 is connected to the reference voltage Vref2 corresponding to the constant current transfer control point from the low-voltage bus to the high-voltage bus, and the other end is connected to the non-inverting input terminal of operational amplifier U2; one end of resistor R28 is connected to the output terminal of operational amplifier U2, and the other end serves as one output terminal of the constant current feedback adjustment circuit from the low-voltage bus to the high-voltage bus and is connected to the positive terminal of diode D12; one end of resistor R25 is connected to the inverting input terminal of operational amplifier U2, and the other end is connected to one end of capacitor C24; the other end of capacitor C24 is connected to the output terminal of operational amplifier U2; one end of capacitor C23 is connected to the inverting input terminal of operational amplifier U2, and the other end is connected to the output terminal of operational amplifier U2. The output terminal of operational amplifier U2, serving as another output terminal of the constant current feedback adjustment circuit from the low-voltage bus to the high-voltage bus, is also connected to the non-inverting input terminal of operational amplifier U2.

[0041] The operational amplifier U2 and its surrounding resistors and capacitors in the constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus also constitute a PI (proportional-integral) regulation circuit. Current sampling enters the inverting input of operational amplifier U2. When I2 (low → high) is greater than Vref2, the output voltage of diode D12 decreases. Diodes D11 and D12, along with resistor R23, form a high-slot circuit, sending the higher voltage output from either diode D11 or D12 to the COMP pin of power management chip U7 to form a phase-shift control signal, controlling the phase difference between OUTA / B and OUTC / D. When the phase-shift control signal at the COMP pin increases, the phase difference between OUTC / D and OUTA / B increases. After passing through the logic conversion circuit, the duty cycle of switching MOSFET Q2 increases while the duty cycle of switching MOSFET Q1 decreases by the same amount.

[0042] like Figure 2 As shown, in this embodiment, the logic transformation circuit includes: AND gate &1, AND gate &2, AND gate &3, AND gate &4, OR gate OR2, and OR gate OR3.

[0043] The OUT A output terminal of chip U7 serves as the first output terminal of the control circuit, and is connected to one input terminal of AND gate &1 and one input terminal of AND gate &2 respectively; the OUT B output terminal of chip U7 serves as the second output terminal of the control circuit, and is connected to one input terminal of AND gate &3 and one input terminal of AND gate &4 respectively; the OUT C output terminal of chip U7 serves as the third output terminal of the control circuit, and is connected to one input terminal of AND gate &2 and one input terminal of AND gate &3 respectively; the OUT D output terminal of chip U7 serves as the fourth output terminal of the control circuit, and is connected to one input terminal of AND gate &1 and one input terminal of AND gate &4 respectively.

[0044] The two inputs of OR gate OR2 are connected to the outputs of AND gate &1 and AND gate &3, respectively. The output is connected to one input of the isolation drive output circuit as one output of the logic transformation circuit. The two inputs of OR gate OR3 are connected to the outputs of AND gate &2 and AND gate &4, respectively. The output is connected to one input of the isolation drive output circuit as the other output of the logic transformation circuit.

[0045] The outputs of hysteresis comparators U5 and U6, after logic transformation, determine whether switching MOSFETs Q1 and Q2 output drive signals to transfer energy. Resistors R21 and Vref4 adjust the over-discharge enable voltage hysteresis range. When the high-voltage bus voltage sample is less than the lower limit of the over-discharge enable voltage hysteresis range, it indicates that the low-voltage bus needs to transfer energy to the high-voltage bus; conversely, when it is greater than the upper limit, it indicates that the high-voltage bus has sufficient energy and does not need to receive energy transfer. The enable condition of "discharge current < 1A" ensures that energy transfer only occurs during the shadow period, thereby ensuring that even if the high-voltage bus battery experiences capacity decay, it can still receive energy transfer from the low-voltage bus during the shadow period to ensure that the depth of discharge meets the requirements. The same applies to Vref1 and Vref3 of the low-voltage bus.

[0046] like Figure 2 As shown, the isolated drive output circuit includes two sets of isolation transformers. One end of the input winding of one set of isolation transformers serves as an input terminal of the isolated drive output circuit and is connected to an output terminal of the logic conversion circuit, i.e., the output terminal of the OR gate OR2. The other end of the input winding is grounded. The two ends of the output winding of the isolation transformer serve as a set of output terminals of the isolated drive output circuit, and are respectively connected to the gate G2 and source S2 of the switching MOSFET Q2.

[0047] One end of the input winding of the other isolation transformer serves as another input terminal of the isolation drive output circuit and is connected to another output terminal of the logic transformation circuit, namely the output terminal of the OR gate OR3. The other end of the input winding is grounded. The two ends of the output winding of the isolation transformer serve as another set of output terminals of the isolation drive output circuit and are connected to the gate G1 and source S1 of the switching MOS transistor Q1, respectively.

[0048] Control flow of bidirectional Super buck-boost dual-bus power converter circuit based on phase shift control:

[0049] Since the control loops of both buses operate in real time and the two output signals control the same COMP pin, the priority of the control signals needs to be manually allocated according to different situations:

[0050] When neither the high-voltage nor the low-voltage bus voltage is over-discharge enabled (bus voltage > upper limit of over-discharge enable voltage range) or both have triggered the lower limit of over-discharge enable voltage range, the hysteresis comparators U5 and U6 will output high and low respectively, thus the XOR circuit U4 will output a high level. When the XOR circuit U4 outputs a high level or during the illumination period (discharge current < 1A), the resistor R19 outputs a high level and pulls the SS pin of the chip U7 low through the transistor Q4, thereby turning off the drive output converter and stopping its operation.

[0051] When only the low-voltage bus power is insufficient: that is, the low-voltage bus has triggered the lower limit of the over-discharge enable voltage range, and the high-voltage bus is greater than the over-discharge enable voltage, and during the shadow period, transistor Q4 is cut off, chip U7 can output drive with soft start, and the current sampling is 0 in the initial state. Operational amplifier U2 outputs a high level and is greater than 7V, causing comparator U3 to output a high level, which continuously pulls the anode of diode D12 low, so I2 low to high does not participate in control. Although operational amplifier U1 also outputs a low level in the initial state and does not participate in control, since the switching MOSFET Q2 is at 0 duty cycle, corresponding to the switching MOSFET Q1 at the highest duty cycle, I1 gradually increases from high to low, causing operational amplifier U1 to start outputting a modulation signal (0.9~4V range) and dynamically stabilize, so that the high-voltage bus transfers current to the low-voltage bus with constant current during the shadow period, and the duty cycle D of switching MOSFET Q1 dynamically stabilizes to satisfy: D=Vlow-voltage bus / Vhigh-voltage bus.

[0052] When only the high-voltage bus triggers the over-discharge protection, it is similar to the over-discharge protection triggered only by the low-voltage bus, except that when the initial state operational amplifier U2 outputs a high level and is greater than 7V, causing comparator U3 to output a high level, comparator U6 also outputs a high level, pulling down the voltage of resistor R39 and causing transistor Q3 to be cut off. Therefore, operational amplifier U2 can output a high level through diode D12. At this time, operational amplifier U1 cannot participate in the control because the initial current sampling is 0 and the output is also 0. I2 gradually increases from low to high, and operational amplifier U2 starts to output a modulation signal (0.9~4V range) and dynamically stabilizes, so that the low-voltage bus transmits current to the high-voltage bus with a constant current during the shadow period, and the duty cycle D of the switching MOSFET Q1 dynamically and stably satisfies: D=Vlow-voltage bus / Vhigh-voltage bus.

[0053] In the logic conversion circuit, the OUTA / B pins of chip U7 are a pair of complementary anti-surge devices. The switching gap between OUTA and OUTB can be adjusted by the SELSEA-B pin of chip U7. The same applies to OUTC / D. By performing a logic transformation on the output waveform of U7, Q1 = OUT(C&A)‖OUT(B&D) and Q2 = OUT(B&C)‖OUT(A&D) can be achieved. This allows the switching MOSFETs Q1 and Q2 to be complementaryly turned on within the 10% to 90% range, while maintaining a fixed and adjustable switching gap to ensure that the switching MOSFETs Q1 and Q2 do not conduct at the same time. At the same time, synchronous rectification can be achieved to improve the conversion efficiency.

[0054] This invention provides a bidirectional Super Buck-Boost dual-bus power conversion circuit based on phase-shift control, which reduces the reliance on reliability of the conversion circuit and saves redundancy costs. Under normal circumstances, the two buses can operate independently and each has a certain degree of redundancy to achieve energy balance. The bidirectional conversion circuit is only needed to transfer energy when one or more solar arrays on one bus fail and the energy is insufficient. Compared to the 1.2kW solar array energy that needs to be converted to low-voltage circuits through a secondary bus and requires three 600W conversion circuits to ensure reliable 1.2kW output after one conversion fails, the conversion circuit in this invention only needs one 600W conversion to achieve backup energy transmission, saving more than 50% of the cost and weight of the secondary converter.

[0055] This invention provides a bidirectional Super Buck-Boost dual-bus power conversion circuit based on phase-shift control, which can reduce conversion losses in the conversion circuit to improve system efficiency and reduce the heat dissipation burden on the power controller. When converting 1.2kW of solar array energy to the low-voltage bus, more than 7% of the energy is typically lost, and heat is generated, increasing the heat dissipation burden on the power controller. The low-voltage bus can directly utilize the 1.2kW solar array energy; the bidirectional converter only activates during the shadow period when one bus experiences insufficient energy, resulting in conversion losses. Compared to a single-bus + two-stage bus conversion, if the power distribution between the high-voltage and low-voltage buses is 3:2 and the MPPT efficiency is 95%, the overall system efficiency of this invention can be improved by approximately 2%.

[0056] This invention provides a bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control. The dual-bus closed-loop control logic can realize the autonomous allocation of energy, and excess energy will be autonomously transferred to the bus with insufficient energy.

[0057] This invention provides a bidirectional Super buck-boost dual-bus power conversion circuit based on phase shift control. By driving the logic conversion circuit, the synchronous rectification function of the switching transistors can be realized to further improve efficiency. The duty cycles of the two switching MOSFETs can be increased or decreased synchronously and equally, and the duty cycles are adjustable from 10% to 90%.

[0058] The present invention provides a bidirectional Super buck-boost dual-bus power conversion circuit based on phase shift control, wherein the input and output currents of the bidirectional converter are both in a continuous state, which can effectively reduce the disturbance to the bus during the operation of the converter.

[0059] The embodiments described above are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

Claims

1. A bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control, characterized in that: include: The current acquisition circuit consists of Rsense1, inductor L4, switching MOSFET Q1, diode D5; the current acquisition circuit consists of Rsense2, switching MOSFET Q2, diode D6, capacitor C8, and inductor L5. In this circuit, one end of the current acquisition circuit Rsense1 is connected to the high-voltage bus, and the other end is connected to one end of the inductor L4. The other end of the inductor L4 is connected to the drain of the switching MOSFET Q1 and one end of the capacitor C8. The anode of the diode D5 is connected to the source of the switching MOSFET Q1, and the cathode is connected to the drain of the switching MOSFET Q1. One end of the current acquisition circuit Rsense2 is connected to the low-voltage bus, and the other end is connected to the source of the switching MOSFET Q1 and the drain of the switching MOSFET Q2. The anode of the diode D6 is connected to the source of the switching MOSFET Q2, and the cathode is connected to the drain of the switching MOSFET Q2. One end of the inductor L5 is connected to the other end of the capacitor C8 and the source of the switching MOSFET Q2, and the other end is grounded.

2. The bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control as described in claim 1, characterized in that: Also includes: Control circuit, logic transformation circuit, and isolated drive output circuit; The current acquisition circuits Rsense1 and Rsense2 send the acquired current to the control circuit; the control circuit controls the duty cycle of the switching MOSFETs Q1 and Q2; when the duty cycle of the switching MOSFET Q2 increases, the corresponding duty cycle of the switching MOSFET Q1 will decrease by the same amount; when the duty cycle of the switching MOSFET Q1 is less than the steady-state duty cycle D voltage, the current transmitted from the high-voltage bus to the low-voltage bus will continue to decrease until it is transmitted in the reverse direction. The output terminal of the control circuit is connected to the input terminal of the logic conversion circuit. The two sets of output terminals of the logic conversion circuit are respectively connected to the two input terminals of the isolation drive output circuit. The two sets of output terminals of the isolation drive output circuit are respectively connected to the gate G1 and source S1 of the switching MOSFET Q1 and the gate G2 and source S2 of the switching MOSFET Q2. The logic conversion circuit controls the switching MOSFET Q1 and the switching MOSFET Q2 to turn on complementaryly and ensures that the switching MOSFET Q1 and the switching MOSFET Q2 do not turn on at the same time.

3. The bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control as described in claim 2, Its features are: The control circuit includes: a constant current feedback regulation circuit from the high-voltage bus to the low-voltage bus, diode D11, chip U7, a constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus, diode D12, comparator U3, resistor R37, resistor R39, transistor Q3, resistor R17, hysteresis comparator U6, resistor R69, transistor Q6, resistor R11, resistor R22, resistor R27, hysteresis comparator U5, resistor R21, XOR circuit U4, OR gate OR1, resistor R19, transistor Q4, resistor R24, capacitor C15, resistor R22, resistor R27, and resistor R23. The input terminal of the constant current feedback regulation circuit from the high voltage bus to the low voltage bus is connected to the high voltage bus current collected by the current acquisition circuit Rsense1, and the output terminal is connected to the positive terminal of diode D11. The negative terminal of diode D11 is connected to the phase shift control signal input terminal COMP of chip U7. The input terminal of the constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus is connected to the low-voltage bus current collected by the current acquisition circuit Rsense2. One output terminal is connected to the positive terminal of diode D12, and the negative terminal of diode D12 is connected to the phase-shift control signal input terminal COMP of chip U7. The non-inverting input of comparator U3 is connected to the other output terminal of the constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus. One end of resistor R37 is connected to the inverting input terminal of comparator U3, and the other end is connected to the rated voltage 7V. One end of resistor R39 is connected to the output terminal of comparator U3, and the other end is connected to the base of transistor Q3. The collector of transistor Q3 is connected to the positive terminal of diode D12, and the emitter is grounded. One end of resistor R17 is connected to the high-voltage over-discharge enable reference voltage Vref3, and the other end is connected to the non-inverting input of hysteresis comparator U6; the inverting input of hysteresis comparator U6 is connected to the high-voltage bus sampling voltage; one end of resistor R69 is connected to the output of hysteresis comparator U6, and the other end is connected to the base of transistor Q6; the collector of transistor Q6 is connected to the base of transistor Q3, and the emitter is grounded; one end of resistor R11 is connected to the other end of resistor R17, and the other end is connected to the output of hysteresis comparator U6. One end of resistor R22 is connected to the low-voltage bus sampling voltage, and the other end is connected to the positive input of hysteresis comparator U5; resistor R27 is connected to the low-voltage over-discharge enable reference voltage Vref4, and the other end is connected to the inverting input of hysteresis comparator U5; one end of resistor R21 is connected to the positive input of hysteresis comparator U5, and the other end is connected to the output; one input of XOR circuit U4 is connected to the output of hysteresis comparator U5, and the other input is connected to the output of hysteresis comparator U6; one input of OR gate OR1 is connected to the output of XOR circuit U4, and the other input is connected to the discharge current; one end of resistor R19 is connected to the output of OR gate OR1, and the other end is connected to the base of transistor Q4; one end of resistor R24 ​​is connected to the collector of transistor Q4, and the other end is connected to the SS input of chip U7. One end of capacitor C15 is connected to the SS input terminal of chip U7, and the other end is grounded; one end of resistor R22 is connected to the SELSET AB input terminal of chip U7, and the other end is grounded; one end of resistor R27 is connected to the SELSET CD input terminal of chip U7, and the other end is grounded; one end of resistor R23 is connected to the phase shift control signal input terminal COMP of chip U7, and the other end is grounded.

4. The bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control as described in claim 3, characterized in that: in, The constant current feedback regulation circuit from the high-voltage bus to the low-voltage bus includes: resistor R18, resistor R14, capacitor C18, operational amplifier U1, resistor R16, resistor R21, resistor R15, capacitor C14, and capacitor C13. One end of resistor R18 serves as the input terminal of the constant current feedback regulation circuit from the high-voltage bus to the low-voltage bus, connected to the high-voltage bus current acquired by the current acquisition circuit Rsense1, and the other end is connected to the non-inverting input terminal of operational amplifier U1; one end of resistor R14 is connected to the non-inverting input terminal of operational amplifier U1, and the other end is grounded; the two ends of capacitor C18 are connected in parallel with the two ends of resistor R14; one end of resistor R16 is connected to the reference voltage Vref1 corresponding to the constant current control point from the high-voltage bus to the low-voltage bus, and the other end is connected to the inverting input terminal of operational amplifier U1; one end of resistor R21 is connected to the output terminal of operational amplifier U1, and the other end serves as the output terminal of the constant current feedback regulation circuit from the high-voltage bus to the low-voltage bus, connected to the positive terminal of diode D11; one end of resistor R15 is connected to the inverting input terminal of operational amplifier U1, and the other end is connected to one end of capacitor C14; the other end of capacitor C14 is connected to the output terminal of operational amplifier U1; one end of capacitor C13 is connected to the inverting input terminal of operational amplifier U1, and the other end is connected to the output terminal of operational amplifier U1.

5. The bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control as described in claim 3, characterized in that: in, The constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus includes: resistor R8, resistor R24, capacitor C29, resistor R26, operational amplifier U2, resistor R7, resistor R28, resistor R25, capacitor C24, and capacitor C23. One end of resistor R8 serves as the input terminal of the constant current feedback regulation circuit from the low-voltage bus to the high-voltage bus, connected to the low-voltage bus current acquired by the current acquisition circuit Rsense2. The other end is connected to one end of resistor R26 and one end of resistor R24 ​​respectively; the other end of resistor R26 is connected to operational amplifier U2. The inverting input terminal of the amplifier is connected; the other end of resistor R24 ​​is grounded; the two ends of capacitor C29 are connected in parallel with the two ends of resistor R24; one end of resistor R7 is connected to the reference voltage Vref2 corresponding to the constant current control point from the low-voltage bus to the high-voltage bus, and the other end is connected to the non-inverting input terminal of operational amplifier U2; one end of resistor R28 is connected to the output terminal of operational amplifier U2, and the other end serves as one output terminal of the constant current feedback adjustment circuit from the low-voltage bus to the high-voltage bus and is connected to the positive terminal of diode D12; one end of resistor R25 is connected to the inverting input terminal of operational amplifier U2, and the other end is connected to one end of capacitor C24; the other end of capacitor C24 is connected to the output terminal of operational amplifier U2; one end of capacitor C23 is connected to the inverting input terminal of operational amplifier U2, and the other end is connected to the output terminal of operational amplifier U2; the output terminal of operational amplifier U2 serves as another output terminal of the constant current feedback adjustment circuit from the low-voltage bus to the high-voltage bus and is also connected to the non-inverting input terminal of operational amplifier U2.

6. The bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control as described in claim 2, characterized in that: in, The logic transformation circuit includes: AND gate &1, AND gate &2, AND gate &3, AND gate &4, OR gate OR2, and OR gate OR3; The OUT A output of chip U7 serves as the first output of the control circuit, connected to one input of AND gate &1 and one input of AND gate &2 respectively; the OUT B output of chip U7 serves as the second output of the control circuit, connected to one input of AND gate &3 and one input of AND gate &4 respectively; the OUT C output of chip U7 serves as the third output of the control circuit, connected to one input of AND gate &2 and one input of AND gate &3 respectively; the OUT D output of chip U7 serves as the fourth output of the control circuit, connected to one input of AND gate &1 and one input of AND gate &4 respectively. The two inputs of OR gate OR2 are connected to the outputs of AND gate &1 and AND gate &3, respectively. The output is connected to one input of the isolation drive output circuit as one output of the logic transformation circuit. The two inputs of OR gate OR3 are connected to the outputs of AND gate &2 and AND gate &4, respectively. The output is connected to one input of the isolation drive output circuit as the other output of the logic transformation circuit.

7. The bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control as described in claim 2, characterized in that: in, The isolated drive output circuit includes: two sets of isolation transformers; One end of the input winding of a set of isolation transformers serves as an input terminal of the isolation drive output circuit and is connected to an output terminal of the logic transformation circuit, namely the output terminal of the OR gate OR2. The other end of the input winding is grounded. The two ends of the output winding of the isolation transformer serve as a set of output terminals of the isolation drive output circuit, and are respectively connected to the gate G2 and source S2 of the switching MOSFET Q2. One end of the input winding of the other isolation transformer serves as another input terminal of the isolation drive output circuit and is connected to another output terminal of the logic transformation circuit, namely the output terminal of the OR gate OR3. The other end of the input winding is grounded. The two ends of the output winding of the isolation transformer serve as another set of output terminals of the isolation drive output circuit and are connected to the gate G1 and source S1 of the switching MOS transistor Q1, respectively.

8. The bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control as described in claim 2, characterized in that: in, Chip U7 is a PWM (Pulse Width Modulation) power management chip with phase shift control, and UC1879 or UC28950 can be selected.

9. The bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control as described in claim 1, characterized in that: in, The voltage of the high-voltage busbar is composed of a high-voltage solar array, diode D1, DET / MPPT regulation circuit and diode D3; The voltage of the low-voltage bus is composed of a high-voltage solar array, diode D2, DET / MPPT regulation circuit and diode D4.

10. The bidirectional Super buck-boost dual-bus power conversion circuit based on phase-shift control as described in claim 1, characterized in that: in, The current acquisition circuit Rsense1 is connected in series with a fuse F1; the current acquisition circuit Rsense2 is connected in series with a fuse F2.

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