Epitaxial structures and semiconductor devices

Abstract

This invention provides an epitaxial structure and a semiconductor device employing the epitaxial structure. The epitaxial structure includes, for example, a semiconductor substrate, a heteroepitaxial stack, and a high-resistivity buffer layer located between the semiconductor substrate and the heteroepitaxial stack. The heteroepitaxial stack is used to provide a conductive channel by constructing a two-dimensional electron gas and includes a gallium nitride channel layer and a barrier layer. The high-resistivity buffer layer includes a boron nitride layer, an aluminum nitride layer, and an aluminum boron nitride layer located between the boron nitride layer and the aluminum nitride layer. Embodiments of this invention reduce the possibility of breakage by optimizing the buffer layer material and layer structure to achieve high crystal quality and high resistance, thereby effectively reducing device leakage current and improving device breakdown voltage characteristics.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor and electronic device technology, and in particular to an epitaxial structure and a semiconductor device. Background Technology

[0002] Lateral gallium nitride (GaN) power devices are semiconductor devices with a two-dimensional electron gas, exhibiting characteristics such as high breakdown voltage and high electron mobility. Typically, the epitaxial structure of a GaN power device includes a semiconductor substrate, such as a silicon substrate, and a nucleation layer, an aluminum gallium nitride (AlGaN) buffer layer, a GaN channel layer, and a barrier layer (e.g., an AlGaN layer) sequentially epitaxially grown on the silicon substrate. In this epitaxial structure, because the constituent materials of each layer are different, and the coefficients of thermal expansion of the constituent materials of each layer are also different, it will exhibit warping changes due to stress changes during epitaxial growth. Furthermore, in order to reduce device leakage current and improve device breakdown voltage characteristics, it is necessary to increase the thickness and resistance of the buffer layer, but this leads to a large warping value in the epitaxial structure, increasing the risk of cracking. Summary of the Invention

[0003] In view of this, embodiments of the present invention provide an epitaxial structure and a semiconductor device that reduce the possibility of breakage by optimizing the buffer layer material and layer structure.

[0004] On one hand, an epitaxial structure provided by an embodiment of the present invention includes, for example, a semiconductor substrate, a heteroepitaxial stack, and a high-resistivity buffer layer located between the semiconductor substrate and the heteroepitaxial stack. The heteroepitaxial stack is used to provide a conductive channel by constructing a two-dimensional electron gas and includes a gallium nitride channel layer and a barrier layer. The high-resistivity buffer layer includes a boron nitride layer, an aluminum nitride layer, and an aluminum boron nitride layer located between the boron nitride layer and the aluminum nitride layer.

[0005] On the other hand, an embodiment of the present invention provides a semiconductor device, for example including: an epitaxial structure as described in the preceding embodiment; a first electrode disposed on the side of the heteroepitaxial stack away from the semiconductor substrate and forming an electrical contact with the heteroepitaxial stack; a gate structure disposed on the side of the heteroepitaxial stack away from the semiconductor substrate; and a second electrode disposed on the side of the heteroepitaxial stack away from the semiconductor substrate and forming an electrical contact with the heteroepitaxial stack, wherein the second electrode and the first electrode are respectively located on opposite sides of the gate structure.

[0006] The above embodiments of the present invention can have the following beneficial effects: because the resistivity of boron nitride, such as hexagonal boron nitride (h-BN), can reach 10 at room temperature. 16 Ω·cm-10 18The resistivity of aluminum nitride at room temperature is approximately 10 Ω·cm. 14 The high resistance of the buffer layer is Ω·cm, so a stacked structure of boron nitride, boron aluminum nitride, and aluminum nitride layers can easily achieve a high-resistivity buffer layer. Furthermore, boron nitride and aluminum nitride, as two-dimensional layered materials, have good chemical and thermal stability. Their atomic layers have weak van der Waals interactions. Using them as a buffer layer between the semiconductor substrate and the heteroepitaxial stack can effectively alleviate the lattice mismatch between the semiconductor substrate and the heteroepitaxial stack, and promote the mutual compensation of lattice mismatch stress and thermal mismatch stress between the semiconductor substrate and the heteroepitaxial stack. Combined with the boron aluminum nitride layer to achieve the transition of the lattice constant between the boron nitride layer and the aluminum nitride layer, the stress can be reduced to avoid excessive warpage of the epitaxial structure and cracking, thereby improving the quality of the epitaxial crystal and achieving a high resistance value. This can effectively reduce the leakage current of the device and improve the device's withstand voltage characteristics. Attached Figure Description

[0007] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0008] Figure 1 This is a schematic diagram of the layer structure of an epitaxial structure provided in an embodiment of the present invention.

[0009] Figure 2A for Figure 1 A schematic diagram of an internal layer structure of a high-resistivity buffer layer in the epitaxial structure shown.

[0010] Figure 2B for Figure 1 This is a schematic diagram of another internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0011] Figure 3A for Figure 1 This is a schematic diagram of another internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0012] Figure 3B for Figure 1 This is a schematic diagram of another type of internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0013] Figure 4 This is a schematic diagram of the layer structure of another epitaxial structure provided in an embodiment of the present invention.

[0014] Figure 5A for Figure 4 A schematic diagram of an internal layer structure of a high-resistivity buffer layer in the epitaxial structure shown.

[0015] Figure 5B for Figure 4 This is a schematic diagram of another internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0016] Figure 5C for Figure 4 This is a schematic diagram of another internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0017] Figure 5D for Figure 4 This is a schematic diagram of another type of internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0018] Figure 6A for Figure 4 This is a schematic diagram of another type of internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0019] Figure 6B for Figure 4 This is a schematic diagram of another type of internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0020] Figure 6C for Figure 4 This is a schematic diagram of another internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0021] Figure 6D for Figure 4 This is a schematic diagram of another internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0022] Figure 7A for Figure 4 This is a schematic diagram of another type of internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0023] Figure 7B for Figure 4 This is a schematic diagram of another type of internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0024] Figure 7C for Figure 4 This is a schematic diagram of another type of internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0025] Figure 7D for Figure 4 This is a schematic diagram of another type of internal layer structure of the high-resistivity buffer layer in the epitaxial structure shown.

[0026] Figure 8 This is a schematic diagram of another layer structure of an epitaxial structure provided in an embodiment of the present invention.

[0027] Figure 9 This is a schematic diagram of the structure of a semiconductor device provided in an embodiment of the present invention.

[0028] [Explanation of Key Figure Markings]

[0029] 11. Semiconductor substrate; 13. High-resistivity buffer layer; 15. Heterogeneous epitaxial stack; 151. Gallium nitride channel layer; 153. Barrier layer; 14. Transition layer; A1. First direction; S. First electrode; D. Second electrode; G. Gate electrode. Detailed Implementation

[0030] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0031] To enable those skilled in the art to better understand the technical solutions of the present invention, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0032] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0033] It should also be noted that the division of multiple embodiments in this invention is only for the convenience of description and should not constitute a special limitation. Features in various embodiments can be combined and referenced in each other without contradiction.

[0034] See Figure 1 An epitaxial structure provided in this embodiment of the invention includes, for example, a semiconductor substrate 11, a heteroepitaxial stack 15, and a high-resistivity buffer layer 13 located between the semiconductor substrate 11 and the heteroepitaxial stack 15. The heteroepitaxial stack 15 is used to provide a conductive channel by constructing a two-dimensional electron gas, and includes a gallium nitride channel layer 151 and a barrier layer 153, wherein the barrier layer 153 is located on the side of the gallium nitride channel layer 151 opposite to the semiconductor substrate 11.

[0035] As stated above, Figure 2AAs shown, the high-resistivity buffer layer 13 includes a boron nitride (BN) layer, an aluminum nitride (AlN) layer, and an aluminum boron nitride layer located between the boron nitride layer and the aluminum nitride layer; in a first direction A1 from the semiconductor substrate 11 to the heteroepitaxial stack 15, the boron nitride layer is located on the side of the aluminum boron nitride layer facing the semiconductor substrate 11, and the aluminum nitride layer is located on the side of the aluminum boron nitride layer facing the heteroepitaxial stack 15; the material of the aluminum boron nitride layer can be represented as B 1-m Al m N, B represent boron, Al represents aluminum, N represents nitrogen, and m is the molar number and 0 <m<1。

[0036] In this embodiment of the invention, since the resistivity of boron nitride, such as hexagonal boron nitride (h-BN), can reach 10 at room temperature... 16 Ω·cm-10 18 The resistivity of aluminum nitride at room temperature is approximately 10 Ω·cm. 14 The high resistivity of boron nitride and aluminum nitride (Ω·cm) makes it easy to achieve high resistivity using a stacked structure of boron nitride, boron aluminum nitride, and aluminum nitride layers. Furthermore, as two-dimensional layered materials, boron nitride and aluminum nitride possess good chemical and thermal stability, and their atomic layers exhibit weak van der Waals interactions. Using them as a buffer layer between the semiconductor substrate 11 and the heteroepitaxial stack 15 can effectively alleviate the lattice mismatch between the semiconductor substrate 11 and the heteroepitaxial stack 15, promoting mutual compensation of lattice mismatch stress and thermal mismatch stress between the materials. Combined with the boron aluminum nitride layer, the boron nitride layer (with a lattice constant of approximately Ω·cm) is achieved. ) and aluminum nitride layer (the a-axis lattice constant of aluminum nitride is approximately The transition of the lattice constant between the boron nitride and aluminum nitride layers can reduce stress to prevent excessive warpage and cracking of the epitaxial structure, thereby improving the quality of the epitaxial crystal and effectively reducing device leakage current and improving device breakdown voltage characteristics. Furthermore, it is worth mentioning that forming the boron nitride layer before the aluminum nitride layer further helps to reduce cracks, air porosity, and stress in the aluminum nitride layer.

[0037] In some embodiments, see also Figure 1 and Figure 2A Considering that if the aluminum content in the boron nitride aluminum layer is too high, the epitaxial growth rate will be too slow; conversely, if the aluminum content is too low, the dislocation density of the crystal may increase, thereby reducing the crystal quality, the embodiment of the present invention preferably uses the boron nitride aluminum layer B... 1-m Al m The aluminum content in N is configured to satisfy 0.3≤m≤0.75.

[0038] In some embodiments, see Figure 1 and Figure 2A The sum of the thicknesses of the boron nitride layer, the aluminum nitride layer, and the aluminum boron nitride layer is greater than 300 nm and less than 3 μm. In this embodiment, the adoption of the laminated structure of the boron nitride layer, the aluminum boron nitride layer, and the aluminum nitride layer can reduce stress to avoid excessive warpage of the epitaxial structure and cracking. Therefore, a high-resistance buffer layer 13 with a relatively large thickness can be achieved by epitaxial growth. Moreover, a high-resistance buffer layer 13 with a relatively large thickness (e.g., greater than 300 nm) can effectively prevent defects (such as dislocations and microcracks) from the semiconductor substrate 11 from propagating to the heteroepitaxial stack 15, thereby improving the crystal quality, reducing the leakage current of the device, increasing the breakdown voltage, and further improving the device performance. On the contrary, if the thickness of the high-resistance buffer layer 13 is too large (e.g., 3 μm or more), it will lead to an increase in material costs and further increase the device cost.

[0039] In some embodiments, referring together to Figure 1 and Figure 2B for the material B 1-m Al m N of the aluminum boron nitride layer, in the first direction A1, as the value of m gradually increases, the boron content gradually decreases and the aluminum content gradually increases, which can achieve a gradual change in the a-axis lattice constant from the boron nitride layer to the aluminum nitride layer, contributing to improving the crystal quality and stress control of the high-resistance buffer layer 13.

[0040] In some embodiments, as shown in Figure 3A , the high-resistance buffer layer 13 includes a boron nitride layer, an aluminum nitride layer, and an aluminum boron nitride layer located between the boron nitride layer and the aluminum nitride layer; in the first direction A1, the boron nitride layer is located on the side of the aluminum boron nitride layer背离 the semiconductor substrate 11, and the aluminum nitride layer is located on the side of the aluminum boron nitride layer背离 the heteroepitaxial stack 15; the material of the aluminum boron nitride layer can be expressed as B 1-m Al m N, where B represents boron, Al represents aluminum, N represents nitrogen, m is the number of moles and 0 < m < 1. Further, 0.3 ≤ m ≤ 0.75.

[0041] In some embodiments, referring together to Figure 1 and Figure 3B for the material B 1-m Al m N of the aluminum boron nitride layer, in the first direction A1, as the value of m gradually decreases, the aluminum content gradually decreases and the boron content gradually increases, which can achieve a gradual change in the a-axis lattice constant from the aluminum nitride layer to the boron nitride layer, contributing to improving the crystal quality and stress control of the high-resistance buffer layer 13.

[0042] In some embodiments, referring to Figure 4, in addition to the semiconductor substrate 11, the high-resistance buffer layer 13, and the heteroepitaxial stack 15, the epitaxial structure may further include a transition layer 14; the transition layer 14 is located between the high-resistance buffer layer 13 and the heteroepitaxial stack 15. By providing the transition layer 14, better lattice matching between the high-resistance buffer layer 13 and the heteroepitaxial stack 15 can be achieved.

[0043] In some embodiments, referring also to Figure 4 and Figure 5A , the boron nitride is located on the side of the aluminum boron nitride layer facing the semiconductor substrate 11, and the aluminum nitride is located on the side of the aluminum boron nitride layer facing the heteroepitaxial stack 15; the transition layer 14 is a gallium aluminum nitride layer, and its material expression is Al x Ga 1-x N, where x is the mole fraction and 0 < x < 1. In this embodiment, since the a-axis lattice constant of Al x Ga 1-x N is between the a-axis lattice constant of aluminum nitride (AlN) (about ) and the a-axis lattice constant of gallium nitride (GaN) (about ), better lattice matching between the aluminum nitride layer and the gallium nitride layer in the heteroepitaxial stack 15 can be achieved. Further, as Figure 5B shown, in the first direction A1, the aluminum content in the gallium aluminum nitride layer Al x Ga 1-x N gradually decreases (i.e., x gradually decreases). In this way, a gradual change in the lattice constant from the aluminum nitride layer to the gallium nitride layer in the heteroepitaxial stack 15 can be achieved, which helps to improve the crystal quality.

[0044] In some embodiments, referring also to Figure 4 and Figure 5C , in the first direction A1, the value of m in the material B 1-m Al m N of the aluminum boron nitride layer gradually increases, then the boron content gradually decreases and the aluminum content gradually increases. It can achieve a gradual change in the a-axis lattice constant from the boron nitride layer to the aluminum nitride layer, which helps to improve the crystal quality and stress control of the high-resistance buffer layer 13. Moreover, the transition layer 14 is a gallium aluminum nitride layer, and its material expression is Al x Ga 1-x N; since the a-axis lattice constant of Al x Ga 1-x N is between the a-axis lattice constant of aluminum nitride (about ) and the a-axis lattice constant of gallium nitride (about This allows for better lattice matching between the aluminum nitride layer and the gallium nitride layer in the heteroepitaxial stack 15. Furthermore, as... Figure 5D As shown, in the first direction A1, the aluminum gallium nitride layer Al x Ga 1-x The aluminum content in N gradually decreases (that is, x gradually decreases), so that the lattice constant can be gradually changed from the aluminum nitride layer to the gallium nitride layer in the heteroepitaxial stack 15, which helps to improve the crystal quality.

[0045] In some embodiments, see also Figure 4 and Figure 6A The boron nitride is located on the side of the boron nitride aluminum layer facing the semiconductor substrate 11, and the aluminum nitride is located on the side of the boron nitride aluminum layer facing the heteroepitaxial stack 15; the transition layer 14 is an aluminum indium nitride layer, and its material expression is Al. y In 1-y N and y are molar fractions and 0.83 ≤ y < 1. In this embodiment, Al 0.83 In 0.17 The lattice constant of N along the a-axis is approximately Therefore Al y In 1-y The a-axis lattice constant of N (0.83≤y<1) is between that of aluminum nitride and gallium nitride (approximately...). This allows for better lattice matching between the aluminum nitride layer and the gallium nitride layer in the heteroepitaxial stack 15. Further, as... Figure 6B As shown, in the first direction A1, the aluminum indium nitride layer Al y In 1-y The aluminum content in N gradually decreases (that is, y gradually decreases), which allows for a gradual change in the lattice constant from the aluminum nitride layer to the gallium nitride layer in the heteroepitaxial stack 15, thus helping to improve crystal quality.

[0046] In some embodiments, see also Figure 4 and Figure 6C In the first direction A1, the material B of the boron nitride aluminum layer 1-m Al m As the value of m in N gradually increases, the boron content gradually decreases and the aluminum content gradually increases. This allows for a gradual change in the a-axis lattice constant from the boron nitride layer to the aluminum nitride layer, which helps improve the crystal quality and stress control of the high-resistivity buffer layer 13. Furthermore, the transition layer 14 is an aluminum indium nitride layer, whose material expression is Al. y In 1-y N; due to Al y In 1-yThe a-axis lattice constant of N (0.83≤y<1) is intermediate with that of aluminum nitride (approximately...). ) and the a-axis lattice constant of gallium nitride (approximately This allows for better lattice matching between the aluminum nitride layer and the gallium nitride layer in the heteroepitaxial stack 15. Furthermore, as... Figure 6D As shown, in the first direction A1, the aluminum indium nitride layer Al y In 1-y The aluminum content in N gradually decreases (that is, y gradually decreases), which allows for a gradual change in the lattice constant from the aluminum nitride layer to the gallium nitride layer in the heteroepitaxial stack 15, thus helping to improve crystal quality.

[0047] In some embodiments, see also Figure 4 and Figure 7A The boron nitride is located on the side of the boron nitride aluminum layer opposite to the semiconductor substrate 11, and the aluminum nitride is located on the side of the boron nitride aluminum layer opposite to the heteroepitaxial stack 15. The transition layer 14 is a boron nitride gallium layer, and its material expression is B. z Ga 1-z N and x represent molar fractions, and to balance the epitaxial growth rate and crystal quality, the value of z is designed to be 0.3 ≤ z ≤ 0.75. In this embodiment, due to B z Ga 1-z The a-axis lattice constant of N is intermediate with that of boron nitride (approximately...). ) and the a-axis lattice constant of gallium nitride (approximately This allows for better lattice matching between the boron nitride layer and the gallium nitride layer in the heteroepitaxial stack 15. Furthermore, as... Figure 7B As shown, in the first direction A1, the boron gallium nitride layer B z Ga 1-z The boron content in N gradually decreases (i.e., z gradually decreases), thus achieving a gradual change in the lattice constant from the boron nitride layer to the gallium nitride layer in the heteroepitaxial stack 15, which helps to improve crystal quality.

[0048] In some embodiments, see also Figure 4 and Figure 7C In the first direction A1, the material B of the boron nitride aluminum layer 1-m Al m As the value of m in N gradually decreases, the aluminum content gradually decreases and the boron content gradually increases. This allows for a gradual change in the a-axis lattice constant from the aluminum nitride layer to the boron nitride layer, which helps improve the crystal quality and stress control of the high-resistivity buffer layer 13. Furthermore, the transition layer 14 is a boron gallium nitride layer, and its material expression is B. z Ga1-z N and z are molar fractions, and to balance the epitaxial growth rate and crystal quality, the value of z is designed to be 0.3 ≤ z ≤ 0.75; due to B z Ga 1-z The a-axis lattice constant of N is between that of boron nitride (approximately 2.504) and that of gallium nitride (approximately...). This allows for better lattice matching between the boron nitride layer and the gallium nitride layer in the heteroepitaxial stack 15. Furthermore, as... Figure 7D As shown, in the first direction A1, the boron gallium nitride layer B z Ga 1-z The boron content in N gradually decreases (i.e., z gradually decreases), thus achieving a gradual change in the lattice constant from the boron nitride layer to the gallium nitride layer in the heteroepitaxial stack 15, which helps to improve crystal quality.

[0049] See Figure 8 In some embodiments, in the heteroepitaxial stack 15 of the epitaxial structure, the barrier layer 153 may be located on the side of the gallium nitride channel layer 151 facing the semiconductor substrate 11, or the gallium nitride channel layer 151 may be located on the side of the barrier layer 153 away from the semiconductor substrate 11. In this way, nitrogen-polar GaN-based HEMT devices can be fabricated based on the epitaxial structure. Nitrogen-polar GaN-based HEMT devices, with their low contact resistance and high two-dimensional electron gas (2DEG) thresholding, are gradually showing potential in applications such as high-frequency, high-power microwave transistors, enhancement-mode devices, and sensors.

[0050] See Figure 9This invention also provides a semiconductor device, such as a lateral device, comprising: an epitaxial structure, a first electrode S, a gate structure, and a second electrode D. The epitaxial structure includes, for example, a semiconductor substrate 11, a high-resistivity buffer layer 13, and a heteroepitaxial stack 15, and may even include a transition layer 14; the specific layer structure and materials of the epitaxial structure can be referred to in the foregoing embodiments, and will not be repeated here. The first electrode S is disposed on the side of the heteroepitaxial stack 15 opposite to the semiconductor substrate 11 and forms an electrical contact, such as an ohmic contact, with the heteroepitaxial stack 15. The gate structure is disposed on the side of the heteroepitaxial stack 15 opposite to the semiconductor substrate 11, and as an example of an enhancement-mode device, the gate electrode includes a P-type gallium nitride cap layer P-GaN and a gate electrode G located on the side of the P-type gallium nitride cap layer P-GaN opposite to the semiconductor substrate 11; of course, it is understood that if it is a depletion-mode device, the P-type gallium nitride cap layer P-GaN is not required. Furthermore, the second electrode D is disposed on the side of the heteroepitaxial stack 15 away from the semiconductor substrate 11 and forms an electrical contact, such as an ohmic contact, with the heteroepitaxial stack 15. The second electrode D and the first electrode S are located on opposite sides of the gate structure, for example, the drain and the source, respectively, but the embodiments of the present invention are not limited thereto.

[0051] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. An epitaxial structure, characterized in that, include: A semiconductor substrate, a heteroepitaxial stack, and a high-resistivity buffer layer located between the semiconductor substrate and the heteroepitaxial stack, wherein the heteroepitaxial stack is used to provide a conductive channel by constructing a two-dimensional electron gas and includes a gallium nitride channel layer and a barrier layer; The high-resistance buffer layer includes a boron nitride layer, an aluminum nitride layer, and an aluminum boron nitride layer located between the boron nitride layer and the aluminum nitride layer.

2. The epitaxial structure according to claim 1, characterized in that, The sum of the thicknesses of the boron nitride layer, the aluminum nitride layer, and the aluminum boron nitride layer is greater than 300 nm and less than 3 μm.

3. The epitaxial structure according to claim 1, characterized in that, The material of the boron nitride aluminum layer is B. 1-m Al m N and m are molar fractions and 0.3 ≤ m ≤ 0.

75.

4. The epitaxial structure according to claim 3, characterized in that, The boron nitride layer is located on the side of the boron nitride aluminum layer facing the semiconductor substrate, and the aluminum nitride layer is located on the side of the boron nitride aluminum layer facing the heteroepitaxial stack. In the first direction from the semiconductor substrate to the heteroepitaxial stack, the value of m gradually increases.

5. The epitaxial structure according to claim 3, characterized in that, It further includes a transition layer, which is located between the high-resistance buffer layer and the heteroepitaxial stack; the boron nitride layer is located on the side of the aluminum boron nitride layer facing the semiconductor substrate, and the aluminum nitride layer is located on the side of the aluminum boron nitride layer facing the heteroepitaxial stack; the transition layer includes an aluminum gallium nitride layer or an aluminum indium nitride layer, and the material of the aluminum gallium nitride layer is Al x Ga 1-x N, where x is the molar fraction and 0 < x < 1; the material of the aluminum indium nitride layer is Al y ln 1-y N, where y is the molar fraction and 0.83 ≤ y < 1.

6. The epitaxial structure according to claim 5, characterized in that, In a first direction from the semiconductor substrate to the heteroepitaxial stack, the aluminum content in the aluminum gallium nitride layer or the aluminum indium nitride layer gradually decreases.

7. The epitaxial structure according to claim 3, characterized in that, The boron nitride layer is located on the side of the boron nitride aluminum layer opposite to the semiconductor substrate, and the aluminum nitride layer is located on the side of the boron nitride aluminum layer opposite to the heteroepitaxial stack. In the first direction from the semiconductor substrate to the heteroepitaxial stack, the value of m gradually decreases.

8. The epitaxial structure according to claim 3, characterized in that, It also includes a transition layer located between the high-resistivity buffer layer and the heteroepitaxial stack; the boron nitride layer is located on the side of the boron aluminum nitride layer opposite to the semiconductor substrate, and the aluminum nitride layer is located on the side of the boron aluminum nitride layer opposite to the heteroepitaxial stack; the transition layer includes a boron gallium nitride layer, wherein the material of the boron gallium nitride is B. z Ga 1-z N and z are molar amounts and 0.3 ≤ z ≤ 0.

75.

9. The epitaxial structure according to claim 8, characterized in that, In a first direction from the semiconductor substrate to the heteroepitaxial stack, the boron content in the gallium boron nitride gradually decreases.

10. A semiconductor device, characterized in that, include: The epitaxial structure as described in any one of claims 1 to 9; The first electrode is disposed on the side of the heteroepitaxial stack away from the semiconductor substrate and forms an electrical contact with the heteroepitaxial stack; A gate structure is disposed on the side of the heteroepitaxial stack opposite to the semiconductor substrate; The second electrode is disposed on the side of the heteroepitaxial stack away from the semiconductor substrate and forms an electrical contact with the heteroepitaxial stack. The second electrode and the first electrode are respectively located on opposite sides of the gate structure.

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