In-situ optical shaping of VCSEL array integration method and optical interconnection module
By pre-fabricating micropores in a quartz substrate and combining femtosecond laser and two-photon polymerization technology, efficient integration of VCSEL arrays was achieved, solving the problems of complexity and high cost in integrating VCSELs in the CPO architecture, and providing a highly reliable and low-cost solution.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HUACHEN XINGUANG (WUXI) SEMICONDUCTOR CO LTD
- Filing Date
- 2026-06-11
- Publication Date
- 2026-07-14
AI Technical Summary
In existing technologies, VCSEL heterogeneous integration processes are complex, thermal stress management is difficult, and manufacturing costs are high, making it difficult to integrate them into CPO architecture efficiently and with high density.
The VCSEL array integration method using in-situ optical forming employs femtosecond lasers to pre-fabricate micropores within a quartz substrate, fixes the VCSEL chip using a needle transfer method, and combines femtosecond lasers and two-photon polymerization technology for electrical and optical integration, forming a non-destructive mechanical structure and a customized optical system.
It achieves native integrated design of optical path, circuit and thermal path, reduces R&D iteration cost and cycle, improves product service life and reliability under harsh conditions, reduces thermal stress, and is suitable for multi-variety, small-batch production.
Smart Images

Figure CN122393716A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of laser packaging, and in particular to an in-situ optical forming method for VCSEL array integration and an optical interconnect module. Background Technology
[0002] With the explosive development of artificial intelligence (AI) technology, scenarios such as large-scale model training and the deployment of ultra-large-scale computing clusters have placed stringent demands on data transmission bandwidth, latency, power consumption, and integration density. Currently, the number of parameters in a single large AI model has exceeded trillions, and a single training session consumes hundreds of quadrillion floating-point operations. Computing power demands double every 3-4 months, far exceeding the evolution speed of Moore's Law, directly driving the upgrade of data center optical interconnect technology from 800G to 1.6T and even higher speeds. Against this backdrop, vertical-cavity surface-emitting lasers (VCSELs) have become an ideal light source choice in CPO optical engines due to their low power consumption, high modulation rate, and ease of two-dimensional integration. However, the efficient and high-density integration of VCSELs into the CPO architecture still faces the following challenges: Heterogeneous integration processes are complex: existing solutions often involve thermo-press bonding or wafer docking of multiple materials such as silicon, compound semiconductors, polymers, and metals. The process is complex, thermal stress management is difficult, and manufacturing costs are high, which has become a constraint on the large-scale application of CPO technology. Summary of the Invention
[0003] To address the aforementioned technical problems, this application provides an in-situ optically shaped VCSEL array integration method and an optical interconnect module.
[0004] One objective of this application is to provide an in-situ optically shaped VCSEL array integration method, employing the following technical solution: A method for integrating VCSEL arrays using in-situ optical shaping includes the following steps: S1. Pre-fabricated glass micropores: Quartz glass is used as a quartz substrate, and femtosecond laser pulses are focused and scanned within the quartz substrate to predefine the three-dimensional contour of the micropores. S2. VCSEL array embedding and fixation: High-temperature epoxy resin is precisely distributed to the bottom of the microhole using the needle transfer method. With the assistance of a beam splitter camera, a high-precision flip-chip bonding machine is used to precisely place the VCSEL chips face up into the microhole. Heating is used to cure the epoxy resin and firmly fix the VCSEL chips. S3, Electrical Integration: A metal layer is sputtered onto a quartz substrate, and the circuit pattern is defined by photolithography exposure and development. Excess metal is then removed by wet etching to form electrical interconnect tracks. S4. Optical Integration: A liquid negative photoresist is coated on the surface of the sample that has been electrically integrated. Using a two-photon polymerization direct writing system, an immersion lithography method is employed to immerse the sample in the photoresist. The sample is then scanned according to the three-dimensional model of the polymer lens, which triggers the two-photon polymerization of the photoresist and achieves curing, thus completing the fabrication of the polymer lens.
[0005] By employing the above technical solution, femtosecond laser modification refers to the local absorption of photon energy by a quartz substrate through a multiphoton absorption process at extremely high peak power density. This process exhibits a threshold effect, occurring only within the focal volume, resulting in extremely high spatial resolution. The induction of nanogratings or high-density defects in the focal region significantly enhances the chemical activity of this area (compared to the unexposed area), increasing the etching rate by several orders of magnitude. Simultaneously, the pulse width of the femtosecond pulse (300 fs) is much shorter than the material's thermal diffusion time, preventing thermal damage to surrounding materials and thus achieving non-destructive femtosecond laser modification. Replacing sharp corners with rounded edges reduces the local concentration of laser energy, decreases internal stress in the glass, and prevents cracking after etching. This application selects ultra-high purity, ultra-low coefficient of thermal expansion (CTE) optical-grade fused silica glass as the sole passive integrated substrate. This substrate simultaneously possesses four major characteristics: optical transparency, electrical insulation, thermal stability, and three-dimensional micromachinability, effectively replacing the multilayer composite substrates used in traditional solutions and achieving a native integrated design foundation for optical, electrical, and thermal paths.
[0006] Preferably, step S1 includes, S11, Femtosecond laser modification: Femtosecond laser pulses are used to focus and scan inside a quartz substrate to predefine the three-dimensional contour of the micropores; S12. Selective chemical etching: Using an etchant, a chemical wet etching process is performed on the femtosecond laser modified quartz substrate. The etchant quickly penetrates through the modified sidewalls and then performs horizontal etching from the bottom up, eventually removing the entire unmodified glass block that is surrounded, forming micropores. S13. Cleaning and post-treatment: Remove etchant, clean and dry.
[0007] By adopting the above technical solution, the nanograting structure formed by laser modification will accelerate the etching rate, while the etching rate of the unmodified area is extremely low (high selectivity), and finally a micropore matching the writing contour will be formed.
[0008] Preferably, in step S11, when the femtosecond laser pulse is focused and scanned in the quartz substrate, a contour writing scan is performed to write the contour lines of the bottom of the microhole and the four sidewalls. The sidewall contours are composed of lines with equal spacing, and the corners are rounded to reduce stress concentration. Finally, a closed 3D cage structure contour made of modified material is formed, and the cage structure surrounds the unmodified glass block to be removed.
[0009] By adopting the above technical solution, the scanning uses a "contour writing" strategy, which does not fill the entire volume, thus improving efficiency.
[0010] Preferably, step S3 includes the following steps: S31, Silanization: Pretreatment of the surface of a quartz substrate with triethoxysilane; S32, Passivation layer: PI resin is drop-coated onto a silanized quartz substrate to fill the gap between the VCSEL chip and the micropores, and then a passivation layer is formed by spin coating and cured. S33, Picosecond Laser Drilling: Using a picosecond-pulse laser system, micro-vias are drilled in the passivation layer above the VCSEL chip electrodes for subsequent metal interconnection; S34, RIE pretreatment: reactive ion etching is used, and a mixture of O2 and CHF3 gas is introduced to etch the surface of the passivation layer. S35, Photolithography wiring: Ti / Pt layer and Au layer are sputtered in sequence, positive photoresist is coated, circuit pattern is defined by photolithography exposure and development, and excess metal is removed by wet etching to form electrical interconnect tracks.
[0011] By adopting the above technical solution, silanization is achieved by reacting one end of the silane molecule with the hydroxyl group on the glass surface and forming a chemical bond with the PI resin at the other end, thereby improving the adhesion between the passivation layer and the quartz substrate and preventing delamination during thermal cycling. Passivation layer: PI resin has excellent electrical insulation, thermal stability and chemical stability. After spin coating, it can cover the chip and glass surface to form a uniform insulating layer, while filling the gaps and ensuring structural integrity. Picosecond laser drilling: The short pulse characteristics of picosecond lasers result in a small heat-affected zone, which can precisely etch the passivation layer to form micro-vias, avoiding damage to the underlying VCSEL pads; RIE pretreatment: Plasma of mixed O2 and CHF3 gas can slightly roughen the PI surface, improve the adhesion between the metal layer and PI, and remove PI decomposition products remaining during drilling, ensuring the conductivity of the metal interconnect.
[0012] Photolithography wiring: The Ti / Pt layer acts as an adhesion layer, enhancing the bonding force between the Au layer and PI; the Au layer acts as a conductive layer, enabling low-resistance interconnection between the VCSEL's micron-level pads and external millimeter-level driving devices. The photoresist's photoresist properties are used to precisely define the conductive track pattern, and wet etching removes excess metal, forming an electrical interconnect network that conforms to the design.
[0013] Preferably, before optical integration in step S4, a pretreatment is performed on the quartz substrate by silanizing to improve the adhesion between the photoresist and the substrate.
[0014] Another objective of this application is to provide an in-situ optically shaped VCSEL optical interconnect module, employing the following technical solution: An in-situ optically formed VCSEL optical interconnect module is fabricated using the aforementioned in-situ optically formed VCSEL array integration method. It includes a quartz substrate with micro-holes on the substrate. A VCSEL chip is disposed within the micro-holes. A passivation layer is encapsulated on the upper surface of the VCSEL chip. A pre-fabricated electrode for electrical connection with the outside is disposed within the VCSEL chip. A polymer lens is disposed at the light-emitting area of the VCSEL chip.
[0015] By adopting the above technical solution, using a single quartz substrate as the carrier, and employing femtosecond laser processing and two-photon polymerization processes, the entire process from mechanical packaging to optical integration can be completed sequentially, replacing multi-material bonding, multiple photolithography steps, and multiple active alignment steps. Both the core femtosecond laser processing and two-photon polymerization are direct-write processes, requiring no physical masks, making them particularly suitable for rapid prototyping and customized production of various products in small batches, significantly reducing R&D iteration costs and cycles. This also reduces the need for specialized bonding materials, discrete optical components, and precision mounting equipment, lowering overall costs.
[0016] Using fused silica glass as the interlayer, its ultra-low coefficient of thermal expansion is highly matched with the VCSEL chip, minimizing thermal stress from the material source. Embedded structure buffers stress: The chip is embedded in a glass microcavity, with the surrounding material forming a natural mechanical buffer and stress isolation zone. Excellent high-temperature stability: Both the glass and the polyimide passivation layer can withstand high-temperature processes above 350°C, ensuring dimensional stability and performance stability of the module under subsequent packaging and high-temperature operating environments, fundamentally enhancing the product's service life and reliability under harsh conditions.
[0017] Preferably, epoxy resin is provided between the VCSEL chip and the quartz substrate.
[0018] By adopting the above technical solution, epoxy resin can firmly bond the VCSEL chip to the micropores and withstand high-temperature processes.
[0019] Preferably, the polymer lens material is a photosensitive polymer, including photoresist, two-photon initiator and multifunctional acrylate monomer.
[0020] By adopting the above technical solution, an optical integrated engine is used to shape the beam.
[0021] In summary, this application includes at least one of the following beneficial technical effects: 1. Creatively selects ultra-high purity, ultra-low coefficient of thermal expansion (CTE) optical-grade fused silica glass as the only passive integrated substrate; this substrate has four major characteristics: optical transparency, electrical insulation, thermal stability, and three-dimensional micromachining capability, which replaces the multi-layer composite substrate in the traditional solution and realizes the original integrated design basis of optical path, circuit and thermal path. 2. Abandoning flip-chip bonding and gold wire bonding, this paper proposes a method of precisely embedding the VCSEL chip face-up (with the light-emitting surface exposed) into a pre-fabricated microcavity within the glass, and using a thin-film redistribution layer on top of the chip to achieve electrical interconnection. This architecture physically decouples mechanical fixation, electrical interconnection, and optical channels. While maintaining the chip's high thermal performance and high electrical speed, it permanently opens the optical access port of the light-emitting surface, creating a prerequisite for in-situ optical integration in subsequent processes. 3. Using femtosecond laser-assisted chemical etching, submicron precision three-dimensional "subtractive" fabrication is performed inside the glass to form customized microcavities and fluid channels (such as for cooling); this innovative process provides stress-free precision mechanical structures. 4. Using two-photon polymerization direct writing, a three-dimensional "addition" fabrication with nanometer precision is performed directly above the light-emitting area of the encapsulated VCSEL to grow a micro-optical system; this innovative process provides customized optical functions without alignment deviation. Attached Figure Description
[0022] Figure 1 This is a schematic diagram of the structure of the quartz substrate during steps S1 to S2 in the embodiment; Figure 2 This is a schematic diagram of the quartz substrate structure after step S2 in the embodiment; Figure 3 This is a schematic diagram of the quartz substrate structure during steps S31 to S34 in the embodiment; Figure 4 This is a schematic diagram of the quartz substrate structure during step S35 in the embodiment; Figure 5 This is a schematic diagram of the quartz substrate structure after step S35 in the embodiment. Figure 6 This is a schematic diagram of the structure of an in-situ optically shaped VCSEL optical interconnect module in one embodiment.
[0023] Explanation of reference numerals in the attached figures: 1. Quartz substrate; 2. Micropores; 3. Epoxy resin; 4. VCSEL chip; 5. Metal layer; 6. Passivation layer; 7. Pre-fabricated electrode; 8. Polymer lens. Detailed Implementation
[0024] The present application will be further described in detail below with reference to all the accompanying drawings.
[0025] Example
[0026] Example 1
[0027] This application discloses an in-situ optically shaped VCSEL array integration method, referring to... Figures 1 to 6 This includes the following steps: S1, Pre-fabricated glass micropores 2: S11, Femtosecond Laser Modification. Process Steps: A femtosecond laser pulse is used to focus and scan inside the quartz substrate 1 to predefine the three-dimensional contour of the microhole 2. Specific operations are as follows: Using a femtosecond laser scanning platform, a 40x objective lens is used for focusing and circular polarization to scan the quartz substrate 1. The scanning employs a "contour writing" strategy to improve efficiency; instead of filling the entire volume, only the contour lines of the bottom and four sidewalls of the microhole 2 are written. The sidewall contours consist of lines spaced 2μm apart, with 30μm radius arcs at corners to reduce stress concentration. The final result is a closed 3D cage structure contour made of modified material, with the unmodified glass block to be removed enclosed within the cage structure.
[0028] Femtosecond laser modification principle: At extremely high peak power densities, the quartz substrate 1 locally absorbs photon energy through a multiphoton absorption process. This process exhibits a threshold effect, occurring only within the focal volume, resulting in extremely high spatial resolution. This induces the formation of nanogratings or high-density defects in the focal region, significantly enhancing the chemical activity of that area (compared to the unexposed area), increasing the etching rate by several orders of magnitude. Simultaneously, the pulse width of the femtosecond pulse (300 fs) is much shorter than the material's thermal diffusion time, preventing thermal damage to the surrounding material and thus achieving non-destructive femtosecond laser modification. Replacing sharp corners with rounded edges reduces the local concentration of laser energy, decreases internal stress in the glass, and prevents cracks after etching.
[0029] S12. Selective Chemical Etching. Process Steps: Using an etchant (30% w / v KOH aqueous solution), at a temperature of 85°C, a wet chemical etching process is performed on the femtosecond laser-modified quartz substrate 1. The etchant rapidly penetrates through the modified sidewalls, and then etches laterally from the bottom up, ultimately removing the unmodified glass block surrounded by the cage structure.
[0030] Selective chemical etching principle: The nano-grating structure formed by laser modification will accelerate the etching rate of SiO2 by KOH, while the etching rate of the unmodified area is extremely low (high selectivity), and finally microholes 2 matching the writing contour are formed.
[0031] S13. Cleaning and post-treatment: Remove etchant, clean and dry.
[0032] S2, VCSEL array embedding and fixing: Using a needle transfer method, high-temperature epoxy resin 3 is precisely distributed to the bottom of micropore 2. Using a high-precision flip-chip bonding machine with the assistance of a beam splitter camera, the VCSEL chip 4 (1×4 array) is precisely placed face up into micropore 2. Heating is used to cure the epoxy resin 3 and firmly fix the VCSEL chip 4.
[0033] VCSEL array embedding and fixing principle: The inner wall of the micro-hole 2 naturally restricts the horizontal movement of the chip, achieving sub-micron level positioning accuracy. By controlling the bonding pressure and adhesive layer thickness, the top of the chip is made as coplanar as possible with the glass surface.
[0034] S3, Electrical Integration, Fabrication of Thin-Film Electrical Redistribution Layer: S31, Silanization: The surface of the quartz substrate 1 is pretreated with (3-aminopropyl)triethoxysilane. One end of the silane molecule reacts with the hydroxyl groups on the glass surface, and the other end forms a chemical bond with the PI resin, which improves the adhesion between the passivation layer 6 and the quartz substrate 1 and avoids delamination during thermal cycling.
[0035] S32, Passivation Layer 6: PI resin (HDMicrosystems PI-2611) is drop-coated onto a silanized quartz substrate 1. After standing for 10 minutes to fill the gap between the VCSEL chip 4 and the micropores 2, a 5.5µm thick passivation layer 6 is formed by spin coating. The temperature is gradually increased to 350℃ in an inert atmosphere and maintained at that temperature for 2 hours to complete the curing. PI resin has excellent electrical insulation, thermal stability, and chemical stability. After spin coating, it can cover the chip and glass surface, forming a uniform insulating layer while filling the gaps and ensuring structural integrity.
[0036] S33. Picosecond Laser Drilling: Utilizing an advanced laser system with picosecond-level pulses, micro-vias are drilled in the passivation layer 6 above the VCSEL chip's fourth electrode for subsequent metal interconnection. The short pulse characteristics of the picosecond laser result in a small heat-affected zone, allowing for precise etching of the passivation layer 6 to form micro-vias while avoiding damage to the underlying VCSEL pads.
[0037] S34, RIE Pretreatment: Reactive ion etching (RIE) is used, with a mixture of O2 and CHF3 gas introduced to etch the surface of passivation layer 6 for 1 minute. The plasma of O2 and CHF3 mixed gas can slightly roughen the PI surface, improve the adhesion between metal layer 5 and passivation layer 6, and remove the PI decomposition products remaining during the drilling process, ensuring the conductivity of the metal interconnect.
[0038] S35, Photolithography and Wiring: A 25nm thick Ti / Pt layer and a 1µm thick Au layer are sequentially sputtered to form metal layer 5. Positive photoresist (AZ4562) is coated on top. The circuit pattern is defined by photolithography exposure and development. Excess metal is then removed by wet etching to form electrical interconnect tracks. The Ti / Pt layer acts as an adhesion layer to enhance the adhesion between the Au layer and the PI layer. The Au layer acts as a conductive layer to achieve low-resistance interconnection between the VCSEL micron-level pads and external millimeter-level driving devices. The photoresist's photoresist properties are used to precisely define the conductive track pattern. Excess metal is removed by wet etching to form an electrical interconnect network that conforms to the design.
[0039] S4. Optical integration, in-situ 3D printing micro-optical system: The quartz substrate 1 was silanized to improve the adhesion between the photoresist and the substrate. A liquid negative photoresist was coated onto the electrically integrated sample surface. Using a two-photon polymerization direct-write system, an immersion lithography method (high NA objective lens (NA1.4)) was employed, immersing the sample in the photoresist. The 3D model of the polymer lens 8 was scanned, initiating two-photon polymerization of the photoresist and achieving curing, thus completing the fabrication of the polymer lens 8. The printed sample was then immersed in propylene glycol methyl ether acetate (PGMEA) for development for 15 minutes, followed by rinsing with isopropanol.
[0040] Two-photon polymerization principle: A near-field infrared laser is tightly focused onto the interior of a negative photoresist using a high-NA objective lens. The light intensity in the focused area is high enough to trigger two-photon absorption, causing localized solidification of the photoresist (voxel size ≈ 200 × 200 × 500 nm³), while the non-focused areas remain liquid. The near-infrared femtosecond laser has extremely high intensity at the focal point, and the photoresist molecules simultaneously absorb two long-wavelength photons, the total energy of which is sufficient to initiate a polymerization reaction. Because this effect is proportional to the square of the light intensity, the polymerization reaction is strictly confined to the sub-micron scale of the focal volume, thus achieving nanometer-level precision 3D printing.
[0041] The design principle of the polymer lens 8's 3D model is based on an 8th-order phase-type diffractive optical element designed using the Iterative Fourier Transform (IFTA) algorithm. The principle involves introducing discrete phase delays through a periodic relief structure on the surface, causing the beam to diffract and converge at a specific distance (100 μm). This allows the input VCSEL beam to be focused into a target spot (5 µm diameter) after diffraction. The 8th-order phase structure represents a trade-off between performance and fabrication time, balancing coupling efficiency and processing cost. Because the distributed Bragg reflector (DBR) on the top of the VCSEL has high reflectivity, directly printing it on its surface would cause the laser to be reflected and interfere with the incident light, resulting in excessively high local energy (overexposure). Therefore, printing the first layer on the passivation layer 6 avoids defects caused by reflection interference.
[0042] Exposure parameter design: Scanning speed and laser power determine the exposure dose. If the dose is too low, the curing will be insufficient and the structural strength will be insufficient. If the dose is too high, overexposure will occur, resulting in micro bubbles or structural deformation. By using the above parameters, the optimal structure that is "defect-free and matches the design" can be obtained.
[0043] Immersion lithography: The space between the objective lens and the photoresist is filled with immersion liquid, which can increase the numerical aperture, improve focusing accuracy, and achieve precise printing of submicron-level structures.
[0044] Development: PGMEA can dissolve unpolymerized liquid photoresist, preserving the cured 3D structure. Isopropyl alcohol is used to rinse away residual developer, resulting in a clean structural surface.
[0045] Example 2
[0046] This application discloses an in-situ optically shaped VCSEL optical interconnect module, which is manufactured using an in-situ optically shaped VCSEL array integration method described in the above embodiments, with reference to... Figure 6 The system includes a quartz substrate 1. Microholes 2 are formed on the quartz substrate 1, and a VCSEL chip 4 is disposed within each microhole 2. A passivation layer 6 is encapsulated on the upper surface of the VCSEL chip 4. A pre-fabricated electrode 7 for electrical connection with an external source is disposed within the VCSEL chip 4. A polymer lens 8 is disposed at the light-emitting area of the VCSEL chip 4. Epoxy resin 3 is disposed between the VCSEL chip 4 and the quartz substrate 1. Quartz substrate 1, made of fused silica (SiO2); it is a functional material manufactured with precision engineering, possessing sub-ppm purity, nano-level surface smoothness, and 10 -6 The order-of-magnitude refractive index uniformity and the near-zero coefficient of thermal expansion together constitute the absolute prerequisites for realizing femtosecond laser three-dimensional micromachining, submicron chip alignment, and in-situ nano-optical shaping.
[0047] Epoxy Resin 3 is a high-performance, two-component epoxy resin 3. Its basic chemical composition consists of epoxy resin 3 prepolymer (component A) and curing agent (component B). Epoxy resin 3 prepolymer: often based on bisphenol A diglycidyl ether (DGEBA) or its modified / high-performance variants, containing multifunctional epoxy resin 3 (such as phenolic epoxy) to improve crosslinking density and thermal stability. Curing agent: curing agents are often aromatic amines (such as diaminodiphenyl sulfone DDS) or anhydride curing agents. These curing agents can produce a three-dimensional network structure with high heat distortion temperature and excellent chemical stability.
[0048] VCSEL chip 4, a standard commercially available VCSEL laser; an optical chip in an optical module or assembly; Pre-fabricated electrode 7, made of Ti / Pt / Au; electrical traces defined by photolithography; VCSEL current injection electrode, where Ti enhances the adhesion between Au and the semiconductor, and Au's low resistivity reduces losses; Passivation layer 6 is made of polyimide (PI); a polyamic acid precursor solution that, after curing, forms an aromatic polyimide with low CTE, high Tg, and excellent smoothness and chemical stability.
[0049] Polymer lens 8 is made of a special photosensitive polymer, which includes photoresist, two-photon initiator, and multifunctional acrylate monomer.
[0050] The above are all preferred embodiments of this application, and are not intended to limit the scope of protection of this application. Therefore, all equivalent changes made in accordance with the structure, shape and principle of this application should be covered within the scope of protection of this application.
Claims
1. A method for integrating VCSEL arrays using in-situ optical shaping, characterized in that: Includes the following steps, S1. Pre-fabricated glass micropores: Quartz glass is used as a quartz substrate (1), and the three-dimensional contour of the micropores (2) is pre-defined by focusing and scanning the quartz substrate with femtosecond laser pulses. S2. VCSEL array embedding and fixing: High-temperature epoxy resin (3) is precisely distributed to the bottom of the microhole (2) using the needle transfer method. With the assistance of a beam splitter camera, a high-precision flip bonding machine is used to accurately place the VCSEL chip (4) face up into the microhole (2). Heating is used to cure the epoxy resin (3) and firmly fix the VCSEL chip (4). S3, Electrical integration: A metal layer (5) is sputtered on a quartz substrate (1), the circuit pattern is defined by photolithography exposure and development, and excess metal is removed by wet etching to form electrical interconnect tracks; S4. Optical Integration: A liquid negative photoresist is coated on the surface of the sample that has been electrically integrated. Using a two-photon polymerization direct writing system, an immersion lithography method is employed to immerse the sample in the photoresist. The sample is then scanned according to the three-dimensional model of the polymer lens, which triggers the two-photon polymerization of the photoresist and achieves curing, thus completing the fabrication of the polymer lens.
2. The in-situ optical shaping method for VCSEL array integration according to claim 1, characterized in that: Step S1 includes, S11, Femtosecond laser modification: A femtosecond laser pulse is used to focus and scan inside the quartz substrate (1) to predefine the three-dimensional contour of the microhole (2); S12, Selective chemical etching: Using an etchant, chemical wet etching is performed on the femtosecond laser modified quartz substrate (1). The etchant penetrates quickly through the modified sidewalls and then performs horizontal etching from the bottom up, eventually removing the entire unmodified glass block that is surrounded, forming micropores (2). S13. Cleaning and post-treatment: Remove etchant, clean and dry.
3. The in-situ optical shaping method for VCSEL array integration according to claim 2, characterized in that: In step S11, when the femtosecond laser pulse is focused and scanned in the quartz substrate (1), contour scanning is performed to write the contour lines of the bottom and four sidewalls of the microhole (2). The sidewall contours are composed of lines with equal spacing. The corners are rounded to reduce stress concentration. Finally, a closed 3D cage structure contour is formed by the modified material. The cage structure surrounds the unmodified glass block to be removed.
4. The in-situ optical shaping method for VCSEL array integration according to claim 1, characterized in that: Step S3 includes the following steps: S31, Silanization: The surface of the quartz substrate (1) is pretreated with triethoxysilane; S32, Passivation layer (6): PI resin is drop-coated onto the silanized quartz substrate (1) to fill the gap between the VCSEL chip (4) and the micropore (2), and then passivation layer (6) is formed by spin coating to complete curing; S33, Picosecond laser drilling: A picosecond-pulse laser system is used to drill micro-through holes on the passivation layer above the electrodes of the VCSEL chip (4) for subsequent metal interconnection; S34, RIE pretreatment: reactive ion etching is used, and a mixture of O2 and CHF3 gas is introduced to etch the surface of the passivation layer. S35, Photolithography wiring: Ti / Pt layer and Au layer are sputtered in sequence, positive photoresist is coated, circuit pattern is defined by photolithography exposure and development, and excess metal is removed by wet etching to form electrical interconnect tracks.
5. The in-situ optical shaping method for VCSEL array integration according to claim 1, characterized in that: Before optical integration in step S4, a pretreatment is performed on the quartz substrate (1) to improve the adhesion between the photoresist and the substrate.
6. A VCSEL optical interconnect module with in-situ optical forming, characterized in that: The VCSEL array is fabricated using an in-situ optical forming VCSEL array integration method as described in any one of claims 1-5, comprising a quartz substrate (1), a micro-hole (2) formed on the quartz substrate (1), a VCSEL chip (4) disposed in the micro-hole (2), a passivation layer (6) encapsulated on the upper surface of the VCSEL chip (4), a pre-fabricated electrode (7) for electrical connection with the outside provided in the VCSEL chip (4), and a polymer lens (8) provided at the light-emitting area of the VCSEL chip (4).
7. The VCSEL optical interconnect module with in-situ optical forming according to claim 6, characterized in that: An epoxy resin (3) is provided between the VCSEL chip (4) and the quartz substrate (1).
8. The VCSEL optical interconnect module with in-situ optical forming according to claim 6, characterized in that: The polymer lens (8) is made of a photosensitive polymer, including photoresist, two-photon initiator and multifunctional acrylate monomer.