A high-power DFB laser chip and a preparation method thereof

Abstract

The application relates to the technical field of semiconductor lasers, in particular to a high-power DFB laser chip and a preparation method thereof. In the 976nm high-power laser, a Bragg grating is introduced, the grating is buried in a P-type waveguide layer through one-time epitaxy, holographic exposure and etching, and two-time epitaxy, single longitudinal mode, narrow line width and wavelength self-locking are realized, and the temperature drift coefficient is as low as 0.08nm / DEG C. Meanwhile, semicircular, triangular or side slant trapezoidal gratings are prepared in the limiting grooves on the two sides of the ridge waveguide, side mode loss is improved, the multi-light filament phenomenon is suppressed, and the light beam quality is improved. Further, an inclined grating is prepared near the front cavity surface to compress the light beam, the front cavity surface dielectric film is stripped, the electrode directly contacts the semiconductor, and heat dissipation is optimized. The application can increase the strip width and improve the power under the same cavity length, realizes high brightness, small divergence angle, high heat conduction and high power resistance characteristics, and is suitable for high-power fiber laser pump sources.

Description

Technical Field

[0001] This invention relates to the field of semiconductor laser technology, specifically to a high-power DFB laser chip and its fabrication method. Background Technology

[0002] Semiconductor lasers are small, lightweight, and highly efficient, and they are easy to power, compact, portable, maintain, and operate. They can also be efficiently coupled with optical fibers, making them irreplaceable in fields such as biomedicine, artificial suns, steel cutting, and military defense. High-power semiconductor lasers, as the core pump source of fiber lasers, can generate kilowatt-level high-power outputs through beam combining and coupling. Specifically, 976nm semiconductor lasers have an absorption efficiency three times higher than 910nm lasers in ytterbium-doped fibers, with an optical-to-optical conversion efficiency of up to 85%, effectively reducing ineffective heat loss. Furthermore, compared to 910nm, they have a narrower linewidth, are easier to wavelength lock, and have better monochromaticity, but require higher wavelength stability.

[0003] Conventional Fabry-Pérot (FP) cavity lasers are susceptible to wavelength shifts due to environmental factors and high-temperature environments, which in turn affect beam combining efficiency and reduce output power. For example, KR100226434B1 discloses a 0.98μm semiconductor laser structure and its fabrication method using an ion implantation process. This ion implantation process eliminates the refraction central axis of the light output from the bright band generated in conventional 0.98μm semiconductor lasers. Specifically, the charge density implanted into the active layer is controlled by forming an insulating layer on the active layer using an ion implantation process, thus eliminating the unbalanced distribution of light in the longitudinal direction of the resonator. A buffer layer, a first cladding layer, a second buffer layer, an active layer, a third buffer layer, and a second cladding layer are formed sequentially to prevent interference. The ion-implanted region partially formed in the second cladding layer is heat-treated to form insulating layers on the surface and back of the device, followed by high-temperature heat treatment to ensure the ion-implanted region is electrically sound and isolated. A third cladding layer, a fourth buffer layer, and a negative contact layer are sequentially formed on the second cladding layer using secondary crystal growth. Using a second insulating film formed on the negative contact layer as a mask, the ridge and channel portions are etched onto the third buffer layer, giving the active layer a predetermined width. The third insulating film is used to form current injection holes on the upper part of the ridge. A first conductivity type electrode is formed on the entire surface of the third insulating film. This patent primarily uses an ion implantation process to change the material conductivity, thereby forming isolated current injection and eliminating the unbalanced distribution of light in the longitudinal direction of the resonant cavity.

[0004] In addition, distributed feedback (DFB) lasers are another existing technology. Compared to FP lasers, DFB lasers do not rely on end-face mirrors for feedback; instead, they rely on Bragg gratings with continuously distributed feedback at equal intervals. When a forward current is injected into the active region of the laser, electron-hole pairs recombine, emitting corresponding photons. These photons are continuously reflected by the grating fringes, thus forming optical feedback, known as Bragg reflection. In DFB lasers, it is this optical feedback caused by Bragg reflection that couples the forward and backward light waves in the active region, causing them to influence each other. The longitudinal mode selection mechanism of DFB laser devices is determined by the Bragg condition, meaning that only light waves with wavelengths satisfying the Bragg condition can achieve stable feedback between two beams of light with opposite directions. Light waves far from the Bragg wavelength cannot form feedback and therefore cannot continuously reflect and amplify the gain. This design has been widely used in the field of optical communication.

[0005] However, the aforementioned existing technologies still have the following problems: conventional FP lasers are prone to wavelength drift, making it difficult to meet the wavelength stability requirements of a 976nm pump source; although ion implantation can improve the optical field distribution, the process is complex and does not solve the wavelength locking problem; and existing DFB lasers are mainly used in the field of optical communication, and when applied in the field of high-power lasers, they still face challenges such as side-mode instability, poor beam quality, and insufficient heat dissipation at the front cavity surface. Therefore, there is an urgent need for a laser chip structure and its fabrication method that can achieve narrow linewidth, wavelength locking, beam concentration, and good heat dissipation at high power. Summary of the Invention

[0006] The purpose of this invention is to overcome the shortcomings of the prior art and provide a high-power DFB laser chip and its fabrication method.

[0007] The technical solution of this invention is implemented as follows: In a first aspect, the present invention proposes a method for fabricating a high-power DFB laser chip, comprising the following steps: S1. An epitaxial layer is sequentially grown on a substrate, wherein the epitaxial layer includes at least an active layer, a grating layer, a P-type waveguide layer and a P-type contact layer; S2. Prepare periodically distributed Bragg gratings on the grating layer; S3. Perform secondary epitaxial growth on the Bragg grating to cover the Bragg grating; S4. Etching to form the ridge waveguide platform; S5. Restriction trenches are etched on both sides of the ridge waveguide platform, and a side-mode suppression grating is fabricated in the restriction trenches; S6. Deposit a dielectric film and remove the dielectric film at the top and / or front cavity surface region of the ridge waveguide platform to form an electrode window; S7. Prepare the P-side electrode and the N-side electrode.

[0008] Preferably, the side-mode suppression grating includes a semi-circular grating or a triangular grating.

[0009] Preferably, the semi-circular grating is prepared by isotropic wet etching, and the triangular grating is prepared by anisotropic dry etching.

[0010] Preferably, the fabrication of the Bragg grating includes: forming a photoresist grating pattern, and then transferring the pattern to the grating layer by dry etching.

[0011] Preferably, the dry etching includes a first etching and a second etching. The first etching uses chlorine-containing gas to form a basic grating outline, and the second etching uses inert gas over-etching to narrow the top of the grating to form an inverted trapezoidal cross section.

[0012] Preferably, the method further includes: fabricating a tilted grating on the grating layer on the front cavity surface, wherein the direction of the grating stripes of the tilted grating forms an acute angle with the axis of the resonant cavity.

[0013] Preferably, the tilted grating and the Bragg grating are formed simultaneously through the same patterning step.

[0014] Preferably, removing the dielectric film includes: completely peeling off the dielectric film in the front cavity surface region, so that the semiconductor material in that region is directly exposed for electrode contact.

[0015] In a second aspect, the present invention provides a high-power DFB laser chip, which is prepared using the method described in the first aspect, comprising: Substrate and epitaxial layer formed thereon; A Bragg grating located within a P-type waveguide layer; Ridge waveguide platform; Side-mode suppression gratings located in the confinement trenches on both sides of the ridge waveguide platform; The dielectric film covers all areas except the top of the ridge waveguide platform and the front cavity surface region. P-surface electrode in contact with the top of the ridge waveguide platform and the front cavity surface region.

[0016] Preferably, the chip further includes a tilted grating located within the front cavity surface grating layer, wherein the grating stripe direction of the tilted grating is not parallel to the resonant cavity axis.

[0017] Compared with the prior art, the advantages of the present invention are as follows: (1) This invention achieves single-mode gain by fabricating periodically distributed DFB distributed feedback gratings inside a 976nm high-power semiconductor laser, exhibiting narrow linewidth and dynamic single-mode operation characteristics. The DFB laser can suppress mode hopping of FP lasers over a wider operating temperature and current range, greatly improving the noise characteristics of the device. Simultaneously, this invention enables the pump source to output a 976nm narrow-spectrum laser, and the absorption coefficient of the pump light from the ytterbium-doped fiber is approximately 1.5 times higher than that from 915nm, effectively reducing heat loss and improving the stability of laser power.

[0018] (2) This invention prepares semi-circular or triangular gratings by limiting trenches on both sides of the chip, and combines them with tilted gratings on both sides of the front cavity surface, so that photons on both sides cannot resonate and are lost, thereby enhancing the main mode gain to a certain extent. This can reduce side modes, improve light intensity distribution, and make the beam more concentrated. Compared with traditional designs, it has the advantages of smaller and more concentrated front cavity surface spot and smaller longitudinal mode divergence angle.

[0019] (3) Under the premise of the same cavity length, the present invention can achieve high power output by increasing the strip width (increasing the strip width by 1μm will increase the output power by about 0.1W), enhancing the main mode resonance, and optimizing heat dissipation by combining the thermal conductive medium film on the front cavity surface.

[0020] (4) The present invention optimizes the thermal conductive medium film on the front cavity surface, which effectively improves the heat dissipation efficiency of the chip front cavity surface, thereby enhancing the reliability and lifespan of the device under high power operating conditions.

[0021] (5) This invention enables the Gaussian beam output by a semiconductor laser to be coupled with high energy and high efficiency, effectively improving the total output power, and is suitable for applications such as pump sources for high-power fiber lasers. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a flowchart illustrating the fabrication process of the high-power DFB laser chip of the present invention; Figure 2 This is a schematic diagram of the cross-sectional structure of the FP laser chip of the present invention; Figure 3 This is a schematic diagram of the semi-circular, triangular, and trapezoidal side-side mode suppression gratings within the confinement trench of the FP laser chip of the present invention; Figure 4This is a schematic diagram of the cross-sectional structure of the DFB laser chip of the present invention; Figure 5 This is a schematic diagram of the semi-circular, triangular, and trapezoidal side-side mode suppression gratings within the confinement trench of the DFB laser chip of the present invention; Figure 6 The far-field divergence angle test peak spectrum of the conventional FP laser chip prepared for Comparative Example 1; Figure 7 The far-field divergence angle test peak spectrum of the FP laser chip after adding semi-circular side-mode suppression gratings on both sides in Example 1; Figure 8 The far-field divergence angle test peak spectrum of the FP laser chip after adding side-mode suppression gratings on both sides in Example 2; Figure 9 The wavelength of the conventional FP laser chip prepared for Comparative Example 1 is measured as a function of different current spectral shifts. Figure 10 The wavelength of the DFB laser chip prepared in Example 4 is measured as a function of different current spectral shifts. Detailed Implementation

[0024] The embodiments of the present invention are described in detail below. These embodiments are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0025] The lasing wavelength of a semiconductor laser is determined by its bandgap (Eg) and must also satisfy the standing wave condition within the resonant cavity. This condition determines the fine structure of the lasing wavelength, i.e., the longitudinal mode spectrum. Because there is no loss difference between different oscillation wavelengths and the gain difference is small, multi-mode oscillation is prone to occur. Typically, the longitudinal mode spacing of a semiconductor laser is 0.5–1 nm, while the gain spectral width reaches tens of nanometers. The optimal absorption peak of pump light in ytterbium-doped fiber is 976 nm, requiring the semiconductor laser to be a single longitudinal mode. Furthermore, reducing the number of longitudinal modes is a necessary condition for obtaining a narrow spectral linewidth, as a narrow linewidth helps reduce the influence of fiber dispersion. This invention employs a DFB resonant feedback mechanism to selectively enhance the dominant mode oscillation and increase the loss difference between the dominant mode and side modes. Its wavelength temperature drift coefficient is only 0.08 nm / ℃, far less than the 0.4 nm / ℃ of an FP laser. Utilizing a gain-coupled DFB laser can effectively reduce or eliminate the spatial hole burning effect and lower the linewidth enhancement factor. By directly etching a periodic grating into the active region, single longitudinal mode, narrow linewidth, and wavelength self-locking are achieved.

[0026] When the active region of a high-power semiconductor laser is wide, the near-field optical field exhibits multifilamentation, while the far-field shows multi-side-mode intensity distribution, which can easily cause "bends" in the PI characteristic curve, affecting fiber coupling efficiency and preventing focusing into a small spot. This invention fabricates semi-circular, triangular, or front-cavity tilted grating structures within the confinement trenches on both sides of the chip to increase side-mode loss, preventing side-mode resonance and causing them to be lost. Simultaneously, due to the loss of side modes, the main mode oscillation loss is correspondingly reduced. Based on this mechanism, under the same cavity length, by increasing the stripe width, enhancing the main mode resonance, and optimizing the front-cavity surface thermal conductive dielectric film, high brightness, small divergence angle, high thermal conductivity, and high power tolerance characteristics can be achieved.

[0027] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0028] In this document, the terms “containing,” “comprising,” or “including” are open-ended expressions, meaning they include the contents specified in this invention but do not exclude other aspects.

[0029] In this document, the terms “optional,” “optionally,” or “optional” generally refer to an event or condition that may, but may not, occur, and the description includes both cases in which the event or condition occurs and cases in which the event or condition does not occur.

[0030] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present invention.

[0031] Unless otherwise specified, all reagents used in this invention can be purchased from the market.

[0032] Comparative Example 1

[0033] This comparative example provides a Fabry-Perot (FP) semiconductor laser chip and its fabrication method, including the following steps: (1) Using an MOCVD device, the following layers were grown sequentially on a (100) oriented GaAs substrate: an 800 nm N-type GaAs buffer layer, a 3400 nm N-type AlGaAs cladding layer, a 1000 nm N-type AlGaAs waveguide layer, a 100 nm InGaAs quantum well layer, a 600 nm P-type AlGaAs waveguide layer, a 1500 nm P-type AlGaAs cladding layer, and a 200 nm P-type GaAs contact layer to obtain a GaAs epitaxial wafer; (2) A 1500 nm thick photoresist is coated on the GaAs epitaxial wafer, and a ridge waveguide mask pattern is formed by photolithography; the strip width (along the lateral direction) of the ridge waveguide is 500 μm, and the length direction of the ridge waveguide is parallel to the axis of the resonant cavity (i.e. the direction from the front cavity surface to the rear cavity surface), which is 6000 μm. The GaAs contacts were etched using a wet DSP solution to produce light, with an etching depth of 200 nm. A 114 solution was then used to further deepen the etching, stopping at the P-type AlGaAs cladding layer, effectively removing the P-GaAs contact layer and etching down to remove the 1800 nm thick P-type AlGaAs cladding. After etching, the angle between the sidewalls of the ridge waveguide and the vertical direction (i.e., the substrate normal direction) was 90 ± 1°. Simultaneously, the P-GaAs contact layer in the front cavity surface region (extending 30 μm inward from the front cavity surface) was removed using the same mask, with the etching depth being the same as that of the ridge waveguide mesa. (3) Photoresist is coated again, and a confinement trench mask is formed by photolithography. The confinement trenches are located on both sides of the ridge waveguide mesa. The width of each confinement trench (along the lateral direction) is 20 μm, and the horizontal distance between the inner edge of the trench and the outer edge of the ridge waveguide mesa is 35 μm. Wet etching with 114 solution is used, and the etching depth is 5100 nm. The etching stops at the N-type cladding, specifically at a depth of 5100 nm from the epitaxial wafer surface downwards. After etching, symmetrical confinement trenches are formed on both sides of the ridge waveguide mesa. The bottom of the trenches is flat, and the angle between the sidewalls and the vertical direction is approximately 70°. Figure 2 As shown; (4) A 150 nm thick Si3N4 dielectric film is deposited on the entire wafer surface using PECVD at a deposition temperature of 270 °C; photoresist is coated and the area at the top of the ridge waveguide is exposed by photolithography; the window width (along the lateral direction) is 480 μm, the window length is the same as the ridge waveguide length, and the center of the window is aligned with the center of the ridge waveguide; dry etching is used to remove the Si3N4 dielectric film in the window and expose the underlying P-type GaAs contact layer; (5) Coating photoresist, and removing the photoresist in the front cavity surface area (extending 30 μm inward from the front cavity surface, covering the entire ridge waveguide mesa and part of the confinement trenches on both sides) by photolithography and development; using RIE dry etching, completely stripping the exposed Si3N4 dielectric film in this area, exposing the underlying semiconductor material (including the top of the ridge waveguide, the ridge sidewalls, and the bottom of the confinement trenches); the dielectric film in the remaining areas is retained; (6) Sputtering P-side metal stack: Ti (15 nm) / Pt (75 nm) / Au (200 nm); Performing a lift-off process: Immerse the wafer in acetone to remove the photoresist and the metal on it, leaving only the metal electrodes in the ridge waveguide window area and the front cavity surface lift-off area; The formed P-side electrode covers the entire length of the top of the ridge waveguide and extends forward to cover the front cavity surface lift-off area, with a distance of 10 μm from the edge of the front cavity surface; Photoresist is applied again, and the entire ridge waveguide region (500 μm wide, cavity length the same as the ridge waveguide) is exposed and developed. A 3000 nm thick Au layer is electroplated or sputtered, and then the photoresist is stripped to form a thickened electrode and reduce the series resistance. The wafer is attached to a thinning fixture, and the GaAs substrate is thinned to 135 using a polishing machine. Then, chemical mechanical polishing (CMP) is performed to remove the damaged layer and release mechanical stress. (7) Sputter an N-side metal stack: Ni (15 nm) / Au (100 nm) / Ge (15 nm) / Au (200 nm) on the thinned N-side (back side of the substrate); perform RTP rapid annealing for 60 seconds at 430 °C in N2 atmosphere to form ohmic contacts; sputter a 200 nm Au layer to enhance conductivity; dic and cleave the finished wafer to form laser bars with a cavity length of 6 mm and a width of 20 mm along the cleavage plane; the front cavity surface is the light-emitting surface and the back cavity surface is the reflective surface; evaporate a 132 nm thick Al2O3 antireflection film on the front cavity surface with an electron beam, with a reflectivity of 2%; evaporate a 600 nm thick TiO2 / SiO2 distributed Bragg reflector (DBR) high-reflectivity film on the back cavity surface with an electron beam, with a reflectivity of 98% at the center wavelength of 976 nm; finally, a FP high-power semiconductor laser chip is obtained.

[0034] Example 1

[0035] This embodiment provides a high-power Fabry-Perot (FP) semiconductor laser chip and its fabrication method. Based on Comparative Example 1, the side modes are suppressed by fabricating semi-circular gratings in the confinement trenches on both sides of the chip. The difference from Comparative Example 1 lies in step (3): A 1500 nm thick photoresist layer is coated, and a semi-circular photoresist pattern is formed in the confinement trench region using grayscale photolithography. The radius of the semicircle is 150 nm, and the center-to-center spacing (period) between adjacent semicircles is 300 nm. The semi-circular pattern is continuously repeated along the length of the confinement trench, covering the entire length of the trench (from the front cavity surface to the back cavity surface). ICP dry etching is used to transfer the semi-circular pattern to the underlying semiconductor layer. The etching depth is 5100 nm, and etching stops at the N-type cladding layer. Figure 3 As shown; After etching, a series of semi-cylindrical protrusions are formed in the confinement trench, with a radius of 150 nm, a depth of 5100 nm, and a period of 300 nm; the semi-circular gratings in the confinement trenches on both sides of the ridge waveguide platform are symmetrical to each other.

[0036] The remaining steps are consistent with those of Comparative Example 1; a high-power FP semiconductor laser with a semi-circular side-mode suppression grating is obtained.

[0037] Example 2

[0038] This embodiment provides a high-power Fabry-Perot (FP) semiconductor laser chip and its fabrication method. Based on Comparative Example 1, it achieves suppression of side modes by fabricating triangular gratings in the confinement trenches on both sides of the chip; the difference from Comparative Example 1 lies in step (3), which is as follows: A 1500 nm thick photoresist layer is coated, and an isosceles triangular photoresist pattern is formed in the confinement trench region using grayscale photolithography. The base length of the triangle (along the length of the confinement trench) is 150 nm, the height of the triangle (along the vertical direction) is 130 nm, and the center-to-center distance (period) between the bases of adjacent triangles is 200 nm. The triangular pattern is continuously repeated along the length of the confinement trench, with the vertices of the triangles facing the ridge waveguide mesa. ICP dry etching is used to transfer the triangular pattern to the underlying semiconductor layer. The etching depth is 5100 nm, and etching stops at the N-type cladding. Figure 3 As shown; After etching, a series of V-shaped grooves are formed in the confinement trench, with a bottom edge length of 150 nm, a depth of 130 nm, and a period of 200 nm; the triangular gratings in the confinement trenches on both sides of the ridge waveguide platform are symmetrical to each other.

[0039] The remaining steps are consistent with those of Comparative Example 1; a high-power FP semiconductor laser with a triangular side-mode suppression grating is obtained.

[0040] Example 3

[0041] This embodiment provides a method for fabricating a high-power distributed feedback (DFB) semiconductor laser chip, which combines a Bragg grating and a triangular side-mode suppression grating; the difference from Embodiment 2 lies in steps (1) and (2), specifically: (1) Using an MOCVD device, the following layers were grown sequentially on a (100) oriented GaAs substrate: an 800 nm N-type GaAs buffer layer, a 3400 nm N-type AlGaAs cladding layer, a 1000 nm N-type AlGaAs waveguide layer, a 100 nm InGaAs quantum well layer, a 100 nm GaAsP grating core layer, and a 50 nm GaInP gain core layer to obtain a GaAs primary epitaxial wafer. (2) A 200 nm thick anti-reflection primer (BARC) and a 130 nm thick photoresist are coated on a primary epitaxial wafer; a holographic exposure device (350 nm wavelength laser) is used for dual-beam interference exposure with an exposure dose of 1 mJ / cm². 2 After 80 seconds of development, a photoresist grating pattern with a period of Λ=300 nm is formed; the direction of the grating fringes is perpendicular to the subsequent ridge waveguide length direction (i.e., the resonant cavity axis); the duty cycle of the grating (i.e., the ratio of the photoresist ridge width to the period) is 40%. ICP dry etching was used with Cl2 / BCL3 as the etching gas (flow rates of 6 sccm / 12 sccm, respectively), ICP power of 400 W, bias power of 100 W, to etch the GaInP gain core layer and GaAsP grating core layer to a depth of 100 nm; after etching, a basic rectangular grating outline was formed. Ar gas (flow rate 20 sccm, ICP power 300 W, bias power 60 W) was used for over-etching for 30 seconds. The physical bombardment effect of Ar narrowed the top of the grating, forming an inverted trapezoidal cross-sectional profile. The top width of the inverted trapezoid was 100 nm, the bottom width was 120 nm, and the angle between the sidewalls and the vertical direction was 110°. The final grating period was Λ = 300 nm, the etching depth was 110 nm, and the duty cycle (bottom width / period) was 40%. Figure 4-5 As shown; The etched wafer is placed in an MOCVD device, and secondary epitaxy is performed on the grating layer to grow the following layers in sequence: a 600 nm P-type AlGaAs waveguide layer, a 1500 nm P-type AlGaAs cladding layer, and a 200 nm P-type GaAs contact layer. The growth conditions should ensure that the grating grooves are completely filled and the surface is planarized. After secondary epitaxy, the total thickness of the P-type waveguide layer reaches 2100 nm.

[0042] The remaining steps are consistent with those in Example 2; a high-power DFB laser chip with a DFB Bragg grating and a triangular side-mode suppression grating is obtained.

[0043] Example 4

[0044] This embodiment provides a method for fabricating a high-power distributed feedback (DFB) semiconductor laser chip. Based on embodiment 3, a tilted grating is further fabricated near the light-emitting surface of the front cavity to achieve beam compression. The difference from embodiment 3 lies in steps (1) and (2), specifically: (1) Using an MOCVD device, the following layers were grown sequentially on a (100) oriented GaAs substrate: an 800 nm N-type GaAs buffer layer, a 3400 nm N-type AlGaAs cladding layer, a 1000 nm N-type AlGaAs waveguide layer, a 100 nm InGaAs quantum well layer, a 100 nm GaAsP grating core layer, and a 50 nm GaInP gain core layer to obtain a GaAs primary epitaxial wafer. (2) A 200 nm thick anti-reflection primer (BARC) and a 130 nm thick photoresist are coated on a single epitaxial wafer; a single exposure is performed using a phase mask method, wherein the phase mask has two diffraction grating regions with different orientations: in the region corresponding to the middle and rear of the chip (the region extending forward from the rear cavity surface for more than 4000 μm), the phase mask generates an interference pattern with a period of Λ=300 nm and a fringe direction parallel to the resonant cavity axis (i.e., perpendicular to the length direction of the subsequent ridge waveguide), which is used to form a straight Bragg grating; in the region corresponding to the area near the front cavity surface (the region extending inward from the front cavity surface for 2000 μm), the phase mask generates an interference pattern with a period of Λ=300 nm, but the fringe direction is at an angle θ=45° with the resonant cavity axis, which is used to form a tilted grating; After development, straight grating patterns and tilted grating patterns are simultaneously formed on the photoresist, and the two are smoothly connected at the interface; the distribution area of ​​the tilted grating extends 75 μm from the edge of the front cavity surface into the cavity, and the lateral range covers the entire width of the ridge waveguide strip (150 μm). ICP dry etching was used with Cl2 / BCL3 as the etching gas (flow rates of 6 sccm / 12 sccm, respectively), ICP power of 400 W, bias power of 100 W, to etch the GaInP gain core layer and GaAsP grating core layer to a depth of 100 nm; after etching, the basic rectangular outlines of the straight grating and the tilted grating were formed. Ar gas (flow rate 20 sccm, ICP power 300 W, bias power 60 W) was used for over-etching for 30 seconds. The physical bombardment effect of Ar narrowed the top of the grating, forming an inverted trapezoidal cross-sectional profile. The top width of the inverted trapezoid was 100 nm, the bottom width was 120 nm, and the angle between the sidewalls and the vertical direction was 110°. The final grating period was Λ = 300 nm, the etching depth was 110 nm, and the duty cycle (bottom width / period) was 40%. Figure 4-5 As shown; The etched wafer is placed in an MOCVD device, and secondary epitaxy is performed on the grating layer to grow the following layers in sequence: a 600 nm P-type AlGaAs waveguide layer, a 1500 nm P-type AlGaAs cladding layer, and a 200 nm P-type GaAs contact layer. The growth conditions should ensure that the grating grooves are completely filled and the surface is planarized. After secondary epitaxy, the total thickness of the P-type waveguide layer reaches 2100 nm.

[0045] The remaining steps are consistent with those in Example 3; a high-power DFB laser chip with a DFB Bragg grating, a triangular side-mode suppression grating and a front cavity tilt grating is obtained.

[0046] To verify the technical effect of the present invention, the far-field divergence angle and wavelength drift with current were tested on the laser chips prepared in Example 1, Example 1, 2 and Example 4 respectively.

[0047] The testing method is as follows: using a far-field divergence angle testing system, under the conditions of room temperature (25℃) and continuous current injection of 35A, the far-field divergence angles in the fast and slow axis directions of the laser chip are measured, and the energy distribution of the far-field spot is recorded; using an OSA spectrometer, at room temperature, the operating current is gradually increased from the threshold current of 2A, the peak wavelengths at different currents are recorded, and the wavelength shift with current (nm / A) is calculated.

[0048] Figure 6 The peak spectrum of the far-field divergence angle of the conventional FP laser chip prepared for Comparative Example 1 shows that the red peak represents the fast axis divergence angle, and its spectrum exhibits a clear Gaussian distribution with multiple peaks; the blue peak represents the slow axis distribution, and the larger the difference between the two axes divergence angles, the more severe the far-field spot distortion.

[0049] Figure 7 The far-field divergence angle test peak spectrum of the FP laser chip after adding semi-circular side-mode suppression gratings on both sides in Example 1 shows that by adding semi-circular side-mode suppression gratings to the limiting grooves on both sides, the difference between the fast and slow axis spectra is smaller, and the fast axis filamentation phenomenon is significantly improved.

[0050] Figure 8 The far-field divergence angle test peak spectrum of the FP laser chip after adding side-mode suppression gratings on both sides in Example 2 was obtained. By comparing the divergence angle data of Example 1 and Example 2, it was concluded that the difference between the fast and slow axes in Example 2 was smaller and the spot was more uniform. This indicates that the side-mode suppression gratings on both sides effectively optimized and improved the spectral quality, making the energy distribution of the spot more concentrated.

[0051] Figure 9The wavelength shift of the conventional FP laser chip prepared for Comparative Example 1 with different currents is shown in the test graph. It can be seen that when tested at 25℃, the temperature rise caused by the increase of injection current, combined with the change of charge carriers, leads to a wavelength redshift. The wavelength redshift of 3~35A is 11nm.

[0052] Figure 10 The test graphs of the wavelength spectral shift of the DFB laser chip prepared in Example 4 with different currents show that the addition of side-mode suppression gratings on both sides effectively optimizes and improves the spectral quality, making the energy distribution of the light spot more concentrated; and the wavelength locking is achieved by combining the DFB grating, with the wavelength shift with currents of 3A~35A being only 1.2nm; thus achieving the goal of high spectral quality and narrow linewidth.

[0053] The embodiments described above are some, but not all, of the embodiments of the present invention; the detailed description of the embodiments of the present invention is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention; all other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

Claims

1. A method for fabricating a high-power DFB laser chip, characterized in that, Includes the following steps: S1. An epitaxial layer is sequentially grown on a substrate, wherein the epitaxial layer includes at least an active layer, a grating layer, a P-type waveguide layer and a P-type contact layer; S2. Prepare periodically distributed Bragg gratings on the grating layer; S3. Perform secondary epitaxial growth on the Bragg grating to cover the Bragg grating; S4. Etching to form the ridge waveguide platform; S5. Etch confinement trenches on both sides of the ridge waveguide platform and fabricate side-mode suppression gratings within the confinement trenches; S6. Deposit a dielectric film and remove the dielectric film at the top and / or front cavity surface region of the ridge waveguide to form an electrode window; S7. Prepare the P-side electrode and the N-side electrode.

2. The method according to claim 1, characterized in that, The side-mode suppression grating includes a semi-circular grating or a triangular grating.

3. The method according to claim 2, characterized in that, The semi-circular grating is prepared by isotropic wet etching, and the triangular grating is prepared by anisotropic dry etching.

4. The method according to claim 1, characterized in that, The fabrication of the Bragg grating includes: forming a photoresist grating pattern, and then transferring the pattern to the grating layer by dry etching.

5. The method according to claim 4, characterized in that, The dry etching process includes a first etching and a second etching. The first etching uses chlorine-containing gas to form a basic grating outline, and the second etching uses inert gas to over-etch, narrowing the top of the grating to form an inverted trapezoidal cross-section.

6. The method according to claim 1, characterized in that, Also includes: A tilted grating is fabricated on the grating layer on the front cavity surface, wherein the direction of the grating stripes of the tilted grating forms an acute angle with the axis of the resonant cavity.

7. The method according to claim 6, characterized in that, The tilted grating and the Bragg grating are formed simultaneously through the same patterning step.

8. The method according to claim 1, characterized in that, Removing the dielectric film includes completely peeling off the dielectric film in the front cavity surface region, so that the semiconductor material in that region is directly exposed for electrode contact.

9. A high-power DFB laser chip, characterized in that, Prepared using the method according to any one of claims 1-8, comprising: Substrate and epitaxial layer formed thereon; A Bragg grating located within a P-type waveguide layer; Ridge waveguide platform; Side-mode suppression gratings located in the confinement trenches on both sides of the ridge waveguide platform; The dielectric film covers all areas except the top of the ridge waveguide platform and the front cavity surface region. P-surface electrode in contact with the top of the ridge waveguide platform and the front cavity surface region.

10. The chip according to claim 9, characterized in that, The chip also includes a tilted grating located in the front cavity surface grating layer, wherein the grating stripe direction of the tilted grating is not parallel to the resonant cavity axis.

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