A low-area, high-reliability pure intra-frame video encoding system and method
By using a pure intra-frame video coding system, eliminating inter-frame prediction and external storage dependencies, and trimming intra-frame prediction units, the area and reliability issues of the HEVC hardware system are solved, achieving low-area, high-reliability video coding results.
Patent Information
- Application Number
- CN202610554690.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-04-24
- Publication Date
- 2026-07-17
AI Technical Summary
Existing HEVC video coding hardware systems suffer from problems such as redundant chip logic area, excessive on-chip storage resource overhead, severe bit error propagation, and uncertain coding delay due to compatibility with full-size prediction units and inter-frame prediction modes.
A pure intra-frame video coding system is adopted, completely eliminating inter-frame prediction loops and external memory dependencies. By physically trimming intra-frame prediction units, a compact line buffer and physically trimmed intra-frame prediction module are designed to achieve independent NAL unit output.
It significantly reduces hardware area and storage overhead, eliminates external storage dependence, achieves ultra-low coding latency and high error resistance, meets industrial-grade real-time requirements, and comprehensively improves power consumption and throughput.
Smart Images
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