Wafer scanning image plane visualization dynamic loading rendering method and system

Abstract

The application discloses a wafer scanning image plane visualization dynamic loading rendering method and system, and the system comprises a layout analysis and parameter initialization module, a multi-thread index construction module, a panoramic bottom layer static rendering module, a viewport adaptive switching module, a dynamic resource scheduling module and a cyclic rendering updating module. The method realizes automatic switching rendering of a thumbnail and a high-definition image by constructing a global layered index library and a panoramic thumbnail base map, and comparing the number of images in a screen viewport with a preset threshold in real time. Meanwhile, in combination with a preloading mechanism based on operation vector prediction and a two-stage hierarchical release strategy of images outside the viewport, high-definition instant display of local microscopic defects is realized while ensuring smooth panoramic browsing. The application greatly reduces system resource occupation, and realizes non-jitter visualization interaction of about 500,000 wafer images of 10 TB scale.

Description

Technical Field

[0001] This invention relates to the field of image data processing and visualization technology in semiconductor testing and manufacturing processes, specifically to a dynamic loading and rendering method and system for planar visualization of ultra-large capacity wafer scanning images. Background Technology

[0002] In industrial applications such as semiconductor wafer micro-defect detection, morphology analysis, and die quality inspection, equipment performs high-precision full-area scanning of the entire wafer, generating massive amounts of high-definition microscopic scan images. For example, a single batch of 12-inch wafer inspection can generate over 500,000 scan images, with a total storage capacity of 10TB or more. Furthermore, each raw image contains independent wafer position coordinates and microscopic inspection data, serving as the core data carrier for wafer defect localization, yield analysis, and process optimization.

[0003] Faced with such a massive amount of independent high-definition microscopic images that need to be stitched together for viewing, how to achieve smooth panoramic display and rapid high-definition magnification of local areas is the core challenge of current automated visual inspection systems.

[0004] Traditional wafer image visualization and rendering technologies mostly employ full loading, single-threaded frame-by-frame reading, or fixed-resolution rendering modes, which have the following significant drawbacks:

[0005] (1) High resource consumption can easily cause crashes: For TB-level wafer images, direct full loading will occupy a large amount of memory and video memory resources, which can easily lead to system lag, crashes or loading timeouts.

[0006] (2) Thumbnail static display lacks detail: If a low-resolution static display is used only to pursue display speed, it will result in serious frame loss or blurry information, which cannot meet the actual needs of inspectors to zoom in and view the details of micro-defects.

[0007] (3) Lack of dynamic viewport adaptation mechanism: It is impossible to adaptively switch the rendering resolution according to the number of images in the actual display area of ​​the screen and the user's high-frequency operations such as zooming and panning. There are common pain points such as "stuttering in panoramic browsing, blurring when zooming in, and delay in screen switching". This makes it difficult to efficiently connect automated inspection and manual review, which seriously restricts the industrial yield and detection efficiency. Summary of the Invention

[0008] The objective of this invention is achieved through the following technical solutions.

[0009] This invention aims to solve the problems in the prior art of panoramic visualization of ultra-large-scale wafer images, such as high resource consumption during full loading, lack of detail in static display, lag in dynamic interaction, and slow switching between multiple resolutions.

[0010] To achieve the above objectives, this invention provides a method for dynamic loading and rendering of ultra-large capacity wafer scan images for planar visualization, comprising the following steps:

[0011] Step 1: Global Layout Analysis and Parameter Initialization

[0012] After system startup, metadata information for all scanned images in the current batch is read in batches. The wafer Cartesian plane coordinates (X / Y), physical dimensions, pixel dimensions, unique image ID, and disk storage path are extracted for each image. Based on the actual wafer layout rules, all image coordinates are integrated to construct a two-dimensional planar layout matrix that reconstructs the physical distribution relationship of the entire wafer.

[0013] The initialization of all system operating parameters is completed synchronously. This includes: setting the visualization canvas size and coordinate system; initializing the thread pool and setting the maximum concurrency; configuring the critical high-definition rendering switching threshold N (e.g., setting it to 10 images) for subsequent differentiation of browsing modes; and configuring thumbnail specifications, cache directory, index storage path, and resource release time thresholds. After completion, pre-verification checks such as file readability and coordinate integrity are performed.

[0014] Step 2: Multi-threaded batch processing and global index building

[0015] The system calls an adaptive thread pool, which dynamically allocates concurrent threads based on the real-time load of the workstation's CPU and memory, and reads massive amounts of high-definition original images from the disk array in batches asynchronously, avoiding the problems of low efficiency of single threads and excessively high instantaneous I / O peaks.

[0016] Each worker thread executes the same processing logic: read a single high-resolution original image, generate a standard thumbnail of uniform size (e.g., 180×120 pixels) using a proportional compression algorithm, and write the thumbnail to the local high-speed SSD cache directory.

[0017] Simultaneously, a structured global relational index is built. Each record in this index serves as a minimum relational unit, containing: a unique image ID, X / Y coordinates, the path to the high-resolution original image, the path to the thumbnail cache, the current rendering state, and a cache expiration flag. The index employs a hierarchical storage architecture: all data is persistently stored to disk files, while the image indexes within the current viewport and its surrounding preset number of rings are loaded into a high-speed memory cache layer, enabling millisecond-level fast retrieval. After processing, the system marks the index as available.

[0018] Step 3: Rendering the panoramic bottom-layer static thumbnail

[0019] The visualization canvas uses the aforementioned two-dimensional planar layout matrix as a basis, traverses the index library, reads thumbnail resources, and performs static rendering of all thumbnails on the canvas's bottom layer, forming a non-clearable panoramic wafer thumbnail base map. This bottom layer is persistent, allowing users to perform panning, zooming, and selection operations on it without any lag, providing a direct view of the wafer's macroscopic morphology and large-scale defect distribution.

[0020] Step 4: Adaptive rendering switching based on the number of viewport images

[0021] The system initiates a real-time viewport monitoring thread to collect the coordinate range of the visible viewport at a fixed frequency, and counts the total number M of images contained within the current viewport. M is then compared with a preset high-definition rendering switching threshold N, and a differentiated rendering strategy is executed accordingly.

[0022] Global browsing scenario (M>N): When the user performs large-scale panning or zooming operations, and there are many images within the viewport, the system determines it to be in panoramic browsing mode. It keeps only displaying the underlying thumbnails and does not trigger the loading of high-resolution images to ensure smooth operation with minimal resource consumption.

[0023] Detailed local inspection scene (M≤N): As the user continuously zooms in on the canvas, the viewport coverage shrinks until the number of images is less than or equal to N. The system automatically identifies this as a scene for microscopic defect verification and immediately triggers a high-resolution image replacement rendering mechanism.

[0024] Step 5: Viewport-linked dynamic resource scheduling and tiered release

[0025] The system monitors canvas panning and zooming operations in real time. Upon triggering an operation, it immediately refreshes the viewport boundaries, accurately identifies images newly entering and exiting the viewport, and performs the following processing in parallel:

[0026] New viewport processing: Start an asynchronous I / O thread to load the corresponding high-resolution original image, generate a high-resolution rendering layer, and overlay it onto the corresponding coordinates to cover the original thumbnail, thereby achieving high-resolution display of a local area.

[0027] Viewport Pre-loading: The system captures the user's mouse dragging and scroll wheel zooming movements and vectors in real time, predicting the next movement direction and coverage area of ​​the viewport. For surrounding images predicted to enter the viewport, their high-resolution resources are asynchronously pre-loaded. When these images officially enter the viewport, layer switching can be completed directly, completely eliminating high-resolution image loading delays and achieving seamless transitions.

[0028] Exiting the viewport and hierarchical resource release: For images leaving the visible area, high-definition resources are unloaded, and a two-level hierarchical release mechanism is adopted:

[0029] Short-term cache level: If an image repeatedly enters and exits the viewport within a short period of time (e.g., within 3 seconds), its high-definition resources are retained in the memory / video memory cache to avoid performance waste caused by repeated I / O loading.

[0030] Complete Release Level: If an image is far from the viewport and has not been accessed for a long time beyond the preset time limit, its high-definition rendering layer will be destroyed immediately, completely releasing the memory, video memory and file handle resources it occupies, retaining only the index library records and the underlying thumbnail, and preventing memory leaks.

[0031] Step Six: Loop and Dynamically Render Updates

[0032] The system integrates viewport monitoring, viewport refresh, high-definition loading, resource unloading, and screen redrawing into a closed-loop process that runs continuously without interruption. Under any user operation, it automatically and dynamically switches rendering modes and image resources, maintaining interface stability throughout the entire process.

[0033] The present invention also provides a system that applies the above method, and its corresponding module architecture will be described in detail in conjunction with the accompanying drawings in specific embodiments.

[0034] Compared with the prior art, the present invention has the following advantages:

[0035] 1. Break through the bottleneck of rendering ultra-large capacity images: Through a multi-layered strategy of "thumbnail base map + local high-definition replacement", the full loading of massive original images is eliminated, reducing memory and video memory usage by more than 85%, and completely eliminating problems such as system unresponsiveness, memory overflow, and loading delay in traditional solutions.

[0036] 2. Balancing panoramic smoothness with local microscopic inspection accuracy: A threshold feedback switching mechanism based on the number density of images within the viewport is creatively proposed, which accurately covers two core operation scenarios: "macroscopic rapid patrol" and "microscopic fine analysis", while meeting the stringent requirements of smoothness and high-definition detail.

[0037] 3. Ultimate resource utilization scheduling: Through predictive vector advance preloading and a multi-level decay release system designed to address resource squeeze pain points, precise resource scheduling and efficient recovery are achieved, making it particularly suitable for the long-term, uninterrupted continuous operation needs of industrial production lines.

[0038] 4. High versatility and scalability: The core parameters of the algorithm, such as threshold, cache specifications, and number of threads, are all dynamically configurable. It has strong compatibility with workstations with different computing power or old detection facilities, making it easy to deploy and upgrade. Attached Figure Description

[0039] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0040] Figure 1 This is a diagram showing the overall architecture of the system of the present invention.

[0041] Figure 2 This is a schematic diagram illustrating the wafer image data flow and hierarchical storage of the global index library in this invention.

[0042] Figure 3 This is a flowchart illustrating the logic of adaptive rendering switching based on the viewport image quantity threshold of the present invention.

[0043] Figure 4 This is a timing diagram of the canvas operation linkage resource loading, preloading, and release in this invention. Detailed Implementation

[0044] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0045] This embodiment applies the method of the present invention to a 12-inch semiconductor wafer global microscopic scanning inspection system. After the wafer is imaged globally by an optical scanning device, approximately 500,000 independent microscopic scanning images are output per batch, with a total storage capacity of approximately 10TB for the entire batch of images, stored in an industrial high-speed disk array. The system of the present invention is deployed on an industrial visualization workstation.

[0046] System Overall Structure

[0047] like Figure 1 As shown, the system in this embodiment includes the following core modules:

[0048] (1) Layout parsing and parameter initialization module: used to batch acquire the entire scan data, extract features such as coordinates, size, and ID to build a mapping system, and configure rendering and canvas parameters.

[0049] (2) Multi-threaded index building module: The core is responsible for parallel image compression with computing power adaptation and establishing a global associated index library.

[0050] (3) Panoramic bottom static rendering module: responsible for completing the panoramic reconstruction rendering of all thumbnails without dead angles at the bottom of the canvas.

[0051] (4) Viewport Adaptive Switching Module: Controls the switching strategy between thumbnails and high-definition images based on the number of images in the display's viewport.

[0052] (5) Dynamic resource scheduling module: listens to front-end interaction (pan / zoom), asynchronously drives the original image reading of newly entered images and the high-definition resources of out-of-bounds images to be unloaded in real time, and has an embedded preloading function.

[0053] (6) Loop rendering update module: drives the actions of the above (4) and (5) modules to form a persistent listening and state update loop, realizing continuous screen refresh.

[0054] This embodiment is applied to a 12-inch semiconductor wafer full-area microscopic scanning inspection system. After the wafer is fully imaged by the optical scanning equipment, approximately 500,000 independent microscopic scanning images are output per batch, with a total storage capacity of approximately 10TB for the entire batch of images, stored in an industrial high-speed disk array. This invention is deployed on an industrial visualization workstation.

[0055] Step 1: Global layout parsing and parameter initialization

[0056] The system launches a visualization program and reads the wafer scanning task details file, batch-reading metadata information for approximately 5,000,000 scanned images in the current batch. It then extracts the wafer's Cartesian plane X / Y coordinates, physical dimensions, pixel dimensions, unique image ID, absolute disk storage path, and file checksum for each image. Based on the actual wafer layout rules, it integrates all image coordinates to construct a two-dimensional planar layout matrix, completely reconstructing the physical distribution of the entire wafer's images.

[0057] Synchronously initialize all system operating parameters:

[0058] (1) Initialize the total size of the visualization canvas, the canvas coordinate system, the rendering background color, and the basic rendering frame rate (60FPS);

[0059] (2) Initialize the basic parameters of the thread pool and set the maximum concurrency limit of the thread pool;

[0060] (3) Configure the high-definition rendering switching threshold. In this embodiment, the fixed threshold is 10 images, that is, high-definition replacement is started when the number of images in the viewport is ≤10.

[0061] (4) Configure supporting parameters such as thumbnail output specifications, cache directory, index storage path, and resource release time threshold.

[0062] After parameter initialization is complete, the system performs pre-verification to confirm that the image file can be read normally, the coordinate data is not missing, and the storage path is valid, before proceeding to the next processing step.

[0063] Step 2: Multi-threaded batch processing and global index building

[0064] The system calls the adaptive thread pool module to dynamically allocate the number of concurrent threads based on the real-time load of the current workstation's CPU and memory. In this embodiment, 20 parallel worker threads are stably running to asynchronously read approximately 500,000 high-resolution original images from the disk array in batches, avoiding the problems of low efficiency in single-threaded serial reading and excessively high instantaneous IO peaks during full-read.

[0065] Each worker thread executes the same processing logic: read a single high-resolution original image → generate a standard 180×120 pixel thumbnail according to the proportional compression algorithm → write the thumbnail to the local high-speed SSD cache directory and record the thumbnail cache path.

[0066] Simultaneously with image reading and thumbnail generation, a structured global relational index library is built. The index library adopts the form of a data table, with each index entry being the smallest relational unit. The fields include: unique image ID, wafer plane X coordinate, wafer plane Y coordinate, high-resolution original image storage path, thumbnail cache path, current rendering status (thumbnail / high-resolution image), and cache expiration flag.

[0067] The index database employs a hierarchical storage architecture: approximately 500,000 index records are persistently stored on disk files; simultaneously, the image indexes of the current viewport and its surrounding five rings are loaded into a high-speed memory cache layer, enabling millisecond-level index retrieval. Once all image processing and index construction are complete, the system marks the index database as usable.

[0068] The storage diagram for this step is as follows: Figure 2 As shown.

[0069] Step 3: Rendering the panoramic bottom static thumbnail

[0070] The visualization canvas uses the global planar layout matrix as a reference, traverses the global associated index library according to the image coordinates, reads the thumbnail resources in the memory cache, and completes the static rendering of all approximately 500,000 thumbnails on the bottom layer of the canvas to form a wafer panoramic thumbnail base image that cannot be cleared.

[0071] This underlying layer resides on the canvas, serving as the base view for the entire visualization interface. Users can perform common operations such as canvas panning, global zooming, and selection. Because only lightweight thumbnails are rendered, the entire process is smooth without lag, black screens, or loading delays, allowing for a direct view of the image distribution, macroscopic morphology, and large-scale defect distribution areas of the entire wafer.

[0072] Step 4: Adaptive rendering threshold algorithm mechanism based on viewport probe count

[0073] The system activates a real-time viewport monitoring thread to continuously collect the coordinate range of the screen's visible viewport at a fixed frequency, counts the total number of scanned images contained within the current viewport range, compares this count with a preset threshold (10 images), and executes a differentiated rendering strategy.

[0074] (1) Global browsing scenario: When the user performs large-scale panning and zooming operations on the canvas, and the number of images in the viewport is greater than 10, the system determines that it is in panoramic browsing mode, keeps only displaying the underlying thumbnails, and does not trigger the loading and replacement of high-definition images, so as to minimize the use of IO, memory and video memory and ensure smooth operation.

[0075] (2) Detailed local inspection scene: As the user continuously zooms in on the canvas, the viewport coverage area shrinks, and the number of images within the viewport decreases to 10 or less. The system automatically determines this to be a micro-defect verification scene and immediately triggers the high-definition image replacement rendering mechanism.

[0076] Step 5: Viewport-linked dynamic resource scheduling and preloading, tiered release

[0077] The system monitors canvas panning and zooming in real time. Once an operation is triggered, the viewport boundary is refreshed immediately to accurately distinguish between images entering and leaving the viewport. It executes three major actions in parallel: loading high-definition resources, replacing layers, and unloading resources, while also employing preloading and tiered release strategies.

[0078] (1) New Viewport Image Processing

[0079] For images that have just entered the visible area, an asynchronous IO thread is started to load the corresponding high-definition original image and generate an independent high-definition rendering layer. The high-definition layer is then overlaid on the corresponding coordinate position to cover the original thumbnail layer, thereby achieving high-definition display of local areas. This allows for clear identification of microscopic features such as wafer surface scratches, grain damage, minute impurities, and circuit defects.

[0080] (2) Viewport prediction and preloading

[0081] The system captures the user's mouse dragging and scroll wheel zooming movements in real time, predicts the next movement direction and coverage area of ​​the viewport, and asynchronously preloads high-definition resources for surrounding images entering the viewport. When the image officially enters the viewport, layer switching can be completed directly, completely eliminating the loading delay of high-definition images and achieving seamless transition between thumbnails and high-definition images.

[0082] (3) Exit viewport image processing and hierarchical resource release

[0083] For images that leave the visible area, high-definition resource unloading logic is executed, and a two-level hierarchical release mechanism is adopted:

[0084] Short-term cache level: Images are repeatedly entered and exited the viewport within a short period of time (within 3 seconds), and high-resolution images are retained in memory / video memory cache to avoid repeated loading and resulting I / O waste;

[0085] Complete Release Level: If an image is far from the viewport and has exceeded the preset time limit or has not been accessed for a long period of time, the high-definition rendering layer is immediately destroyed, releasing the memory, video memory, and file handle resources it occupies, retaining only the index library records and the underlying thumbnail, thus eliminating memory leaks and resource redundancy.

[0086] The flowchart for this step is as follows: Figure 3 As shown.

[0087] Step 6: Loop and dynamically render updates

[0088] The system integrates viewport monitoring, viewport refresh, high-definition loading, resource unloading, and screen redrawing into a closed-loop process that runs continuously without interruption. Even when the user continuously pans, zooms in, or zooms out of the canvas, the system automatically and dynamically switches rendering modes and image resources, maintaining stable interface operation throughout the entire process.

[0089] Actual measurement data of implementation effect

[0090] The results of the 72-hour continuous industrial operation test in this embodiment are as follows:

[0091] (1) Panoramic browsing mode: The canvas frame rate is kept stable at 60FPS, and there is no delay in the response of panning and zooming operations;

[0092] (2) Local high-definition mode: The efficiency of high-definition image layer replacement is related to the threshold of the loaded image. The average loading delay of the first high-definition image is ≤80ms;

[0093] (3) Resource consumption: Compared with the traditional full-load high-definition image solution, the overall memory consumption is reduced by 87% and the video memory consumption is reduced by 91%;

[0094] (4) Stability: No program crashes, no screen tearing, no memory leaks, no IO blocking, fully meeting the requirements of 7×24-hour continuous operation in semiconductor wafer workshops.

[0095] The timing diagram for this step is as follows: Figure 4 As shown.

[0096] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for dynamic loading and rendering of planar visualization of wafer scan images, characterized in that, Includes the following steps: Step 1: Global Layout Analysis and Parameter Initialization: Batch read the metadata of the wafer scan images, extract the position coordinates of each image, and construct a two-dimensional planar layout matrix that restores the physical distribution relationship of the wafers; at the same time, initialize the visualization canvas parameters, thread pool parameters, and the high-definition rendering switching threshold N used to distinguish between panoramic browsing and partial viewing modes. Step 2, Multi-threaded batch processing and global index library construction: A thread pool is used to read multiple high-resolution original images in parallel, generate thumbnails of uniform specifications in batches, and cache them; A global associated index library is constructed synchronously. Each index record in the index library is associated with and stores the identifier, coordinates, original image path, and thumbnail cache path of an image. The index library adopts a hierarchical storage architecture that combines full disk persistent storage with a memory cache layer. Step 3: Rendering of panoramic underlying static thumbnails: Based on the two-dimensional planar layout matrix, traverse the global associated index library and render all thumbnails onto the underlying layer of the visualization canvas to form a permanent panoramic thumbnail base image. Step 4: Adaptive rendering switching based on the number of images in the viewport: Real-time monitoring of the screen's visible viewport range and counting the number of images M contained in the current viewport; Compare the quantity M with the high-definition rendering switching threshold N; If M>N, then it is determined to be in panoramic browsing mode, and the panoramic thumbnail background image is kept displayed; If M≤N, it is determined to be a local fine-view mode, triggering the high-definition image replacement rendering mechanism; Step 5: Viewport-linked dynamic resource scheduling and hierarchical release: After detecting canvas panning or zooming operations, identify images that newly enter the viewport and images that exit the viewport; For the newly entered image in the viewport, its high-resolution original image is loaded asynchronously and a high-resolution rendering layer is generated to cover the thumbnail at the corresponding position; For images that exit the viewport, high-definition resources are unloaded, and a tiered release strategy is adopted: for images that re-enter the viewport within a short period of time, their high-definition resources are retained as a short-term cache; for images that have not been accessed for a long time and have moved away from the viewport, their occupied memory and video memory resources are completely released.

2. The method according to claim 1, characterized in that, Step four also includes a viewport prediction and preloading step: capturing the user's operation trajectory in real time, predicting the next movement direction and coverage area of ​​the viewport, and asynchronously loading the high-definition original image resources of the image entering the viewport in advance so as to complete the layer switching without delay when the image officially enters the viewport.

3. The method according to claim 1, characterized in that, The parallel reading using a thread pool described in step two involves dynamically allocating concurrent worker threads based on the real-time CPU and memory load of the current workstation, and asynchronously reading the high-resolution original images from the disk array in batches to avoid excessively high instantaneous IO peaks.

4. The method according to claim 1, characterized in that, The data range of the memory cache layer mentioned in step two is: the index records corresponding to the images within the current viewport and its surrounding preset number of circles, so as to achieve millisecond-level index retrieval.

5. The method according to claim 1, characterized in that, The tiered release strategy described in step five is as follows: Short-term cache level: When an image leaves the viewport, a timer is started; if the image re-enters the viewport within a preset short-term threshold, the cached high-definition resource is directly invoked without reloading. Complete Release Level: When an image leaves the viewport and is not accessed again for more than the short-term threshold, or when the distance from the current viewport exceeds the preset complete release threshold, its high-definition rendering layer is destroyed, and memory, video memory, and file handle resources are released, retaining only the display on the thumbnail.

6. A wafer scan image planar visualization dynamic loading and rendering system, characterized in that, The system, which employs the method as described in any one of claims 1 to 5, comprises: Layout parsing and parameter initialization module: used to batch acquire metadata of scanned images, construct a two-dimensional planar layout matrix, and initialize rendering and thread pool parameters, including the high-definition rendering switching threshold N; Multi-threaded index building module: used to generate thumbnails of high-resolution original images in parallel and build a global associated index library with a hierarchical storage architecture; Panoramic underlying static rendering module: Based on the index library, it renders all thumbnails to the bottom layer of the canvas to form a panoramic thumbnail base image that cannot be cleared. Viewport adaptive switching module: used to monitor the number of images M in the viewport in real time, compare it with the threshold N, and output a rendering mode switching signal; Dynamic resource scheduling module: It is used to asynchronously drive the loading of high-definition resources and layer replacement of newly entering viewport images according to user operations and the switching signal, and to perform hierarchical resource release for images leaving the viewport; This module also has a built-in viewport prediction and preloading function based on user operation trajectory. Loop rendering update module: Used to drive the above viewport monitoring, resource scheduling and screen redraw operations to form a closed loop, and maintain the continuous dynamic update of the interface.

7. The system according to claim 6, characterized in that, The index library constructed by the multi-threaded index building module contains at least the following in each index record: unique image ID, wafer plane X coordinate, wafer plane Y coordinate, high-resolution original image storage path, thumbnail cache path, current rendering status, and cache expiration flag.

8. The system according to claim 6, characterized in that, The high-definition rendering switching threshold N is configured as a dynamically adjustable integer value, which is configured according to the workstation hardware performance or the inspection accuracy requirements set by the user.

9. The system according to claim 6, characterized in that, The panoramic thumbnail base image rendered by the panoramic bottom static rendering module is set as the bottom layer that cannot be cleared and is permanently resident on the canvas, serving as the basic view of the entire visualization interface.

10. The system according to claim 6, characterized in that, The layout parsing and parameter initialization module is also used to set the basic rendering frame rate of the visualization canvas and configure the unified output specifications of the thumbnails.

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