A BGA solder ball detection method based on three-dimensional X-ray tomography CT volume data

Abstract

The application discloses a BGA tin ball detection method based on three-dimensional X-ray tomography CT volume data. The method comprises the following steps: acquiring and preprocessing CT volume data of a BGA region, determining a three-dimensional region of interest (ROI) of each tin ball; generating a vertical side cut image passing through the center of the tin ball, extracting a top and bottom candidate interface point set and calculating an interface confidence; performing sphere or ellipsoid fitting to obtain geometric model parameters and fitting confidence; globally fusing interface point sets of multiple tin balls to infer a PCB top plane and a chip bottom plane; combining geometric parameters, confidence and global plane constraints to generate a transverse layer cutting position set, and setting a rollback mechanism to correct abnormal positioning; finally, based on the position set, defect detection and quantification are performed. Through the coupling of local fine observation and global topological constraint, the application realizes adaptive decision of layer cutting position in the noise and deformation environment, and improves the accuracy and robustness of defect detection.

Description

Technical Field

[0001] This invention relates to electronic manufacturing inspection technology, and more specifically, to a method for detecting BGA solder balls based on three-dimensional X-ray computed tomography (CT) volume data. Background Technology

[0002] See Figure 1 As microelectronic packaging technology evolves towards extremely high integration, ball grid array (BGA) packaging has become the mainstream solution for high-performance computing chips and core communication modules. Because BGA solder joints are highly concealed at the bottom of the device, traditional two-dimensional X-ray transmission imaging is limited by overlapping projections and cannot perform in-depth vertical analysis of tiny voids, poor wetting, and potential "pillow effect" inside the solder joints.

[0003] While 3D CT imaging and tomographic synthesis technologies can generate "virtual microsections," in the complex context of industrial mass production testing, accurately and automatically determining key transverse slice sections still faces the following deep-seated technical bottlenecks:

[0004] 1. Interface topological blurring due to physical imaging limitations:

[0005] During CT reconstruction, limitations imposed by the X-ray tube focal spot size, detector pixel spacing, and system geometric rotation errors often result in significant partial volume effects and blurring due to point spread functions at solder joint edges. Furthermore, X-ray hardening and metal scattering artifacts caused by high atomic number solders (such as tin-lead or lead-free solders) can lead to nonlinear distortion of the grayscale gradient in the contact area between the solder ball and the pad. This physical uncertainty makes it difficult for traditional methods based on global grayscale thresholds or simple gradient operators to accurately separate the physical boundaries of the top (package side) and bottom (PCB side) of the solder ball at the sub-pixel scale.

[0006] 2. Thermodynamic warping and anisotropic deformation:

[0007] In actual reflow soldering processes, large-size PCBA boards often exhibit nonlinear anisotropic warpage due to the mismatch in the coefficient of thermal expansion (CTE) between the PCB and the chip substrate. This means that the solder joint array is not on the same ideal plane. Existing Predictive Slice Height (PSH) or Local Surface Model (LSM) algorithms are mostly based on neighborhood linear interpolation, often ignoring the microscopic deformation of a single sphere in three-dimensional space (such as geometric flattening, transition fillets, or asymmetric wetting). This leads to the layer cut surface cutting into the pads or hanging outside the sphere in areas of severe board warpage, directly causing detection failure.

[0008] 3. The contradiction between decoupling local observations and global constraints:

[0009] While existing technologies have attempted to assist in localization by extracting horizontal sections, the sensitivity of horizontal slices to changes in Z-axis height is far lower than that of vertical sections. Most existing algorithms treat "single-sphere localization" and "full-board baseline estimation" as isolated steps, lacking an effective feedback logic. When local imaging produces erroneous observations due to noise or occlusion, the algorithms lack the ability to automatically verify and backtrack using the spatial topological consistency of the global dual planes (PCB surface and chip surface).

[0010] 4. Engineering deficiencies in defect evaluation dimensions:

[0011] Industry standards (such as IPC-A-610) clearly state that voids near the weld interface pose a far greater threat to long-term reliability than voids at the center of the sphere. However, existing technologies mostly focus on calculating the global void ratio and lack the ability to perform multi-dimensional spatial distribution analysis based on high-precision interface positioning, resulting in the inability to classify and quantify high-risk failure modes.

[0012] In summary, how to achieve adaptive decision-making and high-precision defect quantification of BGA solder ball layer cutting positions through deep coupling of local fine observation and global topological constraints under complex physical interference and geometric deformation environments is a technical challenge that urgently needs to be overcome in the current field of industrial CT inspection. Summary of the Invention

[0013] The purpose of this invention is to provide a BGA solder ball detection method based on three-dimensional X-ray computed tomography (CT) volume data. By quantifying the interface confidence and fitting confidence and establishing geometric constraints between the PCB top plane and the chip bottom plane, the method solves the problems of unstable interface recognition and slice selection deviation in the prior art, and has the advantages of improving detection accuracy and reducing manual debugging costs.

[0014] The above-mentioned technical objective of the present invention is achieved through the following technical solution:

[0015] A method for detecting BGA solder balls based on three-dimensional X-ray computed tomography (CT) volume data includes the following steps:

[0016] a) Obtain CT body data containing the BGA solder joint area, and preprocess the CT body data;

[0017] b) For the multiple solder balls to be detected, determine the three-dimensional region of interest (ROI) for each solder ball in the CT volume data;

[0018] c) Generate at least two vertically cross-sectional images passing through the center of each solder ball for the three-dimensional region of interest (ROI);

[0019] d) Perform image processing and feature extraction based on the vertically sliced ​​image to obtain the top candidate interface point set and the bottom candidate interface point set of the solder ball, and calculate the interface confidence score respectively;

[0020] e) Perform sphere or ellipsoid fitting based on the top candidate interface point set and the bottom candidate interface point set to obtain the geometric model parameters and fitting confidence of the tin ball;

[0021] f) Globally fuse the bottom candidate interface point sets of the plurality of solder balls to estimate the top plane of the PCB, and globally fuse the top candidate interface point sets of the plurality of solder balls to estimate the bottom plane of the chip.

[0022] g) Based on the solder ball top / bottom interface height value determined by the geometric model parameters, the interface confidence and fitting confidence, and the spatial position constraints of the PCB top plane and the chip bottom plane, generate several sets of lateral layer cutting positions for each solder ball, and attach confidence and back off flags to the lateral layer cutting position sets.

[0023] h) Perform defect detection on each solder ball based on the set of transverse layer cut positions, and output the defect type and / or defect quantification results.

[0024] Furthermore, the vertically lateral image in step c) includes:

[0025] In each of the three-dimensional regions of interest (ROIs), two mutually orthogonal vertical slices are generated, as well as several vertical slices with different azimuth angles to the mutually orthogonal vertical slices.

[0026] Furthermore, the image processing and feature extraction in step d) includes:

[0027] Local thresholding and morphological processing are performed on the vertically oriented image to obtain the solder connectivity region of the solder ball;

[0028] At the boundary of the solder connected region, the top candidate interface point set and the bottom candidate interface point set are extracted based on gradient magnitude and edge continuity.

[0029] Furthermore, in step e), the fitting process employs robust estimation methods, including the RANSAC algorithm, to process the top candidate interface point set and the bottom candidate interface point set; wherein, the fitting confidence is determined based on the inlier ratio and fitting residuals of the RANSAC algorithm.

[0030] Furthermore, the global fusion in step f) includes:

[0031] Using the interface confidence and fitting confidence corresponding to each solder ball as weights, weighted plane fitting is performed on the top candidate interface point set and the bottom candidate interface point set of the plurality of solder balls respectively.

[0032] During the weighted plane fitting process, the RANSAC algorithm is used to remove outliers to obtain the spatial plane equations of the PCB top plane and the chip bottom plane, respectively.

[0033] Furthermore, the set of lateral layer cut positions in step g) includes at least: a bottom interface slice close to the top plane of the PCB, a middle slice located between the top interface height value and the bottom interface height value, and a top interface slice close to the bottom plane of the chip.

[0034] If the interface confidence or the fitting confidence is lower than a preset threshold, a rollback mechanism is triggered: using the spatial parameters of the PCB top plane and the chip bottom plane, each position in the set of horizontal layer cut positions is obtained through linear interpolation or proportional mapping, and the rollback mark is attached to the set of horizontal layer cut positions.

[0035] Furthermore, step g) further includes:

[0036] Between the bottom interface height value of the solder ball and the top interface height value of the solder ball, multiple transverse layer cutting positions are generated at preset equidistant intervals or preset height quantiles to define the spatial reference coordinates of the slice set to be extracted for defect detection.

[0037] Furthermore, the defect detection in step h) includes:

[0038] Combining the set of transverse layer cut positions, the three-dimensional region of interest (ROI) is segmented in three dimensions to obtain a set of void voxels; based on the geometric model parameters and the set of void voxels, the void ratio, void volume, and spatial distribution of the set of void voxels relative to the height of the top interface of the solder ball or the height of the bottom interface of the solder ball are calculated and output.

[0039] In summary, the present invention has the following beneficial effects:

[0040] The process includes acquiring CT body data, determining the ROI, generating lateral cut images, extracting point sets and calculating confidence scores, fitting models, globally fusing and estimating the plane, generating layer cut positions, and defect detection steps. By quantifying the interface confidence score and the fitted confidence score, and establishing geometric constraints between the PCB top plane and the chip bottom plane, it solves the problems of unstable interface recognition and slice selection deviation in existing technologies, and has the advantages of improving detection accuracy and reducing manual debugging costs. Attached Figure Description

[0041] Figure 1 This is a schematic diagram of the geometric constraints between the top plane of the PCB and the bottom plane of the chip as described in this invention.

[0042] Figure 2 This is a schematic diagram of a vertical side-section image of the solder ball described in this invention.

[0043] Figure 3 This is a flowchart of the BGA solder ball detection method based on three-dimensional X-ray computed tomography (CT) body data, as described in this invention. Detailed Implementation

[0044] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below with reference to the figures and specific embodiments.

[0045] Traditional BGA solder joint inspection methods often face the challenge of consistently identifying the top and bottom interfaces of solder balls when processing 3D X-ray computed tomography (CT) scan data. This is primarily due to factors such as solder ball geometry deformation, uneven solder distribution, CT image noise, artifacts, and boundary blurring. Furthermore, in the absence of global geometric constraints, automatically determining the lateral cut position for defect detection also presents challenges, impacting the accuracy of defect detection and the reliability of quantification results.

[0046] See Figure 3 This invention proposes a method for detecting BGA solder balls based on three-dimensional X-ray computed tomography (CT) volume data, comprising the following steps:

[0047] a) Obtain CT body data containing the BGA solder joint area and preprocess the CT body data;

[0048] b) For multiple solder balls to be inspected, determine the three-dimensional region of interest (ROI) for each solder ball in the CT volume data;

[0049] c) Generate at least two vertically cross-sectional images passing through the center of each solder ball for the three-dimensional region of interest (ROI);

[0050] d) Perform image processing and feature extraction based on the vertically sliced ​​image to obtain the top candidate interface point set and the bottom candidate interface point set of the tin ball, and calculate the interface confidence score respectively;

[0051] e) Perform sphere or ellipsoid fitting based on the top candidate interface point set and the bottom candidate interface point set to obtain the geometric model parameters and fitting confidence of the tin ball;

[0052] f) Globally fuse the bottom candidate interface point sets of multiple solder balls to estimate the top plane of the PCB, and globally fuse the top candidate interface point sets of multiple solder balls to estimate the bottom plane of the chip.

[0053] g) Based on the solder ball top / bottom interface height value, interface confidence and fitting confidence determined by the geometric model parameters, and the spatial position constraints of the PCB top plane and the chip bottom plane, generate several sets of lateral layer cutting positions for each solder ball, and attach confidence and back-off markers to the lateral layer cutting position sets.

[0054] h) Perform defect detection on each solder ball based on the set of transverse layer cut positions, and output the defect type and / or defect quantification results.

[0055] For ease of understanding, the following explains some key terms in this embodiment:

[0056] 3D X-ray computed tomography (CT) volumetric data refers to digital volumetric data representing the three-dimensional structure and density distribution of an object, acquired through X-ray computed tomography (CT) technology. This data is typically composed of a series of stacked two-dimensional slice images, providing non-destructive three-dimensional information about the object's interior.

[0057] BGA solder balls: These are solder joints used to connect chips to the substrate in a Ball Grid Array (BGA) package. They are usually spherical or ellipsoidal in shape and are a common connection structure in electronic products.

[0058] 3D Region of Interest (ROI): In 3D CT volumetric data, a local 3D spatial region is defined for a specific target (e.g., a single BGA solder ball). The purpose of defining this region is to limit the processing scope to the area surrounding the target object, thereby improving processing efficiency and accuracy.

[0059] Vertical slice image: A two-dimensional slice image generated from a 3D region of interest (ROI) along a vertical direction (e.g., the Z-axis) through the center of the solder ball. See also Figure 2 These images can show the internal structure of the tin ball and its connection with the surrounding interface from a side view.

[0060] Top and bottom candidate interface point sets: These refer to the sets of pixels identified through image processing and feature extraction methods on the vertically cross-section image that may constitute the top or bottom interface of the tin ball. These point sets form the basis for subsequent geometric model fitting.

[0061] Interface confidence score: This refers to a quantitative assessment of the reliability or accuracy of the extracted top or bottom candidate interface point set. The confidence score can reflect the clarity, continuity, or degree of matching of interface features with the expected model.

[0062] Geometric model parameters: These are mathematical parameters used to describe the geometry of the tin ball (e.g., a sphere or ellipsoid), including but not limited to the coordinates of the center, radius, and lengths of the major and minor axes. These parameters are obtained by fitting a set of candidate interface points.

[0063] Fit confidence: This refers to a quantitative assessment of the reliability or accuracy of the fit of a geometric model. The confidence level reflects the degree of agreement between the fitted model and the actual point set, and can be measured, for example, by the proportion of interior points or the fitting residuals.

[0064] PCB top plane: refers to the spatial plane containing the top surface of a printed circuit board (PCB). This plane is obtained by globally fusing and estimating the bottom interface points of multiple solder balls, serving as a global spatial reference for the bottom interface of the solder balls.

[0065] Chip bottom plane: refers to the spatial plane on which the bottom surface of the chip package is located. This plane is obtained by globally fusing and estimating the top interface points of multiple solder balls, and serves as a global spatial reference for the top interface of the solder balls.

[0066] Lateral slice location set: refers to a series of two-dimensional slice locations determined along the Z-axis of the solder ball for defect detection. The determination of these locations comprehensively considers the geometric model parameters of the solder ball, interface confidence, fit confidence, and global planar constraints.

[0067] Rollback flag: This is an indicator attached to the set of lateral layer cut positions when the interface confidence or fit confidence is lower than a preset threshold. This flag indicates that a backup or rollback mechanism was used to determine the layer cut positions, which may require further verification or manual intervention.

[0068] This embodiment provides a method for detecting BGA solder balls based on three-dimensional X-ray computed tomography (CT) volume data. The specific implementation process is as follows:

[0069] Acquire volumetric CT data containing the BGA solder joint area and preprocess this data. CT volumetric data can be acquired using industrial X-ray CT scanning equipment; for example, the PCB board to be inspected is placed in a CT scanner, and the image is reconstructed through rotational scanning to obtain three-dimensional volumetric data. Preprocessing aims to eliminate or reduce noise, artifacts, and other interference in the data. For example, simple mean filtering or Gaussian filtering can be used to smooth the volumetric data to improve image quality.

[0070] For multiple solder balls to be detected, a three-dimensional Region of Interest (ROI) is determined for each solder ball in the CT volume data. This ROI can be determined in several ways. For example, based on preset solder ball position coordinates, an approximate bounding box for each solder ball can be manually or semi-automatically delineated in the CT volume data as its ROI. Alternatively, a method based on image connectivity analysis can be used to identify high-density connected regions in the CT volume data and use these as the initial ROI for the solder balls.

[0071] For each 3D region of interest (ROI) of a solder sphere, generate at least two vertically sliced ​​images passing through the center of the sphere. These vertically sliced ​​images can be generated by slicing at the center of the ROI along two mutually perpendicular directions (e.g., parallel to the X and Y axes of the CT volume data). For example, one vertically sliced ​​image parallel to the XZ plane and one vertically sliced ​​image parallel to the YZ plane can be generated, both passing through the geometric center of the solder sphere.

[0072] Image processing and feature extraction are performed on the vertically sliced ​​image to obtain the top and bottom candidate interface point sets for the solder ball, and interface confidence scores are calculated for each. Image processing may include grayscale stretching or histogram equalization of the vertically sliced ​​image to enhance image contrast. Feature extraction may employ a global thresholding method to binarize the image, and then use edge detection operators (such as the Sobel or Prewitt operators) to identify the boundaries of the solder area. On these boundaries, by analyzing pixel grayscale changes or geometric positions, candidate interface points for the top and bottom can be preliminarily identified. Interface confidence scores can be calculated based on the number of these point sets, their average grayscale value, or their similarity to a preset template.

[0073] Based on the top and bottom candidate interface point sets, a spherical or ellipsoidal fitting is performed to obtain the geometric model parameters and fit confidence of the solder ball. The fitting process can employ the least squares method to fit the extracted candidate interface point set into a spherical or ellipsoidal model. Through fitting, geometric model parameters such as the center coordinates, radius, or major and minor axes of the solder ball can be obtained. The fit confidence can be calculated based on the root mean square error of the fitting residuals or the average distance from the fitted points to the model to evaluate the quality of the fit.

[0074] Furthermore, the bottom candidate interface point sets of multiple solder balls are globally fused to estimate the PCB top plane, and the top candidate interface point sets of multiple solder balls are globally fused to estimate the chip bottom plane. Global fusion can be achieved by performing unweighted plane fitting on the bottom candidate interface point sets of all solder balls, thus obtaining a spatial plane equation representing the PCB top plane. Similarly, performing unweighted plane fitting on the top candidate interface point sets of all solder balls can estimate the chip bottom plane. This global fusion helps correct for potential biases in local fitting of individual solder balls.

[0075] Based on the solder ball top / bottom interface height values ​​determined by the geometric model parameters, interface confidence and fitting confidence, and the spatial positional constraints of the PCB top plane and chip bottom plane, several sets of lateral cut-off positions are generated for each solder ball, and confidence and backoff flags are attached to these sets. Specifically, the top and bottom interface heights of the solder ball can be initially determined based on the fitted solder ball geometric model parameters. Then, combining the interface confidence and fitting confidence, as well as the estimated Z-axis positions of the PCB top plane and chip bottom plane, a series of fixed lateral cut-off positions are generated; for example, one cut-off position is generated at the top, middle, and bottom of the solder ball. When the interface confidence or fitting confidence is low, a backoff flag can be attached to the set of cut-off positions for that solder ball, indicating that these positions may require further verification.

[0076] Defect detection is performed on each solder ball based on a set of lateral cut locations, outputting the defect type and / or defect quantification results. Defect detection may include analysis of a two-dimensional image at each lateral cut location, for example, identifying voids or foreign objects through simple grayscale thresholding. The detection results may output the presence or absence of a defect, the type of defect (e.g., void, bridging), and preliminary quantification information of the defect (e.g., the area of ​​the defect region).

[0077] This embodiment effectively solves the problem of unstable identification of the top and bottom interfaces of BGA solder balls in CT volume data by combining local vertical lateral image analysis with global planar constraints. Therefore, it can stably determine the key lateral slice positions of solder balls under complex conditions such as geometric deformation, noise, and boundary blurring, thereby improving the accuracy of BGA solder ball defect detection and the reliability of quantification results, and reducing the cost of manual intervention.

[0078] In some of the solutions described above in this invention, it is proposed to generate at least two vertically cross-sectional images to obtain the cross-sectional information of the solder ball. However, in this process, if only a small number of images are generated or the image orientation is uniform, it may not be possible to fully capture the geometric features of the solder ball, resulting in inaccurate extraction of the interface point set in the subsequent process.

[0079] In response, the present invention further proposes that the vertical side-cut image in step c) above includes: generating two mutually orthogonal vertical slices in each of the three-dimensional regions of interest (ROI), and generating a plurality of vertical slices with different azimuth angles to the mutually orthogonal vertical slices.

[0080] Specifically, generating two mutually orthogonal vertical slices aims to comprehensively observe the internal structure of the solder ball from two mutually perpendicular perspectives. This can be achieved by determining the center point or geometric centroid of the 3D region of interest (ROI) as the origin of the slices; and then performing slicing operations along this center point on the XZ and YZ planes respectively, generating two 2D images. Alternatively, after determining the ROI, the system automatically identifies its principal axis direction and generates two vertical slices, one perpendicular and one horizontal, to ensure that the slice orientation is aligned with the main geometric features of the solder ball.

[0081] Furthermore, generating several vertical slices with different azimuth angles, orthogonal to the aforementioned vertical planes, is to further increase the diversity of observation angles, thereby more comprehensively capturing the complex geometric features of the solder ball. This can be achieved by rotating the slice plane around the Z-axis with a preset step size (e.g., 15 degrees, 30 degrees, or 45 degrees) based on the already generated mutually orthogonal vertical slices, generating a series of vertical slices with different azimuth angles. For example, in addition to XZ and YZ plane slices, vertical slices at a 45-degree angle to the X-axis or Y-axis can also be generated. Another implementation is to adaptively select multiple representative azimuth angles for slicing based on the expected shape of the solder ball or the distribution pattern of potential defects. For example, by analyzing the local gradient information of the ROI, additional vertical slices can be generated preferentially in directions with larger gradient changes.

[0082] By generating two mutually orthogonal vertical slices in each 3D Region of Interest (ROI), comprehensive coverage of the internal structure of the solder ball is ensured in two key orthogonal directions, effectively avoiding feature omissions that may occur from a single viewpoint. Furthermore, several vertical slices with different azimuth angles to the mutually orthogonal vertical slices are generated, greatly expanding the diversity of observation perspectives. This allows for the capture of subtle geometric features and potential defects of the solder ball in various directions, reducing blind spots caused by azimuth limitations. This multi-angle, multi-azimuth vertical slice image set provides a richer and more reliable data foundation for subsequent image processing and feature extraction based on the vertical slice images in step d), significantly improving the accuracy and robustness of top and bottom candidate interface point set extraction, thereby enhancing the accuracy and reliability of the entire BGA solder ball detection method.

[0083] In some of the above-mentioned solutions of the present invention, image processing and feature extraction based on vertical side-section images are proposed to obtain candidate interface point sets. However, in this process, due to uneven image brightness, noise, artifacts and boundary blurring, the global threshold segmentation method is prone to failure, resulting in inaccurate segmentation of solder connected regions, which in turn affects the extraction accuracy of interface point sets.

[0084] In response, the present invention further proposes that the image processing and feature extraction in step d) include: performing local thresholding and morphological processing on the vertically lateral image to obtain the solder connected region of the solder ball; and extracting the top candidate interface point set and the bottom candidate interface point set at the boundary of the solder connected region based on gradient magnitude and edge continuity.

[0085] Specifically, local thresholding is an image segmentation technique that dynamically determines the threshold based on the pixel characteristics (such as mean brightness, standard deviation, etc.) of local image regions, rather than using a single global threshold. Its advantage lies in its ability to effectively adapt to the uneven brightness and large contrast variations commonly found in vertically sliced ​​images, thereby more accurately separating the target region (i.e., solder) from the complex background. In practical applications, various algorithms can be used to implement local thresholding. For example, the Niblack algorithm can be used, which determines the local threshold by calculating the mean and standard deviation of each pixel's neighborhood, making it particularly suitable for images with large variations in background brightness. Another implementation is the Sauvola algorithm, which improves upon the Niblack algorithm by introducing a dynamic range parameter, further optimizing its adaptability to background noise and contrast variations, making it particularly suitable for text images or images with complex backgrounds. Furthermore, the Otsu local adaptive thresholding method can be used, dividing the image into several sub-regions and independently applying the Otsu algorithm to determine the threshold within each sub-region to address local brightness differences.

[0086] The morphological processing described herein is a series of nonlinear image processing operations based on image shape features, primarily used for image preprocessing, segmentation, feature extraction, and enhancement. Its function is to eliminate noise, smooth boundaries, fill holes, and connect broken parts, thereby optimizing the segmentation results and making the shape of the target region (solder connectivity region) more regular and accurate. In specific implementations, opening operations (i.e., erosion followed by dilation) can be used to eliminate small noise points and broken connections, while smoothing the target boundaries. Another approach is to use closing operations (i.e., dilation followed by erosion) to fill small holes and broken connections within the target, making the target region more complete. Furthermore, multiple morphological operations such as erosion, dilation, opening, and closing operations can be combined, flexibly combined according to the shape and size of structuring elements based on specific image characteristics and requirements, to achieve the best optimization effect for solder connectivity regions.

[0087] The gradient magnitude is a measure of the rate of change of pixel intensity in an image, representing the severity and direction of changes in image brightness. In image processing, gradient magnitude is often used to detect image edges because edges typically correspond to locations where pixel intensity changes significantly. Its role is to accurately capture abrupt changes in intensity at the boundaries of solder-connected regions, thereby locating potential interface points. In implementation, the Sobel operator can be used to calculate the gradient in the horizontal and vertical directions of the image, and then synthesize the gradient magnitude. The Sobel operator has a smoothing effect on edges and can effectively suppress noise. Another implementation is to use the Prewitt operator to calculate the gradient magnitude. The Prewitt operator is similar to the Sobel operator, but its weight distribution is slightly different, making it suitable for different types of edge detection needs. The Canny operator can also be used, which not only calculates the gradient magnitude but also incorporates non-maximum suppression and double thresholding steps, enabling the generation of finer, more continuous edges.

[0088] Edge continuity refers to whether the edge pixels detected in an image form a continuous path or curve in space. When extracting interface point sets, relying solely on gradient magnitude may detect isolated points or discontinuous edges caused by noise. The role of edge continuity is to ensure that the extracted interface point set is real and reliable, capable of forming a complete top or bottom interface contour, and avoiding interference from false or broken edges. In specific implementations, edge tracking algorithms, such as chain code-based or graph search methods, can be used to connect adjacent pixels with high gradient magnitudes to form continuous edge chains. Another approach is to set a connection criterion within a local neighborhood. For example, if a pixel has a high gradient magnitude, and another pixel with a high gradient magnitude exists in its neighborhood, and the directional changes between the two are within a certain range, then they are considered to belong to the same continuous edge. Methods such as Hough transform can also be used to detect straight lines or curves in parameter space, thereby identifying edge structures with good continuity.

[0089] Through the above technical solutions, this invention can effectively address the common problems of uneven brightness, noise, and blurred boundaries in vertically cross-sectioned images. Local threshold segmentation dynamically adjusts the threshold based on local image characteristics, avoiding the predicament of global threshold failure, and enabling more accurate separation of solder areas from complex backgrounds. Morphological processing further optimizes the segmentation results, ensuring the integrity and regularity of solder connected regions by eliminating noise, smoothing boundaries, and filling holes. Based on this, at the boundaries of solder connected regions, top and bottom candidate interface point sets are extracted based on gradient magnitude and edge continuity. Gradient magnitude accurately captures intensity abrupt changes at the interface, while edge continuity ensures the spatial coherence and reliability of the extracted interface point sets, effectively avoiding interference from false or broken edges. This combination significantly improves the extraction accuracy of interface point sets, providing more accurate and stable basic data for subsequent solder ball geometric model parameter fitting, PCB top plane and chip bottom plane estimation, and final defect detection, thereby enhancing the robustness and accuracy of the entire BGA solder ball detection method.

[0090] In some embodiments of the present invention described above, a spherical or ellipsoidal fitting is proposed based on the top and bottom candidate interface point sets to obtain the geometric model parameters and fitting confidence of the tin ball. However, in its implementation, the fitting process may be unstable due to the possibility that the point set may contain outliers or noise, leading to inaccurate geometric model parameters and unreliable fitting confidence. To address this, the present invention further proposes that when performing spherical or ellipsoidal fitting, the fitting in step e) employs a robust estimation method, including the RANSAC algorithm, to process the top and bottom candidate interface point sets; wherein the fitting confidence is determined based on the inlier ratio and fitting residuals of the RANSAC algorithm.

[0091] Specifically, robust estimation methods are a class of statistical methods designed to provide reliable model parameter estimates even when outliers or anomalies exist in the data. Unlike traditional methods such as least squares, which are sensitive to outliers, robust estimation methods effectively reduce the impact of outliers on the estimation results, thereby improving the stability and accuracy of the model. Besides the RANSAC algorithm, M-estimators, such as the Huber loss function or the Tukey bisquared loss function, can be used to reduce the impact of outliers by weighting the residuals; alternatively, Least Median Squared (LMS) or Least Cut-off Squared (LTS) methods can be employed, which combat outliers by minimizing the median of the residuals or the sum of squared residuals that have been truncated.

[0092] RANSAC (Random Sample Consensus) is an iterative method used to estimate the parameters of a mathematical model from a dataset containing a large number of outliers. Its basic idea is to randomly select a subset of data to fit the model, then evaluate how well the model fits all the data, and repeat this process multiple times to finally select the best model. In this invention, the RANSAC algorithm is used to process the top and bottom candidate interface point sets to fit a spherical or ellipsoidal model. Specifically, the algorithm randomly selects a small number of points (e.g., at least 4 points for fitting a sphere, and at least 6 points for fitting an ellipsoid) to initially determine the model parameters, and then calculates the distance from all other points to the model. Points within a preset threshold distance are considered "inliers," and the number of inliers is counted. This process is repeated multiple times, and the model with the most inliers is selected as the final model. In this way, the RANSAC algorithm can effectively identify and eliminate outliers in the point set, ensuring that the fitting process is robust to noise and outliers.

[0093] The inlier ratio refers to the proportion of data points (inliers) that are consistent with the current fitted model during the RANSAC algorithm iteration process, out of the total data point set. The inlier ratio is an important indicator of model fit quality and data purity. A higher inlier ratio usually means fewer outliers in the dataset, or that the current model can explain most of the data well, thus indicating a more reliable fit. The fitting residual refers to the distance or deviation between a data point and its fitted model. In the RANSAC algorithm, for points identified as inliers, the residual from their position to the final fitted model can further quantify the degree of fit between the model and these "good" data points. A smaller fitting residual indicates a high degree of consistency between the model and the inlier data, resulting in high fitting accuracy.

[0094] By employing robust estimation methods, including the RANSAC algorithm, to process the top and bottom candidate interface point sets, outliers or noise in the point sets can be effectively identified and eliminated. This ensures high robustness of the sphere or ellipsoid fitting process to outlier data, avoiding deviations in geometric model parameters (such as sphere center coordinates, radius, ellipsoid axis length, etc.) caused by local outlier interference, thereby significantly improving the accuracy and stability of the obtained tin ball geometric model parameters. Simultaneously, by determining the fitting confidence level based on the inlier ratio and fitting residuals using the RANSAC algorithm, this invention provides a reliable mechanism for quantitatively evaluating the fitting quality. The inlier ratio intuitively reflects how many data points are highly consistent with the fitted model, while the fitting residuals precisely quantify the degree of deviation between these consistent points and the model. The combination of these two allows the fitting confidence level to objectively and comprehensively assess the reliability of the current tin ball geometric model parameters. These reliable geometric model parameters and high-confidence fitting results provide a solid foundation for subsequent defect detection steps. For example, when generating a set of transverse layer cut locations, these parameters can be used more accurately to define the slice location, and quantitative results such as void ratio and void volume can be calculated more precisely during defect detection, thereby improving the overall accuracy and reliability of BGA solder ball defect detection. Even under complex conditions such as uneven brightness, noise, artifacts, or solder ball deformation in CT volume data, this solution can stably obtain accurate geometric models and reliable confidence levels, effectively solving the problem of "difficulty in distinguishing top / bottom" and providing high-quality input for subsequent global fusion and layer cut decisions.

[0095] See Figure 1 In some embodiments of the present invention, global fusion is proposed to estimate the top plane of the PCB and the bottom plane of the chip. However, in its implementation, outliers or inaccurate points may exist in the point set (e.g., caused by noise, artifacts or boundary blurring of CT volume data), which leads to deviation in the plane fitting results and affects the accuracy and reliability of subsequent layer cutting position decisions.

[0096] In response, the present invention further proposes that the global fusion in step f) includes: using the interface confidence and the fitting confidence corresponding to each solder ball as weights, performing weighted plane fitting on the top candidate interface point set and the bottom candidate interface point set of the plurality of solder balls respectively; in the process of weighted plane fitting, the RANSAC algorithm is used to remove outliers to obtain the spatial plane equations of the PCB top plane and the chip bottom plane respectively.

[0097] Specifically, the interface confidence and the fitting confidence are quantitative indicators measuring the reliability of the interface point set at the top or bottom of the tin ball. Using them as weights aims to give higher influence to point sets obtained from high-quality data (high confidence) during the planar fitting process, thereby reducing the negative impact of low-quality data on the fitting results. The interface confidence can be calculated based on image features such as gradient magnitude, edge continuity, and local contrast when extracting the interface point set in step d). For example, the larger the gradient magnitude and the better the edge continuity, the higher the confidence. The fitting confidence can be calculated based on parameters such as the proportion of inliers in the sphere or ellipsoid fitting in step e), the fitting residual, and the number of fitting iterations. For example, the higher the proportion of inliers and the smaller the fitting residual, the higher the confidence. These confidence scores can be normalized to a range between 0 and 1. Alternatively, the interface confidence can be comprehensively evaluated by combining the average gradient intensity of multiple vertically sliced ​​images and the response intensity of the edge detection operator. In addition to the proportion of inliers and the fitting residuals in RANSAC, the confidence scores can also consider statistical measures such as the stability of the fitted model and the standard deviation of the parameters. These confidence scores can be fused together through linear combination, nonlinear mapping, or machine learning models according to the actual application requirements to obtain the final weight values.

[0098] Weighted plane fitting is a method for performing plane fitting by assigning weights to each data point when data points have different reliability or importance. Its purpose is to use the previously calculated confidence levels as weights, ensuring that the more reliable solder ball interface point sets contribute more to the final plane equation when fitting the PCB top plane and chip bottom plane, thereby improving the accuracy and robustness of the fitting. Weighted least squares can be used for plane fitting. For each point set (top or bottom), the plane parameters are solved by minimizing the weighted sum of squared residuals. The weights are the combined weights of the interface confidence and the fitting confidence of the corresponding solder ball. Alternatively, iterative reweighted least squares can be used. First, an unweighted least squares fitting is performed, then new weights are calculated based on the distance of each point to the fitted plane, and the fitting is repeated until convergence. Furthermore, a hybrid weighting strategy can be formed by combining preset confidence weights.

[0099] RANSAC (Random Sample Consensus) is a robust estimation method used to estimate the parameters of a mathematical model from a dataset containing a large number of outliers. In this context, its role is to actively identify and eliminate outliers (judgments) that do not conform to the overall planar model during weighted plane fitting. These outliers may be caused by noise, artifacts, local defects, or inaccurate interface extraction in CT volume data, thus ensuring the robustness of the plane fitting and preventing a few outliers from significantly biasing the overall plane estimation. The basic process of RANSAC includes: randomly selecting a minimum number of data points to estimate a candidate planar model; then, calculating the distance from all other data points to the candidate model, considering points within a preset threshold as "inliers"; repeating this process multiple times, selecting the model with the most inliers as the best model; finally, refitting the final planar model using all inliers. In the context of weighted plane fitting, weights can be incorporated into the distance calculation or inlier counting during the inlier selection stage of RANSAC, or weighted least squares can be used when refitting using inliers in the final step. Alternatively, confidence weights can be incorporated into the RANSAC iteration process to guide random sampling. For example, sampling can be prioritized from high-confidence points, or higher counting weights can be assigned to high-confidence inliers when calculating the number of inliers. Furthermore, the RANSAC threshold can be adaptively adjusted based on the noise level of the data or the expected planar flatness to better suit different BGA solder ball array scenarios.

[0100] Through the above technical solution, this invention can effectively solve the problem that inaccurate solder ball interface point sets caused by noise, artifacts, boundary blurring, or local defects in CT volume data affect the estimation accuracy of the PCB top plane and chip bottom plane. Specifically, the interface confidence obtained in step d) and the fitting confidence obtained in step e) are introduced as weights into weighted plane fitting. This ensures that interface point sets extracted from high-quality, high-reliability data contribute more to the final plane equation during the fitting process, thus prioritizing reliable information for plane estimation even when data quality is uneven. Simultaneously, the RANSAC algorithm is introduced into the weighted plane fitting process to actively identify and remove outliers in the point set. These outliers may be caused by local anomalies, measurement errors, or extreme noise. The robustness of RANSAC ensures that even with a large amount of outlier data, the true spatial position and orientation of the PCB top plane and chip bottom plane can be accurately estimated. This strategy, which combines confidence weighting with RANSAC outlier removal, significantly improves the accuracy and robustness of plane fitting. It provides precise and stable global geometric constraints for generating the set of transverse layer cut positions for each solder ball in the subsequent step g), thereby ensuring the accuracy of defect detection and the repeatability of quantification results. In particular, it can provide a more reliable layer cut reference when facing complex situations such as board warping.

[0101] In some of the above-mentioned solutions of the present invention, a set of transverse layer-cut positions is generated based on geometric model parameters and confidence level to determine the key slice position for defect detection. However, when the interface confidence or fitting confidence level is low, directly relying on the geometric model parameters of the solder ball itself to generate the layer-cut position may lead to inaccurate position estimation, which in turn may cause defect detection errors or missed detections.

[0102] In response, the present invention further proposes that the set of lateral layer cut positions in step g) includes at least: a bottom interface slice near the top plane of the PCB, a middle slice located between the top interface height value and the bottom interface height value, and a top interface slice near the bottom plane of the chip; if the interface confidence or the fitting confidence is lower than a preset threshold, a backoff mechanism is triggered: using the spatial parameters of the top plane of the PCB and the bottom plane of the chip, each position in the set of lateral layer cut positions is obtained through linear interpolation or proportional mapping, and the backoff mark is attached to the set of lateral layer cut positions.

[0103] The determination of these key slice locations aims to provide stable and physically meaningful reference points for defect detection within the BGA solder ball structure. For example, the bottom interface slice near the PCB top plane can be determined at a predetermined small distance above the PCB top plane, or by calculating the average distance between the bottom interface height of the solder ball and the PCB top plane; the middle slice can simply be the arithmetic mean of the top and bottom interface heights of the solder ball, or determined based on the geometric model parameters of the solder ball; the top interface slice near the chip bottom plane can be determined at a predetermined small distance below the chip bottom plane, or by calculating the average distance between the top interface height of the solder ball and the chip bottom plane. Furthermore, the bottom interface slice can be determined by proportionally shifting the Z-axis distance between the bottom interface height of the solder ball and the PCB top plane upwards, or proportionally shifting the Z-axis distance between the top interface height of the solder ball and the chip bottom plane downwards; the middle slice can be proportionally divided between the top and bottom interfaces.

[0104] If the interface confidence score or the fitting confidence score falls below a preset threshold, a fallback mechanism is triggered. This mechanism serves as a conditional judgment to evaluate the reliability of local feature extraction and geometric model fitting for a single solder ball. For example, a threshold can be set for the interface confidence score and another for the fitting confidence score; when either confidence score falls below its corresponding threshold, fallback is triggered. Alternatively, the two confidence scores can be weighted and combined to form a comprehensive confidence score, which is then compared with a preset comprehensive threshold to determine whether fallback should be triggered.

[0105] When the rollback mechanism is triggered, the system utilizes the spatial parameters of the PCB top plane and the chip bottom plane to obtain the positions in the set of lateral layer cut positions through linear interpolation or proportional mapping. This method ensures relatively accurate and consistent layer cut positions even when local data is unreliable. Specifically, the bottom and top interface slices can be determined by setting a fixed offset above the PCB top plane or below the chip bottom plane, while the middle slice can be set as the midpoint between the two planes or divided according to a preset ratio. Alternatively, the total height range between the PCB top plane and the chip bottom plane can be determined first, and then the typical or standard height of the solder balls can be proportionally mapped onto this total height range to determine the positions of each slice.

[0106] Simultaneously, the set of lateral cut positions is accompanied by the aforementioned backoff flag. This flag indicates that the current set of cut positions was generated through a backoff mechanism, rather than based on the local high-confidence parameter of the solder ball itself. For example, a boolean variable can be associated with the set of lateral cut positions for each solder ball, which is set to true when the backoff mechanism is triggered; or an enumerated variable can be used to represent the generation method of the cut positions, to clearly distinguish between the cases generated based on local high-confidence parameters and those generated based on a global backoff mechanism.

[0107] Through the above technical solution, this invention effectively solves the problem that directly relying on the geometric model parameters of a local solder ball to generate the layer cutting position may lead to inaccuracies when the interface confidence or fitting confidence of the local solder ball is low. Specifically, by pre-setting key lateral layer cutting position types (bottom interface slice, middle slice, top interface slice) and introducing a condition-triggered backoff mechanism, this invention ensures the robustness and reliability of the defect detection process. When the confidence of the local feature extraction or fitting result of a single solder ball is insufficient, the system can automatically switch to using the spatial parameters of the PCB top plane and the chip bottom plane, which are globally estimated, to determine the layer cutting position. This linear interpolation or proportional mapping method based on global plane parameters can provide a consistent and physically meaningful reference point, effectively offsetting the effects of local noise, deformation, or poor data quality, and avoiding positional deviations caused by individual differences in solder balls. At the same time, a backoff mark is attached to the set of layer cutting positions generated by the backoff mechanism, enabling subsequent defect detection steps to identify the generation method of these positions, thereby supporting differentiated processing or result traceability and enhancing the interpretability and controllability of the entire detection process. This significantly improves the accuracy and stability of BGA solder ball defect detection in complex industrial CT volume data environments, and reduces the risk of false positives and false negatives.

[0108] In some of the solutions described above in this invention, a set of transverse layer cut positions is generated based on geometric model parameters, interface confidence and fitting confidence, and spatial position constraints of the PCB top plane and the chip bottom plane for defect detection. However, in this process, there are shortcomings in how to accurately and flexibly define the slice positions to cover the key areas inside the solder balls and ensure the comprehensiveness and accuracy of defect detection. Specifically, relying solely on the top / bottom interface height values ​​and global constraints may lead to uneven distribution of slice positions or omission of key defects in the intermediate layer. It cannot adapt to different solder ball geometric changes or defect distribution characteristics, thereby affecting the reliability and efficiency of defect identification.

[0109] In response, the present invention further proposes to generate multiple transverse layer cutting positions between the bottom interface height value and the top interface height value of the solder ball according to a preset equidistant interval or a preset height quantile, so as to define the spatial reference coordinates of the slice set to be extracted for defect detection.

[0110] The phrase "between the bottom interface height value and the top interface height value of the solder ball" refers to defining a vertical range. The lower limit of this range is the bottom interface height value of the solder ball, and the upper limit is the top interface height value. These two height values ​​are typically determined based on geometric model parameters obtained through sphere or ellipsoid fitting in previous steps, and may have been optimized by incorporating interface confidence, fit confidence, and spatial positional constraints between the PCB top plane and the chip bottom plane. Determining this range aims to ensure that the subsequently generated lateral layer cut positions are all located within the actual solder area of ​​the solder ball, thereby avoiding analysis of the outside or irrelevant areas of the solder ball and improving the targeting and efficiency of the inspection.

[0111] "Generating multiple lateral slice positions at preset equidistant intervals" refers to determining a series of slice positions at fixed vertical intervals between the bottom and top interface height values ​​of the solder ball, as defined above. For example, the vertical height of the solder ball can be evenly divided into several segments based on the user-defined number of slices, and a lateral slice position can be generated at each segment point; alternatively, a fixed interval distance (e.g., 50 micrometers) can be set, and slice positions can be generated sequentially upwards from the bottom interface height value at this interval until the top interface height value is reached or exceeded. This method ensures uniform vertical coverage inside the solder ball and is suitable for scenarios requiring a comprehensive inspection of the entire solder ball volume to detect various defects.

[0112] "Generating multiple lateral cut positions according to preset height quantiles" refers to generating lateral cut positions at specific percentage points based on the vertical height distribution of the solder balls. For example, cuts can be preset to be generated at 10%, 25%, 50% (middle), 75%, and 90% of the solder ball height. This method allows for a non-uniform distribution of cut positions, enabling denser cuts in specific critical areas of the solder ball (such as the bottom contacting the pads, the top contacting the chip, or the middle of the solder ball—areas with high defect incidence) and sparser cuts in other areas, based on actual needs or experience. This makes the cut strategy more flexible and adaptable, allowing for better optimized detection for different solder ball geometries or specific defect types.

[0113] "Using spatial reference coordinates to define the set of slices to be extracted for defect detection" refers to using the multiple transverse slice positions generated above as precise Z-axis coordinates to guide the extraction of two-dimensional transverse slices from 3D CT volume data. These coordinates constitute the spatial framework for defect detection, ensuring that subsequent image processing and defect analysis can be based on accurate and repeatable slice data. Using these spatial reference coordinates, the system can automatically extract slice images for analysis, thereby supporting the identification, classification, and quantification of the internal structure and potential defects of solder balls.

[0114] Through the above technical solution, this invention provides a systematic, accurate, and flexible spatial reference coordinate system for defect detection. Specifically, by limiting the slice position to the height values ​​of the bottom and top interfaces of the solder ball, it ensures that all generated slices are located within the effective detection area of ​​the solder ball, avoiding analysis of irrelevant areas and thus improving detection efficiency and accuracy. Using preset equidistant intervals to generate slices ensures uniform coverage along the height direction inside the solder ball, effectively preventing the omission of defects in localized areas, and is particularly suitable for scenarios requiring comprehensive inspection of the entire solder ball volume. Furthermore, using preset height quantiles to generate slices allows for dynamic adjustment of slice density based on the actual geometric characteristics of the solder ball or potential defect hotspots. For example, denser slices can be placed in key areas such as near the interface or in the middle of the solder ball, thereby improving the sensitivity and specificity of detecting specific types of defects or defects in specific areas. These generated transverse slice positions serve as clear spatial reference coordinates, providing precise input for subsequent defect detection steps, making defect location, identification, and quantification more reliable and efficient. By combining the geometric model parameters, interface confidence, fitting confidence, and global spatial constraints between the PCB top plane and the chip bottom plane obtained in the previous steps, the slicing generation strategy of the present invention can adapt to the individual differences of different solder balls and the overall board warping, ensuring the stability and repeatability of defect detection in complex industrial environments.

[0115] In some of the above-mentioned solutions of the present invention, a defect detection step is proposed to identify and quantify BGA solder ball defects. However, in this process, due to noise, artifacts and boundary blurring of CT volume data, it is difficult to accurately segment void voxels by relying solely on basic detection methods, and it is difficult to quantify void rate, void volume and its spatial distribution characteristics. This results in a lack of comprehensiveness and reliability in the defect detection results, affecting the accurate assessment of solder joint failure modes.

[0116] In response, the present invention further proposes a defect detection method including: combining the set of transverse layer cut positions, performing three-dimensional segmentation of the three-dimensional region of interest (ROI) to obtain a set of void voxels; and calculating and outputting the void ratio, void volume, and spatial distribution of the void voxel set relative to the height value of the top interface of the solder ball or the height value of the bottom interface of the solder ball based on the geometric model parameters and the set of void voxels.

[0117] In this process, the region of interest (ROI) is segmented in three dimensions using the set of lateral slice locations to obtain a set of void voxels. This step aims to accurately identify and separate void regions inside solder balls in three-dimensional space using pre-determined key slice locations. By combining the set of lateral slice locations, the segmentation algorithm can be guided to focus on key regions inside the solder balls, effectively avoiding interference factors such as noise, artifacts, and boundary blurring commonly found in CT volume data, thereby improving the accuracy and robustness of void segmentation. In specific implementations, various three-dimensional segmentation techniques can be employed. For example, one approach is to perform local adaptive threshold segmentation on the CT volume data at each lateral slice location to identify low-density regions that differ significantly from the solder density. These two-dimensional segmentation results are then stacked and connectivity analyzed in three-dimensional space to ultimately form a set of void voxels. Another approach is to utilize a 3D convolutional neural network (such as 3D U-Net or its variants) for end-to-end semantic segmentation of the 3D Region of Interest (ROI). This network can learn and recognize complex 3D morphologies of holes and can incorporate the set of lateral layer cut locations as auxiliary information (e.g., through feature fusion or attention mechanisms) to enhance segmentation accuracy. Furthermore, a region-growing approach can be employed, using potential hole regions identified in the lateral layer cut location set as seed points. Within the 3D ROI, the region is expanded based on voxel grayscale values, gradient information, and connectivity criteria until a preset stopping condition is met, thus obtaining a complete set of hole voxels.

[0118] Based on the geometric model parameters and the set of void voxels, the void ratio and void volume are calculated and output. This step aims to provide a precise quantitative assessment of void defects inside the solder ball, offering intuitive and physically meaningful indicators. The void volume directly reflects the absolute size of the void defect, while the void ratio, compared to the total volume of the solder ball, provides the severity of the void defect relative to the entire solder ball. Specifically, the void volume can be directly obtained by counting the number of voxels in the void voxel set and multiplying it by the actual physical volume of a single voxel. The total volume of the solder ball can be calculated based on the geometric model parameters obtained in step e) (e.g., the radius of the sphere or the major and minor axes of the ellipsoid). The void ratio is the ratio of the void volume to the total volume of the solder ball. Another implementation is to convert the set of void voxels into a three-dimensional mesh model, then calculate its volume using numerical integration methods. Simultaneously, the geometric model parameters of the solder ball can also be used to construct its three-dimensional model and calculate its total volume using numerical methods, thereby obtaining the void ratio.

[0119] The spatial distribution of the void voxel set relative to the height values ​​of the top or bottom interfaces of the solder ball is also analyzed. This step aims to deeply analyze the specific location and distribution characteristics of void defects within the solder ball, which is crucial for understanding the formation mechanism of defects, assessing their impact on solder joint reliability, and identifying specific failure modes. In practice, various methods can be used to describe the spatial distribution. For example, one approach is to project the void voxel set along the Z-axis (height direction) and statistically analyze the number or area of ​​void voxels at different height levels to generate a void distribution histogram. Then, using the height values ​​of the top or bottom interfaces of the solder ball as reference zero points, the relative positional parameters such as the centroid height, maximum void height, and minimum void height are calculated. Another approach is to calculate the shortest distance from each voxel in the void voxel set to the top and bottom interfaces of the solder ball and perform statistical analysis on these distances, such as average distance, maximum distance, and distribution range, to comprehensively describe the spatial distribution characteristics of the voids. In addition, the internal space of the tin ball can be divided into several preset layers parallel to the top or bottom interface, and the proportion or volume of voids in each layer can be statistically analyzed to obtain the spatial distribution information of the layers.

[0120] Through the above technical solution, this invention effectively solves the problems of inaccurate void segmentation and insufficient quantification information caused by noise, artifacts, and boundary blurring in CT volumetric data. By combining a pre-determined set of transverse slice positions, targeted 3D segmentation of the Region of Interest (ROI) can accurately identify and extract the void voxel set inside the solder ball, avoiding the limitations of traditional 2D slicing analysis, which may miss 3D information or be affected by local noise. Based on this, and using the geometric model parameters of the solder ball, the void ratio and void volume can be accurately calculated, providing a reliable quantitative indicator of defect severity and overcoming the shortcomings of relying solely on experience or simple threshold judgments. Furthermore, by analyzing the spatial distribution of the void voxel set relative to the height values ​​of the top or bottom interfaces of the solder ball, this invention can reveal the specific location of the void inside the solder ball, such as whether it is near the top plane of the PCB, the bottom plane of the chip, or located in the middle of the solder ball. This is of great significance for a deeper understanding of the causes of defect formation, assessing the wetting state of solder joints, and predicting potential failure modes. Overall, this solution significantly improves the accuracy, comprehensiveness, and reliability of BGA solder ball defect detection, providing more refined and comprehensive data support for solder joint quality assessment and process optimization.

[0121] The following example will provide a more detailed explanation of the above technical solution:

[0122] On an electronics production line, solder ball quality inspection is required for mass-produced BGA packaged devices. Traditional methods struggle to reliably determine the location of critical inspection sections when faced with issues such as solder joint geometry deformation, CT data noise, and board warping, resulting in limited accuracy and repeatability of defect detection.

[0123] This method first acquires CT volume data containing the BGA solder joint area and preprocesses this data, such as performing noise reduction and artifact correction, to improve the quality of subsequent image analysis.

[0124] For each solder ball to be inspected, its three-dimensional region of interest (ROI) is automatically determined in the preprocessed CT volume data. This step limits the processing scope to a single solder ball, reducing interference from surrounding structures.

[0125] To overcome the difficulty in identifying the top and bottom interfaces of solder balls due to geometric flattening, transition fillets, or uneven solder distribution, the system generates at least two vertically cross-sectional images passing through the center of each solder ball's 3D Region of Interest (ROI). Specifically, two mutually orthogonal vertical slices are generated, such as vertical slices along the X and Y axes, and several more vertical slices with different azimuth angles to these two orthogonal slices can be further generated. These multi-directional vertically cross-sectional images provide complete cross-sectional information of the solder ball from top to bottom, clearly showing the connection pattern between the solder and the pads / chips, which is more effective at capturing complex interface features than relying solely on horizontal slices.

[0126] After acquiring the vertically cross-sectional images, the system performs image processing and feature extraction on these images. Specifically, it performs local thresholding and morphological processing on the vertically cross-sectional images to obtain the solder connectivity regions of the solder balls. Local thresholding can accommodate potential brightness unevenness issues in CT data, while morphological processing helps eliminate noise and fill small voids, making the boundaries of the solder regions clearer. Subsequently, at the boundaries of the solder connectivity regions, top and bottom candidate interface point sets are extracted for the solder ball based on gradient magnitude and edge continuity. Gradient magnitude helps identify intensity changes in the image, while edge continuity ensures that the extracted interface point sets are coherent and reliable. Simultaneously, the system calculates the interface confidence score for each interface point set based on the clarity and consistency of these features, quantifying the reliability of interface recognition.

[0127] To further accurately describe the geometry of the solder ball, the system performs spherical or ellipsoidal fitting based on the extracted top and bottom candidate interface point sets. This fitting process employs robust estimation methods, including the RANSAC algorithm, to process the point set. The RANSAC algorithm effectively eliminates outliers in the point set, such as erroneous points caused by noise or local artifacts, thus obtaining more accurate solder ball geometric model parameters. Simultaneously, the system determines the fitting confidence level based on the inlier ratio and fitting residuals from the RANSAC algorithm, reflecting the degree of agreement between the fitting results and the actual point set.

[0128] To address the impact of global issues such as board warpage on the determination of individual solder ball interface height, the system globally fuses the bottom candidate interface point sets of multiple solder balls to estimate the PCB top plane and the top candidate interface point sets of multiple solder balls to estimate the chip bottom plane. This global fusion process uses the interface confidence and fitting confidence of each solder ball as weights to perform weighted plane fitting on the top and bottom candidate interface point sets of multiple solder balls, respectively. During the weighted plane fitting process, the RANSAC algorithm is also used to remove outliers to obtain the spatial plane equations for the PCB top plane and the chip bottom plane, respectively. In this way, even if there are deviations in the interface identification of individual solder balls, global plane fitting can provide a stable and reliable reference benchmark, effectively correcting local measurement errors and providing global geometric constraints for subsequent layer cutting position decisions.

[0129] Based on the obtained geometric model parameters, the system determines the top / bottom interface height values ​​of the solder balls, the interface confidence and fitting confidence, and the spatial position constraints between the PCB top plane and the chip bottom plane. The system generates several sets of lateral layer-cutting positions for each solder ball. These sets of lateral layer-cutting positions include at least: a bottom interface slice near the PCB top plane, a middle slice between the top and bottom interface height values, and a top interface slice near the chip bottom plane. Furthermore, the system can generate multiple lateral layer-cutting positions between the bottom and top interface height values ​​of the solder balls at preset equidistant intervals or preset height quantiles to define the spatial reference coordinates of the slice set to be extracted for defect detection. If the interface confidence or fitting confidence of a solder ball is lower than a preset threshold, a backoff mechanism is triggered: using the spatial parameters of the PCB top plane and the chip bottom plane, each position in the lateral layer-cutting position set of the solder ball is obtained through linear interpolation or proportional mapping, and a backoff marker is attached to the lateral layer-cutting position set. This strategy ensures that even in situations where local information is insufficient or uncertain, reasonable layer cutting positions can still be generated based on globally reliable planar information, thereby improving the robustness of detection.

[0130] Finally, based on the generated set of transverse layer cut locations, the system performs defect detection on each solder ball. Defect detection includes 3D segmentation of the region of interest (ROI) using the transverse layer cut location set to obtain a set of void voxels. Based on the geometric model parameters of the solder ball and the void voxel set, the system calculates and outputs the void ratio, void volume, and the spatial distribution of the void voxel set relative to the height of the solder ball's top or bottom interface. This approach not only quantifies defects but also provides precise location information within the solder ball, offering detailed data for subsequent failure analysis.

[0131] Compared to traditional methods that rely solely on single horizontal slices or simple threshold segmentation, this method significantly improves the stability of BGA solder ball top / bottom interface identification and the accuracy of lateral slice location determination under complex CT data conditions by introducing multi-directional vertical lateral slice images, robust interface point set extraction and fitting, and a global planar fusion and confidence-driven layer-cutting decision mechanism. Particularly when facing challenges such as solder joint deformation, noise interference, and board warpage, this method provides a more reliable detection basis, thereby improving the accuracy of defect detection and the repeatability of quantitative results.

[0132] In this document, the terms "upper," "lower," "front," "back," "left," "right," "top," "bottom," "inner," "outer," "vertical," and "horizontal," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only used for the clarity of expressing the technical solution and for the convenience of description, and therefore should not be construed as limiting the present invention.

[0133] In this document, the terms “comprising,” “including,” or any other variations thereof are intended to cover non-exclusive inclusion, which includes not only the elements listed but also other elements not expressly listed.

[0134] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of this invention is defined by the appended claims and their equivalents.

Claims

1. A method for detecting BGA solder balls based on three-dimensional X-ray computed tomography (CT) volume data, characterized in that, The steps include the following: a) Obtain CT body data containing the BGA solder joint area, and preprocess the CT body data; b) For the multiple solder balls to be detected, determine the three-dimensional region of interest (ROI) for each solder ball in the CT volume data; c) Generate at least two vertically cross-sectional images passing through the center of each solder ball for the three-dimensional region of interest (ROI); d) Perform image processing and feature extraction based on the vertically sliced ​​image to obtain the top candidate interface point set and the bottom candidate interface point set of the solder ball, and calculate the interface confidence score respectively; e) Perform sphere or ellipsoid fitting based on the top candidate interface point set and the bottom candidate interface point set to obtain the geometric model parameters and fitting confidence of the tin ball; f) Globally fuse the bottom candidate interface point sets of the plurality of solder balls to estimate the top plane of the PCB, and globally fuse the top candidate interface point sets of the plurality of solder balls to estimate the bottom plane of the chip. g) Based on the solder ball top interface height value and solder ball bottom interface height value determined by the geometric model parameters, the interface confidence and fitting confidence, and the spatial position constraints of the PCB top plane and the chip bottom plane, generate several sets of lateral layer cutting positions for each solder ball, and attach confidence and back off flags to the lateral layer cutting position sets. h) Perform defect detection on each solder ball based on the set of transverse layer cut positions, and output the defect type and / or defect quantification results.

2. The BGA solder ball detection method based on three-dimensional X-ray computed tomography (CT) volume data according to claim 1, characterized in that, The vertical cross-section image in step c) includes: In each of the three-dimensional regions of interest (ROIs), two mutually orthogonal vertical slices are generated, as well as several vertical slices with different azimuth angles to the mutually orthogonal vertical slices.

3. The BGA solder ball detection method based on three-dimensional X-ray computed tomography (CT) volume data according to claim 1, characterized in that, The image processing and feature extraction in step d) includes: Local thresholding and morphological processing are performed on the vertically oriented image to obtain the solder connectivity region of the solder ball; At the boundary of the solder connected region, the top candidate interface point set and the bottom candidate interface point set are extracted based on gradient magnitude and edge continuity.

4. The BGA solder ball detection method based on three-dimensional X-ray computed tomography (CT) volume data according to claim 1, characterized in that, In step e), the fitting process employs robust estimation methods, including the RANSAC algorithm, to process the top candidate interface point set and the bottom candidate interface point set; wherein, the fitting confidence is determined based on the proportion of inliers in the RANSAC algorithm and the fitting residuals.

5. The BGA solder ball detection method based on three-dimensional X-ray computed tomography (CT) volume data according to claim 1, characterized in that, The global fusion in step f) includes: Using the interface confidence and fitting confidence corresponding to each solder ball as weights, weighted plane fitting is performed on the top candidate interface point set and the bottom candidate interface point set of the plurality of solder balls respectively. During the weighted plane fitting process, the RANSAC algorithm is used to remove outliers to obtain the spatial plane equations of the PCB top plane and the chip bottom plane, respectively.

6. The BGA solder ball detection method based on three-dimensional X-ray computed tomography (CT) volume data according to claim 1, characterized in that, The set of lateral layer cut positions in step g) includes at least: a bottom interface slice close to the top plane of the PCB, a middle slice located between the top interface height value and the bottom interface height value, and a top interface slice close to the bottom plane of the chip. If the interface confidence or the fitting confidence is lower than a preset threshold, a rollback mechanism is triggered: using the spatial parameters of the PCB top plane and the chip bottom plane, each position in the set of horizontal layer cut positions is obtained through linear interpolation or proportional mapping, and the rollback mark is attached to the set of horizontal layer cut positions.

7. The BGA solder ball detection method based on three-dimensional X-ray computed tomography (CT) volume data according to claim 1, characterized in that, Step g) further includes: Between the bottom interface height value of the solder ball and the top interface height value of the solder ball, multiple transverse layer cutting positions are generated at preset equidistant intervals or preset height quantiles to define the spatial reference coordinates of the slice set to be extracted for defect detection.

8. The BGA solder ball detection method based on three-dimensional X-ray computed tomography (CT) volume data according to claim 1, characterized in that, The defect detection in step h) includes: Combining the set of transverse layer cut positions, the three-dimensional region of interest (ROI) is segmented in three dimensions to obtain a set of void voxels; based on the geometric model parameters and the set of void voxels, the void ratio, void volume, and spatial distribution of the set of void voxels relative to the height of the top interface of the solder ball or the height of the bottom interface of the solder ball are calculated and output.

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