Inverter and inverter system

Abstract

The application discloses an inverter and an inverter system, and belongs to the technical field of power electronics. The inverter comprises a controller and a plurality of switching devices for direct-current alternating-current conversion. The controller is used for outputting a second voltage signal to release the pulse blocking state of the inverter after outputting a first voltage signal. The first voltage signal is used for controlling the switching of a power frequency switching device in the plurality of switching devices to the conduction state. The second voltage signal is used for controlling the switching state of a high-frequency switching device in the plurality of switching devices. The inverter and the inverter system disclosed by the application can effectively inhibit the inrush current and voltage peak at the starting moment of the inverter, can fundamentally prevent the overcurrent stress and overvoltage stress of the switching device at the starting moment of the inverter, and can more safely and reliably start the inverter by controlling the power frequency switching device and the switching device to be sequentially opened in time division under the condition that the pulse blocking state of the inverter needs to be released.

Description

Technical Field

[0001] This application belongs to the field of power electronics technology, and in particular relates to an inverter and an inverter system. Background Technology

[0002] Among related technologies, three-level inverters have advantages such as high output voltage waveform quality and low stress on switching devices, and are widely used in medium- and high-power applications. Three-level inverters typically include power frequency switching devices and high-frequency switching devices. Taking a Neutral Point Clamped (NPC) type three-level inverter as an example, the inner transistors in an NPC type three-level inverter typically operate at the fundamental frequency, while the outer transistors typically operate at the high-frequency switching frequency. The inner transistor operating at the fundamental frequency is the power frequency switching device, and the outer transistor operating at the high-frequency switching frequency is the high-frequency switching device.

[0003] In actual operation, inverters may enter a pulse blocking state (referred to as "pulse blocking state") due to fault protection or specific control requirements. The pulse blocking state is a state in which the drive signals of all switching devices are forcibly turned off. The pulse blocking state can be lifted when the fault is cleared or normal operation needs to be restored. Currently, the pulse blocking state is handled by simultaneously restoring the drive signals of all switching devices, but this method has drawbacks such as poor safety. Summary of the Invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention proposes an inverter and an inverter system that can fundamentally prevent overcurrent stress and overvoltage stress on the switching devices at the moment of inverter startup, and can start the inverter more safely and reliably.

[0005] In a first aspect, this application provides an inverter comprising: a controller and a plurality of switching devices for performing DC-AC conversion; The controller is configured to output a second voltage signal after outputting a first voltage signal, so as to release the pulse blocking state of the inverter; the first voltage signal is configured to control the power frequency switching device among the plurality of switching devices to switch to the on state; the second voltage signal is configured to control the switching state of the high frequency switching device among the plurality of switching devices.

[0006] According to the inverter of this application, when the pulse blocking state of the inverter needs to be released, a sequential start-up strategy of "first the power frequency switching devices, then the high frequency switching devices" is adopted. The controller controls the power frequency switching devices and the high frequency switching devices to start up in a time-sharing sequence. This can effectively suppress the surge current and voltage spikes at the moment of inverter startup, avoid the instantaneous large current and voltage spikes caused by the uncertainty of the DC bus midpoint potential and the stray parameters of the circuit, fundamentally prevent the overcurrent stress and overvoltage stress of the switching devices at the moment of inverter startup, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0007] According to one embodiment of this application, the controller is configured to output a second voltage signal after outputting the first voltage signal, provided that a target condition is met.

[0008] According to one embodiment of this application, the target conditions include a target duration and / or determining that the inverter's operating state is a target state.

[0009] According to one embodiment of this application, the controller is configured to start timing when outputting the first voltage signal; and determine that the target condition is met when the timing duration reaches the target duration.

[0010] According to one embodiment of this application, the inverter includes a timing circuit; The controller is used to start the timing circuit when the first voltage signal is output.

[0011] According to one embodiment of this application, the inverter includes: A current acquisition module is used to acquire the current flowing through the inverter inductor of the inverter; The controller is configured to determine the inverter's operating state as the target state when the fluctuation of the effective value of the current is less than or equal to the target threshold.

[0012] According to one embodiment of this application, the controller is configured to determine the current half-cycle of the inverter's operation; and based on the current half-cycle of the inverter's operation, to determine the current power frequency switching device and the high-frequency switch in the inverter.

[0013] According to one embodiment of this application, the first voltage signal is a constant voltage signal; the second voltage signal is a pulse width modulation signal.

[0014] According to one embodiment of this application, the inverter includes one or three DC-AC conversion branches; each DC-AC conversion branch is respectively connected to the DC positive input terminal and the DC negative input terminal of the inverter; each DC-AC conversion branch includes a plurality of the switching devices.

[0015] Secondly, this application provides an inverter system comprising: an inverter as described in the first aspect above.

[0016] According to the inverter system device of this application, when it is necessary to release the pulse blockade state of the inverter, a sequential start-up strategy of "first the power frequency switching devices, then the high frequency switching devices" is adopted. The controller in the inverter controls the power frequency switching devices and the switching devices to start up in a time-sharing sequence. This can effectively suppress the surge current and voltage spikes at the moment of inverter startup, avoid instantaneous large current and voltage spikes caused by the uncertainty of the DC bus midpoint potential and stray parameters in the circuit, fundamentally prevent the overcurrent stress and overvoltage stress of the switching devices at the moment of inverter startup, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0017] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0018] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 This is a schematic diagram of the inverter provided in the embodiments of this application; Figure 2 This is a timing diagram of the unlocked pulse blocking state when the inverter is operating in the positive half-cycle, as provided in the embodiments of this application; Figure 3 This is a timing diagram of the unlocked pulse blocking state when the inverter is operating in the negative half-cycle, as provided in the embodiments of this application; Figure 4 This is a schematic diagram illustrating the working process of the inverter provided in the embodiments of this application; Figure 5 This is a schematic diagram of the inverter system provided in the embodiments of this application; Figure 6 This is a flowchart illustrating the inverter startup control method provided in an embodiment of this application; Figure 7 This is a schematic diagram of the structure of the inverter start-up control device provided in the embodiments of this application; Figure 8This is a schematic diagram of the structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0019] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0020] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0021] The inverter and inverter system provided in this application will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.

[0022] This application provides an inverter. For example... Figure 1 As shown, the inverter 100 includes a controller 110 and multiple switching devices for performing DC-AC conversion.

[0023] In actual implementation, inverter 100 may include controller 110 and DC / AC conversion module 120, etc. DC / AC conversion module 120 is the module in the DC / AC conversion device specifically used to convert DC power to AC power.

[0024] In some embodiments, the DC-AC conversion module 120 may include a plurality of switching devices. By controlling the switching states of the plurality of switching devices in the DC-AC conversion module 120, DC power can be converted into AC power.

[0025] In some embodiments, the DC-AC conversion module 120 can be a DC-AC conversion circuit. The DC-AC conversion circuit can include single-phase or three-phase DC-AC conversion branches. Each corresponding DC-AC conversion branch can include multiple switching devices. These multiple switching devices can include multiple main switching devices and at least one auxiliary switching device. The main switching devices are the core actuators for realizing DC-AC conversion and undertake the main power transmission task. The auxiliary switching devices are supporting devices added to optimize the operating conditions of the main switching devices and improve efficiency, and do not undertake the main power transmission task.

[0026] For example, Figure 1 Phases A, B, and C each correspond to a DC-AC conversion branch. Each DC-AC conversion branch includes four main switching devices, as well as anti-parallel diodes and clamping diodes, among other devices. Specifically, the DC-AC conversion branch corresponding to phase A includes four main switching devices: Q1A, Q2A, Q3A, and Q4A, and corresponding anti-parallel diodes for each of Q1A, Q2A, Q3A, and Q4A, and two clamping diodes: D5A and D6A. The DC-AC conversion branch corresponding to phase B includes four main switching devices: Q1B, Q2B, Q3B, and Q4B, and corresponding anti-parallel diodes for each of Q1B, Q2B, Q3B, and Q4B, and two clamping diodes: D5B and D6B. The DC-AC conversion branch corresponding to phase C includes four main switching devices: Q1C, Q2C, Q3C, and Q4C, and corresponding anti-parallel diodes for each of Q1C, Q2C, Q3C, and Q4C, and two clamping diodes: D5C and D6C.

[0027] It should be noted that during the operation of the DC-AC conversion module 120, some of the aforementioned main switching devices operate at the fundamental frequency, while others operate at a high-frequency switching frequency. The main switching devices operating at the fundamental frequency are power frequency switching devices, and the main switching devices operating at the high-frequency switching frequency are high-frequency switching devices.

[0028] It should be noted that during a switching cycle, the operating frequency of a main switching device is not fixed at the fundamental frequency or a high-frequency switching frequency. The main switching device is not always a power frequency switching device or a high-frequency switching device. That is, during certain time periods of a switching cycle, a main switching device can operate at the fundamental frequency, in which case it is a power frequency switching device; while during other time periods of the same switching cycle, the main switching device can operate at a high-frequency switching frequency, in which case it is a high-frequency switching device.

[0029] In some embodiments, the inverter 100 can be a multi-level inverter, such as a three-level inverter, a five-level inverter, a seven-level inverter, a nine-level inverter, or an eleven-level inverter. It is understood that the AC output voltage per phase of a multi-level inverter can have multiple values. For example, the AC output voltage per phase of a three-level inverter can have three values: +Vdc / 2, 0, and -Vdc / 2, thus making it a three-level inverter.

[0030] In some embodiments, the multilevel inverter described above can be a diode-clamped neutral point clamped inverter (Diode-Clamped NPC Inverter). The diode-clamped neutral point clamped inverter adopts a diode-clamped neutral point clamped (NPC) topology. Alternatively, the multilevel inverter may also adopt other topologies, such as capacitor-clamped or cascaded H-bridge types. This application embodiment does not limit the specific topology of the inverter 100.

[0031] In some embodiments, in the diode-clamped midpoint clamping topology described above, each main switch transistor in each phase can specifically adopt an I-type or T-type topology, etc., and this application does not specifically limit this. For example, Figure 1 A typical topology of a conventional diode-clamped three-level inverter is shown. The DC-AC conversion branches corresponding to the three phases A, B, and C all adopt an I-type topology. The four main switching devices are vertically connected in a straight line, resembling the letter "I", and are connected to the midpoint of the DC bus with two clamping diodes.

[0032] The controller 110 is used to output a second voltage signal after outputting a first voltage signal to release the pulse blocking state of the inverter 100; the first voltage signal is used to control the power frequency switching device among the multiple switching devices to switch to the on state; the second voltage signal is used to control the switching state of the high frequency switching device among the multiple switching devices.

[0033] In actual operation, when it is necessary to release the pulse blocking state of inverter 100, controller 110 can first restore the drive signal of the power frequency switching device in inverter 100, and temporarily not restore the drive signal of the high frequency switching device in inverter 100, that is, the drive signal of the high frequency switching device in inverter 100 remains off.

[0034] In some embodiments, the controller 110 restoring the drive signal of the power frequency switching device in the inverter 100 may include: the controller 110 outputting a first voltage signal to control the power frequency switching device in the inverter 100 to switch from an off state to an on state. It is understood that the first voltage signal is the drive signal of the power frequency switching device in the inverter 100.

[0035] In some embodiments, the first voltage signal may be a pulse width modulation (PWM) signal or other forms of voltage signal.

[0036] In some embodiments, after the power frequency switching device switches to the on state, the controller 110 can restore the drive signal of the high frequency switching device in the inverter 100. At this point, all the main switching devices in the inverter 100 enter the normal operation mode, realizing the over-stress soft start of the inverter 100 and releasing or ending the pulse blocking state of the inverter 100.

[0037] In some embodiments, the controller 110 recovers the drive signal of the high-frequency switching device in the inverter 100, which may include: the controller 110 outputting a second voltage signal to control the switching state of the high-frequency switching device in the inverter 100. It is understood that the second voltage signal is the drive signal of the high-frequency switching device in the inverter 100.

[0038] In some embodiments, the second voltage signal may be a high-frequency pulse width modulation signal or other forms of high-frequency voltage signal.

[0039] In some embodiments, for each high-frequency switching device in the inverter 100, when the second voltage signal output by the controller 110 for controlling the switching state of the high-frequency switching device is high, the switching state of the high-frequency switching device can be switched to the on state; when the second voltage signal output by the controller 110 for controlling the switching state of the high-frequency switching device is low, the switching state of the high-frequency switching device can be switched to the off state.

[0040] It should be noted that under normal operating conditions of inverter 100, controller 110 can output drive signals for each switching device. These drive signals can be pulse width modulation (PWM) signals, etc. In the event of a fault in inverter 100, such as inverter inductor overcurrent or bus overvoltage (which may include at least one of the following: DC bus voltage, half-DC bus voltage, and 1 / 4 DC bus voltage overvoltage), controller 110 can perform a pulse blocking action, invalidating the drive signals of all switching devices in inverter 100 (thus putting all switching devices in the off state), thereby placing inverter 100 in a pulse-blocked state. Upon recovery from the fault, the pulse-blocked state of inverter 100 can be released, allowing inverter 100 to resume normal operation.

[0041] It should be noted that during the pulse blocking state of inverter 100, the DC bus midpoint potential of inverter 100 may be in an uncertain floating state. If the high-frequency switching device and the power frequency switching device are turned on simultaneously at this time, due to the influence of stray inductance, distributed capacitance, and voltage imbalance of DC bus capacitance in the circuit, a large surge current and voltage spike may occur at the moment the high-frequency switching device and the power frequency switching device are turned on, resulting in excessive electrical stress (including overcurrent stress and / or overvoltage stress) on the high-frequency switching device and / or the power frequency switching device. Overstress will significantly reduce the reliability of the switching device, shorten the service life of the switching device, and even cause the switching device to be instantaneously broken down and damaged in severe cases. In this embodiment, when it is necessary to release the pulse blocking state of inverter 100, the drive signal of the power frequency switching device is restored first, and then the drive signal of the high-frequency switching device is restored. The high-frequency switching device and the power frequency switching device are not turned on at the same time, thereby suppressing the above-mentioned surge current and voltage spike and reducing the large electrical stress on the high-frequency switching device and the power frequency switching device.

[0042] According to the inverter provided in the embodiments of this application, when it is necessary to release the pulse blockade state of the inverter, a sequential start-up strategy of "first the power frequency switching devices, then the high frequency switching devices" is adopted. The controller controls the power frequency switching devices and the high frequency switching devices to start up in a time-division sequence. This can effectively suppress the surge current and voltage spikes at the moment of inverter startup, avoid the instantaneous large current and voltage spikes caused by the uncertainty of the DC bus midpoint potential and the stray parameters of the circuit, fundamentally prevent the overcurrent stress and overvoltage stress of the switching devices at the moment of inverter startup, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0043] In some embodiments of this application, the controller 110 is configured to output a second voltage signal after outputting a first voltage signal, provided that a target condition is met.

[0044] In actual execution, after the controller 110 outputs a first voltage signal to control the power frequency switching device in the inverter 100 to switch to the on state, thereby restoring the drive signal of the power frequency switching device in the inverter 100, the controller 110 outputs a second voltage signal to control the switching state of the high frequency switching device in the inverter 100, thereby restoring the drive signal of the high frequency switching device in the inverter 100, provided that the target conditions are met.

[0045] It should be noted that meeting the target conditions indicates that the DC-AC conversion circuit in the inverter 100 has entered a stable operating state, with the voltage and current in the circuit changing smoothly and without drastic sudden changes such as surge current and voltage spikes.

[0046] According to the inverter provided in the embodiments of this application, after the controller outputs a first voltage signal, it outputs a second voltage signal when the target conditions are met. The controller controls the power frequency switching devices and the switching devices to turn on in a time-division sequence, which can effectively suppress the surge current and voltage spikes at the moment of inverter startup. It can avoid the instantaneous large current and voltage spikes caused by the uncertainty of the DC bus midpoint potential and the stray parameters of the circuit. It can fundamentally prevent the overcurrent stress and overvoltage stress of the switching devices at the moment of inverter startup, and start the inverter more safely and reliably. It can improve the safety margin of the switching devices in the inverter, thereby improving the reliability and service life of the switching devices in the inverter.

[0047] In some embodiments of this application, the target conditions include elapsed target time T_delay and / or determining the operating state of inverter 100 as the target state.

[0048] In actual execution, the above target conditions include at least one of the following: the first voltage signal is output after a target time T_delay, and the controller 110 determines that the inverter's operating state is the target state.

[0049] In some embodiments, after the controller 110 outputs a first voltage signal to control the switching of the power frequency switching device in the inverter 100 to the on state, thereby restoring the drive signal of the power frequency switching device in the inverter 100, after a target time T_delay, if the target condition is met, the controller 110 can output a second voltage signal to control the switching state of the high frequency switching device in the inverter 100, thereby restoring the drive signal of the high frequency switching device in the inverter 100.

[0050] It should be noted that the target duration T_delay is the delay time between the first voltage signal and the second voltage signal output by the controller 110. Within the aforementioned delay time, it is sufficient for the power frequency switching device to be fully turned on, and for parasitic parameters such as stray inductance to be pre-charged and energy balanced through its circuit, so that the DC-AC conversion circuit enters a stable state.

[0051] It should be noted that the target duration T_delay can be determined based on the actual situation of the inverter 100 (e.g., the circuit structure of the DC-AC conversion circuit and / or the electrical parameters of the switching devices). This application does not limit the specific value of the target duration in its embodiments.

[0052] In some embodiments, the target duration T_delay can be 2us to 5us, etc.

[0053] In some embodiments, after the controller 110 outputs a first voltage signal for controlling the power frequency switching device in the inverter 100 to switch to the on state, thereby restoring the drive signal of the power frequency switching device in the inverter 100, it can detect whether the operating state of the inverter 100 is the target state. If the operating state of the inverter 100 is the target state, and the target condition is met, the controller 110 can output a second voltage signal for controlling the switching state of the high frequency switching device in the inverter 100, thereby restoring the drive signal of the high frequency switching device in the inverter 100.

[0054] In some embodiments, the operating state of the inverter 100 is the target state, which can indicate that the DC-AC conversion circuit in the inverter 100 has entered a stable operating state, and the voltage and current in the circuit change smoothly without drastic changes such as surge current and voltage spikes.

[0055] According to the inverter provided in the embodiments of this application, after the controller outputs a first voltage signal, and after a target time has elapsed and / or the inverter's operating state is determined to be in the target state, it outputs a second voltage signal. The controller controls the power frequency switching devices and the switching devices to turn on in a time-division sequence, which can effectively suppress surge current and voltage spikes at the moment of inverter startup, avoid instantaneous large current and voltage spikes caused by uncertain DC bus midpoint potential and stray circuit parameters, fundamentally prevent overcurrent stress and overvoltage stress on the switching devices at the moment of inverter startup, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0056] In some embodiments of this application, the controller 110 is configured to start timing when outputting a first voltage signal; and to determine that the target condition is met when the timing duration reaches the target duration T_delay.

[0057] In actual operation, when the controller 110 outputs a first voltage signal to control the power frequency switching device in the inverter 100 to switch to the on state, it can simultaneously start timing. When the timing duration reaches the target duration T_delay, it can be determined that the target condition is met. The controller 110 can then output a second voltage signal to control the switching state of the high frequency switching device in the inverter 100, thereby restoring the drive signal of the high frequency switching device in the inverter 100.

[0058] According to the inverter provided in the embodiments of this application, when the controller outputs a first voltage signal, it starts timing. When the timing duration reaches the target duration, it outputs a second voltage signal. The controller controls the power frequency switching devices and the switching devices to turn on in a time-division sequence. This can effectively suppress the surge current and voltage spikes at the moment of inverter startup, avoid instantaneous large current and voltage spikes caused by the uncertainty of the DC bus midpoint potential and stray parameters in the circuit, fundamentally prevent the overcurrent stress and overvoltage stress of the switching devices at the moment of inverter startup, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0059] In some embodiments of this application, the inverter 100 includes a timing circuit; and a controller 110 for starting the timing circuit when a first voltage signal is output.

[0060] In actual implementation, the inverter 100 can also be equipped with a timing circuit. When the controller 110 outputs a first voltage signal used to control the switching of the power frequency switching device in the inverter 100 to the on state, it triggers the timing circuit to start timing, thereby starting the timing circuit's timing. When the timing circuit's timing reaches the target duration T_delay, it can be determined that the target condition is met, and the controller 110 can output a second voltage signal used to control the switching state of the high-frequency switching device in the inverter 100, thereby restoring the drive signal of the high-frequency switching device in the inverter 100.

[0061] It should be noted that the timing is performed using a hardware timing circuit. The timing process is completed entirely independently by the hardware, without occupying the resources of the controller 110. This significantly reduces the load on the controller 110, allowing it to process other tasks in parallel. Furthermore, the timing accuracy is higher, and the operation is more independent. It is not affected by software lag or task scheduling issues in the controller 110. Even if the controller 110 enters a high-load state, it can still stably complete the timing task.

[0062] According to the inverter provided in the embodiments of this application, when the controller outputs a first voltage signal, it starts the timing circuit. When the timing circuit reaches the target duration, it outputs a second voltage signal. The controller controls the power frequency switching devices and the switching devices to turn on in a time-division sequence. This can effectively suppress the surge current and voltage spikes at the moment of inverter startup, avoid instantaneous large current and voltage spikes caused by the uncertainty of the DC bus midpoint potential and stray parameters in the circuit, fundamentally prevent the overcurrent stress and overvoltage stress of the switching devices at the moment of inverter startup, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0063] In some embodiments of this application, the inverter 100 includes a current acquisition module for acquiring the current flowing through the inverter inductor of the inverter 100.

[0064] In actual implementation, the inverter 100 can also be equipped with a current acquisition module. The current acquisition module can be used to detect the current flowing through the inverter inductor of the inverter 100, thereby acquiring the current of the inverter inductor.

[0065] It is understood that the DC-AC conversion module 120 may include single-phase or three-phase corresponding DC-AC conversion branches. Each corresponding DC-AC conversion branch may be equipped with an inverter inductor. The first end of the inverter inductor may be connected to the corresponding output terminal in the inverter 100, and the second end of the inverter inductor may be connected to the switching device in the DC-AC conversion branch.

[0066] For example, Figure 1 The inverter inductors in the corresponding DC-AC conversion branches A, B, and C are respectively inductance L. A L B and L C .

[0067] The output of the current acquisition module can be connected to the controller 110, so that the controller 110 can acquire the current flowing through the inverter inductor of the inverter 100.

[0068] The controller 110 is used to determine the operating state of the inverter 100 as the target state when the fluctuation of the effective value of the current is less than or equal to the target threshold.

[0069] In actual execution, the controller 110 can obtain the effective value of the current flowing through the inverter inductor in each corresponding DC-AC conversion branch based on the current flowing through the inverter inductor in each corresponding DC-AC conversion branch. After obtaining the effective value of the current flowing through the inverter inductor in each corresponding DC-AC conversion branch, the controller 110 can determine whether the fluctuation of the effective value of the current flowing through the inverter inductor in each corresponding DC-AC conversion branch is less than or equal to the target threshold. If the fluctuation of the effective value of the current flowing through the inverter inductor in each corresponding DC-AC conversion branch is less than or equal to the target threshold, the controller 110 can determine that the operating state of the inverter 100 is the target state, which satisfies the target condition. If the target condition is met, the controller 110 can output a second voltage signal for controlling the switching state of the high-frequency switching devices in the inverter 100, thereby restoring the drive signal of the high-frequency switching devices in the inverter 100.

[0070] In some embodiments, variance and / or standard deviation may be used to indicate the degree of volatility.

[0071] It should be noted that the target threshold can be determined based on the actual conditions of the inverter 100 (e.g., the circuit structure of the DC-AC conversion circuit and / or the electrical parameters of the switching devices). This application does not limit the specific value of the target threshold in its embodiments.

[0072] In some embodiments, if the effective value of the current flowing through the inverter inductor in at least one corresponding DC-AC conversion branch fluctuates more than the target threshold, the controller 110 may determine that the operating state of the inverter 100 is not the target state and does not meet the target condition; if the target condition is not met, the controller 110 may not output the second voltage signal used to control the switching state of the high-frequency switching devices in the inverter 100.

[0073] According to the inverter provided in the embodiments of this application, the current flowing through the inverter inductor is obtained through the current acquisition module. When the fluctuation of the effective value of the current flowing through the inverter inductor is less than or equal to the target threshold, the controller determines the operating state of the inverter as the target state and outputs a second voltage signal. The controller controls the power frequency switching devices and the switching devices to turn on in a time-division sequence. This can effectively suppress the surge current and voltage spikes at the moment of inverter startup, avoid the instantaneous large current and voltage spikes caused by the uncertainty of the DC bus midpoint potential and the stray parameters of the circuit, fundamentally prevent the overcurrent stress and overvoltage stress of the switching devices at the moment of inverter startup, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0074] In some embodiments of this application, controller 110 is used to determine the current half-cycle of inverter 100 operation; and based on the current half-cycle of inverter 100 operation, to determine the power frequency switching devices and high frequency switches in the current inverter 100.

[0075] In actual execution, before outputting the first voltage signal, the controller 110 can first determine whether the current half-cycle of the inverter 100 is a positive half-cycle or a negative half-cycle in a switching cycle. After determining the current half-cycle of the inverter 100, the inverter can determine the power frequency switching devices and high frequency switches in the current DC-AC conversion branch based on whether the current inverter 100 is operating in a positive or negative half-cycle in a switching cycle, according to the circuit structure of each corresponding DC-AC conversion branch, thereby determining the power frequency switching devices and high frequency switches in the current inverter 100.

[0076] For example, for such Figure 1 The inverter 100 shown, when currently operating in the positive half-cycle of a switching cycle, has the following power frequency switching devices: power frequency switching devices Q2A and Q4A in the DC-AC conversion branch corresponding to current A, power frequency switching devices Q2B and Q4B in the DC-AC conversion branch corresponding to current B, and power frequency switching devices Q2C and Q4C in the DC-AC conversion branch corresponding to current C; and high frequency switching devices Q1A and Q3A in the DC-AC conversion branch corresponding to current A, high frequency switching devices Q1B and Q3B in the DC-AC conversion branch corresponding to current B, and high frequency switching devices Q1C and Q3C in the DC-AC conversion branch corresponding to current C.

[0077] For example, for such Figure 1 The inverter 100 shown, when currently operating in the negative half-cycle of a switching cycle, has the following power frequency switching devices: power frequency switching devices Q1A and Q3A in the DC-AC conversion branch corresponding to current A, power frequency switching devices Q1B and Q3B in the DC-AC conversion branch corresponding to current B, and power frequency switching devices Q1C and Q3C in the DC-AC conversion branch corresponding to current C; and high frequency switching devices Q2A and Q4A in the DC-AC conversion branch corresponding to current A, high frequency switching devices Q2B and Q4B in the DC-AC conversion branch corresponding to current B, and high frequency switching devices Q2C and Q4C in the DC-AC conversion branch corresponding to current C.

[0078] According to the inverter provided in the embodiments of this application, the controller determines the current half-cycle of inverter operation and, based on the current half-cycle, determines the current power frequency switching devices and high-frequency switching devices in the inverter. On this basis, a sequential start-up strategy of "power frequency switching devices first, then high-frequency switching devices" can be implemented. The controller controls the power frequency switching devices and the switching devices to start up in a time-division sequence, which can effectively suppress surge current and voltage spikes at the moment of inverter startup, avoid instantaneous large current and voltage spikes caused by uncertain DC bus midpoint potential and stray circuit parameters, fundamentally prevent overcurrent stress and overvoltage stress on the switching devices at the moment of inverter startup, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0079] In some embodiments of this application, the first voltage signal is a constant voltage signal; the second voltage signal is a pulse width modulation signal.

[0080] In actual operation, for each power frequency switching device in the current inverter 100, the first voltage signal output by the controller 110 to control the power frequency switching device to switch to the on state can be a constant voltage signal, so that the power frequency switching device can switch from the off state to the on state under the drive of the signal.

[0081] In actual operation, for each high-frequency switching device in the current inverter 100, the second voltage signal output by the controller 110 to control the switching state of the high-frequency switching device can be a pulse width modulation signal, so that the high-frequency switching device can switch its switching state under the drive of the signal.

[0082] For example, Figure 3 As shown Figure 1 The timing of the release pulse blocking state when the inverter 100 is operating in the positive half-cycle of a switching cycle is shown. Figure 4 As shown Figure 1 The timing of the release pulse blocking state of the inverter 100 shown is as follows when the inverter 100 is operating in the negative half-cycle of a switching cycle. Figure 3 and Figure 4 The waveforms of the drive signals for the switching devices in inverter 100 are shown in detail. It should be noted that... Figure 3 and Figure 4 In this context, Q1 refers to Q1A, Q1B, and Q1C; Q2 refers to Q2A, Q2B, and Q2C; Q3 refers to Q3A, Q3B, and Q3C; and Q4 refers to Q4A, Q4B, and Q4C.

[0083] According to the inverter provided in the embodiments of this application, by using a constant voltage signal as the first voltage signal and a pulse width modulation signal as the second voltage signal, a sequential turn-on strategy of "first the power frequency switching devices, then the high frequency switching devices" can be realized. The controller controls the power frequency switching devices and the switching devices to turn on in a time-division sequential manner, which can effectively suppress the surge current and voltage spikes at the moment of inverter startup, avoid instantaneous large current and voltage spikes caused by the uncertainty of the DC bus midpoint potential of the inverter and the stray parameters of the circuit, fundamentally prevent the overcurrent stress and overvoltage stress of the switching devices at the moment of inverter startup, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0084] In some embodiments of this application, the inverter 100 includes one or three DC-AC conversion branches; each DC-AC conversion branch is connected to the DC positive input terminal and the DC negative input terminal of the inverter 100 respectively; each DC-AC conversion branch includes multiple switching devices.

[0085] In practical implementation, when inverter 100 is a single-phase inverter, it may include one DC-AC conversion branch. When inverter 100 is a three-phase inverter, it may include three DC-AC conversion branches, for example... Figure 1 Inverter 100 is shown.

[0086] In some embodiments, each DC-AC conversion branch is connected to both the positive DC input terminal and the negative DC input terminal of the inverter 100, and the DC-AC conversion branch includes a plurality of switching devices.

[0087] In some embodiments, the positive DC input terminal and the negative DC input terminal of the inverter 100 can be connected to the output terminal of a DC power generation device. The DC power generation device may include at least one of a photovoltaic (PV) module, a DC wind power generation device, and a thermoelectric generator. The specific type of DC power generation device is not limited in the embodiments of this application.

[0088] In some embodiments, reference Figure 1 The DC power generation device can be a photovoltaic module, and the DC positive input terminal and DC negative input terminal of the inverter 100 can be connected to the positive output terminal (PV+) and negative output terminal (PV-) of the photovoltaic module, respectively.

[0089] According to the inverter provided in the embodiments of this application, when it is necessary to release the pulse blockade state of the inverter, a sequential start-up strategy of "first the power frequency switching devices, then the high frequency switching devices" is adopted. The controller controls the power frequency switching devices and the high frequency switching devices to start up in a time-division sequence. This can effectively suppress the surge current and voltage spikes at the moment of inverter startup, avoid the instantaneous large current and voltage spikes caused by the uncertainty of the DC bus midpoint potential and the stray parameters of the circuit, fundamentally prevent the overcurrent stress and overvoltage stress of the switching devices at the moment of inverter startup, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0090] To facilitate understanding of the above embodiments of this application, the operation process of the inverters provided in the above embodiments of this application is described below. For example... Figure 4 As shown, Figure 1 The operation of the inverter 100 shown may include the following steps.

[0091] Step 410: Determine whether to end the pulse blocking state.

[0092] The controller 110 can monitor whether faults such as inverter inductor overcurrent and / or DC bus overvoltage have been recovered. If so, the pulse blockade state can end and step 420 can be executed; if not, step 410 can be re-executed and the controller 110 continues to monitor whether faults such as inverter inductor overcurrent and / or DC bus overvoltage have been recovered.

[0093] Step 420: Determine if it is working in the positive half-cycle.

[0094] Trigger the sequential start logic of "first power frequency switching devices, then high frequency switching devices". If so, proceed to step 430; otherwise, proceed to step 460.

[0095] Step 430: Turn on the drive signals for the power frequency switching devices (Q2 and Q4).

[0096] The controller 110 can initially output only the drive signals for the power frequency switching devices (Q2 and Q4) to turn on Q2 and Q4. At this time, the drive signals for the high frequency switching devices (Q1 and Q3) are still set to invalid.

[0097] Step 440, Delay T_delay.

[0098] A delay timer can be started to wait for a preset target duration T_delay. The waiting time T_delay is sufficient for Q2 and Q4 to be fully turned on, and for parasitic parameters such as stray inductance to be pre-charged and energy balanced through their respective circuits, so that the DC-AC conversion circuit enters a stable state.

[0099] Step 450: Turn on the drive signals for the high-frequency switching devices (Q1 and Q3).

[0100] After the delay time (i.e., after the target duration T_delay) has elapsed, the controller 110 can output drive signals for the high-frequency switching devices (Q1 and Q3). At this point, all switching devices in the inverter 100 can enter normal operating mode.

[0101] Step 460: Turn on the drive signals for the power frequency switching devices (Q1 and Q3).

[0102] The controller 110 can initially output only the drive signals for the power frequency switching devices (Q1 and Q3) to turn on Q1 and Q3. At this time, the drive signals for the high frequency switching devices (Q2 and Q4) are still set to invalid.

[0103] Step 470, Delay T_delay.

[0104] A delay timer can be started to wait for a preset target duration T_delay. The waiting time T_delay is sufficient for Q2 and Q4 to be fully turned on, and for parasitic parameters such as stray inductance to be pre-charged and energy balanced through their respective circuits, so that the DC-AC conversion circuit enters a stable state.

[0105] Step 480: Turn on the drive signals for the high-frequency switching devices (Q2 and Q4).

[0106] After the delay time (i.e., after the target duration T_delay) is reached, the controller 110 can output drive signals for the high-frequency switching devices (Q2 and Q4). At this point, all switching devices in the inverter 100 can enter normal operating mode, and the inverter 100 operates normally.

[0107] It should be noted that in the above steps, Q1 refers to Q1A, Q1B and Q1C, Q2 refers to Q2A, Q2B and Q2C, Q3 refers to Q3A, Q3B and Q3C, and Q4 refers to Q4A, Q4B and Q4C.

[0108] This application also provides an inverter system. For example... Figure 5 As shown, the inverter system 500 may include an inverter 100.

[0109] In actual implementation, the inverter system 500 may include the inverter 100 provided in any of the foregoing embodiments of this application.

[0110] According to the inverter system provided in the embodiments of this application, when it is necessary to release the pulse blockade state of the inverter, a sequential start-up strategy of "first the power frequency switching devices, then the high frequency switching devices" is adopted. The controller in the inverter controls the power frequency switching devices and the switching devices to start up in a time-sharing sequence. This can effectively suppress the surge current and voltage spikes at the moment of inverter startup, avoid instantaneous large current and voltage spikes caused by the uncertainty of the DC bus midpoint potential and stray parameters in the circuit, fundamentally prevent the overcurrent stress and overvoltage stress of the switching devices at the moment of inverter startup, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0111] In some embodiments, this application also provides a method for starting up an inverter.

[0112] The inverter startup control method can be applied to the terminal, and can be executed by the hardware or software in the terminal.

[0113] The inverter startup control method provided in this application embodiment can be executed by an electronic device or a functional module or entity in an electronic device that can implement the inverter startup control method. The electronic devices mentioned in this application embodiment include, but are not limited to, mobile phones, tablets, computers, cameras, and wearable devices. The following uses an electronic device as the execution subject to illustrate the inverter startup control method provided in this application embodiment.

[0114] like Figure 6 As shown, the start-up control method of the inverter includes steps 610 and 620.

[0115] Step 610: Output the first voltage signal; the first voltage signal is used to control the power frequency switching device in the inverter to switch to the on state; Step 620: Output a second voltage signal to release the pulse blocking state of the inverter; the second voltage signal is used to control the switching state of the high-frequency switching devices in the inverter.

[0116] According to the inverter startup control method provided in the embodiments of this application, when it is necessary to release the pulse blockade state of the inverter, a sequential startup strategy of "first the power frequency switching devices, then the high frequency switching devices" is adopted to control the power frequency switching devices and the switching devices to start up in a time-division sequence. This can effectively suppress the surge current and voltage spikes at the moment of inverter startup, avoid the instantaneous large current and voltage spikes caused by the uncertainty of the DC bus midpoint potential and the stray parameters of the circuit, fundamentally prevent the overcurrent stress and overvoltage stress of the switching devices at the moment of inverter startup, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0117] In some embodiments, outputting a second voltage signal includes: after outputting a first voltage signal, outputting a second voltage signal if a target condition is met.

[0118] In some embodiments, the target conditions include elapsed target time and / or determining the inverter's operating state as the target state.

[0119] In some embodiments, before outputting the second voltage signal, the method further includes: Start timing when the first voltage signal is output; If the timed duration reaches the target duration, the target condition is determined to be met.

[0120] In some embodiments, before outputting the second voltage signal, the method further includes: Obtain the current flowing through the inverter inductor of the inverter; If the fluctuation of the effective value of the current is less than or equal to the target threshold, the operating state of the inverter is determined to be the target state.

[0121] In some embodiments, before outputting the first voltage signal, the method further includes: Determine the current half-cycle of inverter operation; Based on the current half-cycle of inverter operation, determine the power frequency switching devices and high frequency switching devices in the current inverter.

[0122] The inverter startup control method provided in this application can be executed by an inverter startup control device. This application uses the example of an inverter startup control device executing the inverter startup control method to illustrate the inverter startup control device provided in this application.

[0123] This application also provides a startup control device for an inverter. For example... Figure 7As shown, the inverter start-up control device 700 includes: a control module 710, which outputs a second voltage signal after outputting a first voltage signal to release the pulse blocking state of the inverter; the first voltage signal is used to control the power frequency switching device in the inverter to switch to the on state; and the second voltage signal is used to control the switching state of the high frequency switching device in the inverter.

[0124] According to the inverter start-up control device provided in the embodiments of this application, when it is necessary to release the pulse blockade state of the inverter, a sequential start-up strategy of "first the power frequency switching devices, then the high frequency switching devices" is adopted to control the power frequency switching devices and the switching devices to start up in a time-division sequence. This can effectively suppress the surge current and voltage spikes at the moment of inverter start-up, avoid the instantaneous large current and voltage spikes caused by the uncertainty of the DC bus midpoint potential of the inverter and the stray parameters of the circuit, fundamentally prevent the overcurrent stress and overvoltage stress of the switching devices at the moment of inverter start-up, start the inverter more safely and reliably, improve the safety margin of the switching devices in the inverter, and thus improve the reliability and service life of the switching devices in the inverter.

[0125] In some embodiments, the control module 710 is configured to output a second voltage signal after outputting a first voltage signal, provided that a target condition is met.

[0126] In some embodiments, the target conditions include elapsed target time and / or determining the inverter's operating state as the target state.

[0127] In some embodiments, the control module 710 is configured to start timing when a first voltage signal is output; and to determine that the target condition is met when the timing duration reaches the target duration.

[0128] In some embodiments, the start control device 700 may further include: The acquisition module is used to acquire the current flowing through the inverter inductor of the inverter; The control module 710 is used to determine the inverter's operating state as the target state when the fluctuation of the effective value of the current is less than or equal to the target threshold.

[0129] In some embodiments, the control module 710 may include: The first determining unit is used to determine the current half-cycle of the inverter's operation. The second determining unit is used to determine the power frequency switching devices and high frequency switches in the current inverter based on the current half-cycle of inverter operation.

[0130] The inverter start-up control device in this application embodiment can be an electronic device or a component within an electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal or other devices besides a terminal. For example, the electronic device can be a mobile phone, tablet computer, laptop computer, PDA, in-vehicle electronic device, mobile internet device (MID), augmented reality (AR) / virtual reality (VR) device, robot, wearable device, ultra-mobile personal computer (UMPC), netbook, or personal digital assistant (PDA), etc. It can also be a server, network attached storage (NAS), personal computer (PC), television (TV), ATM, or self-service machine, etc. This application embodiment does not specifically limit the specific device.

[0131] The inverter start-up control device in this embodiment can be a device with an operating system. This operating system can be Microsoft Windows, Android, iOS, or other possible operating systems; this embodiment does not specifically limit it.

[0132] The inverter start-up control device provided in this application embodiment can achieve... Figure 6 The various processes implemented in the method implementation examples will not be described again here to avoid repetition.

[0133] In some embodiments, such as Figure 8 As shown, this application embodiment also provides an electronic device 800, including a processor 801, a memory 802, and a computer program stored in the memory 802 and executable on the processor 801. When the computer program is executed by the processor 801, it implements the various processes of the above-described inverter start-up control method embodiment and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0134] It should be noted that the electronic devices in the embodiments of this application include the mobile electronic devices and non-mobile electronic devices described above.

[0135] This application also provides a non-volatile computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the various processes of the above-described inverter start-up control method embodiment and achieves the same technical effect. To avoid repetition, it will not be described again here.

[0136] The processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk.

[0137] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described inverter startup control method.

[0138] The processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk.

[0139] This application embodiment also provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement the various processes of the above-described inverter start-up control method embodiment and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0140] It should be understood that the chip mentioned in the embodiments of this application may also be referred to as a system-on-a-chip, system chip, chip system, or system-on-a-chip, etc.

[0141] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0142] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the related technology, can be embodied in the form of a computer software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0143] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

[0144] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0145] Although embodiments of this application have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of this application, the scope of which is defined by the claims and their equivalents.

Claims

1. An inverter, characterized in that, include: The controller and multiple switching devices for DC-AC conversion; The controller is configured to output a second voltage signal after outputting a first voltage signal, so as to release the pulse blocking state of the inverter; The first voltage signal is used to control the power frequency switching device among the plurality of switching devices to switch to the on state; The second voltage signal is used to control the switching state of the high-frequency switching device among the plurality of switching devices.

2. The inverter according to claim 1, characterized in that, The controller is configured to output the second voltage signal after outputting the first voltage signal, provided that the target condition is met.

3. The inverter according to claim 2, characterized in that, The target conditions include the elapsed target time and / or the determination that the inverter's operating state is the target state.

4. The inverter according to claim 3, characterized in that, The controller is configured to start timing when the first voltage signal is output; and to determine that the target condition is met when the timing duration reaches the target duration.

5. The inverter according to claim 4, characterized in that, The inverter includes a timing circuit; The controller is used to start the timing circuit when the first voltage signal is output.

6. The inverter according to claim 3, characterized in that, The inverter includes: A current acquisition module is used to acquire the current flowing through the inverter inductor of the inverter; The controller is configured to determine the inverter's operating state as the target state when the fluctuation of the effective value of the current is less than or equal to the target threshold.

7. The inverter according to claim 1, characterized in that, The controller is used to determine the current half-cycle of the inverter's operation; and based on the current half-cycle of the inverter's operation, to determine the current power frequency switching device and the current high frequency switch in the inverter.

8. The inverter according to claim 1, characterized in that, The first voltage signal is a constant voltage signal; the second voltage signal is a pulse width modulation signal.

9. The inverter according to any one of claims 1 to 8, characterized in that, The inverter includes one or three DC-AC conversion branches; each DC-AC conversion branch is connected to the DC positive input terminal and the DC negative input terminal of the inverter respectively; each DC-AC conversion branch includes multiple switching devices.

10. An inverter system, characterized in that, Including the inverter as described in any one of claims 1 to 9.

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