Display device

Abstract

A display device includes: a pixel circuit layer including a pixel circuit and an auxiliary pixel circuit on a base layer; and a light emitting element layer including a light emitting element electrically connected to the pixel circuit. The pixel circuit layer includes a line member and an electrode member electrically connected to the line member. The light emitting element layer includes an organic layer including a first region and a second region. In a plan view, the first region and the second region are spaced apart from each other, and the electrode member is interposed between the first region and the second region. The line member is electrically connected to the auxiliary pixel circuit.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0060524 filed on May 10, 2023, in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure generally relates to a display device and a method of manufacturing a display device. Background Art

[0004] With the development of information technology, display devices have been widely used as connection media for providing information to users. As the use of display devices has been extended to many fields and applications, the demand for high-resolution display devices has particularly increased.

[0005] The display device may include an array of sub-pixels, each of which includes a light-emitting element. In addition, the display device generally includes a backplane structure, which may include pixel circuits, etc., and a plurality of lines may be patterned in one area of ​​the backplane structure. In such a display device, it is necessary to distinguish and maintain separate electrical signals, which are supplied to sub-pixels that may be adjacent to each other. For example, due to leakage current (lateral leakage) between sub-pixels, there may be a risk of electrical signal mixing. Therefore, a display device and a display device manufacturing process that reduce the risk of leakage current are needed. Utility Model Content

[0006] The embodiments disclosed herein may provide a display device or a method of manufacturing a display device that prevents, avoids, or reduces the risk of a malfunction such as a leakage current.

[0007] Embodiments may also provide a display device and a method of manufacturing the display device, in which high-resolution display performance may be improved.

[0008] The embodiments also provide a display device and a method of manufacturing the display device, in which a manufacturing process is simplified, so that the degree of freedom of circuit design can be improved.

[0009] According to aspects of the present disclosure, a display device may include a pixel circuit layer and a light-emitting element layer. The pixel circuit layer may include a pixel circuit and an auxiliary pixel circuit on a substrate layer, and the light-emitting element layer may include a light-emitting element electrically connected to the pixel circuit. In an embodiment, the pixel circuit layer includes a line component and an electrode component electrically connected to the line component, and the light-emitting element layer includes an organic layer, the organic layer including a first area and a second area. In a plan view, the first area and the second area may be spaced apart from each other, the electrode component is between the first area and the second area, and the line component may be electrically connected to the auxiliary pixel circuit.

[0010] The light emitting element layer may further include a repair light emitting element electrically separated from the pixel circuit, the repair light emitting element being electrically connected to the auxiliary pixel circuit. Each of the light emitting element and the repair light emitting element may include an anode electrode, a cathode electrode, and a light emitting component electrically connected between the anode electrode and the cathode electrode and including an organic material.

[0011] The wire member may be electrically connected to the repairing light emitting element through a connection region, and the wire member may not be electrically connected to the light emitting element, with a non-connection region interposed between the wire member and the light emitting element.

[0012] The light emitting part may include a first light emitting part and a second light emitting part spaced apart from each other. The first region of the organic layer may include the first light emitting part, and the second region of the organic layer may include the second light emitting part.

[0013] The light emitting element layer may further include a pixel defining layer, the pixel defining layer including a first pixel defining layer and a second pixel defining layer, the first pixel defining layer and the second pixel defining layer defining an area where the light emitting component is disposed and being spaced apart from each other. The first region of the organic layer may further include the first pixel defining layer, and the second region of the organic layer may further include the second pixel defining layer.

[0014] Each of the pixel circuit and the auxiliary pixel circuit may include a driving transistor, a switching transistor, a compensation transistor, an initialization transistor, an operation control transistor, an emission control transistor, and a storage capacitor. The pixel circuit may also include a bypass transistor. The auxiliary pixel circuit may also include a capacitance control transistor, a capacitance element initialization transistor, and a compensation capacitor. The line component may be electrically connected to an output node between the capacitance control transistor and the capacitance element initialization transistor.

[0015] The repair light-emitting element may be electrically connected to the line member through a connection electrode. The connection electrode may be electrically separated from the emission control transistor and the bypass transistor of the pixel circuit.

[0016] The light emitting element may be electrically connected to the emission control transistor of the pixel circuit and the bypass transistor through one electrode which is not electrically connected to the line member.

[0017] The pixel circuit layer may further include a data line and a power line, the data line and the power line being electrically connected to the pixel circuit. The data line and the power line may be spaced apart from each other in a first direction and extend in a second direction different from the first direction. The electrode component may be disposed between the data line and the power line, and the electrode component may be adjacent to the connection electrode along the first direction.

[0018] The pixel circuit layer may include a first interlayer conductive layer, a second interlayer conductive layer on the first interlayer conductive layer, and a third interlayer conductive layer on the second interlayer conductive layer. The line member may be formed of the second interlayer conductive layer, and the electrode member may be formed of the third interlayer conductive layer.

[0019] The pixel circuit layer may include a first interlayer conductive layer, a second interlayer conductive layer on the first interlayer conductive layer, a third interlayer conductive layer on the second interlayer conductive layer, and a fourth interlayer conductive layer on the third interlayer conductive layer. The pixel circuit layer may further include a bridge component electrically connecting the line component and the electrode component to each other. The line component may be formed by the second interlayer conductive layer, the bridge component may be formed by the third interlayer conductive layer, and the electrode component may be formed by the fourth interlayer conductive layer.

[0020] The first region of the organic layer and the second region of the organic layer may be spaced apart from each other, and an organic material removal region is between the first region and the second region. The pixel circuit layer may further include a via layer directly adjacent to the light emitting element layer, and the via layer may not be disposed in the organic material removal region.

[0021] The electrode part may not overlap a region where the anode electrode of the light emitting element and the light emitting part are in contact with each other in a plan view.

[0022] The light emitting element may include a plurality of light emitting elements forming sub-pixels that are different from each other and adjacent to each other in one direction. The line member may be provided between the adjacent sub-pixels.

[0023] According to another aspect of the present disclosure, a display device is provided including: sub-pixels and repair sub-pixels formed on a substrate layer, the sub-pixels and the repair sub-pixels each including a light-emitting element; and a line component arranged on the substrate layer and an electrode component on the line component, wherein the light-emitting element of each of the sub-pixels and the repair sub-pixels includes a first electrode, a second electrode, and a light-emitting layer electrically connected between the first electrode and the second electrode and including an organic material, wherein the sub-pixels include a pixel circuit, wherein the repair sub-pixels include a repair pixel circuit, wherein the line component electrically connects the repair pixel circuit to the light-emitting element included in the repair sub-pixel, and wherein, in a plan view, the light-emitting layer includes a first light-emitting layer and a second light-emitting layer spaced apart from each other, and the electrode component is arranged between the first light-emitting layer and the second light-emitting layer.

[0024] According to another aspect of the present disclosure, a method for manufacturing a display device is provided, the method comprising: manufacturing a pixel circuit layer, the pixel circuit layer comprising a pixel circuit, a repair pixel circuit, a line component electrically connected to the repair pixel circuit, and an electrode component electrically connected to the line component; disposing a light-emitting element layer including a light-emitting element on the pixel circuit layer; removing at least a portion of an organic layer disposed on the electrode component by applying a pulse input to the line component; inspecting the pixel circuit; and performing a repair process of electrically connecting the repair pixel circuit to at least some of the light-emitting elements.

[0025] Each of the light emitting elements may include an anode electrode, a cathode electrode, and a light emitting component electrically connected between the anode electrode and the cathode electrode and including an organic material. The removing at least a portion of the organic layer disposed on the electrode component may include removing at least a portion of the light emitting component.

[0026] The inspection may include determining whether the light emitting element operates normally. In the inspection, the light emitting element may be electrically connected to the pixel circuit and may not be electrically connected to the repair pixel circuit.

[0027] The performing of the repair process may include electrically separating the light emitting element to be repaired that is not operating normally from the pixel circuit; and electrically connecting the light emitting element to be repaired to the repair pixel circuit.

[0028] The pixel circuit may include an emission control transistor and a bypass transistor. The manufacturing of the pixel circuit layer may include forming a connection portion having at least a portion overlapping with the line member in a plan view, the connection portion being electrically connected to the anode electrode. The performing of the repair process may include electrically connecting the connection electrode and the line member to each other. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 is a block diagram illustrating a display device according to an embodiment of the present disclosure.

[0030] Figure 2 is a schematic cross-sectional view of a portion (eg, a sub-pixel) of a display device according to an embodiment of the present disclosure.

[0031] Figure 3 and Figure 4 is a schematic cross-sectional view showing a stacked structure of a pixel circuit layer according to an embodiment of the present disclosure.

[0032] Figure 5 is a schematic cross-sectional view showing a light emitting element according to an embodiment of the present disclosure.

[0033] Figure 6 is a schematic block diagram showing an electrical connection structure of a light emitting element according to an embodiment of the present disclosure.

[0034] Figure 7 A pixel circuit according to an embodiment of the present disclosure is shown.

[0035] Figure 8 A repair pixel circuit according to an embodiment of the present disclosure is shown.

[0036] Fig. 9 Schematic diagram showing a structure in which a light emitting element is electrically connected to a pixel circuit according to an embodiment of the present disclosure.

[0037] Fig.10 is a schematic diagram showing a structure in which a light emitting element is electrically connected to a repair pixel circuit according to an embodiment of the present disclosure.

[0038] Fig.11 is a view schematically illustrating an organic layer removal process according to an embodiment of the present disclosure.

[0039] Fig.12 and Fig.13 is a schematic cross-sectional view showing a display device according to an embodiment of the present disclosure.

[0040] Fig.14 is a schematic flowchart illustrating a method of manufacturing a display device according to an embodiment of the present disclosure.

[0041] Figures 15 to 30 is a schematic diagram illustrating a method according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0042] Example embodiments will now be described more fully below with reference to the accompanying drawings. The embodiments may have different forms than those shown in the accompanying drawings, and the present disclosure should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that the present disclosure will be detailed and complete, and the scope of the example embodiments will be fully conveyed to those skilled in the art.

[0043] In the accompanying drawings, the dimensions may be exaggerated for clarity of illustration and better understanding. The same reference numerals refer to the same elements throughout.

[0044] The embodiments described in detail only show specific examples, but various changes and different shapes can be applied. Therefore, the examples are not limited to specific shapes, but apply to all changes and equivalent materials and replacements.

[0045] It should be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. Therefore, without departing from the teachings of the present disclosure, the "first" element discussed below may also be referred to as the "second" element. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form.

[0046] It will be understood that when used in this specification, the terms "comprise" and / or "include" indicate the presence of the stated features, wholes, steps, operations, elements and / or components, but do not exclude the presence and / or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof. In addition, the expression that an element such as a layer, a zone, a substrate or a plate is placed "on" or "above" another element not only indicates the situation where the element is "directly" placed "on" or "directly above" another element, but also indicates the situation where another element intervenes between the element and another element. On the contrary, the expression that an element such as a layer, a zone, a substrate or a plate is placed "under" or "below" another element not only indicates the situation where the element is "directly" placed "under" or "directly below" the element, but also indicates the situation where another element intervenes between the element and another element. It will be understood that when an element is referred to as being "between" two elements, the element may be the only element between the two elements, or one or more intervening elements may also be present.

[0047] The present disclosure generally relates to a display device and a method of manufacturing the display device. Figure 1 is a block diagram showing a display device DD according to an embodiment of the present disclosure. Figure 1 The display device DD is configured to emit light and may be a light emitting element LD (see Figure 2) is an electronic device as a light source. In the illustrated embodiment, the display device DD includes a pixel array 110, a scan driver 120, a data driver 130, and a controller 140.

[0048] The pixel array 110 may include sub-pixels SPX connected to the scan lines SL and the data lines DL. In some embodiments, one or more of the sub-pixels SPX may form a pixel unit (eg, a first pixel unit PXU1 and a second pixel unit PXU2 (see FIG. 1 )). Fig.15 )). Each of the sub-pixels SPX may be one of a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3 constituting a color pixel. For example, the sub-pixel SPX may include a first sub-pixel SPX1 emitting light of a first color (e.g., red), a second sub-pixel SPX2 emitting light of a second color (e.g., green), and a third sub-pixel SPX3 emitting light of a third color (e.g., blue). However, the present disclosure is not limited to the above examples.

[0049] In some embodiments, the pixel array 110 may further include a repair sub-pixel RSPX. For example, a repair process performed during the manufacture of the display device DD may begin by inspecting and determining whether the sub-pixel SPX is operating normally. A sub-pixel SPX determined to be operating abnormally during the repair process may be repaired to be provided as a repair sub-pixel RSPX. The sub-pixel SPX may be repaired to be electrically connected to an auxiliary or repair pixel circuit RPXC (see Figure 6 ), instead of being connected to the pixel circuit PXC (see Figure 5 ).

[0050] The scan driver 120 may be disposed at one side of the pixel array 110. The scan driver 120 may receive a first control signal SCS from the controller 140. The scan driver 120 may output a scan signal GW (see Figure 7 ) is supplied to the scan line SL, and thus the scan driver 120 can provide the scan signal GW to the sub-pixel SPX.

[0051] The first control signal SCS may be a signal for controlling the driving timing of the scan driver 120. The first control signal SCS may include a scan start signal and a plurality of clock signals for the scan signal GW. The scan signal GW may be set to correspond to the transistor (eg, Figure 7 The gate conduction levels corresponding to the switching transistor T2 and the compensation transistor T3) are shown.

[0052] The data driver 130 may be disposed at one side of the pixel array 110. The data driver 130 may receive a second control signal DCS from the controller 140. The data driver 130 may output a data signal DATA (see Figure 7 ) is supplied to one or more of the data lines, and thus the data driver 130 can provide the data signal DATA to the sub-pixel SPX. For example, the second control signal DCS can be provided to the sub-pixel SPX through the data line DL. The second signal DCS can be a signal for controlling the driving timing of the data driver 130.

[0053] A portion of each scan line SL may extend in the first direction DR1 to be electrically connected to the subpixels SPX of the corresponding pixel row through another portion of the scan line SL extending in the second direction DR2. Therefore, each scan line SL may supply a scan signal GW to the subpixels SPX in the row corresponding to the scan line SL.

[0054] Each data line DL may extend along a pixel column (eg, a second direction DR2 ) and may be electrically connected to a sub-pixel SPX in the pixel column. The data line DL may supply a data signal DATA to the sub-pixel SPX connected to the data line DL.

[0055] The pixel row direction is a horizontal direction and may be referred to as a first direction DR1. The pixel column direction is a vertical direction and may be referred to as a second direction DR2. However, the present disclosure is not limited thereto.

[0056] Figure 1 An embodiment is shown in which the scan driver 120, the data driver 130, and the controller 140 are distinguished from each other. However, at least some of the scan driver 120, the data driver 130, and the controller 140 may be integrated into one module or one integrated circuit (IC) chip.

[0057] Next, we will refer to Figures 2 to 5 A cross-sectional structure of a display device DD according to an embodiment of the present disclosure is described.

[0058] Figure 2 is a schematic cross-sectional view of a portion (eg, a sub-pixel SPX) of a display device DD according to an embodiment of the present disclosure. Figure 3 and Figure 4 is a schematic cross-sectional view illustrating a stacked structure of a pixel circuit layer PCL according to an embodiment of the present disclosure. Figure 5 is a schematic cross-sectional view showing a light emitting element LD according to an embodiment of the present disclosure.

[0059] Reference Figures 2 to 5 , the display device DD includes a pixel circuit layer PCL and a light emitting element layer LEL.

[0060] The pixel circuit layer PCL may include a pixel circuit PXC (see Figure 6 The pixel circuit layer PCL may include a base layer BSL, a conductive layer for forming the pixel circuit PXC, and an insulating layer disposed on or in the conductive layer.

[0061] For example, Figure 3 The stacked structure in the display device DD (or pixel circuit layer PCL) according to the embodiment of the present disclosure shown may include a base layer BSL, a lower auxiliary electrode layer BML, a buffer layer BFL, an active layer ACT, a first gate insulating layer GI1, a first interlayer conductive layer ICL1, a second gate insulating layer GI2, a second interlayer conductive layer ICL2, an interlayer insulating layer ILD, a third interlayer conductive layer ICL3 and a via layer VIA, and the stacked structure may have a form obtained by patterning at least some of the layers in the structure when the above layers are sequentially stacked. In some embodiments, the stacked structure in the display device DD (or pixel circuit layer PCL) includes an additional interlayer insulating layer ILD' and a fourth interlayer conductive layer ICL4 between the third interlayer conductive layer ICL3 and the via layer VIA (see Figure 4 ). In the following, for the convenience of description, Figure 3 The stacked structure shown will be mainly described, and Figure 4 The illustrated stacked structure will be additionally described as a structure according to an embodiment of the present disclosure.

[0062] In the following drawings, the Figure 3 and Figure 4 Identical layers (eg, patterned in the same process) may be represented by using the same hatching.

[0063] The base layer BSL may form (or constitute) a base surface of the display device DD. The base layer BSL may include a rigid or flexible substrate or film. For example, the base layer BSL may be a glass substrate or a base film including an organic material. The substance of the base layer BSL or the material constituting the base layer BSL is not limited to a specific example, and the base layer BSL may include various materials.

[0064] The buffer layer BFL may prevent impurities from diffusing into the active layer ACT or prevent moisture from penetrating into the active layer ACT. According to an embodiment, the buffer layer BFL may include a layer made of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and aluminum oxide (AlO x) is selected from the group consisting of at least one material. However, the present disclosure is not necessarily limited to the above examples.

[0065] The active layer ACT may include a semiconductor. For example, the active layer ACT may include at least one semiconductor selected from the group consisting of polysilicon, low temperature polysilicon (LTPS), amorphous silicon, and an oxide semiconductor. According to an embodiment, the active layer ACT may form a channel of a transistor, and impurities may be doped into a portion of the active layer ACT that contacts a source electrode / drain electrode.

[0066] The lower auxiliary electrode layer BML, the first interlayer conductive layer ICL1, the second interlayer conductive layer ICL2, the third interlayer conductive layer ICL3, and the fourth interlayer conductive layer ICL4 may include a conductive material. According to an embodiment, each of the lower auxiliary electrode layer BML, the first interlayer conductive layer ICL1, the second interlayer conductive layer ICL2, the third interlayer conductive layer ICL3, and the fourth interlayer conductive layer ICL4 may include at least one conductive layer. In some embodiments, each of the lower auxiliary electrode layer BML, the first interlayer conductive layer ICL1, the second interlayer conductive layer ICL2, the third interlayer conductive layer ICL3, and the fourth interlayer conductive layer ICL4 may include at least one conductive material selected from the group consisting of gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and platinum (Pt). However, the present disclosure is not necessarily limited to the above examples.

[0067] The first gate insulating layer GI1, the second gate insulating layer GI2, the interlayer insulating layer ILD, the additional interlayer insulating layer ILD' and the via layer VIA may be disposed between the above conductive layers to electrically separate the conductive layers from each other. According to an embodiment, the conductive layer may be connected to the conductive layer by a contact member CNP (see FIG. 1 ) formed in at least one of the first gate insulating layer GI1, the second gate insulating layer GI2, the interlayer insulating layer ILD and the additional interlayer insulating layer ILD' as needed. Fig.12 ) are electrically connected to each other. Each of the first transistor electrode TE1 and the second transistor electrode TE2 is integrated with the contact member CNP. The conductive layer in the pixel circuit layer PCL can be connected to the via layer VIA through the contact part CNT (see Fig.12 ) is a conductive layer electrically connected to the light emitting element layer LEL. In some embodiments, the via layer VIA may be a planarization layer.

[0068] According to an embodiment, the first gate insulating layer GI1, the second gate insulating layer GI2, the interlayer insulating layer ILD, and the additional interlayer insulating layer ILD′ may include an inorganic material. For example, the inorganic material may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiOx N y ) and aluminum oxide (Al x O y ). In some embodiments, the via layer VIA may include an organic material. For example, the organic material may include at least one material selected from the group consisting of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin and benzocyclobutene (BCB). However, the present disclosure is not necessarily limited to the above examples.

[0069] Return to Figure 2 , the light emitting element layer LEL may be disposed on the pixel circuit layer PCL. In some embodiments, the light emitting element layer LEL may include a light emitting element LD, a pixel defining layer PDL, and an encapsulation layer TFE. In some embodiments, the light emitting element LD may be a light emitting diode including an organic material. For example, the light emitting element LD may be an organic light emitting diode (OLED).

[0070] The light emitting element LD may be disposed on the pixel circuit layer PCL. In some embodiments, the light emitting element LD may include a first electrode ELT1, a light emitting part EL, and a second electrode ELT2. In some embodiments, the light emitting part EL may be disposed in an area defined by the pixel defining layer PDL. One surface of the light emitting part EL may be electrically connected to the first electrode ELT1, and the other surface of the light emitting part EL may be electrically connected to the second electrode ELT2.

[0071] The first electrode ELT1 may be an anode electrode ANO for the light emitting component EL, and the second electrode ELT2 may be a cathode electrode CAT for the light emitting component EL. In some embodiments, the first electrode ELT1 and the second electrode ELT2 may include a conductive material. For example, the conductive material may include at least one conductive material selected from the group consisting of gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and platinum (Pt). Alternatively, in some embodiments, the conductive material may include silver nanowires (AgNW), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), antimony zinc oxide (AZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), tin oxide (SnO 2 ), at least one material selected from the group consisting of carbon nanotubes and graphene. However, the present disclosure is not necessarily limited thereto.

[0072] In some embodiments, the second electrode ELT2 may be manufactured to be completely deposited in the display area DA or to cover the display area DA. Therefore, power supplied to the second electrode ELT2 may be provided to each sub-pixel SPX.

[0073] like Figure 5 As shown, the light-emitting component EL may have a multilayer thin film structure including a light generating layer (e.g., an emission layer EML). The emission layer EML emits light by the recombination of injected electrons and holes. The light-emitting component EL may also include a hole injection layer HIL for injecting holes and a hole transport layer HTL for increasing the chance of hole recombination by suppressing the movement of electrons. The light-emitting component EL may also include an electron transport layer ETL for smoothly transferring electrons to the emission layer EML and an electron injection layer EIL for injecting electrons. The light-emitting component EL may emit light based on an electrical signal provided from an anode electrode ANO (e.g., a first electrode ELT1) and a cathode electrode CAT (e.g., a second electrode ELT2).

[0074] The pixel defining layer PDL may be disposed on the pixel circuit layer PCL to define the position where the light emitting component EL is located. The pixel defining layer PDL may include an organic material. For example, the pixel defining layer PDL may include at least one organic material selected from the group consisting of acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin. However, the present disclosure is not limited thereto. In another embodiment, the pixel defining layer PDL may include an inorganic material. For example, the pixel defining layer PDL may include silicon oxide (SiO x ) and silicon nitride (SiN x ). In some embodiments, the pixel defining layer PDL may include a layer including silicon oxide (SiO x ) layer and silicon nitride (SiN x ) layers are stacked in a multi-layer structure.

[0075] The encapsulation layer TFE may be disposed on the light emitting element LD (e.g., the second electrode ELT2). The encapsulation layer TFE may be planarized, or the step difference caused by the light emitting element LD and the pixel defining layer PDL may be reduced or eliminated in other ways. The encapsulation layer TFE may include a plurality of insulating layers covering the light emitting element LD. In some embodiments, the encapsulation layer TFE may have a structure in which inorganic layers and organic layers are alternately stacked. In some embodiments, the encapsulation layer TFE may be a thin film encapsulation layer.

[0076] In the following, reference will be made to Figures 6 to 8The pixel circuit PXC and the repair pixel circuit RPXC according to the embodiments of the present disclosure are described. In some embodiments, the pixel circuit PXC can be designated as a first pixel circuit. The repair pixel circuit RPXC can be designated as an auxiliary pixel circuit or a second pixel circuit.

[0077] Figure 6 A schematic connection structure of a pixel circuit PXC or a repair pixel circuit RPXC is shown. Figure 7 A pixel circuit PXC according to an embodiment of the present disclosure is shown. Figure 8 The repair pixel circuit RPXC according to the embodiment of the present disclosure is shown. Figure 6 The schematic connection structure of the pixel circuit PXC or the repair pixel circuit RPXC is described. Then, reference will be made to Figure 7 and Figure 8 A detailed embodiment will be described below.

[0078] Figure 6 is a schematic block diagram showing the electrical connection structure of the light emitting element LD according to an embodiment of the present disclosure. Figure 6 An electrical connection structure of the sub-pixel SPX or the repair sub-pixel RSPX may be shown, and the electrical connection structure may use a pixel circuit PXC for the sub-pixel SPX, or use a repair pixel circuit RPXC for the repair sub-pixel RSPX.

[0079] Reference Figure 6 , also refer to Figure 2 and Figure 7 The sub-pixel SPX may include a pixel circuit PXC configured to drive the light emitting element LD. The repair sub-pixel RSPX may include a repair pixel circuit RPXC configured to drive the light emitting element LD.

[0080] The pixel circuit PXC (or the repair pixel circuit RPXC) may include at least one circuit element. For example, the pixel circuit PXC (or the repair pixel circuit RPXC) may include a driving transistor, a switching transistor, and a storage capacitor.

[0081] The pixel circuit PXC (or the repair pixel circuit RPXC) may be electrically connected to the scan line SL and the data line DL. The scan line SL may supply the scan signal GW to the pixel circuit PXC (or the repair pixel circuit RPXC). In some embodiments, the scan line SL may be electrically connected to the gate electrode of the switching transistor of the pixel circuit PXC (or the repair pixel circuit RPXC). The light emitting element LD may be configured to emit light corresponding to the data signal DATA provided from the data line DL.

[0082] The pixel circuit PXC may be electrically connected to the first power line PL1 and the second power line PL2. For example, the first electrode ELT1 of the light emitting element LD may be electrically connected to the pixel circuit PXC (or the repair pixel circuit RPXC) and the first power line PL1, and the second electrode ELT2 of the light emitting element LD may be electrically connected to the second power line PL2. The first power line PL1 and the second power line PL2 may be disposed on the base layer BSL.

[0083] The voltage of the first power line PL1 and the voltage of the second power line PL2 may have different potentials. For example, the voltage of the first power line PL1 is a high potential pixel voltage that supplies power at a first voltage potential VDD, and the voltage of the second power line PL2 may be a low potential pixel voltage that supplies voltage at a second voltage potential VSS. The potential difference between the voltage of the first power line PL1 and the voltage of the second power line PL2 may be set to be equal to or higher than the threshold voltage of the light emitting element LD.

[0084] The first power line PL1 may be electrically connected to the pixel circuit PXC (or the repair pixel circuit RPXC). The second power line PL2 may be electrically connected to the cathode electrode (eg, the second electrode ELT2) of the light emitting element LD.

[0085] In some embodiments, the second power line PL2 may be electrically connected to the second electrode ELT2. For example, the power source may apply power to the second electrode ELT2 through the second power line PL2 disposed in the non-display area NDA. Alternatively, the power source may apply power to the second electrode ELT2 through the second power line PL2 formed in the pixel circuit layer PCL in the display area DA.

[0086] The light emitting element LD may be connected between the first power line PL1 and the second power line PL2 in a forward bias direction to form effective light sources, respectively. These effective light sources may form the light emitting element LD of the pixel circuit PXC (or the repair pixel circuit RPXC).

[0087] Each of the light emitting elements LD may emit light of brightness corresponding to the driving current supplied by the pixel circuit PXC (or the repair pixel circuit RPXC). During each frame period, the pixel circuit PXC (or the repair pixel circuit RPXC) may supply a driving current corresponding to the data signal DATA to the light emitting element LD. The light emitting element LD may emit light of brightness corresponding to the current flowing through the light emitting element LD.

[0088] Will refer to Figure 7 A sub-pixel SPX including a pixel circuit PXC according to an embodiment of the present disclosure is described. Figure 7, the pixel circuit PXC according to an embodiment of the present disclosure may include seven transistors and one capacitor.

[0089] Figure 7 The sub-pixel SPX shown in the figure may be one of the sub-pixels SPX in the nth row of the array, where n is a positive integer. The pixel circuit PXC in the sub-pixel SPX may be electrically connected to each of the scan line SL, the first initialization control line GIL, and the emission control line ECL corresponding to the nth row. The scan line SL, the first initialization control line GIL, and the emission control line ECL supply the scan signal GW, the first initialization control signal GI, and the emission control signal EM to the pixel circuit PXC, respectively. The pixel circuit PXC may receive the second initialization control signal GB through the second initialization control line GIL' corresponding to the nth row.

[0090] The pixel circuit PXC may include a driving transistor T1 , a switching transistor T2 , a compensation transistor T3 , an initialization transistor T4 , an operation control transistor T5 , an emission control transistor T6 , a bypass transistor T7 , and a storage capacitor Cst1 .

[0091] The gate electrode of the driving transistor T1 may be electrically connected to the gate node Ng. The source electrode of the driving transistor T1 may be electrically connected to the source node Ns (the source node Ns is electrically connected to the first power line PL1 via the operation control transistor T5). The drain electrode of the driving transistor T1 may be electrically connected to the drain node Nd (the drain node Nd is electrically connected to the anode electrode ANO of the light emitting element LD via the emission control transistor T6). The current flowing through the light emitting element LD may be determined by the voltage difference between the gate electrode and the source electrode of the driving transistor T1, and the brightness of the light emitting element LD may be determined based on the current.

[0092] The gate electrode of the switching transistor T2 may be electrically connected to the scan line SL. The first electrode of the switching transistor T2 may be electrically connected to the data line DL, and the second electrode of the switching transistor T2 may be electrically connected to the source node Ns and thus electrically connected to the source electrode of the driving transistor T1. The switching transistor T2 may be turned on according to the scan signal GW transmitted through the scan line SL, and when turned on, the switching transistor T2 transmits the data signal DATA from the data line DL to the source electrode of the driving transistor T1. The data signal DATA may be transmitted to the gate electrode of the driving transistor T1 through the compensation transistor T3 that is turned on simultaneously with the switching transistor T2.

[0093] The gate electrode of the compensation transistor T3 may be electrically connected to the scan line SL. The first electrode of the compensation transistor T3 may be electrically connected to the drain electrode of the driving transistor T1, and the second electrode of the compensation transistor T3 may be electrically connected to the gate node Ng. The compensation transistor T3 may be turned on according to the scan signal GW transmitted through the scan line SL to electrically connect the gate electrode and the drain electrode of the driving transistor T1 to each other. Therefore, the compensation transistor T3 may allow the driving transistor T1 to be connected in a diode manner, and thus compensate for the threshold voltage (Vth) of the driving transistor T1.

[0094] The gate electrode of the initialization transistor T4 may be electrically connected to the first initialization control line GIL. The first electrode of the initialization transistor T4 may be electrically connected to the initialization voltage line IL, and the second electrode of the initialization transistor T4 may be electrically connected to the gate node Ng. The initialization transistor T4 may be turned on according to the first initialization control signal GI applied from the first initialization control line GIL to transmit the initialization voltage VINIT to the gate node Ng. Therefore, the gate node Ng may be initialized. The initialization voltage VINIT may be set to a voltage higher than the second voltage potential VSS, or may be the second voltage potential VSS.

[0095] A gate electrode of the operation control transistor T5 may be electrically connected to the emission control line ECL, a first electrode of the operation control transistor T5 may be electrically connected to the first power line PL1, and a second electrode of the operation control transistor T5 may be electrically connected to the source electrode of the driving transistor T1.

[0096] The gate electrode of the emission control transistor T6 may be electrically connected to the emission control line ECL. The first electrode of the emission control transistor T6 may be electrically connected to the drain electrode of the driving transistor T1, and the second electrode of the emission control transistor T6 may be electrically connected to the anode electrode ANO of the light emitting element LD through the output node No. The operation control transistor T5 and the emission control transistor T6 may be turned on simultaneously according to the emission control signal EM applied from the emission control line ECL. Therefore, the first voltage potential VDD may be applied to the driving transistor T1, and the driving current may flow through the light emitting element LD.

[0097] The gate electrode of the bypass transistor T7 may be electrically connected to the second initialization control line GIL'. The first electrode of the bypass transistor T7 may be electrically connected to the anode electrode ANO of the light emitting element LD through the output node No, and the second electrode of the bypass transistor T7 may be electrically connected to the initialization voltage line IL to be supplied with the initialization voltage VINIT. The bypass transistor T7 may be turned on by the second initialization control signal GB applied from the second initialization control line GIL' to initialize the anode electrode ANO of the light emitting element LD. The second initialization control signal GB may be the same signal as the first initialization control signal GI, or may be a signal different from the first initialization control signal GI.

[0098] The storage capacitor Cst1 may be electrically connected between the first power line PL1 and the gate node Ng. A voltage between the first voltage potential VDD and the gate node Ng may be stored in the storage capacitor Cst1.

[0099] The anode electrode ANO of the light emitting element LD may be configured to be electrically connected to a wire member (see Fig. 9 ), and can be configured to be electrically separated from the pixel circuit PXC. Fig. 9 This will be described in detail in the following drawings. The cathode electrode CAT of the light emitting element LD may be electrically connected to the second power line PL2 to which the second voltage potential VSS is applied.

[0100] Will refer to Figure 8 A repair sub-pixel RSPX including a repair pixel circuit RPXC according to an embodiment of the present disclosure is described. Figure 8 , according to the present embodiment, the repair pixel circuit RPXC may include eight transistors and two capacitors.

[0101] Figure 8 The repair sub-pixel RSPX shown may be one of the sub-pixels in the n-th row, and the repair sub-pixel RSPX may be repaired or become operable through a repair process. The repair pixel circuit RPXC in the repair sub-pixel RSPX may be electrically connected to each of the scan line SL, the first initialization control line GIL, and the emission control line ECL corresponding to the n-th row, and the scan line SL, the first initialization control line GIL, and the emission control line may supply the scan signal GW, the first initialization control signal GI, and the emission control signal EM to the repair pixel circuit RPXC, respectively.

[0102] The repair subpixel RSPX may include a repair pixel circuit RPXC, and the repair pixel circuit RPXC may include a driving transistor DT1, a switching transistor DT2, a compensation transistor DT3, an initialization transistor DT4, an operation control transistor DT5, an emission control transistor DT6, a capacitance control transistor DT7, a capacitance element initialization transistor DT8, a storage capacitor Cst2 and a compensation capacitor Ccomp.

[0103] Figure 8 The driving transistor DT1, the switching transistor DT2, the compensation transistor DT3, the initialization transistor DT4, the operation control transistor DT5, the emission control transistor DT6 and the storage capacitor Cst2 of the repair pixel circuit RPXC include Figure 7 The sizes and capacities of the corresponding driving transistor T1, switching transistor T2, compensation transistor T3, initialization transistor T4, operation control transistor T5, emission control transistor T6 and storage capacitor Cst1 of the pixel circuit PXC are different from those of the pixel circuit PXC of the repair sub-pixel RSPX. Figure 7 The pixel circuit PXC of the sub-pixel SPX shown in FIG. 1 is largely the same. Figure 7 The same description is given for the corresponding elements in the figure, and the difference between the repair sub-pixel RSPX and the sub-pixel SPX will be mainly described.

[0104] Reference Figure 7 and Figure 8 In the repair pixel circuit RPXC, a gate electrode of the capacitance control transistor DT7 may be electrically connected to the emission control line ECL to be supplied with the emission control signal EM. A first electrode of the capacitance control transistor DT7 may be electrically connected to the line part OL through the output node DNo, and a second electrode of the capacitance control transistor DT7 may be electrically connected to the compensation node DNc. The capacitance control transistor DT7 may be turned on according to the emission control signal EM to supply energy stored in the compensation capacitor Ccomp to the line part OL.

[0105] The gate electrode of the capacitor initialization transistor DT8 may be electrically connected to the second initialization control line GIL' to be supplied with the second initialization control signal GB. The first electrode of the capacitor initialization transistor DT8 may be electrically connected to the compensation node DNc, and the second electrode of the capacitor initialization transistor DT8 may be electrically connected to the initialization voltage line IL. The capacitor initialization transistor DT8 may be turned on according to the second initialization control signal GB, and the initialization voltage VINIT may be supplied to the compensation capacitor Ccomp, so that the amount of charge corresponding to the difference between the first voltage potential VDD and the initialization voltage VINIT may charge the compensation capacitor Ccomp.

[0106] The first voltage potential VDD and the voltage of the compensation node DNc may be applied to opposite ends of the compensation capacitor Ccomp, and charges corresponding to a voltage difference between the opposite ends may be stored in the compensation capacitor Ccomp.

[0107] The light emitting element LD of the repair sub-pixel RSPX may be electrically connected to the repair pixel circuit RPXC through the line part OL and may be configured to emit light normally. For example, the line part OL may be electrically connected to the output node DNo between the capacitance control transistor DT7 and the emission control transistor DT6.

[0108] Will refer to Fig. 9 and Fig.10 An electrical connection structure of the pixel circuit PXC or the repair pixel circuit RPXC with respect to the light emitting element LD according to an embodiment of the present disclosure is described.

[0109] Fig. 9 is a schematic diagram showing a structure in which a light emitting element LD and a pixel circuit PXC are electrically connected according to an embodiment of the present disclosure. Fig.10 is a schematic diagram showing a structure in which a light emitting element LD is electrically connected to a repair pixel circuit RPXC according to an embodiment of the present disclosure.

[0110] Reference Fig. 9 and Fig.10 , also refer to Figure 7 , the light emitting element LD may be electrically connected to the pixel circuit PXC or the repair pixel circuit RPXC to emit light.

[0111] The scan line SL may be electrically connected to the pixel circuit PXC and the repair pixel circuit RPXC. The data line DL may be electrically connected to the pixel circuit PXC and the repair pixel circuit RPXC. For example, the scan line SL for one pixel row may be electrically connected to each of the corresponding pixel circuit PXC and the corresponding repair pixel circuit RPXC. Similarly, the data line DL for supplying the data signal DATA may be electrically connected to each of the corresponding pixel circuit PXC and the corresponding repair pixel circuit RPXC.

[0112] In some embodiments (e.g. Fig. 9 In the embodiment shown in ), the light emitting element LD of the sub-pixel SPX may be electrically connected to the pixel circuit PXC and may not be electrically connected to the repair pixel circuit RPXC. Fig. 9 The sub-pixel SPX may be one of the sub-pixels SPX on which the repair process is not performed.

[0113] For example, a driving current may be supplied from the pixel circuit PXC to the light emitting element LD. Since the non-connection area NCA is interposed between the repair pixel circuit RPXC and the light emitting element LD, the line part OL electrically connected to the repair pixel circuit RPXC may not be electrically connected to the light emitting element LD. The non-connection area NCA may be defined between the anode electrode ANO of the light emitting element LD and the line part OL.

[0114] In some embodiments (e.g. Fig.10 In the embodiment shown in ), the light emitting element LD of the repair sub-pixel RSPX may be electrically connected to the repair pixel circuit RPXC, and may not be electrically connected to the pixel circuit PXC. The repair sub-pixel RSPX may be provided or configured when performing the repair process.

[0115] When the repair pixel circuit RPXC is connected to the light emitting element LD, a driving current may be supplied from the repair pixel circuit RPXC to the light emitting element LD. The line part OL electrically connected to the repair pixel circuit RPXC may be electrically connected to the light emitting element LD through (eg, via) the connection area CA. Fig.10 The connection area CA can be connected with Fig. 9 The non-connection area NCA corresponds to the non-connection area NCA, but the repair process can transform the non-connection area NCA into the connection area CA. For example, the connection area CA and the non-connection area NCA can be substantially the same structure, but reconfigured by the repair process. As the repair process is performed, the lines in the non-connection area NCA can be electrically connected to each other, and thus, the connection area CA can be manufactured. In addition, the light-emitting element LD of the repair sub-pixel RSPX can be electrically separated from the pixel circuit PXC. For example, during the repair process of producing the repair sub-pixel RSPX, at least some of the lines that electrically connect the pixel circuit PXC and the anode electrode ANO of the light-emitting element LD to each other can be cut.

[0116] According to aspects of the present disclosure, the line part OL may be used not only as a repair line for performing a repair process but also as at least a portion of an organic material removal portion for preventing risks such as leakage current between sub-pixels SPX. Figures 11 to 13 Give a description.

[0117] Fig.11 is a view schematically illustrating a process of removing the organic layer 2000 according to an embodiment of the present disclosure. Fig.12 and Fig.13 is a schematic cross-sectional view showing a display device DD according to an embodiment of the present disclosure. Fig.12 and Fig.13 A cross-sectional structure of a display device DD including an organic material removal portion 1000 is schematically illustrated.

[0118] Reference Figures 11 to 13, the display device DD may include an organic material removal portion 1000. The organic material removal portion 1000 may include a line part OL and an electrode part OLP.

[0119] According to an embodiment, the organic material removing part 1000 may remove at least a portion of the organic layer 2000 disposed on the electrode part OLP. The organic layer 2000 may include a layer including an organic material disposed at an upper side of the pixel circuit layer PCL (e.g., a via layer VIA) and a layer including an organic layer as at least a portion disposed on the pixel circuit layer PCL (e.g., a light emitting part EL and a pixel defining layer PDL).

[0120] In an embodiment, the electrode part OLP may be electrically connected to the line part OL. The electrode part OLP may receive an electrical signal supplied to the line part OL. For example, when an electrical pulse input is applied to the line part OL, energy based on the applied pulse input may be released from the electrode part OLP. Thermal energy generated by Joule heat H may be applied to a region disposed on the electrode part OLP, and thus, at least a portion of the organic layer 2000 overlapping with the electrode part OLP may be removed.

[0121] In some embodiments, the line component OL may be formed by at least one of the conductive layers in the pixel circuit layer PCL. For example, the line component OL may be formed by at least one of the first interlayer conductive layer ICL1, the second interlayer conductive layer ICL2, the third interlayer conductive layer ICL3, and the fourth interlayer conductive layer ICL4. Hereinafter, for ease of description, an embodiment in which the second interlayer conductive layer ICL2 forms the line component OL will be mainly described.

[0122] The electrode part OLP may be formed by a process different from the process of forming the line part OL, and the electrode part OLP may be disposed in a layer different from the layer in which the line part OL is disposed. For example, the electrode part OLP is a layer patterned in a process after the process of forming the line part OL, and the electrode part OLP may be closer to the organic layer 2000 than the line part OL. However, the present disclosure is not necessarily limited thereto. For example, the line part OL and the electrode part OLP may be integrally formed. In some embodiments, the line part OL and the electrode part OLP are integrally formed, and the electrode part OLP may include a structure protruding from the line part OL.

[0123] Hereinafter, for convenience of description, a first embodiment including a structure in which the electrode part OLP is formed of the third interlayer conductive layer ICL3 and a second embodiment including a structure in which the electrode part OLP is formed of the fourth interlayer conductive layer ICL4 will be described.

[0124] Reference Fig.12 and Fig.13 , also refer to Figure 1 , Figure 2 , Figure 7 and Fig.11 The pixel circuit layer PCL may include the circuit elements and the insulating layer in the pixel circuit PXC as described above, and also include a line part OL and an electrode part OLP. Fig.12 and Fig.13 An adjacent transistor TR as a circuit element is shown, which may be an emission control transistor T6 or a bypass transistor T7, and illustration of a layer provided on the light emitting part EL (eg, the second electrode ELT2) is omitted so that the arrangement relationship between the components can be clearly understood.

[0125] The adjacent transistor TR may be substantially adjacent to the first electrode ELT1 (eg, the anode electrode ANO) of the light emitting element LD to be electrically connected to the first electrode ELT1 of the light emitting element LD.

[0126] The adjacent transistor TR may include a first active layer DACT formed of the active layer ACT, a first gate electrode GAE formed of the first interlayer conductive layer ICL1 , a first transistor electrode TE1 formed of the third interlayer conductive layer ICL3 , and a second transistor electrode TE2 formed of the third interlayer conductive layer ICL3 .

[0127] In some embodiments, the pixel circuit layer PCL may further include a second active layer SACT formed of the active layer ACT. The second active layer SACT may be a part of the switch transistor T2.

[0128] In some embodiments, the pixel circuit layer PCL may include a first conductive line CL1 formed by a first interlayer conductive layer ICL1 and a second conductive line CL2 formed by a second interlayer conductive layer ICL2. The first conductive line CL1 and the second conductive line CL2 may form a conductive structure for forming a pixel circuit PXC or the like.

[0129] The line part OL may overlap the electrode part OLP in a plan view and be electrically connected to the electrode part OLP through the connection contact part OCNP. The electrode part OLP and the connection contact part OCNP may be integrated. The connection contact part OCNP may penetrate the interlayer insulating layer ILD. In some embodiments, the line part OL may be formed by the second interlayer conductive layer ICL2.

[0130] In the present specification, the term "in a plan view" may be defined relative to a plane on which the base layer BSL is disposed. For example, the term "in a plan view" may be defined relative to a plane extending in the first direction DR1 and the second direction DR2. For example, the term "in a plan view" may be defined relative to a plane whose normal direction is the third direction DR3.

[0131] The electrode part OLP may be disposed on the line part OL. The electrode part OLP may occupy an area relatively narrower than an area occupied by the line part OL. For example, the line part OL may extend in one direction (e.g., the first direction DR1), and the electrode part OLP may be locally disposed in a smaller area overlapping with an area where the line part OL is disposed. The electrode part OLP may be a part of the third interlayer conductive layer ICL3.

[0132] In some embodiments, the organic material removing portion 1000 may further include a bridging member OBRP (see Fig.13 ). For example, the line part OL may be electrically connected to the bridging part OBRP through the connecting contact part OCNP, and the electrode part OLP may be electrically connected to the bridging part OBRP through the additional connecting contact part OCNP'. The electrode part OLP and the additional connecting contact part OCNP' may be integrated. The bridging part OBRP and the connecting contact part OCNP may be integrated. In some embodiments, the bridging part OBRP may be formed by the third interlayer conductive layer ICL3, and the electrode part OLP may be formed by the fourth interlayer conductive layer ICL4. In some embodiments, in this structure, the first transistor electrode TE1 and the second transistor electrode TE2 may be formed by the fourth interlayer conductive layer ICL4. In some embodiments, the first transistor electrode TE1 is a source electrode or a drain electrode, and is electrically connected to the first electrode ELT1 through a contact part CNT formed in the via layer VIA. The first electrode ELT1 and the contact part CNT may be integrated.

[0133] In a plan view, the line part OL and the electrode part OLP may not overlap with a partial area of ​​the light emitting part EL overlapping with the first electrode ELT1. In a plan view, the line part OL and the electrode part OLP may not overlap with an area where the first electrode ELT1 and the light emitting part EL are in electrical contact with each other. In a plan view, the line part OL and the electrode part OLP may not overlap with the first electrode ELT1.

[0134] At least a portion of the line part OL may overlap with the via layer VIA in a plan view, and at least another portion of the line part OL may not overlap with the via layer VIA in a plan view. In a plan view, the electrode part OLP may not overlap with the via layer VIA. In a plan view, the line part OL and the electrode part OLP may overlap with the organic material removal area ORA.

[0135] The organic material removal area ORA may mean a region (or space) where the organic layer 2000 is removed by heat energy supplied by the electrode part OLP.

[0136] For example, the pixel defining layer PDL may not overlap with the organic material removal area ORA in a plan view. The pixel defining layer PDL may include areas spaced apart from each other in a plan view, in particular, a first pixel defining layer PDL1 and a second pixel defining layer PDL2, wherein the organic material removal area ORA is interposed between the first pixel defining layer PDL1 and the second pixel defining layer PDL2. The pixel defining layer PDL may not overlap with the electrode part OLP in a plan view. The first pixel defining layer PDL1 may be a first organic layer, and the second pixel defining layer PDL2 may be a second organic layer.

[0137] In an embodiment, the light emitting part EL may not overlap with the organic material removal area ORA in a plan view. The light emitting part EL may include a first light emitting part EL1 and a second light emitting part EL2 spaced apart from each other in a plan view, and the organic material removal area ORA is interposed between the first light emitting part EL1 and the second light emitting part EL2. The light emitting part EL may not overlap with the electrode part OLP in a plan view. The first light emitting part EL1 may be a first region of the organic layer, and the second light emitting part EL2 may be a second region of the organic layer.

[0138] According to an embodiment, the first light emitting part EL1 and the second light emitting part EL2 may be light emitting parts EL of different sub-pixels SPX.

[0139] Experimentally, different electrical signals (e.g., currents with different intensities) may need to be supplied to adjacent sub-pixels SPX. However, when the light-emitting parts EL of the sub-pixels SPX adjacent to each other are electrically connected to each other, carriers (e.g., electrons or holes) formed in the respective light-emitting parts EL may move to each other, and the electrical signals may be mixed. Therefore, leakage current may be generated between the sub-pixels SPX.

[0140] However, according to the embodiment, as the organic material removal part 1000 removes the organic layer 2000, the light emitting parts EL of the sub-pixels SPX adjacent to each other can be separated from each other. Therefore, carriers cannot move between the adjacent light emitting parts EL, and the risk that the electrical signals will be mixed can be reduced. In addition, as the color reproducibility of the sub-pixel SPX is improved, a high-quality display device structure can be provided, and the reliability of the electrical signal can be improved.

[0141] In addition, a portion of the organic material removal portion 1000 for implementing such a quality improvement structure may include a repair line for performing a repair process. That is, a single structure may be used to implement the repair line and the organic material removal structure. Therefore, the complexity of the line is reduced, and the manufacturing process is simplified, so that the process cost can be reduced. In particular, as the complexity of the line is reduced, a more thorough or compact line structure can be designed. Therefore, a display device with a higher resolution can be finally realized.

[0142] Meanwhile, in some embodiments, the light emitting element layer LEL may further include a spacer SPA formed on the pixel defining layer PDL. In some embodiments, the spacer SPA may have a structure protruding in the third direction DR3, and the light emitting part EL may be disposed at one side relative to the spacer SPA. The light emitting part EL may not be disposed at the other side of the spacer SPA.

[0143] In the following, reference will be made to Figures 14 to 30 Describes the manufacturing of a display device DD according to an embodiment of the present disclosure (see Figure 1 ) method. Figures 14 to 30 In the description, parts that are repeated with the above parts will be briefly described or will not be repeated.

[0144] Fig.14 is a schematic flowchart illustrating a method of manufacturing a display device DD according to an embodiment of the present disclosure. Figures 15 to 30 is a schematic diagram illustrating a method according to an embodiment of the present disclosure.

[0145] Figures 15 to 18 Detailed description may be given of a schematic block diagram illustrating a method of manufacturing a display device DD according to an embodiment of the present disclosure.

[0146] Figures 19 to 21 may be a schematic cross-sectional view illustrating a method of manufacturing a display device DD according to an embodiment of the present disclosure. Fig.19 and Fig. 20 Shown with the above reference Fig.12 The cross-sectional structure corresponds to the cross-sectional structure of Fig.21 Shown with the above reference Fig.13 The cross-sectional structure corresponds to the cross-sectional structure.

[0147] Fig. 22 and Fig.23 is a circuit diagram showing some steps of a method of manufacturing a display device DD according to an embodiment of the present disclosure. Fig. 22 and Fig.23 The connection relationship between the repair pixel circuit RPXC and the light-emitting element LD is shown.

[0148] Figures 24 to 30 is a schematic plan view showing the manufacture of a display device DD according to an embodiment of the present disclosure, and is a plan view based on a pixel circuit PXC. Fig.24 Circuit elements of the pixel circuit PXC and lines electrically connected to the circuit elements of the pixel circuit PXC are schematically shown.

[0149] Figures 25 to 30 Can be Fig.24 Schematic enlargement of area EA1 shown in FIG. Figure 25 to Figure 27is a schematic process plan view showing a method of manufacturing a display device DD according to an embodiment of the present disclosure, and shows the above-mentioned reference Fig.12 The planar structure of the embodiment. Figures 28 to 30 is a schematic process plan view showing a method of manufacturing a display device DD according to an embodiment of the present disclosure, and shows the above-mentioned reference Fig.13 The planar structure of the embodiment.

[0150] The method for manufacturing a display device DD according to an embodiment of the present disclosure may include a process step for manufacturing a display device and an inspection step for the display device DD. Fig.14 According to an embodiment of the present disclosure, the method for manufacturing a display device DD may include: a step S100 of manufacturing a pixel circuit layer, a step S200 of manufacturing a light emitting element layer, a step S300 of performing an organic layer removal process, a step S400 of inspecting the pixel circuit, and a step S500 of performing a repair process.

[0151] Reference Fig.14 , Fig.15 , Fig.19 , Fig.24 , Fig.25 and Fig.28 , in the step S100 of manufacturing the pixel circuit layer, a base layer BSL may be prepared, and a pixel circuit layer PCL including a line part OL and an electrode part OLP may be formed on the base layer BSL.

[0152] The conductive layer or insulating layer on the base layer BSL can be formed based on a conventional process for manufacturing a semiconductor or display device. For example, the conductive layer or insulating layer on the base layer BSL can be deposited in various ways (sputtering and chemical vapor deposition, etc.) and patterned by a photolithography process. However, the present disclosure is not necessarily limited to a specific example.

[0153] In this step S100, a pixel circuit PXC may be formed on the base layer BSL, and a repair pixel circuit RPXC may be formed. For example, the pixel circuit PXC may include a first pixel circuit PXC1 for the first sub-pixel SPX1, a second pixel circuit PXC2 for the second sub-pixel SPX2, and a third pixel circuit PXC3 for the third sub-pixel SPX3.

[0154] In some embodiments, the first to third subpixels SPX1 to SPX3 may be sequentially arranged along the first direction DR1 to form a first pixel unit PXU1. Other first to third subpixels SPX1 to SPX3 may also be sequentially arranged along the first direction DR1 to form a second pixel unit PXU2. The first pixel unit PXU1 and the second pixel unit PXU2 may be adjacent to each other in a direction (e.g., a second direction DR2) different from the direction in which the first to third subpixels SPX1 to SPX3 are adjacent to each other.

[0155] In this step, the above reference Figure 7 and Figure 8 The transistors T1 to T7 and DT1 to DT8 and the initialization voltage line IL, the second initialization control line GIL′, the emission control line ECL, the scan line SL, the first initialization control line GIL, the data line DL, and the first power line PL1 electrically connected to the transistors T1 to T7 and DT1 to DT8 are patterned.

[0156] For example (such as Fig.25 ), an initialization voltage line IL for supplying an initialization voltage VINIT may be formed by the active layer ACT to extend along the first direction DR1. A second initialization control line GIL' for supplying a second initialization control signal GB may be formed by the first interlayer conductive layer ICL1 to extend along the first direction DR1. A data line DL for supplying a data signal DATA may be formed by the third interlayer conductive layer ICL3 to extend along the second direction DR2. A first power line PL1 for supplying a first voltage potential VDD may be formed by the third interlayer conductive layer ICL3 to extend along the second direction DR2. In some embodiments, a scan line SL for supplying a scan signal GW, an emission control line ECL for supplying an emission control signal EM, and a first initialization control line GIL for supplying a first initialization signal GI may be patterned to extend along the first direction DR1.

[0157] In another example (such as Fig.28 ), a second initialization control line GIL' for supplying a second initialization control signal GB may be formed by a third interlayer conductive layer ICL3 to extend in a first direction DR1. A data line DL for supplying a data signal DATA may be formed by a fourth interlayer conductive layer ICL4 to extend in a second direction DR2. A first power line PL1 for supplying a first voltage potential VDD may be formed by a fourth interlayer conductive layer ICL4 to extend in a second direction DR2.

[0158] In this step S100, a line part OL and an electrode part OLP may be formed. In some embodiments, the line part OL may be formed of the second interlayer conductive layer ICL2, and the electrode part OLP may be formed of the third interlayer conductive layer ICL3 to be patterned by the same process as the first transistor electrode TE1 and the second transistor electrode TE2. However, as described above, the present disclosure is not limited thereto. In some embodiments, the bridge part OBRP may be patterned on the line part OL, and the electrode part OLP may be patterned on the bridge part OBRP.

[0159] In this step S100, the organic material removal portion 1000 (eg, the electrode part OLP) may be covered by the via layer VIA. For example, the electrode part OLP may be in contact with the via layer VIA.

[0160] In this step S100, the line part OL may be in a state where the line part OL is electrically separated from the repair pixel circuit RPXC. Fig.15 As shown, the line part OL may be disposed between the first pixel unit PXU1 and the second pixel unit PXU2. In some embodiments, the line part OL may extend in a direction (eg, first direction DR1) different from a direction in which the first pixel unit PXU1 and the second pixel unit PXU2 are spaced apart from each other.

[0161] In this step S100, the electrode part OLP may be selectively patterned in some areas of the area where the line part OL is set. For example, the line part OL may be set between the first pixel unit PXU1 and the second pixel unit PXU2. A portion of the line part OL may overlap with the first pixel circuit PXC1 along the second direction DR2, but not overlap with the second pixel circuit PXC2 and the third pixel circuit PXC3. A portion of the line part OL may overlap with the second pixel circuit PXC2 along the second direction DR2, but not overlap with the first pixel circuit PXC1 and the third pixel circuit PXC3. A portion of the line part OL may overlap with the third pixel circuit PXC3 along the second direction DR2, but not overlap with the first pixel circuit PXC1 and the second pixel circuit PXC2.

[0162] In this step S100, the electrode part OLP may be disposed between the first initialization control line GIL and the line part OL. The electrode part OLP may be disposed between the data line DL and the first power line PL1.

[0163] In the step S100 , the electrode part OLP may be adjacent to the first transistor electrode TE1 (eg, source electrode) of the bypass transistor T7 along the first direction DR1 .

[0164] In this step S100, the first transistor electrode TE1 of the bypass transistor T7 and the first transistor electrode TE1 of the emission control transistor T6 may be adjacent to each other in the second direction DR2 and connected to each other through the connection electrode COE (see, for example, Fig.25 ). The connection electrode COE may be formed of the third interlayer conductive layer ICL3. However, in some embodiments, the connection electrode COE may be formed of the fourth interlayer conductive layer ICL4.

[0165] In this step S100, the connection electrode COE may keep the connection electrode COE arranged in the non-connection area NCA (see Fig. 9 ) and overlaps with the line part OL in a plan view. The connection electrode COE may have a state in which the connection electrode COE is electrically separated from the line part OL.

[0166] Reference Fig.14 , Fig.15 , Fig.19 , Fig. 22 , Fig.25 and Fig.28 In the step S200 of manufacturing the light emitting element layer, the light emitting element layer LEL including the light emitting element LD may be formed on the pixel circuit layer PCL.

[0167] In this step S200, the pixel circuit PXC may be electrically connected to the light emitting element LD through a contact part CNT penetrating the via layer VIA. The first to third sub-pixels SPX1 to SPX3 may be electrically connected to different light emitting elements LD. In some embodiments, the contact part CNT may electrically connect the connection electrode COE and the first electrode ELT1 to each other.

[0168] In this step S200, the first electrode ELT1, the pixel defining layer PDL and the light emitting part EL may be patterned on the pixel circuit layer PCL. In some embodiments, the light emitting part EL may be manufactured by sequentially depositing organic materials or by an inkjet printing process.

[0169] In the step S200 , the electrode part OLP may overlap the light emitting part EL, the via layer VIA, and the pixel defining layer PDL in a plan view.

[0170] In this step S200, the light emitting element LD may not be electrically connected to the line part OL electrically connected to the repair pixel circuit RPXC through the non-connection area NCA. Therefore, the light emitting element LD may have a state where the light emitting element LD emits light based on the driving current supplied from the pixel circuit PXC.

[0171] Reference Fig.14 , Fig.16 , Fig. 20 , Fig.21 , Fig.26 and Fig.29 In the step S300 of performing the organic layer removal process, at least a portion of the organic layer 2000 on the organic material removal portion 1000 may be removed.

[0172] In this step S300, a pulse input may be applied to the organic material removal portion 1000, resulting in heat energy being generated in the electrode part OLP disposed in a relatively narrow area. Therefore, according to an embodiment of the present disclosure, as at least a portion of the organic layer 2000 overlapping with the electrode part OLP in a plane may be removed, an organic material removal area ORA may be formed.

[0173] In some embodiments, the organic material removal area ORA may correspond to an area where the electrode part OLP is disposed. For example, the organic material removal area ORA may be disposed between the first pixel unit PXU1 and the second pixel unit PXU2. The organic material removal area ORA may be formed between pixel circuits PXC adjacent to each other in the second direction DR2.

[0174] In this step S300, as at least a portion of the via layer VIA overlapping the electrode part OLP is removed, the electrode part OLP may be exposed. As a portion of the pixel defining layer PDL overlapping the electrode part OLP is removed, a first pixel defining layer PDL1 and a second pixel defining layer PDL2 spaced apart from each other may be manufactured. As a portion of the light emitting part EL overlapping the electrode part OLP is removed, a first light emitting part EL1 and a second light emitting part EL2 spaced apart from each other may be manufactured.

[0175] As described above, the first light emitting part EL1 and the second light emitting part EL2 are in different sub-pixels SPX, and therefore, the risk of leakage current between the sub-pixels SPX may be reduced by the organic material removed portion 1000 .

[0176] In the step S300, when the electrode part OLP is electrically connected to the line part OL through the bridge part OBRP, the electrode part OLP may be relatively more adjacent to the light emitting element layer LEL. Therefore, the organic material on the electrode part OLP may be more completely removed.

[0177] In some embodiments, the shape of the organic material removal area ORA in a plane may correspond to the shape of the electrode part OLP. For example, the organic material removal area ORA and the electrode part OLP may have substantially the same shape (e.g., a quadrilateral, etc.), and the size of the organic material removal area ORA may be relatively larger than the size of the electrode part OLP.

[0178] Reference Fig.14 and Fig.17In the step S400 of inspecting the pixel circuit, it may be determined whether the sub-pixel SPX operates normally. For example, the inspection process may be performed in a manner of inspecting whether each sub-pixel SPX emits expected light by performing a light emission test on the sub-pixel SPX.

[0179] In this step, it can be checked whether each sub-pixel SPX emits light normally. When the sub-pixel SPX emits light normally, it can be determined that the pixel circuit PXC corresponding to the sub-pixel SPX is normal. When the sub-pixel SPX operates abnormally (ABN), it can be determined that the pixel circuit PXC corresponding to the sub-pixel SPX is defective (or abnormal).

[0180] In order to prevent the visibility of the display device DD from being impaired and to improve the display quality of the display device DD, it is necessary to repair the light emitting element LD electrically connected to the abnormally operated (ABN) pixel circuit PXC.

[0181] Reference Fig.14 , Fig.18 , Fig.23 , Fig. 27 and Fig.30 In step S500 of performing the repair process, the light emitting element LD determined as a target to be repaired may be electrically connected to the repair pixel circuit RPXC through the line part OL.

[0182] In this step S500, the light emitting element LD as the target to be repaired and the pixel circuit PXC of abnormal operation (ABN) can be electrically separated from each other. For example, with respect to the electrical path, the source electrode or transistor electrode of each of the emission control transistor T6 and the bypass transistor T7 electrically adjacent to the anode electrode ANO of the light emitting element LD can be cut. For example, at least a portion of an electrode defined at a side different from the output node No of each of the emission control transistor T6 and the bypass transistor T7 can be cut.

[0183] In this step, the light emitting element LD and the line part OL as the target to be repaired may be electrically connected to each other. Therefore, the light emitting element LD as the target to be repaired may be electrically connected to the repair pixel circuit RPXC. For example, the line part OL and the connection electrode COE may be electrically connected to each other in the connection area CA. In some embodiments, an anode connection contact part CCNT for electrically connecting the connection electrode COE and the line part OL to each other may be formed. Therefore, the line part OL may be electrically connected to the anode electrode ANO of the light emitting element LD through the anode connection contact part CCNT, the connection electrode COE, and the contact part CNT.

[0184] Therefore, the light-emitting element LD to be repaired is electrically separated from the abnormally operated (ABN) pixel circuit PXC and electrically connected to the repair pixel circuit RPXC that can operate normally. Therefore, the light-emitting element LD can be configured to emit light normally. In some embodiments, the repair light-emitting element LD can be designated as a "repair light-emitting element".

[0185] According to the present disclosure, a display device and a method of manufacturing the display device can be provided, in which risks such as leakage current can be prevented.

[0186] According to the present disclosure, a display device and a method of manufacturing the display device can be provided, in which high-resolution display performance can be improved.

[0187] According to the present disclosure, a display device and a method of manufacturing the display device can be provided in which a process is simplified so that the degree of freedom in circuit design can be improved.

[0188] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and interpreted in a general and descriptive sense only and not for purposes of limitation. Unless otherwise specifically stated, in some cases, as will be apparent to one of ordinary skill in the art at the time of filing this application, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the present disclosure as set forth in the appended claims.

Claims

1. A display device, characterized in that: The display device comprises: a pixel circuit layer, including a pixel circuit and an auxiliary pixel circuit on the substrate layer; and a light emitting element layer including a light emitting element electrically connected to the pixel circuit, wherein the pixel circuit layer includes a line component and an electrode component electrically connected to the line component, The light emitting element layer includes an organic layer, and the organic layer includes a first region and a second region. wherein, in a plan view, the first region and the second region are spaced apart from each other, the electrode member is interposed between the first region and the second region, and Wherein, the line component is electrically connected to the auxiliary pixel circuit.

2. The display device according to claim 1, characterized in that The light emitting element layer further includes a repair light emitting element electrically separated from the pixel circuit, and the repair light emitting element is electrically connected to the auxiliary pixel circuit. Each of the light emitting element and the repair light emitting element includes an anode electrode, a cathode electrode, and a light emitting component electrically connected between the anode electrode and the cathode electrode, and The wire member is electrically connected to the repair light emitting element through the connection region, and the wire member is not electrically connected to the light emitting element, and the non-connection region is interposed between the wire member and the light emitting element.

3. The display device according to claim 2, characterized in that: The light emitting component includes a first light emitting component and a second light emitting component that are spaced apart from each other, and wherein the first region of the organic layer includes the first light-emitting component, The second region of the organic layer includes the second light emitting component, The light-emitting element layer further includes a pixel defining layer, the pixel defining layer includes a first pixel defining layer and a second pixel defining layer, the first pixel defining layer and the second pixel defining layer define an area where the light-emitting component is disposed and are spaced apart from each other, and Wherein, the first region of the organic layer further includes the first pixel defining layer, and The second region of the organic layer further includes the second pixel defining layer.

4. The display device according to claim 2, characterized in that: Each of the pixel circuit and the auxiliary pixel circuit includes a driving transistor, a switching transistor, a compensation transistor, an initialization transistor, an operation control transistor, an emission control transistor, and a storage capacitor, Wherein, the pixel circuit further includes a bypass transistor, The auxiliary pixel circuit further includes a capacitance control transistor, a capacitance element initialization transistor and a compensation capacitor. wherein the line member is electrically connected to an output node between the capacitance control transistor and the capacitance element initialization transistor, wherein the repair light emitting element is electrically connected to the wire member via a connecting electrode, and Wherein, the connection electrode is electrically separated from the emission control transistor and the bypass transistor of the pixel circuit.

5. The display device according to claim 4, characterized in that: the light emitting element is electrically connected to the emission control transistor and the bypass transistor of the pixel circuit through an electrode which is not electrically connected to the line member, The pixel circuit layer further comprises a data line and a power line, wherein the data line and the power line are electrically connected to the pixel circuit. wherein the data line and the power line are spaced apart from each other in a first direction, and the data line and the power line extend in a second direction different from the first direction, and The electrode component is disposed between the data line and the power line, and the electrode component is adjacent to the connection electrode along the first direction.

6. The display device according to claim 1, characterized in that: The pixel circuit layer includes a first interlayer conductive layer, a second interlayer conductive layer on the first interlayer conductive layer, and a third interlayer conductive layer on the second interlayer conductive layer, and wherein the line member is formed by the second interlayer conductive layer, and The electrode member is formed from the third interlayer conductive layer.

7. The display device according to claim 1, characterized in that: The pixel circuit layer includes a first interlayer conductive layer, a second interlayer conductive layer on the first interlayer conductive layer, a third interlayer conductive layer on the second interlayer conductive layer, and a fourth interlayer conductive layer on the third interlayer conductive layer. wherein the pixel circuit layer further comprises a bridge component electrically connecting the line component and the electrode component to each other, and wherein the line member is formed by the second interlayer conductive layer, The bridge member is formed by the third interlayer conductive layer, and The electrode portion is formed by the fourth interlayer conductive layer.

8. The display device according to claim 2, characterized in that: The first region of the organic layer and the second region of the organic layer are spaced apart from each other, and an organic material removal region is between the first region and the second region. The pixel circuit layer further includes a via layer directly adjacent to the light emitting element layer, and the via layer is not disposed in the organic material removal region, and Here, in a plan view, the electrode member does not overlap with a region where the anode electrode of the light emitting element and the light emitting member are in contact with each other.

9. The display device according to claim 1, characterized in that: The light emitting element includes a plurality of light emitting elements forming sub-pixels that are different from each other and adjacent to each other along one direction, and Wherein, the line component is arranged between adjacent sub-pixels.

10. A display device, characterized in that: The display device comprises: Sub-pixels and repair sub-pixels are formed on the substrate layer, and each of the sub-pixels and the repair sub-pixels includes a light-emitting element; a line member disposed on the base layer; and an electrode member, on said wire member, The light-emitting element of each of the sub-pixel and the repair sub-pixel includes a first electrode, a second electrode, and a light-emitting layer electrically connected between the first electrode and the second electrode. Wherein, the sub-pixel includes a pixel circuit, Wherein, the repairing sub-pixel comprises a repairing pixel circuit, wherein the line component electrically connects the repair pixel circuit to the light emitting element of the repair sub-pixel, and Wherein, in a plan view, the light emitting layer includes a first light emitting layer and a second light emitting layer which are spaced apart from each other, and the electrode part is disposed between the first light emitting layer and the second light emitting layer.

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