Display device

Abstract

A display device is provided. The display device includes a substrate including a display area, a bending area spaced apart from the display area in a first direction, and a first peripheral area disposed between the display area and the bending area; a plurality of emission layers disposed in the display area; an opposite electrode disposed on the plurality of emission layers and overlapping the display area and the first peripheral area; and an encapsulation layer disposed on the opposite electrode and overlapping the display area and the first peripheral area. A first edge portion of the opposing electrode and a first edge portion of the encapsulation layer are coplanar with each other in the first peripheral region.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0127293 filed in the Korean Intellectual Property Office on September 22, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] One or more embodiments relate to a display device and a method of manufacturing the display device, and more particularly, to a display device including an organic light emitting diode and a method of manufacturing the display device. Background Art

[0004] The display device includes a display element and displays an image. Such a display device can be implemented in various devices (for example, in various electronic devices such as smart phones, digital cameras, notebook computers, navigation devices, or smart TVs). The display device may have a touch screen function to facilitate user use. For example, the display device may detect a user's touch input and display an image corresponding to the user's touch input. Utility Model Content

[0005] The display device may include an integrated circuit chip for processing touch input, displaying information, etc. The integrated circuit chip may be disposed on a substrate of the display device. The substrate of the display device may be flexible. In the display device, a portion of the substrate may be bent to be disposed on a rear surface of the display device so that an area where the integrated circuit chip, etc. is disposed is not visible to a user.

[0006] Some layers of the display device do not need to be arranged in the area where the substrate is bent. During the manufacturing process of the display device, for example, during the deposition process, an open mask is used to cover only a partial area of ​​the display device. The open mask generally has a straight structure.

[0007] In the case of manufacturing a display device, a plurality of display devices are manufactured simultaneously on one mother substrate. For example, in order to use a straight open mask, there is no choice but to manufacture display devices of the same specification on the same mother substrate. This results in an increase in unused areas among the areas of the mother substrate, especially the outer area.

[0008] Additional aspects will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the presented embodiments.

[0009] According to one or more embodiments, a display device may include: a substrate including a display area, a curved area spaced apart from the display area in a first direction, and a first peripheral area arranged between the display area and the curved area; a plurality of emission layers arranged in the display area; a relative electrode arranged on the plurality of emission layers and overlapping with the display area and the first peripheral area; and an encapsulation layer arranged on the relative electrode and overlapping with the display area and the first peripheral area, wherein a first edge portion of the relative electrode and a first edge portion of the encapsulation layer are coplanar with each other in the first peripheral area.

[0010] The display device may further include a common layer disposed above or below the plurality of emission layers.

[0011] The common layer may overlap the display region and the first peripheral region, and a first edge portion of the common layer, a first edge portion of the opposing electrode, and a first edge portion of the encapsulation layer may be coplanar with each other in the first peripheral region.

[0012] The substrate may include a second peripheral region partially surrounding the display area, the relative electrode and the encapsulation layer may overlap with the display area and the second peripheral region, the second edge portion of the relative electrode and the second edge portion of the encapsulation layer are arranged in the second peripheral region, the common layer may overlap with the display area, and the second edge portion of the common layer may be arranged between the display area and the second edge portion of the relative electrode.

[0013] The substrate may further include a pad area, the bending area may be arranged between the pad area and the display area, the relative electrode may include a first portion overlapping with the first peripheral area and a second portion overlapping with the pad area, and the encapsulation layer may include a first portion overlapping with the first peripheral area and a second portion overlapping with the pad area.

[0014] The first portion of the opposing electrode and the second portion of the opposing electrode may be spaced apart from each other, and the first portion of the encapsulation layer and the second portion of the encapsulation layer may be spaced apart from each other.

[0015] The display device may further include: a touch insulation layer, which is disposed on the encapsulation layer and overlaps with the display area and the first peripheral area; and a first connection line, which is disposed on the touch insulation layer and overlaps with the first peripheral area, wherein a first edge portion of the touch insulation layer may be disposed in the first peripheral area, and the first connection line may cover the first edge portion of the touch insulation layer.

[0016] The display device may also include a second connecting line, which is interposed between the substrate and the touch insulation layer and overlaps with the first peripheral area and the bending area, wherein the second connecting line may overlap with the first edge portion of the touch insulation layer, and the first connecting line and the second connecting line may be in direct contact with each other in the first peripheral area.

[0017] The substrate may include a second peripheral region partially surrounding the display region, and the display device may further include: a dam layer between the substrate and the opposite electrode; and a sidewall disposed on the dam layer in the second peripheral region.

[0018] The sidewall may include: a first layer directly contacting the dam layer; and a second layer disposed on the first layer and having a width greater than a width of an upper surface of the first layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and other aspects, features and advantages of certain embodiments will become more apparent from the following description in conjunction with the accompanying drawings, in which:

[0020] Figure 1 is a schematic plan view of a display device according to an embodiment;

[0021] Figure 2 Yes Figure 1 A schematic side view of a display device of the components shown in ;

[0022] Figure 3 is a schematic cross-sectional view of a portion of a display area of ​​a display device according to an embodiment;

[0023] Figure 4A is a schematic cross-sectional view of a portion of a display device according to an embodiment;

[0024] Figure 4B yes Figure 4A A schematic plan view of the embodiment shown in ;

[0025] Figure 5A is a schematic cross-sectional view of a portion of a display device according to another embodiment;

[0026] Figure 5B yes Figure 5A A schematic plan view of the embodiment shown in ;

[0027] Fig. 6A , Figure 6B , Figure 6C , Fig.6D , Fig. 6E and Fig. 6F is a schematic cross-sectional view illustrating a method of manufacturing a display device according to an embodiment;

[0028] Fig. 7A , Figure 7B , Figure 7C and Fig.7D is a schematic cross-sectional view illustrating a method of manufacturing a display device according to another embodiment;

[0029] Figure 8 is a schematic cross-sectional view of a portion of a display device according to an embodiment;

[0030] Fig. 9 yes Figure 8 an enlarged schematic cross-sectional view of region IX of ; and

[0031] Fig. 10A , Fig. 10B , Fig. 10C and Fig. 10D It is a graphic manufacturing Fig. 9 Schematic cross-sectional view of a method of an embodiment of the present invention. DETAILED DESCRIPTION

[0032] In the following description, for the purpose of explanation, many specific details are set forth in order to provide a thorough understanding of various embodiments or implementations of the present disclosure. As used herein, "embodiment" and "implementation" are interchangeable words, which are non-limiting examples of the devices or methods disclosed herein. However, it is apparent that various embodiments can be practiced without these specific details or with one or more equivalent arrangements. Here, various embodiments do not have to be exclusive, nor do they have to limit the present disclosure. For example, the specific shape, configuration, and characteristics of an embodiment can be used or implemented in another embodiment.

[0033] Unless otherwise specified, the illustrated embodiments should be understood to provide features of the present disclosure. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects of various embodiments, etc. (hereinafter individually or collectively referred to as "elements") can be combined, separated, interchanged and / or rearranged in other ways without departing from the scope of the present disclosure.

[0034] The use of cross hatching and / or shading in the drawings is generally provided to clarify the boundaries between adjacent elements. Therefore, unless otherwise specified, the presence or absence of cross hatching or shading does not convey or indicate any preference or requirement for a specific material, material property, size, ratio, commonality between the illustrated elements and / or any other characteristics, attributes, properties, etc. of the elements. In addition, in the drawings, the size and relative size of the elements may be exaggerated for clarity and / or descriptive purposes. When the embodiment can be implemented differently, the specific process sequence can be performed differently from the described sequence. For example, two processes described in succession can be performed substantially simultaneously or in an order opposite to the described order. In addition, similar reference numerals represent similar elements.

[0035] When an element or layer is referred to as "on" another element or layer, "connected to" or "coupled to" another element or layer, it can be directly on another element or layer, directly connected to or directly coupled to another element or layer, or there can be an intermediate element or layer. However, when an element or layer is referred to as "directly on" another element or layer, "directly connected to" or "directly coupled to" another element or layer, there is no intermediate element or layer. For this reason, the term "connection" can refer to physical, electrical and / or fluid connections with or without intermediate elements. In addition, the axis of the first direction, the axis of the second direction and the axis of the third direction are not limited to the three axes (such as X-axis, Y-axis and Z-axis) of the rectangular coordinate system, and can be interpreted in a broader sense. For the purpose of this disclosure, "at least one of A and B" can be understood to mean only A, only B or a combination of A and B. In addition, "at least one of A, B and C" and "at least one selected from the group consisting of A, B and C" can be understood to be only A, only B, only C or any combination of two or more of A, B and C. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0036] Although the terms "first", "second", etc. can be used in this article to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the teachings of the present disclosure, the first element discussed below can be referred to as the second element.

[0037] Spatially relative terms (such as "beneath", "below", "under", "lower", "above", "upper", "over", "higher", "side" (e.g., as in "sidewall")) and the like may be used herein for descriptive purposes and thus describe the relationship of one element to another element(s) as illustrated in the accompanying drawings. Spatially relative terms are intended to include different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is flipped, an element described as being "below" or "below" other elements or features will be oriented to be "above" the other elements or features. Therefore, the term "below" can include both the orientations of above and below. In addition, the device can be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and therefore, the spatially relative descriptors used herein should be interpreted accordingly.

[0038] The terms used herein are for the purpose of describing specific embodiments and are not intended to be limiting. As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. In addition, the terms "comprise", "comprising", "include", and / or "including" when used in this specification specify the presence of the features, wholes, steps, operations, elements, components, and / or groups thereof, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or groups thereof. It should also be noted that, as used herein, the terms "substantially", "approximately", and other similar terms are used as terms of approximation and not as terms of degree, and therefore, are used to illustrate the inherent deviations of the values ​​measured, calculated, and / or provided that will be recognized by those of ordinary skill in the art.

[0039] Various embodiments are described herein with reference to schematically illustrated cross-sections and / or exploded illustrations as embodiments and / or intermediate structures. Therefore, variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are to be expected. Therefore, the embodiments disclosed herein should not necessarily be understood as being limited to specific illustrated shapes of zones, but rather include deviations in shapes caused by, for example, manufacturing. In this way, the zones illustrated in the accompanying drawings may be schematic in nature, and the shapes of these zones may not reflect the actual shapes of the zones of the device, and therefore need not be intended to be limiting.

[0040] As is customary in the art, some embodiments are described and illustrated in the accompanying drawings in terms of functional blocks, units and / or modules. Those skilled in the art will understand that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits (such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, etc. that can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques). In the case where blocks, units and / or modules are implemented by microprocessors or other similar hardware, software (e.g., microcode) can be used to program and control the blocks, units and / or modules to perform the various functions discussed herein, and the blocks, units and / or modules are physically implemented by electronic (or optical) circuits (such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, etc. ...

[0041] The embodiment of the present invention can be realized by hardware or software.It is also considered that each block, unit and / or module can be realized by special hardware, or as a combination of special hardware for performing some functions and a processor (e.g., one or more programmed microprocessors and associated circuits) for performing other functions.In addition, without departing from the scope of the present invention, each block, unit and / or module of some embodiments can be physically separated into two or more interactive and discrete blocks, units and / or modules.In addition, without departing from the scope of the present invention, the block, unit and / or module of some embodiments can be physically combined into more complicated blocks, units and / or modules.

[0042] Figure 1 is a schematic plan view of a display device 1 according to an embodiment. Figure 2 Yes Figure 1 Schematic side view of a display device 1 showing the components shown in FIG.

[0043] exist Figure 2 In the embodiment, since the substrate is flexible, the display panel 10 may have a curved shape in the curved area BA. For convenience of explanation, Figure 1 The display panel 10 is shown in an unbent state.

[0044] refer to Figure 1 and Figure 2The display device 1 according to the embodiment can display moving pictures or still images, and thus can be used as a display screen for various products, including not only portable electronic devices (such as mobile phones, smart phones, tablet personal computers (PCs), mobile communication terminals, electronic notebooks, electronic books, portable multimedia players (PMPs), navigation devices, and ultra-mobile PCs (UMPCs)), but also televisions, notebooks, monitors, advertising panels, and Internet of Things (IoT) devices. The display device 1 can be used for wearable devices such as smart watches, watch phones, glasses-type displays, and head-mounted displays (HMDs). The display device 1 can be used as a dashboard of a car, a central information display (CID) of a central panel or dashboard of a car, an interior mirror display that replaces a side mirror of a car, and a display arranged on the rear side of a front seat as an entertainment device for rear seat passengers of a car.

[0045] For ease of explanation, Figure 1 and Figure 2 The diagram shows the use of a smart phone as a display device 1. The display device 1 may include a cover window CW, a display panel 10, a display driving unit 11, a display circuit board 12, a sensor driving unit 13, etc. The display device 1 may also include a bracket, a main circuit board, a battery, a lower cover, etc.

[0046] The term “above” indicates the direction in which the cover window CW is disposed relative to the display panel 10, i.e., the positive Z-axis direction, and the term “below” indicates the negative Z-axis direction, which is the direction opposite to the direction in which the cover window CW is disposed relative to the display panel 10.

[0047] When viewed in a direction perpendicular to the surface of the display device 1, the display device 1 may have an approximately rectangular shape, such as Figure 1 For example, Figure 1 As shown in , the display device 1 may have an overall rectangular planar shape with shorter sides and longer sides, the shorter sides each extending in the positive X-axis direction and the negative X-axis direction, and the longer sides each extending in the positive Y-axis direction and the negative Y-axis direction. The corners between the shorter sides in the positive X-axis direction and the negative X-axis direction and the longer sides in the positive Y-axis direction and the negative Y-axis direction may be rounded to have a certain curvature, or may be a right angle. The planar shape of the display device 1 is not limited to a rectangle, and may be any other polygonal shape, a circular shape, or an elliptical shape.

[0048] like Figure 2 As shown in FIG. 1 , a cover window CW may be disposed above the display panel 10 to cover the upper surface of the display panel 10. The cover window CW may play a role in protecting the upper surface of the display panel 10.

[0049] The display panel 10 may be disposed under the cover window CW. The display panel 10 may overlap a transmissive portion of the cover window CW. The display panel 10 may include a substrate 100 and a display element disposed on the substrate 100.

[0050] The display panel 10 may display (or output) information processed by the display device 1. For example, the display panel 10 may display execution screen information of an application driven by the display device 1, or may display user interface (UI) and graphical user interface (GUI) information based on the execution screen information. The display panel 10 may include a display layer that displays an image and a touch layer that senses a user's touch input. Therefore, the display panel 10 may be used as one of a plurality of input devices that provide an input interface between the display device 1 and the user, and may be used as one of a plurality of output devices that provide an output interface between the display device 1 and the user.

[0051] The substrate 100 included in the display panel 10 may include an insulating material such as glass, quartz, and polymer resin. The substrate 100 may be a rigid substrate or a flexible substrate that is bendable, foldable, or rollable. Figure 2 In the embodiment, since the substrate 100 is flexible, the display panel 10 may have a curved shape in the curved area BA.

[0052] The substrate 100 may have a display area DA and a peripheral area PA outside the display area DA, and the display element may be disposed on the display area DA of the substrate 100 .

[0053] In the peripheral area PA of the substrate 100, an image may not be displayed. For example, the peripheral area PA may surround the display area DA. The peripheral area PA may be an area provided between an edge portion of the display area DA and an edge portion of the display panel 10. In the display area DA, not only pixels may be arranged, but also scan lines, data lines, power lines, etc. connected (e.g., electrically connected) to the pixels may be arranged. In the peripheral area PA, a scan driving unit for applying a scan signal to the scan line and a fan-out line connecting the data line to the display driving unit 11 may be provided.

[0054] The display element may include, for example, a light-emitting element. For example, the display panel 10 may be an organic light-emitting display panel using an organic light-emitting diode including an organic emission layer, a micro light-emitting diode (LED) display panel using micro LEDs, a quantum dot light-emitting display panel using a quantum dot LED including a quantum dot emission layer, or an inorganic light-emitting display panel using an inorganic light-emitting element including an inorganic semiconductor.

[0055] The display panel 10 may be a rigid display panel having rigidity and thus may not be easily bent, or a flexible display panel having flexibility and thus may be easily bent, folded, or rolled. For example, the display panel 10 may be a foldable display panel, a bent display panel having a display surface of which at least a portion is bent, a bent display panel of which an area other than the display surface is bent, a rollable display panel, or a stretchable display panel.

[0056] The display panel 10 may be a transparent display panel. For example, the display panel 10 may have a transparent property so that a user can see an object or background arranged below the display panel 10 through the upper surface of the display panel 10. In another example, the display panel 10 may be a reflective display panel capable of reflecting an object or background above the display panel 10.

[0057] like Figure 1 As shown in FIG. 1 , the display panel 10 may have a bending area BA on one side in the negative Y-axis direction, and thus, the display panel 10 may be bent in the bending area BA, as shown in FIG. Figure 2 As shown in (hereinafter, for the convenience of explanation, one side in the positive or negative X / Y / Z axis direction may also be referred to as the positive or negative X / Y / Z axis direction side). For example, for the convenience of explanation, Figure 1 The display panel 10 is shown in an unbent state. Since the display panel 10 is bent as described above, the pad area PDA may be disposed under another portion of the display panel 10 in the negative Z-axis direction.

[0058] The bending area BA and the pad area PDA may protrude from one side of the display panel 10 in the negative Y-axis direction. Figure 1 and Figure 2 , the length of each of the bending area BA and the pad area PDA in the positive and negative X-axis directions is smaller than the length of the display area DA in the positive and negative X-axis directions. However, the present disclosure is not limited thereto.

[0059] A portion of the peripheral area PA disposed between the bending area BA and the display area DA may be defined as a first peripheral area PA1. The length of the display panel 10 in the positive X-axis direction and the negative X-axis direction may be reduced in the first peripheral area PA1. Figure 1The edge portion of the display panel 10 in the first peripheral area PA1 is illustrated to be parallel to the positive X-axis direction and the negative X-axis direction, but the present disclosure is not limited thereto. According to another embodiment, the edge portion of the display panel 10 in the first peripheral area PA1 may extend obliquely relative to the positive X-axis direction and the negative X-axis direction and the positive Y-axis direction and the negative Y-axis direction, and may have a bent shape. The second peripheral area PA2 may be disposed on the positive X-axis direction side and the negative X-axis direction side and the positive Y-axis direction side of the display area DA to partially surround the display area DA.

[0060] As described above, the display panel 10 may be bent in the bending area BA, and thus the pad area PDA may overlap the display area DA in the thickness direction (eg, Z-axis direction) of the display panel 10. In the pad area PDA, the display driving unit 11 and the display circuit board 12 may be disposed.

[0061] The display driving unit 11 may receive a control signal and a power supply voltage, and generate and output a signal and a voltage for driving the display panel 10. The display driving unit 11 may be an integrated circuit (IC).

[0062] The display circuit board 12 may be electrically connected to the display panel 10. For example, the display circuit board 12 may be electrically connected to a pad portion on the substrate 100 through an anisotropic conductive film.

[0063] The display circuit board 12 may be a flexible printed circuit board (FPCB) that is bendable, a rigid printed circuit board (PCB) that has rigidity and thus is not easily bent, or a composite PCB including a rigid PCB and an FPCB.

[0064] The sensor driving unit 13 may be provided on the display circuit board 12. The sensor driving unit 13 may include an IC. The sensor driving unit 13 may be attached to the display circuit board 12. The sensor driving unit 13 may be electrically connected to the touch electrode of the display panel 10 via the display circuit board 12.

[0065] A power supply for supplying a driving voltage to drive the pixels, the scan driving unit, and the display driving unit 11 of the display panel 10 may be additionally arranged on the display circuit board 12. In another example, the power supply may be integrated with the display driving unit 11. For example, the display driving unit 11 and the power supply may be implemented as an IC (e.g., a single IC).

[0066] The display circuit board 12 may be electrically connected to the main circuit board. The main circuit board may include, for example, a main processor including an IC, a camera device, a wireless communication unit, an input unit, an output unit, an interface unit, a memory, and / or a power supply.

[0067] For example, the panel cover lower may be disposed under the display panel 10. The panel cover lower may include at least one of a light absorbing member for absorbing external incident light, a pad member for absorbing external impact, and a heat dissipating member for effectively dissipating heat of the display panel 10.

[0068] Figure 3 is a schematic cross-sectional view of a portion of a display area DA of a display device according to an embodiment. Figure 3 Can be used with Figure 1 It corresponds to the cross section of the display device 1 taken along the line AA′.

[0069] refer to Figure 3 , an organic light emitting diode OLED may be disposed as a display element on the substrate 100. The organic light emitting diode OLED may be electrically connected to the thin film transistor TFT.

[0070] A barrier layer 101 and a buffer layer 103 may be disposed on the substrate 100. The barrier layer 101 and the buffer layer 103 may play a role in flattening and protecting the upper surface of the substrate 100. The barrier layer 101 and the buffer layer 103 may include an inorganic insulating material, such as silicon oxide (SiO x ), silicon nitride (SiN x ) and / or silicon oxynitride (SiO x N y ), and may have a single-layer structure or a multi-layer structure of the above-mentioned materials.

[0071] The thin film transistor TFT may be disposed on the buffer layer 103. The thin film transistor TFT may include an active layer A, a gate electrode G, a source electrode S, and a drain electrode D. The thin film transistor TFT may be connected (eg, electrically connected) to the organic light emitting diode OLED and may drive the organic light emitting diode OLED.

[0072] The active layer A may be disposed on the buffer layer 103, and may include a drain region overlapping with (or connected to) the drain electrode D, a source region overlapping with (or connected to) the source electrode S, and a channel region disposed between the drain region and the source region. The drain region and the source region may be regions doped with impurities (or dopants).

[0073] The gate insulating layer 105 may be disposed on the active layer A. The gate insulating layer 105 may include an inorganic material including oxide or nitride. For example, the gate insulating layer 105 may include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) and zinc oxide (ZnO x ) and may have a single layer structure or a multilayer structure of the above materials. Zinc oxide (ZnO x ) may be ZnO and / or ZnO 2 .

[0074] The gate electrode G may be disposed on the gate insulating layer 105. At least a portion of the gate electrode G may overlap the active layer A. For example, the gate electrode G may overlap the channel region of the active layer A. The gate electrode G may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and may have a single-layer structure or a multi-layer structure including the above materials.

[0075] The interlayer insulating layer 107 may be provided to cover the gate electrode G. The interlayer insulating layer 107 may include an inorganic material including oxide or nitride. For example, the interlayer insulating layer 107 may include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) and zinc oxide (ZnO x ) and may have a single layer structure or a multilayer structure of the above materials. Zinc oxide (ZnO x ) may be ZnO and / or ZnO 2 .

[0076] The gate insulating layer 105 and the interlayer insulating layer 107 may include contact holes overlapping the source region and the drain region of the active layer A. A source electrode S and a drain electrode D may be disposed on the interlayer insulating layer 107. The source electrode S may be disposed to overlap the source region of the active layer A, and the drain electrode D may be disposed to overlap the drain region of the active layer A. The source electrode S and the drain electrode D may each be connected (e.g., electrically connected) to the active layer A via corresponding contact holes formed in the gate insulating layer 105 and the interlayer insulating layer 107.

[0077] The organic insulating layer 109 may include a first organic insulating layer 1109, a second organic insulating layer 2109, and a third organic insulating layer 3109. The first organic insulating layer 1109, the second organic insulating layer 2109, and the third organic insulating layer 3109 may be sequentially disposed on the interlayer insulating layer 107. The first organic insulating layer 1109, the second organic insulating layer 2109, and the third organic insulating layer 3109 may include an opening overlapping the drain electrode D. The first connection metal CM1 and the second connection metal CM2 may be disposed on the first organic insulating layer 1109 and the second organic insulating layer 2109, respectively. According to an embodiment, the first organic insulating layer 1109 may be disposed on the interlayer insulating layer 107, and may include an opening overlapping the drain electrode D. The first connection metal CM1 may be disposed on the first organic insulating layer 1109, and may be connected (e.g., electrically connected) to the drain electrode D through the opening of the first organic insulating layer 1109. The second organic insulating layer 2109 may be disposed on the first organic insulating layer 1109, and may include an opening overlapping the first connection metal CM1. The second connection metal CM2 may be disposed on the second organic insulating layer 2109 and may be connected (eg, electrically connected) to the first connection metal CM1 through an opening of the second organic insulating layer 2109. The third organic insulating layer 3109 may be disposed on the second organic insulating layer 2109 and may include an opening overlapping the second connection metal CM2.

[0078] The first connection metal CM1 and the second connection metal CM2 may include Al, Cu, and / or Ti, and may each be a multi-layer structure or a single-layer structure including the above materials.

[0079] The first organic insulating layer 1109, the second organic insulating layer 2109 and the third organic insulating layer 3109 may include commercial polymers (such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA) or polystyrene (PS)), polymer derivatives having phenolic groups, acrylic polymers, imide polymers, aromatic ether polymers, amide polymers, fluorine-based polymers, paraxylene polymers, vinyl alcohol-based polymers, etc., and may each have a single-layer structure or a multi-layer structure including the above-mentioned materials.

[0080] The sub-pixel electrode 210 may be disposed on the third organic insulating layer 3109. The sub-pixel electrode 210 may be connected (e.g., electrically connected) to the second connection metal CM2 through the opening of the third organic insulating layer 3109. Therefore, the sub-pixel electrode 210 may be electrically connected to the thin film transistor TFT through the first and second connection metals CM1 and CM2 and the drain electrode D, and thus may receive a voltage.

[0081] The sub-pixel electrode 210 may include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO) or aluminum zinc oxide (AZO). The sub-pixel electrode 210 may include a reflective layer containing silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr) or a compound of these materials. The configuration and material of the sub-pixel electrode 210 are not limited to those materials described above, and various modifications may be made to the sub-pixel electrode 210.

[0082] The dam layer 111 may be disposed on the third organic insulating layer 3109. The dam layer 111 may cover an edge portion (or edge region) of the sub-pixel electrode 210. For example, the dam layer 111 may have an opening that exposes a portion of a central portion of the sub-pixel electrode 210. The size and shape of the emission region of the organic light emitting diode OLED may be determined (or defined) by the opening of the dam layer 111.

[0083] An intermediate layer 220 may be disposed on the subpixel electrode 210. The intermediate layer 220 may include a first common layer 221 and a second common layer 223 disposed on the dam layer 111, and an emission layer 222 disposed in an opening of the dam layer 111. According to some embodiments, the first common layer 221 may be disposed on the dam layer 111, the emission layer 222 may be on the first common layer 221 disposed in the opening of the dam layer 111, and the second common layer 223 may be disposed on the first common layer 221 to cover the emission layer 222. For example, the emission layer 222 may be disposed in the opening of the dam layer 111 and between the first common layer 221 and the second common layer 223.

[0084] The emission layer 222 may include an organic emission layer including a low molecular weight or high molecular weight material. The first common layer 221 may include an electron transport layer (ETL) and / or an electron injection layer (EIL). The second common layer 223 may include a hole transport layer (HTL) and / or a hole injection layer (HIL). According to some embodiments, the first common layer 221 or the second common layer 223 may be omitted. According to some embodiments, the orientation (or position) of the first common layer 221 and the second common layer 223 may be interchanged.

[0085] The intermediate layer 220 may be provided with a relative electrode 230. For example, the relative electrode 230 may be provided on the second common layer 223. The relative electrode 230 may be arranged to cover the entire intermediate layer 220. The relative electrode 230 may include a conductive material having a low work function. For example, the relative electrode 230 may include a transparent layer (or a semi-transparent layer) containing, for example, silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or an alloy of these materials. In another example, the relative electrode 230 may also include a conductive material such as ITO, IZO, ZnO, or In on the transparent layer (or semi-transparent layer) including any of the above materials. 2 O 3 layer.

[0086] A capping layer 240 may be disposed on the opposite electrode 230. The capping layer 240 may have a lower refractive index than the opposite electrode 230, and may improve light emitting efficiency by reducing a percentage of light generated from the intermediate layer 220 that is completely reflected and thus not emitted to the outside.

[0087] The capping layer 240 may be an organic capping layer including an organic material, an inorganic capping layer including an inorganic material, or a composite capping layer including an organic material and an inorganic material. For example, the capping layer 240 may include a carbocyclic compound, a heterocyclic compound, an amine group-containing compound, a porphine derivative, a phthalocyanine derivative, a naphthalocyanine derivative, an alkali metal complex, an alkaline earth metal complex, or any combination thereof. In another example, the capping layer 240 may include an inorganic material such as zinc oxide (ZnO), titanium oxide (TiO x )、ZrO x ), nitrogen oxide (NO), niobium oxide (NbO x ), tantalum oxide (TaO x ), tin oxide (SnO 2 ), nickel oxide (NiO x ), indium nitride (InN), and gallium nitride (GaN). The material for forming the capping layer 240 is not limited thereto, and various other materials may be used.

[0088] The encapsulation layer 300 may be disposed on the capping layer 240. The encapsulation layer 300 may include at least one inorganic layer and at least one organic layer. According to an embodiment, the encapsulation layer 300 may include a first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330 and an organic encapsulation layer 320 between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330. The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include at least one inorganic insulating material such as silicon oxide (SiO x ), silicon nitride (SiN x), silicon oxynitride (SiO x N y ), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) or zinc oxide (ZnO x ). Zinc oxide (ZnO x ) may be ZnO and / or ZnO 2 The organic encapsulating layer 320 may include a polymer-based material. Examples of the polymer-based material may include silicon-based resin, acrylic-based resin, epoxy-based resin, polyimide, and polyethylene.

[0089] The input sensing layer 400 may be disposed on the encapsulation layer 300. The input sensing layer 400 may include a first touch electrode 410, a second touch electrode 430, and a touch insulating layer 420. The first touch electrode 410 may be disposed on the encapsulation layer 300. For example, the first touch electrode 410 may be disposed on the second inorganic encapsulation layer 330. The touch insulating layer 420 and the second touch electrode 430 may be sequentially disposed on the first touch electrode 410.

[0090] The touch insulating layer 420 may include an organic insulating material. For example, the touch insulating layer 420 may include a material selected from silicon oxide (SiO x ), silicon nitride (SiN x ) and silicon oxynitride (SiO x N y ) at least one inorganic insulating material. The first touch electrode 410 and the second touch electrode 430 may be arranged in a specific pattern and may each include a metal layer. For example, the first touch electrode 410 and the second touch electrode 430 may be arranged so as not to overlap with the emission region of the organic light emitting diode OLED or not to overlap with the emission layer 222. According to some embodiments, the organic light emitting diode OLED may be disposed in the display area DA, and the second touch electrode 430 may have a mesh structure surrounding each of the plurality of organic light emitting diodes OLED.

[0091] According to some embodiments, an insulating layer may be additionally interposed between the first touch electrode 410 and the second inorganic encapsulation layer 330. The insulating layer may include a material selected from silicon oxide (SiO x ), silicon nitride (SiN x ) and silicon oxynitride (SiO x N y ) at least one inorganic insulating material.

[0092] Figure 4Ais a schematic cross-sectional view of a portion of a display device according to an embodiment. Figure 4A Can be used with Figure 1 It corresponds to a cross section of the embodiment of the display device 1 taken along line BB′.

[0093] refer to Figure 4A , organic light emitting diodes and their corresponding thin film transistors may be arranged in the display area DA. For example, the first organic light emitting diode OLED1, the second organic light emitting diode OLED2, and the third organic light emitting diode OLED3 and the first thin film transistor TFT1, the second thin film transistor TFT2, and the third thin film transistor TFT3 corresponding thereto may be arranged in the display area DA. The first organic light emitting diode OLED1, the second organic light emitting diode OLED2, and the third organic light emitting diode OLED3 may emit light beams of different colors, respectively. According to an embodiment, the first organic light emitting diode OLED1 may emit red light, the second organic light emitting diode OLED2 may emit green light, and the third organic light emitting diode OLED3 may emit blue light.

[0094] The first peripheral area PA1 may be disposed on the negative Y-axis direction side of the display area DA. The bending area BA may be disposed on the negative Y-axis direction side of the first peripheral area PA1. The pad area PDA may be disposed on the negative Y-axis direction side of the bending area BA.

[0095] The barrier layer 101, the buffer layer 103, the gate insulating layer 105, and the interlayer insulating layer 107 may be disposed in the first peripheral area PA1 and the pad area PDA. For example, the barrier layer 101, the buffer layer 103, the gate insulating layer 105, and the interlayer insulating layer 107 may include an opening overlapping the bending area BA. For example, the barrier layer 101, the buffer layer 103, the gate insulating layer 105, and the interlayer insulating layer 107 may not be disposed in the bending area BA. Since the barrier layer 101, the buffer layer 103, the gate insulating layer 105, and the interlayer insulating layer 107 are not disposed in the bending area BA, the display panel can be smoothly bent in the bending area BA.

[0096] The first, second and third organic insulating layers 1109, 2109 and 3109 and the dam layer 111 may be disposed in the first peripheral area PA1, the bending area BA and the pad area PDA. A spacer layer 113 may be further disposed on the dam layer 111 in the first peripheral area PA1, the bending area BA and the pad area PDA.

[0097] A driving voltage line ELVDD may be provided on the interlayer insulating layer 107 in the first peripheral area PA1. A first driving voltage supply line VDD1 may be provided on the driving voltage line ELVDD. The first driving voltage supply line VDD1 and the first connection metal CM1 may be formed as the same layer or may be formed on the same layer. According to an embodiment, the first driving voltage supply line VDD1 may be formed by the same process as the process for forming the first connection metal CM1. The second driving voltage supply line VDD2 may be provided on the first driving voltage supply line VDD1. The second driving voltage supply line VDD2 and the second connection metal CM2 may be formed as the same layer or may be formed on the same layer. According to an embodiment, the second driving voltage supply line VDD2 may be formed by the same process as the process for forming the second connection metal CM2. The third driving voltage supply line VDD3 may be provided on the second driving voltage supply line VDD2. The third driving voltage supply line VDD3 and the sub-pixel electrode 210 may be formed as the same layer or may be formed on the same layer. According to an embodiment, the third driving voltage supply line VDD3 may be formed by the same process as the process for forming the sub-pixel electrode 210.

[0098] The wall (e.g., partition wall) 120 may be arranged in the first peripheral area PA1. For example, the first wall 121, the second wall 122, and the third wall 123 (e.g., the first partition wall, the second partition wall, and the third partition wall) may be arranged sequentially in the negative Y-axis direction in the first peripheral area PA1. The first wall 121 may be disposed on the third driving voltage supply line VDD3. The first wall 121 and the dam layer 111 may be formed as the same layer or may be formed on the same layer. The second wall 122 may be disposed on the third driving voltage supply line VDD3. The second wall 122 and the dam layer 111 may include the same layer. The second wall 122 and the spacer layer 113 may include the same layer. The third wall 123 may be disposed on the second driving voltage supply line VDD2. The third wall 123 and the dam layer 111 may include the same layer. The third wall 123 and the spacer layer 113 may include the same layer. The first wall 121, the second wall 122, and the third wall 123 may block the organic material from flowing toward the edge portion of the substrate 100 when the organic encapsulation layer 320 of the encapsulation layer 300 is formed, thereby preventing the formation of an edge tail (or edge end) of the organic encapsulation layer 320. Although the formation of the wall 120 including three walls will now be shown and described, embodiments are not limited thereto.

[0099] Each of the first and second common layers 221 and 223, the opposing electrode 230, the capping layer 240, and the first and second inorganic encapsulation layers 310 and 330 may extend into the first peripheral area PA1. Therefore, the first and second common layers 221 and 223, the opposing electrode 230, the capping layer 240, and the first and second inorganic encapsulation layers 310 and 330 may cover the first, second, and third walls 121, 122, and 123.

[0100] The first common layer 221 and the second common layer 223, the opposing electrode 230, the capping layer 240, and corresponding edge portions of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may be disposed on the spacer layer 113 in the first peripheral area PA1. For example, the first edge portion 221-E1 of the first common layer 221, the first edge portion 223-E1 of the second common layer 223, the first edge portion 230-E1 of the opposing electrode 230, the first edge portion 240-E1 of the capping layer 240, the first edge portion 310-E1 of the first inorganic encapsulation layer 310, and the first edge portion 330-E1 of the second inorganic encapsulation layer 330 may be disposed in the first peripheral area PA1 and may be disposed on the spacer layer 113.

[0101] According to an embodiment, the first edge portion 310-E1 of the first inorganic encapsulation layer 310 and the first edge portion 330-E1 of the second inorganic encapsulation layer 330 may be on the same plane (or may be coplanar with each other). According to some embodiments, the first edge portion 230-E1 of the opposing electrode 230 and the first edge portion 240-E1 of the encapsulation layer 240 may be on the same plane (or may be coplanar with each other). According to some embodiments, the first edge portion 221-E1 of the first common layer 221 and the first edge portion 223-E1 of the second common layer 223 may be on the same plane (or may be coplanar with each other). According to some embodiments, the first edge portion 230-E1 of the opposing electrode 230, the first edge portion 310-E1 of the first inorganic encapsulation layer 310, and the first edge portion 240-E1 of the capping layer 240 may be on the same plane (or may be coplanar with each other). According to some embodiments, the first edge portion 221-E1 of the first common layer 221, the first edge portion 223-E1 of the second common layer 223, the first edge portion 230-E1 of the relative electrode 230, the first edge portion 240-E1 of the cover layer 240, the first edge portion 310-E1 of the first inorganic encapsulation layer 310, and the first edge portion 330-E1 of the second inorganic encapsulation layer 330 may be on the same plane (or may be coplanar with each other).

[0102] The touch insulating layer 420 may extend to the first peripheral area PA1. The first edge portion 420-E1 of the touch insulating layer 420 may be disposed in the first peripheral area PA1 and may be disposed on the spacer layer 113. The first edge portion 420-E1 of the touch insulating layer 420 may be disposed in the negative Y-axis direction to exceed the first edge portion 221-E1 of the first common layer 221, the first edge portion 223-E1 of the second common layer 223, the first edge portion 230-E1 of the opposing electrode 230, the first edge portion 240-E1 of the cover layer 240, the first edge portion 310-E1 of the first inorganic encapsulation layer 310, and the first edge portion 330-E1 of the second inorganic encapsulation layer 330. For example, the touch insulation layer 420 may cover the first edge portion 221-E1 of the first common layer 221, the first edge portion 223-E1 of the second common layer 223, the first edge portion 230-E1 of the relative electrode 230, the first edge portion 240-E1 of the cover layer 240, the first edge portion 310-E1 of the first inorganic encapsulation layer 310, and the first edge portion 330-E1 of the second inorganic encapsulation layer 330 in the first peripheral area PA1.

[0103] The first connection line CL1 may be disposed in the first peripheral area PA1 and may be disposed on the touch insulation layer 420. The first connection line CL1 and the second touch electrode 430 may be formed as the same layer or may be formed on the same layer. According to an embodiment, the first connection line CL1 may be formed by the same process as that for forming the second touch electrode 430.

[0104] The second connection line CL2 may overlap the first peripheral area PA1 and may extend to the bending area BA and the pad area PDA. According to an embodiment, the second connection line CL2 may be between the second organic insulating layer 2109 and the third organic insulating layer 3109. For example, the second connection line CL2, the sub-pixel electrode 210, and the third driving voltage supply line VDD3 may be formed as the same layer or on the same layer. The second connection line CL2, the sub-pixel electrode 210, and the third driving voltage supply line VDD3 may be formed by the same process. According to another embodiment, the second connection line CL2 may be between the first organic insulating layer 1109 and the second organic insulating layer 2109. The second connection line CL2 may partially overlap with the touch insulating layer 420, and may partially overlap with the first connection line CL1.

[0105] The spacer layer 113, the dam layer 111, and the third organic insulating layer 3109 may include an opening overlapping the second connection line CL2. According to another embodiment, in the case where the second connection line CL2 is between the first organic insulating layer 1109 and the second organic insulating layer 2109, the spacer layer 113, the dam layer 111, the third organic insulating layer 3109, and the second organic insulating layer 2109 may include an opening overlapping the second connection line CL2. A portion of the first connection line CL1 may be disposed in the opening and may contact (e.g., directly contact) the second connection line CL2. Therefore, the first connection line CL1 and the second connection line CL2 may be connected to each other (e.g., electrically connected), and power may be supplied from the pad area PDA to the display area DA. For example, the first common layer 221 and the second common layer 223, the relative electrode 230, the cap layer 240, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330, and the corresponding portions of the touch insulating layer 420 may be removed so that the first connection line CL1 and the second connection line CL2 may be connected to each other (e.g., electrically connected).

[0106] Figure 4B yes Figure 4A A schematic plan view of the embodiment shown in FIG.

[0107] refer to Figure 4B In the case where the first common layer 221, the second common layer 223, the opposite electrode 230, the cap layer 240, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 are defined as the main layer L, the main layer L may be disposed in the display area DA and the second peripheral area PA2, may be disposed on a portion of the first peripheral area PA1, and may not be disposed in the bending area BA and the pad area PDA. For example, a boundary or edge portion of the main layer L may be disposed in the first peripheral area PA1. Figure 4B It is shown that the boundary or edge portion of the main layer L is disposed on the negative Y-axis direction side beyond the region of the display panel 10 where the positive and negative X-axis direction lengths of the display panel 10 are reduced. However, the present embodiment is not limited thereto.

[0108] Figure 5A is a schematic cross-sectional view of a portion of a display device according to another embodiment. Figure 5A Can be used with Figure 1 It corresponds to a cross section of another embodiment of the display device 1 taken along line BB'.

[0109] refer to Figure 5A, corresponding portions of the first common layer 221, the second common layer 223, the relative electrode 230, the cover layer 240, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can be set in the display area DA and the first peripheral area PA1, and corresponding other portions of the first common layer 221, the second common layer 223, the relative electrode 230, the cover layer 240, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can be set in the pad area PDA.

[0110] According to an embodiment, the first common layer 221 may include a 1-1 common layer 221a overlapping the display area DA and the first peripheral area PA1 and a 1-2 common layer 221b overlapping the pad area PDA. The second common layer 223 may include a 2-1 common layer 223a overlapping the display area DA and the first peripheral area PA1 and a 2-2 common layer 223b overlapping the pad area PDA. The opposing electrode 230 may include a first opposing electrode 230a overlapping the display area DA and the first peripheral area PA1 and a second opposing electrode 230b overlapping the pad area PDA. The cover layer 240 may include a first cover layer 240a overlapping the display area DA and the first peripheral area PA1 and a second cover layer 240b overlapping the pad area PDA. The first inorganic encapsulation layer 310 may include a 1-1 inorganic encapsulation layer 310a overlapping the display area DA and the first peripheral area PA1 and a 1-2 inorganic encapsulation layer 310b overlapping the pad area PDA. The second inorganic encapsulation layer 330 may include a 2-1 inorganic encapsulation layer 330 a overlapping the display area DA and the first peripheral area PA1 and a 2-2 inorganic encapsulation layer 330 b overlapping the pad area PDA.

[0111] The 1-2 common layer 221 b , the 2-2 common layer 223 b , the second opposite electrode 230 b , the second capping layer 240 b , the 1-2 inorganic encapsulation layer 310 b , and the 2-2 inorganic encapsulation layer 330 b may overlap the pad area PDA and may be disposed on the spacer layer 113 .

[0112] The 1-1 common layer 221a and the 1-2 common layer 221b may be spaced apart from each other, wherein the bending area BA is between the 1-1 common layer 221a and the 1-2 common layer 221b. The 2-1 common layer 223a and the 2-2 common layer 223b may be spaced apart from each other, wherein the bending area BA is between the 2-1 common layer 223a and the 2-2 common layer 223b. The first relative electrode 230a and the second relative electrode 230b may be spaced apart from each other, wherein the bending area BA is between the first relative electrode 230a and the second relative electrode 230b. The first capping layer 240a and the second capping layer 240b may be spaced apart from each other, wherein the bending area BA is between the first capping layer 240a and the second capping layer 240b. The 1-1 inorganic encapsulation layer 310a and the 1-2 inorganic encapsulation layer 310b may be spaced apart from each other, wherein the bending area BA is between the 1-1 inorganic encapsulation layer 310a and the 1-2 inorganic encapsulation layer 310b. The 2-1 inorganic encapsulating layer 330 a and the 2-2 inorganic encapsulating layer 330 b may be spaced apart from each other with the bending area BA between the 2-1 inorganic encapsulating layer 330 a and the 2-2 inorganic encapsulating layer 330 b .

[0113] The corresponding edge portions of the 1-2 common layer 221b, the 2-2 common layer 223b, the second opposing electrode 230b, the second capping layer 240b, the 1-2 inorganic encapsulation layer 310b, and the 2-2 inorganic encapsulation layer 330b may be disposed in the pad area PDA. The corresponding edge portions of the 1-1 common layer 221a, the 2-1 common layer 223a, the first opposing electrode 230a, the first capping layer 240a, the 1-1 inorganic encapsulation layer 310a, and the 2-1 inorganic encapsulation layer 330a may be disposed in the first peripheral area PA1.

[0114] For example, the first common layer 221 , the second common layer 223 , the opposite electrode 230 , the capping layer 240 , the first inorganic encapsulating layer 310 , and the second inorganic encapsulating layer 330 may include an opening overlapping a portion of the bending area BA and the first peripheral area PA1 .

[0115] Figure 5B yes Figure 5A A schematic plan view of the embodiment shown in FIG.

[0116] refer to Figure 5B , the main layer L may be disposed in the pad area PDA in addition to the display area DA and a portion of the first peripheral area PA1. Figure 5A , the main layer L overlapping the display area DA and the first peripheral area PA1 may be a 1-1 common layer 221a, a 2-1 common layer 223a, a first opposing electrode 230a, a first capping layer 240a, a 1-1 inorganic encapsulation layer 310a, and a 2-1 inorganic encapsulation layer 330a. Return to Reference Figure 5A, the main layer L overlapping the pad area PDA may be the 1-2 common layer 221b, the 2-2 common layer 223b, the second relative electrode 230b, the second capping layer 240b, the 1-2 inorganic encapsulation layer 310b, and the 2-2 inorganic encapsulation layer 330b.

[0117] like Figure 5B As shown in , the main layer L may be disposed between the bending area BA and the display driving unit 11. For example, the main layer L may not cover the display driving unit 11.

[0118] Fig. 6A , Figure 6B , Figure 6C , Fig.6D , Fig. 6E and Fig. 6F is a schematic cross-sectional view illustrating a method of manufacturing a display device according to an embodiment.

[0119] refer to Fig. 6A , the first common layer 221, the second common layer 223, the opposite electrode 230, the cap layer 240, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 may include an opening overlapping the bending area BA and a portion of the first peripheral area PA1. For example, the first common layer 221, the second common layer 223, the opposite electrode 230, the cap layer 240, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 may be formed on the entire upper surface of the display device.

[0120] The third organic insulating layer 3109, the dam layer 111, and the spacer layer 113 may be opened in the first peripheral area PA1. Such a connection opening CNT may be at least partially filled with the first common layer 221, the second common layer 223, the opposite electrode 230, the cap layer 240, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330.

[0121] The first touch electrode 410 may be formed on the second inorganic encapsulation layer 330. The second connection line CL2 may be interposed between the second organic insulating layer 2109 and the third organic insulating layer 3109.

[0122] refer to Figure 6B , the first common layer 221, the second common layer 223, the opposite electrode 230, the capping layer 240, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 may be removed in the bending area BA, a portion of the first peripheral area PA1, and a portion of the pad area PDA.

[0123] The first common layer 221 may be divided into a 1-1 common layer 221a and a 1-2 common layer 221b. The 1-1 common layer 221a may overlap the display area DA and the first peripheral area PA1, and an edge portion of the 1-1 common layer 221a may be disposed in the first peripheral area PA1. The 1-2 common layer 221b may overlap the pad area PDA, and an edge portion of the 1-2 common layer 221b may be disposed in the pad area PDA.

[0124] The second common layer 223 may be divided into a 2-1 common layer 223a and a 2-2 common layer 223b. The 2-1 common layer 223a may overlap the display area DA and the first peripheral area PA1, and an edge portion of the 2-1 common layer 223a may be disposed in the first peripheral area PA1. The 2-2 common layer 223b may overlap the pad area PDA, and an edge portion of the 2-2 common layer 223b may be disposed in the pad area PDA.

[0125] The opposing electrode 230 may be divided into a first opposing electrode 230a and a second opposing electrode 230b. The first opposing electrode 230a may overlap the display area DA and the first peripheral area PA1, and an edge portion of the first opposing electrode 230a may be disposed in the first peripheral area PA1. The second opposing electrode 230b may overlap the pad area PDA, and an edge portion of the second opposing electrode 230b may be disposed in the pad area PDA.

[0126] The cover layer 240 may be divided into a first cover layer 240a and a second cover layer 240b. The first cover layer 240a may overlap the display area DA and the first peripheral area PA1, and an edge portion of the first cover layer 240a may be disposed in the first peripheral area PA1. The second cover layer 240b may overlap the pad area PDA, and an edge portion of the second cover layer 240b may be disposed in the pad area PDA.

[0127] The first inorganic encapsulation layer 310 may be divided into a 1-1 inorganic encapsulation layer 310a and a 1-2 inorganic encapsulation layer 310b. The 1-1 inorganic encapsulation layer 310a may overlap the display area DA and the first peripheral area PA1, and an edge portion of the 1-1 inorganic encapsulation layer 310a may be disposed in the first peripheral area PA1. The 1-2 inorganic encapsulation layer 310b may overlap the pad area PDA, and an edge portion of the 1-2 inorganic encapsulation layer 310b may be disposed in the pad area PDA.

[0128] The second inorganic encapsulation layer 330 may be divided into a 2-1 inorganic encapsulation layer 330a and a 2-2 inorganic encapsulation layer 330b. The 2-1 inorganic encapsulation layer 330a may overlap the display area DA and the first peripheral area PA1, and an edge portion of the 2-1 inorganic encapsulation layer 330a may be disposed in the first peripheral area PA1. The 2-2 inorganic encapsulation layer 330b may overlap the pad area PDA, and an edge portion of the 2-2 inorganic encapsulation layer 330b may be disposed in the pad area PDA.

[0129] The 1-1 common layer 221a, the 2-1 common layer 223a, the first relative electrode 230a, the first cap layer 240a, the 1-1 inorganic encapsulation layer 310a, and the 2-1 inorganic encapsulation layer 330a may be disposed on the positive Y-axis side beyond the connection opening CNT. Respective edge portions (e.g., first edge portions) of the 1-1 common layer 221a, the 2-1 common layer 223a, the first relative electrode 230a, the first cap layer 240a, the 1-1 inorganic encapsulation layer 310a, and the 2-1 inorganic encapsulation layer 330a facing the connection opening CNT may be disposed on the same plane (or may be coplanar with each other).

[0130] The process of removing the respective portions of the first common layer 221 and the second common layer 223 may include a wet etching process. The process of removing the respective portions of the opposite electrode 230, the capping layer 240, the first inorganic encapsulating layer 310, and the second inorganic encapsulating layer 330 may include a dry etching process.

[0131] refer to Figure 6B and Figure 6C , the 1-2 common layer 221 b , the 2-2 common layer 223 b , the second opposite electrode 230 b , the second capping layer 240 b , the 1-2 inorganic encapsulating layer 310 b , and the 2-2 inorganic encapsulating layer 330 b may be removed.

[0132] Therefore, the first common layer 221, the second common layer 223, the opposite electrode 230, the cap layer 240, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 may overlap the display area DA and the first peripheral area PA1, and the first common layer 221, the second common layer 223, the opposite electrode 230, the cap layer 240, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 may be disposed in the first peripheral area PA1. For example, the first common layer 221, the second common layer 223, the opposite electrode 230, the cap layer 240, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 may be disposed on the positive Y-axis side beyond the connection opening CNT.

[0133] refer to Fig.6D, a touch insulating layer 420 may be formed. The touch insulating layer 420 may be formed on the entire upper surface of the display device, and may cover the first touch electrode 410, the second inorganic encapsulation layer 330, and the spacer layer 113. The connection opening CNT may be at least partially (e.g., completely) filled with the touch insulating layer 420.

[0134] refer to Fig. 6E , a portion of the touch insulation layer 420 may be removed from the pad area PDA, the bending area BA, and the first peripheral area PA1.

[0135] For example, the connection opening CNT may be opened again, and the first edge portion 420 - E1 of the touch insulation layer 420 may be disposed at the positive Y-axis direction side of the connection opening CNT.

[0136] The touch insulating layer 420 may cover the first common layer 221, the second common layer 223, the opposite electrode 230, the cover layer 240, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330. For example, the touch insulating layer 420 may cover the first edge portion 221-E1 of the first common layer 221, the first edge portion 223-E1 of the second common layer 223, the first edge portion 230-E1 of the opposite electrode 230, the first edge portion 240-E1 of the cover layer 240, the first edge portion 310-E1 of the first inorganic encapsulation layer 310, and the first edge portion 330-E1 of the second inorganic encapsulation layer 330. For example, the first edge portion 420-E1 of the touch insulating layer 420 may be disposed between the first edge portion 221-E1 of the first common layer 221, the first edge portion 223-E1 of the second common layer 223, the first edge portion 230-E1 of the opposing electrode 230, the first edge portion 240-E1 of the cover layer 240, the first edge portion 310-E1 of the first inorganic encapsulation layer 310, and the first edge portion 330-E1 of the second inorganic encapsulation layer 330 and the connection opening CNT. For example, the first edge portion 221-E1 of the first common layer 221, the first edge portion 223-E1 of the second common layer 223, the first edge portion 230-E1 of the opposing electrode 230, the first edge portion 240-E1 of the cover layer 240, the first edge portion 310-E1 of the first inorganic encapsulation layer 310, and the first edge portion 330-E1 of the second inorganic encapsulation layer 330 may be disposed on the same plane (or may be coplanar with each other).

[0137] refer to Fig. 6F, the first connection line CL1 may be disposed on the touch insulation layer 420. The first connection line CL1 may cover the first edge portion 420-E1 of the touch insulation layer 420, and a portion of the first connection line CL1 may be disposed in the connection opening CNT. The first connection line CL1 may contact (eg, directly contact) the second connection line CL2 in the connection opening CNT. Fig. 6F As shown in , the first connection line CL1 may be formed simultaneously with the second touch electrode 430 .

[0138] according to 6A to 6F The manufacturing process shown in the Figure 4A A display device according to the embodiment shown in .

[0139] Omit Figure 6C The operations shown in Fig. 6A , Figure 6B , Fig.6D , Fig. 6E and Fig. 6F The manufacturing process shown in the operation can be manufactured according to Figure 5A A display device according to the embodiment shown in .

[0140] Fig. 7A , Figure 7B , Figure 7C and Fig.7D is a schematic cross-sectional view illustrating a method of manufacturing a display device according to another embodiment.

[0141] refer to Fig. 7A , similar to Fig. 6A , the first common layer 221 , the second common layer 223 , the opposite electrode 230 , the capping layer 240 , the first inorganic encapsulating layer 310 , and the second inorganic encapsulating layer 330 may be formed on the entire upper surface of the display device.

[0142] refer to Figure 7B , the touch insulation layer 420 may be disposed on the second inorganic encapsulation layer 330. For example, the touch insulation layer 420 may cover the second inorganic encapsulation layer 330.

[0143] refer to Figure 7C , the touch insulating layer 420, the second inorganic encapsulation layer 330, the first inorganic encapsulation layer 310, the cap layer 240, the opposite electrode 230, the second common layer 223, and the first common layer 221 may be etched. For example, a portion of each layer disposed in the bending area BA and the pad area PDA may be removed (e.g., completely removed), and the connection opening CNT may be opened again.

[0144] The process of removing the corresponding portions of the first common layer 221 and the second common layer 223 may include a wet etching process. The process of removing the corresponding portions of the opposite electrode 230, the capping layer 240, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include a dry etching process. The process of removing a portion of the touch insulation layer 420 may include a dry etching process.

[0145] The first edge portion 221-E1 of the first common layer 221, the first edge portion 223-E1 of the second common layer 223, the first edge portion 230-E1 of the relative electrode 230, the first edge portion 240-E1 of the cover layer 240, the first edge portion 310-E1 of the first inorganic encapsulation layer 310, the first edge portion 330-E1 of the second inorganic encapsulation layer 330 and the first edge portion 420-E1 of the touch insulation layer 420 can be arranged on the same plane (or can be coplanar with each other).

[0146] refer to Fig.7D , the first connection line CL1 may be disposed on the touch insulating layer 420. The first connection line CL1 may cover the first edge portion 221-E1 of the first common layer 221, the first edge portion 223-E1 of the second common layer 223, the first edge portion 230-E1 of the relative electrode 230, the first edge portion 240-E1 of the cover layer 240, the first edge portion 310-E1 of the first inorganic encapsulation layer 310, the first edge portion 330-E1 of the second inorganic encapsulation layer 330, and the first edge portion 420-E1 of the touch insulating layer 420. A portion of the first connection line CL1 may be disposed in the connection opening CNT, and may contact (e.g., directly contact) the second connection line CL2 in the connection opening CNT. Fig.7D As shown in , the first connection line CL1 may be formed simultaneously with the second touch electrode 430 .

[0147] Figure 8 is a schematic cross-sectional view of a portion of a display device according to an embodiment. Figure 8 Can be used with Figure 1 It corresponds to a cross section of the embodiment of the display device 1 taken along line CC'.

[0148] refer to Figure 8, the organic light emitting diodes and their corresponding thin film transistors may be arranged in the display area DA. For example, the fourth organic light emitting diode OLED4, the fifth organic light emitting diode OLED5 and the sixth organic light emitting diode OLED6 and the corresponding fourth thin film transistors TFT4, the fifth thin film transistors TFT5 and the sixth thin film transistors TFT6 may be arranged in the display area DA. The fourth organic light emitting diode OLED4, the fifth organic light emitting diode OLED5 and the sixth organic light emitting diode OLED6 may emit light beams of different colors, respectively. According to an embodiment, the fourth organic light emitting diode OLED4 may emit red light, the fifth organic light emitting diode OLED5 may emit green light, and the sixth organic light emitting diode OLED6 may emit blue light.

[0149] The second peripheral area PA2 may be disposed on the negative X-axis direction side of the display area DA. Figure 1 , the second peripheral area PA2 may be arranged on the positive X-axis direction side and the positive Y-axis direction side of the display area DA. However, a case where the second peripheral area PA2 is arranged on the negative X-axis direction side of the display area DA will now be shown and described in detail. However, regardless of the orientation (or position) of the second peripheral area PA2 relative to the display area DA, the features described below are fully applicable to the second peripheral area PA2.

[0150] The first, second, and third organic insulating layers 1109, 2109, and 3109 and the dam layer 111 may each extend to the second peripheral area PA2. A spacer layer 113 may be additionally disposed on the dam layer 111 in the second peripheral area PA2.

[0151] In the second peripheral area PA2, a common voltage line ELVSS may be disposed on the interlayer insulating layer 107. The first organic insulating layer 1109 may include an opening overlapping a central portion of the common voltage line ELVSS.

[0152] A first common voltage supply line VSS1 may be disposed on the common voltage line ELVSS. The first common voltage supply line VSS1 may contact (e.g., directly contact) the common voltage line ELVSS in the opening of the first organic insulating layer 1109. The first common voltage supply line VSS1 and the first connection metal CM1 may be formed as the same layer or may be formed on the same layer. According to an embodiment, the first common voltage supply line VSS1 and the first connection metal CM1 may be formed by the same process.

[0153] The second common voltage supply line VSS2 may be disposed on the first common voltage supply line VSS1. The second common voltage supply line VSS2 may cover the first common voltage supply line VSS1 together with the second organic insulating layer 2109. The second common voltage supply line VSS2 and the second connection metal CM2 may be formed as the same layer or may be formed on the same layer. According to an embodiment, the second common voltage supply line VSS2 and the second connection metal CM2 may be formed by the same process.

[0154] The third common voltage supply line VSS3 may be disposed on the second common voltage supply line VSS2. The third common voltage supply line VSS3 and the sub-pixel electrode 210 may be formed as the same layer or may be formed on the same layer. According to an embodiment, the third common voltage supply line VSS3 and the sub-pixel electrode 210 may be formed by the same process.

[0155] The wall 120 may be arranged in the second peripheral area PA2. For example, the fourth wall 124, the fifth wall 125, the sixth wall 126 and the seventh wall 127 (e.g., the fourth partition wall, the fifth partition wall, the sixth partition wall and the seventh partition wall) may be arranged in sequence in the negative X-axis direction in the second peripheral area PA2. The fourth wall 124 may be arranged on the third common voltage supply line VSS3. The fourth wall 124 and the dam layer 111 may include the same layer. The fourth wall 124 and the spacer layer 113 may include the same layer. The fifth wall 125 may be arranged on the third common voltage supply line VSS3. The fifth wall 125 and the dam layer 111 may include the same layer. The fifth wall 125 and the spacer layer 113 may be formed as the same layer. The sixth wall 126 may be arranged on the third organic insulating layer 3109. The sixth wall 126 and the dam layer 111 may include the same layer. The sixth wall 126 and the spacer layer 113 may be formed as the same layer or may be formed on the same layer. A portion of the third common voltage supply line VSS3 may be interposed between the same layer as the third organic insulating layer 3109 and the same layer as the dam layer 111 of the sixth wall 126. The seventh wall 127 may be disposed on the interlayer insulating layer 107. The seventh wall 127, the first organic insulating layer 1109, the third organic insulating layer 3109, the dam layer 111, and the spacer layer 113 may include the same layer. The first common voltage supply line VSS1 and the second common voltage supply line VSS2 may be interposed between the same layer as the first organic insulating layer 1109 and the same layer as the third organic insulating layer 3109 of the seventh wall 127. The third common voltage supply line VSS3 may be interposed between the same layer as the third organic insulating layer 3109 and the same layer as the dam layer 111 of the seventh wall 127.

[0156] The fourth wall 124, the fifth wall 125, the sixth wall 126, and the seventh wall 127 can prevent the organic material from flowing toward the edge portion of the substrate 100 when the organic encapsulation layer 320 of the encapsulation layer 300 is formed, thereby preventing the formation of the edge tail (or edge end) of the organic encapsulation layer 320. Figure 8 The formation of the wall 120 including four walls is shown and described, but the embodiment is not limited thereto.

[0157] Each of the opposing electrode 230, the capping layer 240, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 may extend into the second peripheral area PA2. Therefore, the opposing electrode 230, the capping layer 240, and the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may cover the fourth wall 124, the fifth wall 125, the sixth wall 126, and the seventh wall 127.

[0158] The corresponding edge portions of the opposing electrode 230, the encapsulation layer 240, the first inorganic encapsulation layer 310, and the second inorganic encapsulation layer 330 disposed in the second peripheral area PA2 may be disposed on the outermost portion of the display panel 10. For example, the second edge portion 230-E2 of the opposing electrode 230, the second edge portion 240-E2 of the cover layer 240, the second edge portion 310-E2 of the first inorganic encapsulation layer 310, and the second edge portion 330-E2 of the second inorganic encapsulation layer 330 may be disposed on the negative X-axis direction side of the seventh wall 127.

[0159] According to some embodiments, the first inorganic encapsulation layer 310 may cover the second edge portion 240-E2 of the capping layer 240. According to some embodiments, the capping layer 240 may cover the second edge portion 230-E2 of the opposing electrode 230. According to some embodiments, the second edge portion 310-E2 of the first inorganic encapsulation layer 310 and the second edge portion 330-E2 of the second inorganic encapsulation layer 330 may be disposed on the same plane (or may be coplanar with each other). According to another embodiment, Figure 8 In comparison, the second edge portion 230-E2 of the relative electrode 230, the second edge portion 240-E2 of the cover layer 240, the second edge portion 310-E2 of the first inorganic encapsulation layer 310 and the second edge portion 330-E2 of the second inorganic encapsulation layer 330 can be arranged on the same plane (or can be coplanar with each other).

[0160] The second edge portion 221-E2 of the first common layer 221 and the second edge portion 223-E2 of the second common layer 223 may be disposed adjacent to the display area DA. For example, the second edge portion 221-E2 of the first common layer 221 and the second edge portion 223-E2 of the second common layer 223 may be interposed between the display area DA and the second edge portion 230-E2 of the opposite electrode 230. According to some embodiments, the second edge portion 221-E2 of the first common layer 221 and the second edge portion 223-E2 of the second common layer 223 may be disposed between the display area DA and the side wall SW.

[0161] The side wall SW may be disposed between the display area DA and the fourth wall 124. The side walls SW may be disposed on the dam layer 111 and may be spaced apart from each other. The dam layer 111 may include an opening disposed in a region between two side walls SW spaced apart from each other. The opposing electrode 230 and the cap layer 240 may be disposed in the opening of the dam layer 111. The opposing electrode 230 and the cap layer 240 may be disposed on each of the plurality of side walls SW.

[0162] The sidewall SW may include a metal. According to an embodiment, the sidewall SW may include aluminum (Al) and / or titanium (Ti). The opposing electrode 230 disposed between the sidewalls SW may contact (e.g., directly contact) the sidewall SW. Therefore, the sidewalls SW adjacent to each other may be connected (e.g., electrically connected) by the opposing electrode 230 disposed between the sidewalls SW. For example, there is a sidewall SW between the portions of the two opposing electrodes 230, and the portions of the two opposing electrodes 230 may be connected (e.g., electrically connected) to each other by the sidewall SW. The opposing electrode 230 may extend in the negative X-axis direction by a structure in which the opposing electrode 230 and the sidewall SW are repeatedly arranged, and thus may be connected to the third common voltage supply line VSS3. Therefore, the opposing electrode 230 may be connected (e.g., electrically connected) to the common voltage line ELVSS by the sidewall SW, the third common voltage supply line VSS3, the second common voltage supply line VSS2, and the first common voltage supply line VSS1, and may receive a voltage. The sidewall SW may prevent the opposing electrode 230 from being provided with a common voltage due to the disconnection of the opposing electrode 230 disposed in the second peripheral area PA2.

[0163] Fig. 9 yes Figure 8 An enlarged schematic cross-sectional view of zone IX.

[0164] refer to Fig. 9, the sidewall SW may include a first layer 115 in contact with (e.g., in direct contact with) the upper surface of the dam layer 111 and a second layer 117 disposed on the first layer 115. The area between two adjacent sidewalls SW may be defined as a first opening 115OP. The width of the second layer 117 may be greater than the width of the first layer 115. For example, in an embodiment, the second layer 117 may have a width greater than the width of the upper surface of the first layer 115. According to an embodiment, the second layer 117 may include a tip portion 117T protruding from a side surface of the first layer 115 facing the first opening 115OP toward the first opening 115OP. For example, the sidewall SW may have an undercut structure.

[0165] The dam layer 111 may include a second opening 111OP disposed between two adjacent side walls SW. A central portion of the data line DTL below the second opening 111OP may be exposed through the second opening 111OP. A portion of the relative electrode 230 may be disposed in the second opening 111OP, and a portion of the relative electrode 230 may cover a side surface of the dam layer 111 facing the second opening 111OP and an upper surface of the dam layer 111. Therefore, a portion of the relative electrode 230 may be disposed in the first opening 115OP. In the first opening 115OP, the relative electrode 230 may be in contact with (e.g., in direct contact with) each of the two adjacent side walls SW. For example, as Fig. 9 As shown in , the portion of the opposing electrode 230 disposed in the first opening 115OP may be disposed in an oblique direction relative to the upper surface of the dam layer 111, and may be in contact (e.g., direct contact) with the first layer 115 on the left side (e.g., the negative X-axis direction side) and in contact (e.g., direct contact) with the first layer 115 on the right side (e.g., the positive X-axis direction side). Therefore, the opposing electrode 230 may be connected (e.g., electrically connected) to the side wall SW on the left side (e.g., the negative X-axis direction side) and the side wall SW on the right side (e.g., the positive X-axis direction side).

[0166] The capping layer 240 may be disposed on the opposite electrode 230. Therefore, a portion of the capping layer 240 may be disposed in the second opening 111OP, and the capping layer 240 may cover the opposite electrode 230. A portion of the capping layer 240 may be disposed in the first opening 115OP.

[0167] A dummy opposing electrode 230D and a dummy capping layer 240D may be disposed on each of the plurality of sidewalls SW. For example, the dummy opposing electrode 230D may be disposed on the upper surface of the second layer 117 of the sidewall SW, and the dummy capping layer 240D may be disposed on the dummy opposing electrode 230D.

[0168] The dummy opposite electrode 230D and the opposite electrode 230 may include the same material. The dummy capping layer 240D and the capping layer 240 may include the same material.

[0169] The first inorganic encapsulation layer 310 may be provided to cover the above structure. The first inorganic encapsulation layer 310 may fill the first opening 115OP and the second opening 111OP. The first inorganic encapsulation layer 310 may cover the cap layer 240. The first inorganic encapsulation layer 310 may cover the side surface of the first layer 115 facing the first opening 115OP. The first inorganic encapsulation layer 310 may cover the tip portion 117T of the second layer 117, the dummy opposing electrode 230D, and the dummy cap layer 240D.

[0170] Fig. 10A , Fig. 10B , Fig. 10C and Fig. 10D It is a graphic manufacturing Fig. 9 Schematic cross-sectional view of a method of an embodiment of the present invention.

[0171] refer to Fig. 10A , the dam layer 111 may include a second opening 111OP, and a portion of the upper surface of the data line DTL may be exposed. The first layer 115 and the second layer 117 may be disposed on the dam layer 111 having the opening. According to some embodiments, the dam layer 111 may be disposed and etched as a whole to form the second opening 111OP. According to some embodiments, the first layer 115 and the second layer 117 may be sequentially disposed on the dam layer 111 and etched to have an opening. For example, the width of the opening (e.g., the first opening 115OP) formed in the first layer 115 may be the same as the width of the opening formed in the second layer 117. For example, the respective side surfaces of both the first layer 115 and the second layer 117 facing the first opening 115OP may be disposed on the same plane.

[0172] refer to Fig. 10B , a portion of the first layer 115 may be additionally removed to form an undercut structure. The first layer 115 and the second layer 117 may include materials having different etching selectivities. According to some embodiments, the first layer 115 may include aluminum (Al), and the second layer 117 may include titanium (Ti). According to some embodiments, only the first layer 115 may be additionally removed by etching using an etchant having an etching selectivity to the first layer 115. Therefore, the width of the second layer 117 may be greater than the width of the first layer 115. In another example, the second layer 117 may include a tip portion 117T protruding from a side surface of the first layer 115 facing the first opening 115OP toward the first opening 115OP.

[0173] refer to Fig. 10C , the relative electrode 230 may be arranged at Fig. 10B. The relative electrode 230 may be formed by depositing the material included in the relative electrode 230. For example, the deposition material deposited in the first opening 115OP and the second opening 111OP may form the relative electrode 230, and the deposition material deposited on the second layer 117 may form the dummy relative electrode 230D. Therefore, the dummy relative electrode 230D and the relative electrode 230 may include the same material. The relative electrode 230 may be arranged to contact (e.g., directly contact) the side surface of the first layer 115 facing the first opening 115OP.

[0174] refer to Fig. 10D , the cover layer 240 may be provided at Fig. 10C . The cap layer 240 may be formed by depositing the material included in the cap layer 240. For example, the deposition material deposited in the first opening 115OP and the second opening 111OP may form the cap layer 240, and the deposition material deposited on the second layer 117 may form the dummy cap layer 240D. Therefore, the dummy cap layer 240D and the cap layer 240 may include the same material. Thereafter, the first inorganic encapsulation layer 310 (see Fig. 9 ) to achieve Fig. 9 The embodiment shown in .

[0175] According to the above-described embodiment, an open mask is not required when forming a common layer, an opposing electrode, a cover layer, and an encapsulation layer of a display device, and thus display devices of various sizes can be freely arranged on the same mother substrate. Therefore, the percentage of the used area among the areas of the mother substrate can be increased, and the percentage of the area discarded and not used can be reduced.

[0176] At the end of the detailed description, those skilled in the art will recognize that many changes and modifications may be made to the embodiments without substantially departing from the principles and spirit and scope of the present disclosure. Therefore, the disclosed embodiments are used only in a general and descriptive sense and not for a limiting purpose.

Claims

1. A display device, characterized in that: include: a substrate including a display area, a bending area spaced apart from the display area in a first direction, and a first peripheral area disposed between the display area and the bending area; A plurality of emission layers, wherein the plurality of emission layers are arranged in the display area; an opposing electrode disposed on the plurality of emission layers and overlapping the display area and the first peripheral area; as well as an encapsulation layer, the encapsulation layer being disposed on the opposing electrode and overlapping the display area and the first peripheral area, Wherein, a first edge portion of the opposing electrode and a first edge portion of the encapsulation layer are coplanar with each other in the first peripheral region.

2. The display device according to claim 1, characterized in that Also includes: A common layer is disposed above or below the plurality of emission layers.

3. The display device according to claim 2, characterized in that: The common layer overlaps the display area and the first peripheral area, and A first edge portion of the common layer, the first edge portion of the opposing electrode, and the first edge portion of the encapsulation layer are coplanar with each other in the first peripheral region.

4. The display device according to claim 2, characterized in that: The substrate includes a second peripheral region partially surrounding the display region, The counter electrode and the encapsulation layer overlap the display area and the second peripheral area, A second edge portion of the opposing electrode and a second edge portion of the encapsulation layer are disposed in the second peripheral region, The common layer overlaps the display area, and The second edge portion of the common layer is disposed between the display area and the second edge portion of the opposing electrode.

5. The display device according to claim 1, characterized in that The substrate further includes a pad area, The bending area is arranged between the pad area and the display area, The counter electrode includes a first portion overlapping the first peripheral region and a second portion overlapping the pad region, and The encapsulation layer includes a first portion overlapping the first peripheral region and a second portion overlapping the pad region.

6. The display device according to claim 5, characterized in that: The first portion of the opposing electrode and the second portion of the opposing electrode are spaced apart from each other, and The first portion of the encapsulation layer and the second portion of the encapsulation layer are spaced apart from each other.

7. The display device according to claim 1, characterized in that: Also includes: a touch insulating layer, the touch insulating layer being disposed on the encapsulation layer and overlapping the display area and the first peripheral area; as well as a first connection line, the first connection line being disposed on the touch insulating layer and overlapping the first peripheral area, wherein the first edge portion of the touch insulation layer is disposed in the first peripheral region, and The first connecting line covers the first edge portion of the touch insulation layer.

8. The display device according to claim 7, characterized in that: Also includes: a second connecting line, the second connecting line being interposed between the substrate and the touch insulating layer and overlapping the first peripheral area and the bending area, Wherein, the second connecting line overlaps with the first edge portion of the touch insulating layer, and The first connection line and the second connection line are in direct contact with each other in the first peripheral region.

9. The display device according to claim 1, characterized in that: The substrate includes a second peripheral region partially surrounding the display region, and The display device further includes: a dam layer, the dam layer being located between the substrate and the counter electrode; and A sidewall is disposed on the dam layer in the second peripheral region.

10. The display device according to claim 9, characterized in that: The side wall comprises: a first layer, the first layer being in direct contact with the dam layer; and A second layer is disposed on the first layer and has a width greater than a width of an upper surface of the first layer.

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