Electronic paper display panel and display device
By setting a semiconductor layer of a specific length in the electronic paper display panel to reduce the transistor space, thereby increasing the pixel electrode area, solving the problem of the edge disorders of the electronic field when the electronic paper backboard is driven. And simplifying the process.
Patent Information
- Application Number
- CN202323541927.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-25
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2033-12-25
AI Technical Summary
When the electronic paper backplane is driven, the edge of the electric field is disordered, resulting in slow screen flushing speed and display of afterimage.
By setting the same length of the conductor layer as the data cable, the length of the second semiconductor layer is the same as the scanning line, reducing the space occupied by the transistor, so as to increase the occupation area of the pixel electrode without the resin layer, increase the opening rate and the opening rate Reduce the disorders of the electric field on the edge of the electric field.
Effectively improved the screen speed of the electronic paper display panel, reduced the residual shadow, simplified the process process and reduced the production cost.
Smart Images

Figure CN222420763U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of display technology, and in particular to an electronic paper display panel and a display device. Background Art
[0002] Electronic ink screen is an electronic paper display panel. Its commonly used thin film transistor (TFT) backplane driving technology adopts 1T2C or 2T1C (where T stands for thin film transistor and C stands for capacitor) driving mode. A storage capacitor is formed by the pixel electrode and the common electrode, and a parasitic capacitor is formed between the pixel electrode and the indium tin oxide (ITO) layer of the electronic paper.
[0003] The power for driving the particles in the capsules in the electronic ink layer mainly relies on the electric field between the pixel electrode and the electronic paper ITO layer. In order to prevent the voltage on the pixel electrode from affecting the TFT and thus ensure that the TFT has good switching characteristics, the pixel electrode generally does not cover the TFT. However, the edge of such an electric field is disordered, resulting in slow movement of the particles in the capsules during or after the electronic ink screen is refreshed, resulting in inadequate driving of the particles in the capsules, which in turn causes the electronic ink screen to refresh too slowly, resulting in problems such as afterimages on the display.
[0004] In order to solve the problem of electric field edge disorder when the electronic paper backplane is driven, the existing technology adopts a design scheme of adding a resin layer and full coverage of pixel electrodes to improve the problem of electric field edge disorder when the TFT backplane is driven, but it will inevitably lead to increased process complexity and cost. Utility Model Content
[0005] The utility model provides an electronic paper display panel and a display device, which can increase the aperture ratio to solve the problem of electric field edge disorder when the electronic paper back panel is driven without a resin layer, and has a simple process flow and low mold opening cost.
[0006] In a first aspect, the utility model provides an electronic paper display panel, comprising: a plurality of data lines and a plurality of scan lines; a plurality of pixel units, the pixel units being arranged in an area formed by the intersection of the scan lines and the data lines; the pixel units comprising a driving circuit and a pixel electrode, the driving circuit comprising a first transistor and a second transistor connected in series between the pixel electrode and the data line; the first transistor comprising a first semiconductor layer, the extension direction of the length of the first semiconductor layer being the same as the extension direction of the data line; the second transistor comprising a second semiconductor layer, the extension direction of the length of the second semiconductor layer being the same as the extension direction of the scan line.
[0007] Optionally, the first transistor includes a first source and a first drain, and the second transistor includes a second source and a second drain; the first drain shares a portion of the data line, the first source is connected to the second drain, and the second source is connected to the pixel electrode.
[0008] Optionally, the first transistor further includes a first gate, and the second transistor further includes a second gate, the first gate is connected to the scan line, and the second gate shares a portion of the scan line.
[0009] Optionally, the electronic paper display panel also includes a substrate, a first metal layer and a second metal layer; the first metal layer is arranged on one side of the substrate; the second metal layer is arranged on a side of the first metal layer away from the substrate; the first gate and the second gate are both located in the first metal layer; the first source, the first drain, the second source and the second drain are all located in the second metal layer.
[0010] Optionally, the first semiconductor layer and the second semiconductor layer are both located on a layer of the second metal layer close to the substrate; the first source electrode and the first drain electrode are both in contact with the first semiconductor layer, and the second source electrode and the second drain electrode are both in contact with the second semiconductor layer.
[0011] Optionally, the electronic paper display panel further includes an insulating layer, which is disposed on a side of the second metal layer away from the substrate, and the insulating layer fills gaps between the first source electrode, the first drain electrode, the second source electrode, and the second drain electrode.
[0012] Optionally, the pixel electrode is arranged on a side of the insulating layer away from the substrate, and the pixel electrode is in contact with the insulating layer.
[0013] Optionally, the electronic paper display panel further includes an electronic ink layer and an electronic paper ITO layer; the electronic ink layer is arranged on a side of the pixel electrode away from the substrate, and the electronic paper ITO layer is arranged on a side of the electronic ink layer away from the substrate.
[0014] Optionally, the electronic paper display panel also includes a common electrode, which is arranged in the same layer as the first gate and the second gate, or the common electrode is arranged in the same layer as the first source, the first drain, the second source and the second drain; the common electrode provides a reference voltage and forms a storage capacitor with the pixel electrode.
[0015] In a second aspect, the utility model provides a display device, comprising the electronic paper display panel of any one of the first aspects.
[0016] The electronic paper display panel provided by the embodiment of the utility model can greatly reduce the space occupied by the first transistor and the second transistor by setting the extension direction of the length of the first semiconductor layer to be the same as the extension direction of the data; setting the extension direction of the length of the second semiconductor layer to be the same as the extension direction of the scan line, so that the occupied area of the pixel electrode can be relatively increased without the resin layer, thereby improving the aperture ratio of the electronic paper display panel. At the same time, since the occupied area of the pixel electrode is relatively increased, the electric field disorder at the edge of the electric field can be effectively reduced, thereby improving the afterimage, so as to improve the display effect of the electronic paper display panel, and since there is no resin layer, a certain process flow is reduced compared with the existing solution, and the production cost is reduced.
[0017] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present utility model, nor are they intended to limit the scope of the present utility model. Other features of the present utility model will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0019] Figure 1 This is a schematic diagram of the structure of an electronic paper display panel provided by an embodiment of the utility model;
[0020] Figure 2 This is a schematic diagram of the structure of a pixel unit of an electronic paper display panel provided by an embodiment of the utility model;
[0021] Figure 3 yes Figure 2 The schematic diagram of the cross-sectional structure of the electronic paper display panel shown is along the section line AA';
[0022] Figure 4 yes Figure 2 The cross-sectional structure diagram of the electronic paper display panel along the section line BB' is shown. DETAILED DESCRIPTION
[0023] In order to enable those skilled in the art to better understand the solution of the utility model, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is only a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the utility model.
[0024] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.
[0025] Figure 1 is a structural schematic diagram of an electronic paper display panel provided by an embodiment of the utility model, Figure 2 This is a schematic diagram of the structure of a pixel unit of an electronic paper display panel provided by an embodiment of the utility model, combined with Figure 1 and Figure 2 , the electronic paper display panel 100 comprises:
[0026] A plurality of data lines 10 and a plurality of scan lines 20; a plurality of pixel units 30, wherein the pixel unit 30 is arranged in an area formed by the intersection of the scan line 20 and the data line 10; the pixel unit 30 includes a driving circuit and a pixel electrode 302, and the driving circuit includes a first transistor 310 and a second transistor 320 connected in series between the pixel electrode 302 and the data line 10.
[0027] The first transistor 310 includes a first semiconductor layer SM1 , and the extension direction of the first semiconductor layer SM1 is the same as the extension direction of the data line 10 ; the second transistor 320 includes a second semiconductor layer SM2 , and the extension direction of the second semiconductor layer SM2 is the same as the extension direction of the scan line 20 .
[0028] Continue to refer Figure 2 Optionally, the first semiconductor layer SM1 and the second semiconductor layer SM2 belong to the same semiconductor pattern layer. In other words, the first semiconductor layer SM1 and the second semiconductor layer SM2 are formed by a single patterning process (eg, including photolithography and etching processes).
[0029] The data line 10 extends along a first direction E1, and the scan line 20 extends along a second direction E2, wherein the first direction E1 intersects with the second direction E2. In some embodiments, the first direction E1 is perpendicular to the second direction E2.
[0030] The length of the first semiconductor layer SM1 extends in the same direction as the data line 10; the length of the second semiconductor layer SM2 extends in the same direction as the scan line 20. The first semiconductor layer SM1 and the second semiconductor layer SM2 are configured in this way, which can greatly reduce the space occupied by the first transistor 310 and the second transistor 320. Therefore, in the absence of a resin layer, the occupied area of the pixel electrode 302 can be relatively increased, thereby improving the aperture ratio of the electronic paper display panel. At the same time, since the occupied area of the pixel electrode 302 is relatively increased, the electric field disorder at the edge of the electric field can be effectively reduced, thereby improving the afterimage and improving the display effect of the electronic paper display panel.
[0031] The material of the pixel electrode 302 may include a transparent conductive material, such as (but not limited to): indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium gallium zinc oxide, or a stacked layer of at least two of the above.
[0032] The scan signal transmitted on the scan line 20 can control the first transistor 310 and the second transistor 320 to be turned on or off.
[0033] In one embodiment, the scan line 20 is connected to a scan driver, which is disposed in the left and right border areas of the display panel. The scan driver is usually composed of multiple cascaded shift registers, which are connected to clock signal lines, high-potential signal lines, low-potential signal lines, etc. disposed in the border areas. The cascaded shift registers generate scan signals according to the control of the signals on the clock signal lines, high-potential signal lines, and low-potential signal lines, and output them to the scan line 20. The cascaded shift registers sequentially provide scan signals with conduction level pulses to the scan line 20.
[0034] In one embodiment, the data line 10 is connected to a data driver, which is disposed in the lower frame area or on a flexible circuit board bound to the lower frame area, and the data driver may be a display driver IC (DDIC), which provides a data voltage to the data line 10. In another embodiment, both the data line 10 and the scan line 20 are connected to the data driver, which provides a scan signal to the data line 10 and a data voltage to the scan line 20. Figure 1 The schematic diagram shows a situation where the scan driver is arranged in the left frame area of the electronic paper display panel 100 and the data driver is arranged in the lower frame area of the electronic paper display panel 100 .
[0035] Among them, the scan line 20 is a driving circuit that transmits a scan signal, and the data line 10 is a driving circuit that transmits a data signal. One driving circuit corresponds to one pixel point, and the driving circuit applies a driving voltage to the pixel point according to the data signal and the scan signal to achieve the effect of displaying an image.
[0036] The first transistor 310 and the second transistor 320 may be bottom gate thin film transistors. When the first transistor 310 and the second transistor 320 are turned on, the data voltage on the data line 10 is transmitted to the pixel electrode 302 via the turned-on first transistor 310 and the second transistor 320 .
[0037] Continue to refer Figure 1 A scan line 20 is correspondingly set for each row of pixel units 30, and the first transistor 310 and the second transistor 320 in the pixel unit 30 are connected to the corresponding scan line 20. A data line 10 is correspondingly set for each column of pixel units 30, and the first transistor 310 in the pixel unit 30 is connected to the corresponding data line 10.
[0038] Continue to refer Figure 1 , the working process of the electronic paper display panel 100 is: the scanning signal on the scanning line 20 of the first row controls the first transistor 310 and the second transistor 320 connected to the first row to turn on, the data voltage on the data line 10 is transmitted to the pixel electrode of the first row, and the first transistor 310 and the second transistor 320 of other rows are turned off; the scanning signal on the scanning line 20 of the second row controls the first transistor 310 and the second transistor 320 connected to the second row to turn on, the data voltage on the data line 10 is transmitted to the pixel electrode of the second row, and the first transistor 310 and the second transistor 320 of other rows are turned off; ...; the scanning signal on the scanning line 20 of the kth row controls the first transistor 310 and the second transistor 320 connected to the kth row to turn on, and the data voltage on the data line 10 is transmitted to the pixel electrode of the kth row, where k is a positive integer greater than or equal to 2.
[0039] The electronic paper display panel provided by the embodiment of the utility model can greatly reduce the space occupied by the first transistor and the second transistor by setting the extension direction of the length of the first semiconductor layer to be the same as the extension direction of the data; setting the extension direction of the length of the second semiconductor layer to be the same as the extension direction of the scan line, so that the occupied area of the pixel electrode can be relatively increased without the resin layer, thereby improving the aperture ratio of the electronic paper display panel. At the same time, since the occupied area of the pixel electrode is relatively increased, the electric field disorder at the edge of the electric field can be effectively reduced, thereby improving the afterimage, so as to improve the display effect of the electronic paper display panel, and since there is no resin layer, a certain process flow is reduced compared with the existing solution, and the production cost is reduced.
[0040] Continue to refer Figure 2Optionally, the first transistor 310 includes a first source S1 and a first drain D1, and the second transistor 320 includes a second source S2 and a second drain D2; the first drain D1 shares a portion of the data line 10, the first source S1 is connected to the second drain D2, and the second source S2 is connected to the pixel electrode 302. That is, a portion of the first source D1 overlaps with the data line 10, so the area occupied by the non-opening area of the pixel unit 30 (i.e., the area where the wiring part and the transistor part of each pixel unit 30 are set) is reduced, and the area occupied by the opening area of the pixel unit 30 (the area where the actual light passes) is increased (i.e., the area occupied by the pixel electrode 302 is increased), so the aperture ratio of the pixel unit 30 is increased, and at the same time, due to the increase in the area occupied by the pixel electrode 302, the electric field disorder at the edge of the electric field can be effectively reduced, thereby improving the afterimage, so as to improve the display effect of the electronic paper display panel 100.
[0041] Optionally, the first transistor 310 further includes a first gate G1, and the second transistor 320 further includes a second gate G1, the first gate G1 is connected to the scan line 20, and the second gate G2 shares a portion of the scan line 20. That is, a portion of the second gate G2 overlaps with the scan line 20, and therefore, the area occupied by the non-opening region of the pixel unit 30 (i.e., the region where the wiring portion and the transistor portion of each pixel unit 30 are arranged) is further reduced, and the area occupied by the opening region of the pixel unit 30 (the region where the actual light passes) is increased (i.e., the occupied area of the pixel electrode 302 is increased), and therefore, the aperture ratio of the pixel unit 30 is increased, and at the same time, due to the increase in the occupied area of the pixel electrode 302, the electric field disorder at the edge of the electric field can be effectively reduced, thereby improving the afterimage, so as to improve the display effect of the electronic paper display panel.
[0042] Figure 3 yes Figure 2 The schematic diagram of the cross-sectional structure of the electronic paper display panel shown is along the section line AA'; Figure 4 yes Figure 2 The cross-sectional structure diagram of the electronic paper display panel shown in FIG. 1 is along the section line BB'; Figure 2 , Figure 3 and Figure 4 The electronic paper display panel 100 further includes a substrate 200 , a first metal layer 201 and a second metal layer 202 .
[0043] The first metal layer 201 is arranged on one side of the substrate 200; the second metal layer 202 is arranged on the side of the first metal layer 201 away from the substrate 200; the first gate G1 and the second gate G2 are both located in the first metal layer 201; the first source S1, the first drain D1, the second source S2 and the second drain D2 are all located in the second metal layer 202.
[0044] Specifically, the substrate 200 can provide buffering, protection or support for the display device. The substrate 200 can be a flexible substrate, and the material of the flexible substrate can be polyimide (PI), polyethylene naphthalate (PEN) or polyethylene terephthalate (PET), etc., or a mixture of the above materials. The substrate 200 can also be a hard substrate formed of materials such as glass.
[0045] In some embodiments, the data line 10, the first source S1, the first drain D1, the second source S2 and the second drain D2 belong to the same conductive pattern layer M2. In other words, the data line 10, the first source S1, the first drain D1, the second source S2 and the second drain D2 are formed by a single patterning process (e.g., including photolithography and etching processes).
[0046] In some embodiments, the data line 10, the first source S1, the first drain D1, the second source S2, and the second drain D2 are single-layer or multi-layer structures. Exemplarily, the data line 10, the first source S1, the first drain D1, the second source S2, and the second drain D2 include metals such as chromium, gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, aluminum, and zinc, the above alloys, the above metal oxides, the above metal nitrides, or the above stacked layers or other conductive materials.
[0047] Optionally, the first semiconductor layer SM1 and the second semiconductor layer SM2 are both located on a layer of the second metal layer 202 close to the substrate 200; the first source S1 and the first drain D1 are both in contact with the first semiconductor layer SM1, and the second source S2 and the second drain D2 are both in contact with the second semiconductor layer SM2. In other words, the first gate G1 is located on a side of the first semiconductor layer SM1 close to the substrate 200, and the orthographic projection of the first semiconductor layer SM1 on the substrate 200 at least partially overlaps with the orthographic projection of the first gate G1 on the substrate 200; the second gate G2 is located on a side of the second semiconductor layer SM2 close to the substrate 200, and the orthographic projection of the second semiconductor layer SM2 on the substrate 200 at least partially overlaps with the orthographic projection of the second gate G2 on the substrate 200. By setting the first source S1 and the first drain D1 to contact the first semiconductor layer SM1, the interlayer insulating layer between the source and drain layer of the first transistor 310 and the first semiconductor layer SM1 can be reduced; by setting the second source S2 and the second drain D2 to contact the second semiconductor layer SM2, the interlayer insulating layer between the source and drain layer of the second transistor 320 and the second semiconductor layer SM2 can be reduced, thereby reducing the thickness of the electronic paper display panel, which is conducive to realizing a lightweight display device.
[0048] Optionally, the first semiconductor layer SM1 and the second semiconductor layer SM2 may be oxide semiconductor layers, which are made of metal oxide semiconductor materials, such as indium gallium zinc oxide (or IGZO), indium gallium oxide (or IGO) or indium zinc oxide (or IZO). Oxide semiconductor materials have the advantage of driving display devices at relatively low frequencies. Due to these characteristics, the pixel voltage of a pixel is maintained for a long time, and is therefore suitable for display devices that require low-frequency driving and / or low power consumption.
[0049] Optionally, the electronic paper display panel 100 further includes a gate insulating layer 203 , and the gate insulating layer covers the first gate G1 and the second gate G2 .
[0050] Optionally, the electronic paper display panel 100 further includes an insulating layer 204 , which is disposed on a side of the second metal layer 202 away from the substrate 200 , and fills gaps between the first source S1 , the first drain D1 , the second source S2 , and the second drain D2 .
[0051] Optionally, the pixel electrode 302 is disposed on a side of the insulating layer 204 away from the substrate 200, and the pixel electrode 302 is in contact with the insulating layer 204. That is, there is no resin layer between the pixel electrode 302 and the insulating layer 204.
[0052] The electronic paper display panel 100 further includes an electronic ink layer 205 and an electronic paper ITO layer 206 ; the electronic ink layer 205 is disposed on a side of the pixel electrode 302 away from the substrate 200 , and the electronic paper ITO layer 206 is disposed on a side of the electronic ink layer 205 away from the substrate 200 .
[0053] The electronic ink layer 205 includes an electrophoretic liquid 40 and a capsule 41 , wherein the capsule 41 includes a plurality of black charged particles and a plurality of white charged particles, wherein the black charged particles and the white charged particles have different polarities, for example, the black charged particles are negatively polarized and the white charged particles are positively polarized.
[0054] In one embodiment, a water-blocking protective layer 207 may be further disposed above the electronic paper ITO layer 206 to provide water-blocking protection for the interior of the electronic paper display panel 100 .
[0055] The electronic paper display panel 100 also includes a common electrode, which is arranged in the same layer as the first gate G1 and the second gate G2, or the common electrode is arranged in the same layer as the first source S1, the first drain D1, the second source S2 and the second drain D2; the common electrode provides a reference voltage and forms a storage capacitor with the pixel electrode 302.
[0056] The material of the common electrode may include a transparent conductive material, such as (but not limited to): indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium gallium zinc oxide or a stacked layer of at least two of the above. The storage capacitor is used to store the data voltage transmitted by the data line 10 to drive the electronic paper display panel.
[0057] A parasitic capacitor is formed between the pixel electrode 302 and the electronic paper ITO layer 206, which constitutes a dynamic electric field that drives the particles in the capsule 41 in the electronic ink 205. The pixel electrode 302 and the common electrode form a storage capacitor, which can maintain the image and avoid screen flickering. In addition, the embodiment of the utility model can reduce the electric field disorder at the edge of the electric field by increasing the occupied area of the pixel electrode 207, so as to accelerate the movement speed of the particles in the capsule 41 in the electronic ink layer 205 and improve the movement speed of the particles in the capsule 41. In this way, the screen refresh speed of the electronic paper display panel can be improved, and the problem of afterimage during the screen refresh process can be solved.
[0058] Based on the same utility model concept, the utility model embodiment also provides a display device, which includes any electronic paper display panel provided in the above embodiments. The display device also has the beneficial effects of the electronic paper display panel in the above embodiments, and the similarities can be understood by referring to the above explanation of the electronic paper display panel, which will not be repeated below.
[0059] The above specific implementations do not constitute a limitation on the protection scope of the present utility model. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present utility model shall be included in the protection scope of the present utility model.
Claims
1. An electronic paper display panel, characterized in that: include: Multiple data lines and multiple scan lines; A plurality of pixel units, wherein the pixel units are arranged in an area formed by the intersection of the scan lines and the data lines; The pixel unit comprises a driving circuit and a pixel electrode, wherein the driving circuit comprises a first transistor and a second transistor connected in series between the pixel electrode and the data line; The first transistor comprises a first semiconductor layer, and the extending direction of the first semiconductor layer is the same as the extending direction of the data line; The second transistor includes a second semiconductor layer, and an extending direction of the second semiconductor layer is the same as an extending direction of the scan line.
2. The electronic paper display panel according to claim 1, characterized in that: The first transistor includes a first source and a first drain, and the second transistor includes a second source and a second drain; The first drain electrode shares a portion of the data line, the first source electrode is connected to the second drain electrode, and the second source electrode is connected to the pixel electrode.
3. The electronic paper display panel according to claim 2, characterized in that: The first transistor further includes a first gate, and the second transistor further includes a second gate. The first gate is connected to the scan line, and the second gate shares a portion of the scan line.
4. The electronic paper display panel according to claim 3, characterized in that: Also included is a substrate, a first metal layer, and a second metal layer; The first metal layer is disposed on one side of the substrate; The second metal layer is disposed on a side of the first metal layer away from the substrate; The first gate and the second gate are both located in the first metal layer; The first source electrode, the first drain electrode, the second source electrode and the second drain electrode are all located in the second metal layer.
5. The electronic paper display panel according to claim 4, characterized in that: The first semiconductor layer and the second semiconductor layer are both located on a layer of the second metal layer close to the substrate; The first source electrode and the first drain electrode are both in contact with the first semiconductor layer, and the second source electrode and the second drain electrode are both in contact with the second semiconductor layer.
6. The electronic paper display panel according to claim 4, characterized in that: It also includes an insulating layer, which is arranged on a side of the second metal layer away from the substrate, and the insulating layer fills the gaps between the first source, the first drain, the second source and the second drain.
7. The electronic paper display panel according to claim 6, characterized in that: The pixel electrode is arranged on a side of the insulating layer away from the substrate, and the pixel electrode contacts the insulating layer.
8. The electronic paper display panel according to claim 7, characterized in that: It also includes an electronic ink layer and an electronic paper ITO layer; The electronic ink layer is arranged on a side of the pixel electrode away from the substrate, and the electronic paper ITO layer is arranged on a side of the electronic ink layer away from the substrate.
9. The electronic paper display panel according to claim 3, characterized in that: It also includes a common electrode, which is disposed in the same layer as the first gate electrode and the second gate electrode, or the common electrode is disposed in the same layer as the first source electrode, the first drain electrode, the second source electrode and the second drain electrode; The common electrode provides a reference voltage and forms a storage capacitor with the pixel electrode.
10. A display device, characterized in that: The electronic paper display panel comprises any one of claims 1 to 9.