A processor for point cloud data simplification

Abstract

The embodiment of the utility model discloses a processor for point cloud data simplification, which may include: a simplification module, the simplification module includes a main controller, a control bus, at least two graphics processors, at least two transmission buses and at least two simplification elements running in parallel; wherein the main controller is connected to the control bus, the control bus is connected to the at least two graphics processors respectively, the number of processors of the at least two graphics processors, the number of buses of the at least two transmission buses and the number of units of the at least two simplification elements are all equal, the at least two graphics processors are connected to the at least two transmission buses in a one-to-one correspondence, and the at least two transmission buses are connected to the at least two simplification elements in a one-to-one correspondence; the simplification elements include field programmable gate arrays, the field programmable gate arrays located in different simplification elements simplify the same point cloud data based on different simplification strategies. The technical solution of the embodiment of the utility model can improve the processing speed of point cloud data simplification.

Description

Technical Field

[0001] The utility model relates to the field of point cloud processing, and in particular to a processor for simplifying point cloud data. Background Art

[0002] With the widespread application of laser scanning and structured light equipment, it has become easy to obtain large-scale point cloud data. However, the directly obtained three-dimensional point cloud data has problems such as huge data size, which brings great challenges to subsequent transmission, processing and analysis. Therefore, it is imperative to simplify point cloud data.

[0003] However, the processing speed achieved by the current point cloud data simplification solution cannot meet actual production needs, and this problem needs to be solved urgently. Utility Model Content

[0004] The embodiment of the utility model provides a processor for point cloud data simplification to improve the processing speed of point cloud data simplification.

[0005] According to one aspect of the utility model, a processor for point cloud data simplification is provided, comprising at least: a simplification module; wherein the simplification module comprises a main controller, a control bus, at least two graphics processors, at least two transmission buses, and at least two simplification simple cells running in parallel;

[0006] The main controller is connected to the control bus, the control bus can be connected to at least two graphics processors respectively, the number of processors of the at least two graphics processors is equal to the number of buses of the at least two transmission buses, the number of buses is equal to the number of units of the at least two refined simple elements, the at least two graphics processors are connected to the at least two transmission buses in a one-to-one correspondence, and the at least two transmission buses are connected to the at least two refined simple elements in a one-to-one correspondence;

[0007] The compaction unit includes a field programmable gate array, and the field programmable gate arrays located in different compaction units compact the same point cloud data based on different compaction strategies.

[0008] Optionally, the simplified cell includes at least two simplified branches running in parallel, and the simplified branches include a field programmable gate array; wherein,

[0009] Field programmable gate arrays on different streamlined branches within the same streamlined cell streamline the same point cloud data based on different streamlined strategies.

[0010] On this basis, optionally, the simplified branch includes at least two field programmable gate arrays, and the at least two field programmable gate arrays are connected in sequence.

[0011] Optionally, the at least two refined simple units include at least two of a feature extraction unit, a filtering unit, a downsampling unit, and a geometric calculation unit.

[0012] Optionally, the processor further includes: a storage control module; wherein,

[0013] The storage control module is connected to the main controller. The storage control module is used to cache point cloud data and control the reading and writing of point cloud data. The main controller reads the point cloud data from the storage control module.

[0014] On this basis, optionally, the processor further includes: a preprocessing module; wherein,

[0015] The preprocessing module, the storage control module and the main controller are connected in sequence.

[0016] On this basis, optionally, the processor further includes: a peripheral interface module; wherein,

[0017] At least two communication interfaces are integrated in the peripheral interface module. The peripheral interface module, the preprocessing module, the storage control module and the main controller are connected in sequence.

[0018] Optionally, the processor further includes: a result output module; wherein:

[0019] The result output module is connected to the main controller, and the result output module is used to output the simplified point cloud data.

[0020] Optionally, the processor further includes: a power management module and / or a heat dissipation module; wherein,

[0021] The power management module operates at least according to the power demand of the field programmable gate array; and / or,

[0022] The heat dissipation module operates according to the thermal management requirements of the field programmable gate array.

[0023] Optionally, the transmission bus meets the Peripheral Component Interconnect Extended Standard.

[0024] The processor described in the embodiment of the utility model includes at least a streamlined module; wherein the streamlined module includes a main controller, a control bus, at least two GPUs, at least two transmission buses, and at least two streamlined cells running in parallel; wherein the main controller is connected to the control bus, the control bus is connected to at least two GPUs respectively, the number of processors of at least two GPUs, the number of buses of at least two transmission buses and the number of units of at least two streamlined cells are equal, at least two GPUs are connected to at least two transmission buses in a one-to-one correspondence, and at least two transmission buses are connected to at least two streamlined cells in a one-to-one correspondence; the streamlined cells include FPGAs, and the FPGAs located in different streamlined cells streamline the same point cloud data based on different streamlining strategies. The above technical solution, by adopting the FPGA parallel processing architecture (i.e. at least two streamlined branches running in parallel and the parallel computing characteristics supported by the FPGA itself), performs parallel streamlining on the same point cloud data, thereby effectively improving the processing speed of the streamlined point cloud data.

[0025] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present utility model, nor are they intended to limit the scope of the present utility model. Other features of the present utility model will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0027] Figure 1 It is a structural block diagram of a processor for point cloud data simplification provided according to an embodiment of the utility model;

[0028] Figure 2 It is a structural block diagram of another processor for point cloud data simplification provided according to an embodiment of the utility model;

[0029] Figure 3 It is a technical principle schematic diagram of another processor for point cloud data simplification provided according to an embodiment of the utility model;

[0030] Figure 4 It is a schematic diagram of the workflow of another processor for point cloud data simplification provided according to an embodiment of the utility model. DETAILED DESCRIPTION

[0031] In order to enable those skilled in the art to better understand the solution of the utility model, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is only a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the utility model.

[0032] It should be noted that the terms "first", "second", etc. in the specification and claims of the utility model and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the utility model described here can be implemented in an order other than those illustrated or described here. The situations of "target", "original", etc. are similar and will not be repeated here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0033] Before introducing the embodiments of the present invention, the specific implementation process of the point cloud data simplification scheme described in the background technology and the reasons why it has the problem of low processing speed are first exemplified to better understand how the embodiments of the present invention improve the processing speed of point cloud data simplification.

[0034] For example, in order to ensure the effect of point cloud data simplification, the central processing unit (CPU) platform is currently mainly used to implement point cloud data simplification using a variety of simplification strategies. However, the CPU itself has the characteristics of serial operation, which requires that on the CPU platform, one simplification strategy is first used to simplify the point cloud data, and after the simplification is completed, another simplification strategy is used to simplify the point cloud data. Obviously, this will result in a slower processing speed for point cloud data simplification. Therefore, there is an urgent need for an accelerated processing solution for point cloud data simplification to achieve efficient simplification of large-scale point cloud data.

[0035] In view of this, a processor for point cloud data reduction described in the following embodiments is proposed, which can be a point cloud data reduction accelerator based on a field programmable gate array (FPGA). Next, this will be described in detail.

[0036] Figure 1 This is a block diagram of a processor for point cloud data simplification provided in an embodiment of the utility model. This embodiment is applicable to point cloud data simplification, especially to point cloud data simplification in scenes such as construction engineering, surveying and mapping, industrial design, robotics, virtual reality, augmented reality and smart city.

[0037] See also Figure 1 The processor described in the embodiment of the utility model at least comprises: a streamlined module 1; wherein the streamlined module 1 comprises a main controller 11, a control bus 12, at least two graphics processors 13, at least two transmission buses 14 and at least two streamlined simple cells 15 running in parallel;

[0038] The main controller 11 is connected to the control bus 12, the control bus 12 is connected to at least two graphics processors 13 respectively, the number of processors of the at least two graphics processors 13 is equal to the number of buses of the at least two transmission buses 14, the number of buses is equal to the number of units of the at least two refined simple cells 15, the at least two graphics processors 13 are connected to the at least two transmission buses 14 in a one-to-one correspondence, and the at least two transmission buses 14 are connected to the at least two refined simple cells 15 in a one-to-one correspondence;

[0039] The compaction unit 15 includes a field programmable gate array 1511. The field programmable gate arrays 1511 located in different compaction units 15 compact the same point cloud data based on different compaction strategies.

[0040] The main controller 11 can be implemented based on a CPU. The main controller 11 is connected to a control bus 12, so that the control command and point cloud data transmitted by the main controller 11 can be sent to the simplified branch through the control bus 12, and the simplified result returned by the simplified branch can be uploaded to the main controller 11.

[0041] A graphics processing unit (GPU) 13, a transmission bus 14 and a simplified cell 15 are connected in sequence, and the three can form a simplified branch connected to the control bus 12. On this basis, combined with the application scenarios that may be involved in the embodiments of the utility model, the number of branches of the simplified branch can be two or more. Figure 1 Four streamlining branches, namely four GPUs 13, four transmission buses 14 and four streamlining elements 15 are used as an example for demonstration, but this can be set according to actual conditions and is not specifically limited here. Each streamlining branch runs in parallel, thereby improving the processing speed of point cloud data simplification.

[0042] In practical applications, the transmission bus 14 may optionally meet the peripheral component interconnect express (PCI-E) standard, that is, the transmission bus 14 may be a PCI-E bus. Of course, in addition to this, it may also be other types of buses, which are not specifically limited here.

[0043] The simplified element 15 includes an FPGA 1511. The FPGA 1511 located in different simplified elements 15 simplifies the same point cloud data based on different simplification strategies, thereby realizing the parallel application of at least two simplification strategies, which can significantly improve the processing speed of point cloud data simplification compared to the serial application on the CPU platform. Moreover, the FPGA 1511 has parallel computing characteristics, and this parallel architecture can further improve the processing speed. It can be understood that the FPGA 1511 is a chip that supports parallel computing.

[0044] In practical applications, optionally, the at least two refined simple elements may include at least two of a feature extraction unit, a filtering unit, a downsampling unit, and a geometric calculation unit.

[0045] Among them, FPGA1511 in the feature extraction unit can simplify the point cloud data based on the feature extraction strategy, and the feature extraction strategy can realize the extraction of at least one feature of the key points, edges and planes of the point cloud data, so as to reduce the data volume of the point cloud data.

[0046] The FPGA 1511 in the filtering unit can simplify the point cloud data based on a filtering strategy. The filtering strategy can implement filtering processing of the point cloud data based on thresholds and / or statistical rules to remove redundant and noise points.

[0047] The FPGA 1511 in the downsampling unit can simplify the point cloud data based on a downsampling strategy. The downsampling strategy can use an octree and / or grid algorithm to downsample the point cloud data to reduce the amount of data.

[0048] The FPGA 1511 in the geometric calculation unit can simplify the point cloud data based on the geometric calculation strategy, and the geometric calculation strategy can provide pre-processing functions such as distance calculation and / or registration in the point cloud data.

[0049] It should be noted that each streamlined element 15, or the FPGA 1511 in each streamlined element 15, can flexibly configure and combine various streamlining strategies according to actual streamlining requirements to jointly form a complete parallel processing flow for point cloud data streamlining. On this basis, the main controller 11 can be responsible for coordinating the working status and execution order of each streamlined element 15 to ensure the continuity and efficiency of the entire parallel processing flow.

[0050] On this basis, in order to better understand how the processor described above improves the processing speed of point cloud data simplification, the processing process of the processor is exemplarily described below. Figure 1 For example, the four FPGAs 1511 from left to right simplify the point cloud data based on feature extraction strategy, filtering strategy, downsampling strategy and geometric calculation strategy. On this basis, the main controller 11 sends the same point cloud data to the four GPUs 13 through the control bus 12. Here, the GPU 13 on the far left is taken as an example. The GPU 13 sends the received point cloud data to the FPGA 1511 on the far left through the transmission bus 14 connected to itself, so as to simplify the received point cloud data based on the feature extraction strategy of the FPGA 1511, and then return the simplified results to the original path to upload to the main controller 11 through the control bus 12. After receiving the simplified results returned by each FPGA 1511, the main controller 11 merges these simplified results to obtain the simplified point cloud data. It can be seen that since each FPGA1511 runs in parallel, the above-mentioned processor can simplify the same point cloud data in parallel based on four simplification strategies, and parallel calculations can also be performed within the same FPGA1511. Compared with the serial simplification scheme supported by the CPU platform, this can significantly improve the processing speed of point cloud data simplification, thereby quickly reducing the amount of point cloud data, and effectively reducing the computational pressure of subsequent analysis tasks.

[0051] The processor described in the embodiment of the utility model includes at least a streamlined module; wherein the streamlined module includes a main controller, a control bus, at least two GPUs, at least two transmission buses, and at least two streamlined cells running in parallel; wherein the main controller is connected to the control bus, the control bus is connected to at least two GPUs respectively, the number of processors of at least two GPUs, the number of buses of at least two transmission buses and the number of units of at least two streamlined cells are equal, at least two GPUs are connected to at least two transmission buses in a one-to-one correspondence, and at least two transmission buses are connected to at least two streamlined cells in a one-to-one correspondence; the streamlined cells include FPGAs, and the FPGAs located in different streamlined cells streamline the same point cloud data based on different streamlining strategies. The above technical solution, by adopting the FPGA parallel processing architecture (i.e. at least two streamlined branches running in parallel and the parallel computing characteristics supported by the FPGA itself), performs parallel streamlining on the same point cloud data, thereby effectively improving the processing speed of the streamlined point cloud data.

[0052] An optional technical solution, the simplified cell includes at least two simplified branches running in parallel, and the simplified branches include field programmable gate arrays; wherein,

[0053] Field programmable gate arrays on different streamlined branches within the same streamlined cell streamline the same point cloud data based on different streamlined strategies.

[0054] Among them, a simplified cell includes at least two simplified branches, and each simplified branch runs in parallel. On this basis, each simplified branch includes one or more FPGAs, and the FPGAs on different simplified branches in the same simplified cell can simplify the same point cloud data based on different simplification strategies. Exemplarily, taking the above-mentioned feature extraction unit as an example, the feature extraction unit may include two simplified branches, the FPGA on one simplified branch is used to extract feature A and the FPGA on the other simplified branch is used to extract feature B, and the two simplified branches run in parallel, so as to extract feature A and feature B in parallel from the same point cloud data. The above technical solution can simplify point cloud data in parallel based on at least two simplification strategies in the same simplified cell, thereby further improving the processing speed of point cloud data simplification.

[0055] On this basis, optionally, the simplified branch includes at least two field programmable gate arrays, and the at least two field programmable gate arrays are connected in sequence. By setting at least two FPGAs on a simplified branch, compared with setting one FPGA, this can further improve the processing speed of point cloud data simplification.

[0056] Another optional technical solution, the processor further includes: a storage control module; wherein,

[0057] The storage control module is connected to the main controller. The storage control module is used to cache point cloud data and control the reading and writing of point cloud data. The main controller reads the point cloud data from the storage control module.

[0058] By setting up a storage control module, high-speed caching and read-write control of point cloud data can be achieved, thereby ensuring the efficient supply of point cloud data and enhancing the continuous performance of the overall processing flow.

[0059] On this basis, optionally, the processor further includes: a preprocessing module; wherein,

[0060] The preprocessing module, the storage control module and the main controller are connected in sequence.

[0061] By setting up a preprocessing module, the point cloud data is preprocessed, such as cleaning and / or formatting (such as converting it into a format that can be processed by FPGA), etc., to effectively remove noise, outliers and incomplete point cloud data, optimize data quality, and ensure the accuracy and completeness of the point cloud data.

[0062] On this basis, optionally, the processor further includes: a peripheral interface module; wherein,

[0063] At least two communication interfaces are integrated in the peripheral interface module. The peripheral interface module, the preprocessing module, the storage control module and the main controller are connected in sequence.

[0064] By setting up a peripheral interface module, point cloud data can be interacted with external systems outside the processor; and by integrating at least two communication interfaces (such as at least two of PCI-E, GPIO, USB and Ethernet, etc.) in the peripheral interface module, point cloud data can be interacted with a variety of external systems at a high speed, ensuring the high bandwidth and low latency characteristics of point cloud data transmission.

[0065] In another optional technical solution, the processor further includes: a result output module; wherein:

[0066] The result output module is connected to the main controller, and the result output module is used to output the simplified point cloud data.

[0067] By setting the result output module to output the simplified point cloud data, the simplified point cloud data can be transmitted to other modules for subsequent processing of the point cloud data.

[0068] In another optional technical solution, the processor further includes: a power management module; wherein,

[0069] The power management module operates at least according to the power demand of the field programmable gate array.

[0070] By setting up the power management module, the power output can be dynamically adjusted to supply power according to the power demand of the FPGA and the power demand of the peripheral circuits of the FPGA, thereby ensuring the stable operation of the FPGA and its peripheral circuits. On this basis, the power management module can also have multiple protection mechanisms such as overvoltage, overcurrent and short circuit protection, thereby ensuring the safety and reliability of the processor.

[0071] In practical applications, optionally, the above power demand can be determined according to the working status.

[0072] In another optional technical solution, the processor further includes: a heat dissipation module; wherein:

[0073] The heat dissipation module operates according to the thermal management requirements of the field programmable gate array.

[0074] Taking into account the thermal management requirements of FPGA when working under high load, by setting up a heat dissipation module, using heat dissipation materials and fan design, and cooperating with temperature monitoring sensors, the heat dissipation strategy can be adjusted in real time to ensure that the FPGA runs at the optimal temperature, thereby avoiding FPGA overheating and extending the service life of the FPGA.

[0075] Figure 21 is a block diagram of another processor for point cloud data simplification provided by an embodiment of the utility model. This embodiment is optimized based on the above-mentioned technical solutions. The explanations of the terms that are the same as or corresponding to the above-mentioned embodiments are not repeated here.

[0076] See also Figure 2 ,exist Figure 1 On the basis of, the processor described in the embodiment of the utility model may include: a streamlined module 1, a peripheral interface module 2, a preprocessing module 3, a storage control module 4, a result output module 5, a power management module 6 and a heat dissipation module 7; wherein the streamlined module 1 includes a main controller 11, a control bus 12, at least two graphics processors 13, at least two transmission buses 14 and at least two streamlined cells 15 running in parallel; wherein the streamlined cell 15 includes at least two streamlined branches 151 running in parallel, and the streamlined branch 151 includes at least two field programmable gate arrays 1511 connected in sequence;

[0077] Among them, the peripheral interface module 2, the preprocessing module 3, the storage control module 4, the main controller 11 and the result output module 5 are connected in sequence;

[0078] The main controller 11 is connected to the control bus 12, the control bus 12 is connected to at least two graphics processors 13 respectively, and the number of processors of the at least two graphics processors 13 is equal to the number of buses of the at least two transmission buses 14, the number of buses is equal to the number of units of the at least two compact elements 15, the at least two graphics processors 13 are connected to the at least two transmission buses 14 in a one-to-one correspondence, and the at least two transmission buses 14 are connected to the at least two compact elements 15 in a one-to-one correspondence;

[0079] Field programmable gate arrays 1511 located in different simplified cells 15 simplifies the same point cloud data based on different simplification strategies, and field programmable gate arrays 1511 located on different simplified branches 151 in the same simplified cell 15 simplifies the same point cloud data based on different simplification strategies;

[0080] At least two communication interfaces are integrated in the peripheral interface module 2;

[0081] The storage control module 4 is used to cache point cloud data and control the reading and writing of point cloud data, and the main controller 11 reads point cloud data from the storage control module 4;

[0082] The result output module 5 is used to output the simplified point cloud data;

[0083] The power management module 6 operates at least according to the power demand of the field programmable gate array 1511;

[0084] The heat dissipation module 7 operates according to the thermal management requirements of the field programmable gate array 1511 .

[0085] in, Figure 2 The figure shows an example of a simplified cell 15 including two simplified branches 151, and one simplified branch 151 includes two FPGAs 1511 connected in sequence. In this way, the processor can process the same point cloud data in parallel based on 8 (2*4) branches, thereby improving the processing speed of simplified point cloud data.

[0086] For example, see Figure 3 , which exemplarily shows that various concise simple elements include feature extraction unit, filtering unit, downsampling unit and geometric calculation unit, and these concise simple elements are all implemented based on FPGA.

[0087] On this basis, in order to better understand the workflow of the above processor, Figure 2 and Figure 3 Based on Figure 4 , this is explained exemplarily. For example, the specific steps are as follows:

[0088] Step 1: using the peripheral interface module 2 to receive point cloud data input from an external system;

[0089] Step 2: Using the preprocessing module 3, the input point cloud data is preprocessed by cleaning and formatting to remove noise and outliers;

[0090] Step 3: Using the storage control module 4, the pre-processed point cloud data is written into the internal cache memory for caching;

[0091] Step 4: Use the simplification module 1 to read the point cloud data from the cache memory, and use the internal FPGA1511 to perform feature extraction, filtering, downsampling and geometric calculation on the read point cloud data in parallel to simplify the point cloud data, and then merge the simplified results to obtain the simplified point cloud data;

[0092] Step 5: Use the result output module 5 to output the simplified point cloud data.

[0093] On this basis, the power management module 6 and the heat dissipation module 7 can also be used to monitor and regulate the working state of the FPGA in real time to ensure that it works under the best operating conditions.

[0094] The technical solution of the embodiment of the utility model further improves the processing speed of point cloud data simplification by setting at least two simplified branches running in parallel in a simplified cell; in addition, by setting various peripheral functional modules that work in conjunction with the simplification module (such as a peripheral interface module, a preprocessing module, a storage control module, a result output module, a heat dissipation module, and a power management module, etc.), the performance and reliability of the processor are further enhanced to ensure effective simplification of point cloud data.

[0095] The above specific implementations do not constitute a limitation on the protection scope of the present utility model. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present utility model shall be included in the protection scope of the present utility model.

Claims

1. A processor for point cloud data simplification, characterized in that: At least comprising: a streamlined module; wherein the streamlined module comprises a main controller, a control bus, at least two graphics processors, at least two transmission buses and at least two streamlined simple elements running in parallel; The main controller is connected to the control bus, the control bus is connected to the at least two graphics processors respectively, the number of processors of the at least two graphics processors is equal to the number of buses of the at least two transmission buses, the number of buses is equal to the number of units of the at least two compact elements, the at least two graphics processors are connected to the at least two transmission buses in a one-to-one correspondence, and the at least two transmission buses are connected to the at least two compact elements in a one-to-one correspondence; The compaction unit includes a field programmable gate array, and the field programmable gate arrays located in different compaction units compact the same point cloud data based on different compaction strategies.

2. The processor according to claim 1, characterized in that The simplified cell includes at least two simplified branches running in parallel, and the simplified branches include field programmable gate arrays; wherein, The field programmable gate arrays on different simplified branches within the same simplified cell simplify the same point cloud data based on different simplified strategies.

3. The processor according to claim 2, characterized in that The reduced branch includes at least two field programmable gate arrays, and the at least two field programmable gate arrays are connected in sequence.

4. The processor according to claim 1, characterized in that The at least two refined simple units include at least two of a feature extraction unit, a filtering unit, a down-sampling unit, and a geometric calculation unit.

5. The processor according to claim 1, wherein: Also includes: A storage control module; wherein, The storage control module is connected to the main controller, and is used to cache point cloud data and control the reading and writing of point cloud data. The main controller reads point cloud data from the storage control module.

6. The processor according to claim 5, characterized in that Also includes: Preprocessing module; among them, The preprocessing module, the storage control module and the main controller are connected in sequence.

7. The processor according to claim 6, characterized in that Also includes: Peripheral interface module; wherein, At least two communication interfaces are integrated in the peripheral interface module, and the peripheral interface module, the preprocessing module, the storage control module and the main controller are connected in sequence.

8. The processor according to claim 1, wherein: Also includes: Result output module; among them, The result output module is connected to the main controller, and the result output module is used to output simplified point cloud data.

9. The processor according to claim 1, wherein: Also includes: A power management module and / or a heat dissipation module; wherein, The power management module operates at least according to the power demand of the field programmable gate array; and / or, The heat dissipation module operates according to the thermal management requirements of the field programmable gate array.

10. The processor according to claim 1, wherein: The transmission bus meets the Peripheral Component Interconnect Extension standard.

Images