Conductive substrate and semiconductor device

Abstract

The utility model relates to a conductive substrate and a semiconductor device. The conductive substrate has a first surface and a second surface opposite each other, a conductive die pad, and an elongated conductive connection rod coupled to the conductive die pad. The elongate connecting rod is configured to be cut at an intermediate point along its length to provide a singulated substrate portion, and has first recesses distributed along its length at the first surface alternating with second recesses at the second surface. Cutting the elongated connecting rod at the intermediate point provides a strip residue extending from the distal end to the conductive die pad in the singulated substrate portion. The rod remainder has a serpentine pattern with one or more offsets between a distal end thereof exposed at a surface of the insulative package of the device package and the conductive die pad.

Description

Technical Field

[0001] The specification relates to manufacturing semiconductor devices.

[0002] The solution described in this article can be applied to (integrated circuit, IC) semiconductor devices, such as power quad flat no-lead (QFN) packages for automotive products. Background Art

[0003] Delamination, which usually occurs at the interface between different packaging materials, is a problem that can occur during reliability testing of semiconductor devices. Delamination that reaches the die area can cause device failure.

[0004] The observation that water (moisture) penetrates into the device package during the lifetime of the device represents a possible source of delamination.Backside or frontside grooves along the periphery of the die pad have been proposed to mitigate delamination close to critical chip areas.

[0005] In current (integrated circuit) semiconductor device manufacturing processes, multiple devices are processed simultaneously and ultimately singulated into individual devices.

[0006] During processing, multiple devices are held together into a ribbon using metal connecting structures, including tie bars that extend around the periphery of each device.

[0007] The singulation step is performed via sawing along vertical and horizontal sawing lines at the connecting bars (eg, after device assembly and subsequent molding).Water (moisture) penetration may occur at the connecting bars that connect, for example, the die pads to which the semiconductor chips are attached.

[0008] Remnants of tie bars severed during package singulation to produce individually fabricated semiconductor products still extend from the leadframe to the outer surface of the device package, providing a straight penetration path from the outer surface of the device package to the die attached to the leadframe.

[0009] There is a need in the art for solutions aimed at addressing the problems discussed above. Utility Model Content

[0010] One or more embodiments relate to a semiconductor device and a conductive substrate.

[0011] One or more embodiments relate to a conductive substrate having a first surface and a second surface opposite to each other and including a conductive die pad, the conductive die pad being configured to have a semiconductor chip arranged on the conductive die pad and a conductive elongated connecting rod connected to the conductive die pad and extending between the conductive die pads, wherein the elongated connecting rod has first recesses distributed along the length of the elongated connecting rod at the first surface, the first recesses alternating with second recesses at the second surface, the elongated connecting rod being configured to be cut at an intermediate point along the length of the elongated connecting rod to provide a singulated substrate portion, and in response to being cut at the intermediate point, the elongated connecting rod is divided into a rod remainder, the rod remainder extending from a distal end to the conductive die pad in the singulated substrate portion, wherein the rod remainder has a serpentine pattern, the serpentine pattern having at least one offset between the distal end and the conductive die pad.

[0012] One or more embodiments relate to a conductive substrate, wherein the elongated connecting rod comprises a sequence of adjacent portions, the sequence of adjacent portions having the first recess and the second recess etched therein, the adjacent portions in the sequence being alternately located at opposite first and second surfaces, respectively.

[0013] One or more embodiments relate to a conductive substrate wherein the first and second recesses in the elongated connecting rod at the first and second surfaces of the conductive substrate are symmetrically arranged with respect to the midpoint.

[0014] One or more embodiments involve a conductive substrate that also includes: an insulating material molded onto the second surface of the common conductive substrate, wherein the insulating material fills the second recesses in the slender connecting rods so that the second surface between the second recesses is not covered to provide a conductive substrate pad exposed from the surface of the insulating material.

[0015] One or more embodiments relate to a semiconductor device, comprising: a conductive tube die pad, the conductive tube die pad having at least one semiconductor chip arranged on the conductive tube die pad; at least one conductive connection structure, the conductive connection structure extending from a distal end to connect to the conductive tube die pad, the conductive connection structure having a serpentine pattern with at least one offset between the distal end and the conductive tube die pad, the serpentine pattern being formed by one or more first recesses at a first surface of the at least one conductive connection structure, the first recesses alternating with second recesses at a second surface of the at least one conductive connection structure, the second surface being opposite to the first surface.

[0016] One or more embodiments relate to a semiconductor device that further includes: an insulating material molded onto the second surface and filling the recesses in the second surface, while leaving the second surface between the second recesses uncovered to provide a conductive substrate pad exposed from the surface of the insulating material.

[0017] This object is achieved by means of the features set out in the appended claims.

[0018] One or more embodiments relate to a corresponding substrate suitable for being supplied by a supplier to a manufacturer of semiconductor devices for use in manufacturing (integrated circuit) semiconductor devices.

[0019] One or more embodiments relate to a corresponding (integrated circuit) semiconductor device.

[0020] The solution described herein relates to the recognition that, in addition to moisture ingress points, exposed connecting bars may also represent weak points resulting from damage (crack initiation) caused during sawing.

[0021] The solution described in this article proposes a humidity / delamination resistant die pad structure.

[0022] In various embodiments, the connecting bar may include a zigzag (snake-shaped or serpentine) portion. In various embodiments, such a serpentine (or zigzag) structure may be formed in the lead frame by half etching from both sides.

[0023] Various embodiments allow a longer path for moisture / delamination to reach the die area.

[0024] Advantageously, in various embodiments, one or more additional dummy pads may be created that increase the thermo-mechanical robustness of adjacent solder joints. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] One or more embodiments will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0026] Figure 1 It is a plan view illustrating the structure of an integrated circuit (power) semiconductor device;

[0027] Figures 2 to 6 The steps of manufacturing an integrated circuit semiconductor device are shown, wherein Figure 2 is along Figure 1 The cross-sectional view of line II-II in the figure, Figure 6 is along Figure 5 A side view of arrow VI in FIG.

[0028] Figure 7 It is possible through Figures 2 to 6an enlarged partial cross-sectional view of an integrated circuit semiconductor device obtained by the step of:

[0029] Figures 8 to 12 The steps of manufacturing an integrated circuit semiconductor device according to an embodiment of the present specification are shown, wherein Fig.12 is based on Fig.11 A side view of arrow XII in FIG.

[0030] Fig.13 is through Figures 8 to 12 an enlarged partial cross-sectional view of an integrated circuit semiconductor device obtainable by the step of:

[0031] Fig.14 and Fig.15 is a perspective view illustrating possible features of an integrated circuit semiconductor device that may be achieved through embodiments of the present description. DETAILED DESCRIPTION

[0032] Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated.

[0033] The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.

[0034] The edges of a feature drawn in a diagram do not necessarily indicate the end or extent of the feature.

[0035] In the following description, one or more specific details are shown to provide a deeper understanding of examples of embodiments of the present description. Embodiments may be obtained without one or more specific details, or with other methods, components, materials, etc. In other cases, known structures, materials, or operations are not shown or described in detail so that certain aspects of the embodiments are not obscured.

[0036] Reference to "an embodiment" or "an embodiment" in the framework of this specification is intended to indicate that a particular configuration, structure or feature described in connection with the embodiment is included in at least one embodiment. Therefore, phrases such as "in one embodiment" or "in an embodiment" that may appear in one or more places in this specification do not necessarily refer to one and the same embodiment.

[0037] Furthermore, the particular configurations, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0038] The headings / references used herein are provided for convenience only and do not limit the scope of protection or the scope of the embodiments.

[0039] For simplicity and ease of explanation, throughout the specification, and unless the context indicates otherwise, the same parts or elements are designated by the same reference numerals in the various drawings, and the corresponding description will not be repeated for each drawing.

[0040] Figure 1 The structure of an integrated circuit (IC) semiconductor device 10 is shown with reference to a substrate (lead frame) configured to define the device structure. That is, Figure 1 1 is a plan view of such a substrate, in which other elements making up device 10 (as discussed below) are not visible for simplicity.

[0041] Merely as an example, the IC semiconductor devices considered in this article are power devices, including:

[0042] Low power part (in Figure 1 ), for example having a controller die or chip attached to a first die pad 12A in the lead frame 12, and

[0043] High power part (in Figure 1 ), having, for example, one or more power dies or chips attached to one or more second die pads in the lead frame 12.

[0044] For simplicity, the second die pad is also designated as 12A, it being understood that the specific layout of the die pad 12A shown herein is merely exemplary and non-limiting. Moreover, as used herein, the terms "chip" and "die" are considered synonymous.

[0045] An array of leads 12B is arranged around the die pad 12A on which the low-power and high-power dies are mounted.

[0046] In addition to Figure 1 In addition to the substrate (lead frame) 12 visible in FIG. 1 , an IC semiconductor device (such as the device 10 considered by way of example herein) also includes: one or more semiconductor chips or dies 14 (for simplicity, these are only shown in FIG. 1 ). Figure 7 and Fig.11 conductive structures that couple the semiconductor chip 14 to leads (external pads) 12B in the substrate; and an insulating package 20 that is molded over the thus formed assembly to complete the plastic body of the device 10.

[0047] The name "leadframe" (or "leadframe") (see, e.g., the U.S. Patent and Trademark Office's USPC Comprehensive Glossary) is currently used to refer to a substrate that includes a metal frame that provides support for an integrated circuit chip or die, and electrical leads that interconnect the integrated circuits in the die or chip to other electrical components or contacts.

[0048] Essentially, leadframe 12 includes an array of conductive structures (or leads, such as 12B) extending inwardly from an outline position in the direction of a semiconductor chip or die (e.g., 14) to form a bond pad ( Figure 4 12A) of the conductive structure array, the die pad is configured to have at least one (integrated circuit) semiconductor chip or die attached thereto. This can be achieved via conventional means such as a chip attach adhesive (e.g., a chip attach film or DAF).

[0049] In the embodiments illustrated by way of example herein, the leadframe 12 may be of a pre-molded type, i.e., a leadframe type that includes an engraved metal (e.g., copper) structure formed by etching a metal sheet and includes empty spaces filled with an insulating compound 20A (e.g., a resin) that is "pre-molded" on the engraved metal structure.

[0050] In current manufacturing processes for (integrated circuit) semiconductor devices, multiple devices / lead frames are processed simultaneously.

[0051] Figure 1 This is generally an example of a conventional manufacturing process for IC semiconductor devices, in which a plurality of separate lead frame portions are provided as a common conductive substrate for manufacturing a plurality of semiconductor devices.

[0052] For example, such a common conductive substrate can be provided as a plurality of individual lead frames held together in a lead frame strip by a connecting structure comprising connecting bars extending around the individual lead frame portions along the length of the saw cut line SL and connecting bars 100 extending (inwardly) from the frame at the saw cut line SL to connect to the corners of the die pad 12A.

[0053] These tie bars 100, SL are formed with reduced thickness during the manufacture of the engraved conductive structures (composed of metal such as copper) of the leadframe 12. The relevant process may involve etching (eg chemical etching) of the base metal layer (foil or tape).

[0054] Therefore, the connecting bar can be regarded as a "half-etched" portion of such a metal layer: however, the reference to "half" etching does not mean that the etching depth must reach 50% of the thickness of the metal layer or metal strip.

[0055] Thus, the process for fabricating the semiconductor devices illustrated herein basically involves providing a common conductive substrate 12 (eg, a leadframe strip) for a plurality of semiconductor devices.

[0056] In current manufacturing processes of integrated circuit semiconductor devices, a (significant) number of multiple devices are processed simultaneously and eventually singulated into individual devices, wherein a cutting operation is performed along the length of the sawing line SL.

[0057] For simplicity and as an example only, Figure 1 The structure of two such adjacent semiconductor devices is shown surrounded by dot-dash lines in the plan view of FIG.

[0058] It is helpful to understand that the processing contemplated herein may involve attaching a semiconductor chip or die 14 to a corresponding die pad 12A of a lead frame 12 (possibly of a pre-molded type with a pre-molded resin 20A, such as Figure 2 and Figure 3 providing a conductive structure (e.g., a wire, a ribbon, or a clip—not visible in the figure for simplicity) between the semiconductor chip or die 14 on the corresponding die pad 12A and the lead 12B; molding an insulating encapsulation 20 (e.g., an epoxy resin, such as Figure 3 ) to complete the plastic body of multiple devices 10 formed on a common substrate (lead frame) 12, and to "singulate" these devices into individual (integrated circuit) semiconductor devices 10 by cutting along "horizontal" and "vertical" cutting (sawing) lines SL (for example, with a saw blade B).

[0059] exist Figures 2 to 4 For simplicity, only one common substrate 12 is visible (see Figure 1 The cross section in FIG. 1 indicates II-II), wherein a sawing line SL extends between adjacent substrate portions in a common conductive substrate (lead frame) 12 .

[0060] As shown in these figures, adjacent substrate portions in the common conductive substrate 12 have sides facing each other and are coupled (before singulation) via a slender connecting rod 100 (having a half-etched thickness) that extends inward from a portion of the lead frame positioned along the sawing line SL to each tube core pad 12A between the facing sides.

[0061] like Figure 4 and Fig.10 As shown, the device 10 is separated into individual semiconductor devices by cutting the lead frame portion positioned along the cutting (sawing) line SL, including cutting the conductive substrate 12 along the length of the saw line SL, thereby laterally passing through the slender ("half-etched") connecting bar 100 connected to the corner of the tube core pad 12A, thereby cutting laterally at the midpoint therein.

[0062] like Figure 5 and Figure 6 As shown, for example, in response to such a singulation step, the connecting bar 100 is severed at a midpoint of its length, thereby forming two connecting bar remnants 100', each connecting bar remnant 100' having a "distal" end 100A exposed at the surface of the package provided by the molding compound 20 (resin).

[0063] As discussed above, parallel processing of multiple semiconductor devices for eventual "singulation" is conventional in the art, such that a more detailed description need not be provided herein.

[0064] As discussed in the introductory part of this specification, water (moisture) penetration into the device package has been observed during device lifetime, representing a possible source of delamination.

[0065] Water (moisture) penetration may occur at the connecting bar 100, which is connected to, for example, a corner of a die pad to which a semiconductor chip is attached. Therefore, during package singulation to produce individually manufactured semiconductor products (see Figure 4 ) The remnants 100 ′ of the severed tie bars remain, extending from the lead frame (die pad 12A) to the outer surface of the device package (mold compound 20 ).

[0066] This ultimately provides a straight water (moisture) penetration path from the outer surface of the device package (i.e., from the distal end 100A of the remainder 100' of the tie bar 100) to the die 14 attached to the lead frame 12. Figure 7 In the embodiment of the present invention, the invention is implemented by using the reference symbol WPP. Figure 7 , such a die is shown attached below the die pad 12A (actually attached to the front surface of the die pad 12A).

[0067] As discussed, delamination, which typically occurs at the interface between different packaging materials, is a problem that can arise in reliability testing of semiconductor devices. The consequence of delamination reaching the die area (for devices such as device 10 considered herein) can be test failure.

[0068] During the life of the device, water (moisture) flows from the distal end 100A of the connecting bar remnant 100' along the Figure 7 The (straight line) water (moisture) permeation path WPP shown penetrates into the device package, which may represent a possible source of delamination.

[0069] During its useful life, a device package as described herein may be exposed to a humid environment and some moisture (humidity) may penetrate into the package from possible "open" points such as exposed connecting bars (e.g., at the distal end 100A), where water molecules can pass through small channels created during the singulation process.

[0070] Over time, water can flow along the leadframe structure, which expands and contracts with temperature changes, causing interface separation and delamination. When delamination reaches the die area, the device is likely to fail.

[0071] Attempts may be made to mitigate these problems in various ways, such as by reducing the exposure of the package to moisture, by changing leadframe characteristics (eg, material and roughness), or by using a resin with improved adhesion as the mold compound 20 .

[0072] These approaches may negatively impact package performance and / or result in increased package costs.

[0073] U.S. Patent No. 6,329,706 (incorporated herein by reference) discloses a lead frame and a semiconductor package using the lead frame, which can effectively prevent moisture from intruding into the semiconductor package, prevent flash during the molding process, and reduce thermal stress on the die pad. The die pad of the lead frame includes at least two forging portions having narrow and long grooves on the first surface and the second surface thereof, and is formed into a V-shape or U-shape along the four sides of the rectangular die pad. At least one groove is formed along the outer side of the chip mounting area, and has wings adjacent to the groove.

[0074] U.S. Patent No. 6,229,205 (incorporated herein by reference) discloses a semiconductor device package including a connecting bar for supporting a die pad, the connecting bar having a downward bend to achieve vertical displacement downward from the die pad, and having a laterally spaced upward bend to achieve vertical displacement upward from the die pad. The description claims that such a package can prevent imperfect packaging and problems resulting therefrom, such as package cracking, and reduce damage to the die pad, such as warping of the die pad.

[0075] US Patent No. 5,424,576 (incorporated herein by reference) discloses a semiconductor device including a lead frame having tie bars. The tie bars can be used to support the semiconductor die to alleviate the problem of package cracking caused by stress and provide a universal lead frame suitable for use with a variety of different die sizes.

[0076] Therefore, documents such as the latter two documents disclose a semiconductor package having a lead frame including a die pad for mounting a semiconductor chip having a tie bar having a twice-bent structure (or in any case, a structure bent into various shapes).

[0077] Figures 8 to 15 Steps for manufacturing an integrated circuit semiconductor device according to an embodiment of the present specification are shown, wherein such a structure is applied to prevent diffusion of water (moisture) through the interface between the connecting bar 100 connected to the corner of the tube core pad 12A and the molding compound 20, reducing the chance of delamination and package cracking.

[0078] It will be understood that such a sequence of steps is exemplary only:

[0079] One or more of the steps shown in the figures may be omitted, performed in a different manner (e.g., using other tools), and / or replaced by other steps;

[0080] Additional steps can be added;

[0081] One or more steps may be performed in a sequence different from that shown.

[0082] For simplicity and ease of explanation, Figures 8 to 15 Unless the context indicates otherwise, Figures 1 to 7 Components or elements discussed Similar components or elements are indicated by the same reference numerals and corresponding descriptions in the various figures and will not be repeated for the sake of brevity.

[0083] In conclusion, Figures 8 to 15 An example of a manufacturing process for a semiconductor device, generally an integrated circuit, is provided in which a plurality of separate lead frame portions are provided as a common conductive substrate (lead frame 12), the common conductive substrate comprising a plurality of separate lead frame portions held together in a lead frame strip by a connecting structure comprising portions extending around the separate lead frame portions and connecting rods 100 extending inwardly therefrom to connect to a die pad 12A.

[0084] The connecting bar 100 is formed with a reduced thickness during the manufacture of the engraved conductive structures (e.g., composed of a metal such as copper) of the lead frame 12. The connecting bar 100 can be considered as a "half-etched" portion of the base metal (e.g., copper) layer or strip: as mentioned above, the reference to "half" etching does not mean that the etching depth must be equal to 50% of the thickness of the metal layer or strip.

[0085] Figures 8 to 13 The process illustrated in the sequence of may again involve attaching the semiconductor chip or die 14 to the respective die pads 12A of the lead frame 12 (here of the pre-molded type with the pre-molded resin 20A) and providing a conductive structure (such as a wire, a strip or a clip - for simplicity, in FIG. 1 ) between the semiconductor chip or die 14 on the respective die pad 12A and the lead 12B. Figures 8 to 15 is also not visible in the ).

[0086] Insulating package 20 (e.g., epoxy resin, such as Fig. 9 ) is molded over the assembly so formed to complete the plastic body of the plurality of devices 10 formed on a common substrate (lead frame) 12.

[0087] like Fig.10 As shown, these devices are ultimately “singulated” into individual (integrated circuit) semiconductor devices 10 by cutting (eg, with saw blade B) along “horizontal” and “vertical” cutting (sawing) lines SL.

[0088] Similar to Figure 4 ,exist Fig.10 In the drawing, for simplicity, only one common substrate 12 is visible, which has one cutting line SL extending between adjacent substrate portions in the common conductive substrate (lead frame) 12.

[0089] These adjacent substrate portions in the common conductive substrate 12 have mutually facing sides and are coupled (before singulation) via elongated connecting bars 100 extending between the mutually facing sides.

[0090] like Fig.10 As shown, device 10 is singulated into individual semiconductor devices by cutting along dicing (sawing) lines SL, including cutting conductive substrate 12 along the length of sawing lines SL and across the width of elongated tie bars 100 severed thereby.

[0091] like Fig.11 , 12 As can be seen in FIGS. 1 and 13 , the singulation step results in the remnants of the cross-cut connecting bars 100 being formed with “distal end” portions 100A exposed at the surface of the encapsulation provided by the molding compound 20 (resin).

[0092] As discussed in the introduction to this specification, water (moisture) penetration into device packages has been observed during device lifetime, representing a possible source of delamination. Water (moisture) penetration may occur at the connection bars 100 that connect, for example, the die pads to which the semiconductor chips are attached. As shown in the figure, during package singulation to produce individually manufactured semiconductor products (see Fig.10 ) The remnants 100 ′ of the severed tie bars remain to extend from the lead frame (die pad 12A), for example, at a corner thereof, to the outer surface of the device package (mold compound 20 ).

[0093] exist Figures 8 to 15 The solution shown (combined with the previous Figures 2 to 8 The solution discussed is the opposite, combining Figures 2 to 8 In the discussed solution, the connecting rod 100 and thus the water / moisture permeation path WPP are substantially rectilinear), the connecting rod 100 - ie the water / moisture permeation path, designated WPP' - has a zigzag (serpentine or snake-like) shape.

[0094] Figures 8 to 15 The meandering / snake-like structure of the tie bar 100 is shown formed in the pre-molded lead frame 12 by half-etching from both sides and creating additional dummy pads.

[0095] Figures 8 to 15An exemplary manner of providing such a zigzag / snake-like (zigzag) connecting bar structure to form a substrate (lead frame) 12 is shown, starting from a sheet or strip of conductive material (e.g. a metal such as copper) by (semi) etching such a sheet or strip on two opposing surfaces 121, 122.

[0096] This treatment can be carried out (in a manner known per se to a person skilled in the art) to form a connecting rod 100 structure having a first recess 121A and a second recess 122A, wherein the first recess 121A and the second recess 122A are offset (staggered) from each other in an alternating manner along the length of the rod 100 at opposite surfaces 121, 122 of the substrate 12.

[0097] Right now:

[0098] First recesses 121A are formed (etched) in surface 121 at locations along the length of connecting rod 100 where surface 122 is not etched, so that second recesses are not formed at these locations in surface 122, and

[0099] Second recesses 122A are formed (etched) in surface 122 at locations along the length of connecting rod 100 where surface 121 is not etched, so that first recesses are not formed at these locations in surface 121 .

[0100] In summary, in the solution described herein, a common conductive substrate 12 is provided for a plurality of semiconductor devices 10; the common conductive substrate 12 has a first surface 121 and a second surface 122 opposite to each other and includes a conductive pad (die pad 12A) configured to have a semiconductor chip 14 arranged thereon.

[0101] The substrate as shown also includes elongated connecting bars 100, which are coupled to the conductive pads 12A (eg, at their corners); these elongated connecting bars 100 are configured to be cut along their length at the midpoint indicated by the sawing line SL (see FIG. Fig.10 Blade B in ) to provide separate substrate portions (and individual devices).

[0102] As shown, the connecting rod 100 has first and second recesses 121A, 122A at the first and second surfaces 121, 122 alternating along the length thereof.

[0103] As a result of the cut at the midpoint SL (see again Fig.10 ), the connecting rod 100 is cut across its length and divided into, for example, Fig.10 , 11 and the rod remainder indicated as 100' in 13.

[0104] The bar remnant 100 ′ resulting from cutting the connecting bar 100 at the midpoint of the sawing line SL extends from the distal end 100A to the conductive pads 12A in the singulated substrate portion (to which one or more chips or dies 14 are attached).

[0105] These rod remnants 100' have a serpentine pattern with at least one offset (bend or curve) between their distal ends 100A (exposed outside the package of insulating material 20) and the conductive pads 12A (and one or more chips or dies 14 attached thereto).

[0106] like Fig.13 As can be seen, as the chip 14 is attached at the surface 121 of the substrate 12 and the insulating compound 20 is molded, a longer, tortuous permeation path WPP' is formed (at the interface between the rod residue 100' and the package 20): this longer, tortuous permeation path WPP' resists the diffusion of water (moisture) to the die pad 12A and the die 14 attached thereto.

[0107] The longer, tortuous permeation path WPP' is essentially formed by the recessed portion or portion 121A formed in the surface 121 into which the molding compound (indicated by 20 for simplicity, but the pre-mold compound 20A may have the same effect) permeates.

[0108] The number of recessed portions 121A, 122A formed in the surfaces 121, 122 is not limited to two and three as shown in the drawings.

[0109] In the (purely exemplary) case presented here, the connecting rod 100 is made to exhibit (after singulation: see e.g. Fig.13 ) Single spoon-shaped loop or bend.

[0110] An increase in the number of recesses 121A, 122A will result in an increase in the number of offsets or bends (curves), i.e. a "more serpentine" connecting rod shape, and thus form an increasingly longer and more tortuous penetration path WPP' to counteract the diffusion of water (moisture) from the exposed distal end 100A toward the tube core pad 12A and one or more tube cores 14 attached thereto.

[0111] In the (purely exemplary) case presented here, the recesses 121A, 122A are formed in the surfaces 121, 122 in a symmetrical (mirror-like) configuration with respect to the cutting line SL. Although advantageous, this configuration is not mandatory.

[0112] Whatever the choice of providing a serpentine connecting bar structure starting from a sheet or strip of conductive material (semi-)etched on two opposite surfaces 121, 122 (e.g. the number of recesses 121A, 122A, their symmetrical / asymmetrical arrangement), it is advantageous to provide additional pads 120A at the surface 122 opposite to the mold compound 20, which remain exposed (uncovered) at the surface of the mold compound, e.g. Fig.15 Visible in.

[0113] These may be dummy pads 120A that help increase the thermo-mechanical robustness of adjacent solder joints.

[0114] To summarize: an insulating material 20 (e.g., epoxy resin) can be molded onto a common conductive substrate 12 (before singulation) to encapsulate a semiconductor chip 14 arranged on a conductive pad 12A at a first surface 121A and coupled to an elongated connecting rod 100; and in response to cutting the connecting rod 100 at the midpoint SL, the rod remnant 100' exposes its distal end 100A (at the packaging surface) and provides a tortuous moisture permeation path WPP' from the distal end 100A to the pad 12A and the semiconductor chip 14 arranged thereon.

[0115] Advantageously, a molded insulating material (which in the case of a pre-molded leadframe 12 may include a pre-mold material 20A) is molded onto the common conductive substrate 12 .

[0116] At the second surface 122A (opposite to the first surface 121A where the chip 1 is arranged), the insulating material fills the (second) recesses 122A in the connecting bar 100 , so that the second surface 122 between the second recesses 122A is not covered.

[0117] In this manner, a conductive substrate pad (dummy pad 120A) exposed from the surface of the insulating material 20 can be provided, for example Fig.15 Visible in.

[0118] This can be Fig.14 It is further understood that only the basic engraved conductive (metal) structure of the lead frame 12 is shown, and the insulating encapsulation 20 (and pre-mold material) is theoretically removed.

[0119] The embodiments discussed herein advantageously provide a connecting bar having a serpentine (zigzag-like) pattern (eg, by half-etching a metal sheet or ribbon, as is conventional per se).

[0120] For example, the sheet or strip is etched at its top and bottom sides (surfaces) near the die pad, thereby maintaining the overall configuration and related properties. The resulting connecting bar will be continuous with alternating halves located at the top side (here surface 121, configured to attach one / multiple chips 14 thereto) and bottom side (here surface 122) of the substrate (lead frame) 12.

[0121] That is, the connecting rod 100 shown herein includes a sequence of adjacent portions distributed along the length of the rod, in which the first recess 121A and the second recess 122A are etched.

[0122] As shown (see, for example, Figure 8 , viewed from left to right), adjacent portions in the sequence are alternately located at the first (top side) surface 121 and the second (bottom side) surface 122, respectively.

[0123] Therefore, such as Figures 11 to 15 is an example of a (integrated circuit) semiconductor device 10 that may be fabricated using the methods described herein.

[0124] As shown, such a device comprises (at least one) conductive pad 12A on which is arranged at least one semiconductor chip 14 plus at least one conductive connection structure, namely a rod remnant 100' of a connecting rod 100 cut off (laterally cut) at a midpoint SL.

[0125] The rod remainder 100' extends from its distal end 100A toward the backing pad 12A and is coupled to the backing pad 12A.

[0126] As shown, the stem remainder 100' has a serpentine pattern with at least one offset between its distal end 100A and the conductive pad 12A.

[0127] The rod remainder 100' has opposing first and second surfaces 121 and 122 and comprises a sequence of adjacent portions having recesses 121A, 122A etched therein and opening to the exterior of the rod remainder 100'. The adjacent portions in the sequence are alternately located on the first and second surfaces 121 and 122.

[0128] like Figures 11 to 15 The illustrated semiconductor device 10 includes an insulating material (eg, pre-molded resin 20A) molded on the second surface 122 and filling in the second recesses 122A while leaving the second surface 122 between the second recesses 122A uncovered to provide a conductive substrate pad 120A exposed from the insulating material surface.

[0129] That is, molding the package 20 at the surface 121 to which the die or chip 14 is attached and subsequently sawing (singulating) the connecting bars 100 will produce two remnants 100', each remnant 100' having an exposed distal end 100A on the package side, wherein an additional (dummy) pad 120A remains exposed at the package surface (and thus visible, for example, at the package bottom side 122).

[0130] The embodiments discussed herein are advantageous in providing possible moisture permeation paths (WPP', Fig.13 ), which is non-linear (snaking) and longer, thus making it more difficult for water (moisture) to penetrate the device package and create delamination and thus reach the die therein.

[0131] The embodiments discussed herein also facilitate providing additional exposed pads ( Fig.13 120A in), which increases the reliability of the solder joints.

[0132] Thus, the embodiments discussed herein reduce the possibility of delamination at the bottom of the tie bar, while the additional pads on the package can improve solder joint reliability. Thus, the embodiments discussed herein can result in reduced risk of delamination and improved solder joint reliability.

[0133] The details and embodiments may vary, even significantly, with respect to what has been described purely by way of example, without prejudice to the underlying principle and without departing from the scope of protection.

[0134] The claims are an integral part of the technical teaching provided with respect to the embodiments.

[0135] The scope of protection is determined by the appended claims.

Claims

1. A conductive substrate, characterized in that The conductive substrate has a first surface and a second surface opposite to each other and includes a conductive die pad configured to have a semiconductor chip arranged on the conductive die pad and a conductive elongated connecting bar connected to the conductive die pad and extending between the conductive die pads, wherein the elongated connecting rod has first recesses at the first surface distributed along the length of the elongated connecting rod, the first recesses alternating with second recesses at the second surface, the elongated connecting rod is configured to be cut at an intermediate point along the length of the elongated connecting rod to provide a singulated substrate portion, and in response to being cut at the intermediate point, the elongated connecting rod is divided into a rod remainder extending from a distal end to the conductive tube core pad in the singulated substrate portion, wherein the rod remainder has a serpentine pattern, and the serpentine pattern has at least one offset between the distal end and the conductive tube core pad.

2. The conductive substrate according to claim 1, characterized in that The elongated connecting rod comprises a sequence of adjacent portions having the first and second recesses etched therein, the adjacent portions in the sequence being alternately located at opposing first and second surfaces, respectively.

3. The conductive substrate according to claim 1, characterized in that The first and second recesses in the elongated connecting rod at the first and second surfaces of the conductive substrate are symmetrically arranged with respect to the midpoint.

4. The conductive substrate according to claim 1, characterized in that Also includes: An insulating material molded onto the second surface of the common conductive substrate, wherein the insulating material fills the second recesses in the elongated connecting bars, leaving the second surface between the second recesses uncovered to provide a conductive substrate pad exposed from a surface of the insulating material.

5. A semiconductor device, characterized in that: include: a conductive die pad having at least one semiconductor chip disposed thereon; at least one conductive connection structure extending from a distal end to connect to the conductive die pad, the conductive connection structure having a serpentine pattern with at least one offset between the distal end and the conductive die pad, the serpentine pattern being formed by one or more first recesses at a first surface of the at least one conductive connection structure alternating with second recesses at a second surface of the at least one conductive connection structure, the second surface being opposite to the first surface.

6. The semiconductor device according to claim 5, characterized in that Also includes: An insulating material is molded onto the second surface and fills the recesses in the second surface while leaving the second surface between the second recesses uncovered to provide conductive substrate pads exposed from a surface of the insulating material.

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