High-voltage element structure

Abstract

A high voltage element structure is described. In some embodiments, the structure includes a deep well region of a first conductivity type disposed in a substrate, a doped region disposed on the deep well region; a well region of the first conductivity type surrounding the deep well region and the doped region; a source region disposed on the well region, a drain region disposed on the doped region, and a first pickup region of the first conductivity type disposed on the well region. The first pickup region laterally contacts the source region, and the first pickup region, the well region, and the deep well region are electrically connected.

Description

Technical Field

[0001] The embodiment of the utility model relates to a high voltage component structure. Background Art

[0002] High voltage metal oxide semiconductor (HVMOS) components are widely used in many electronic components, such as central processing unit (CPU) power supply, power management system, AC / DC converter, etc. During the operation of HVMOS components, high voltage can be applied between the gate and the drain. As a result, a large amount of substrate leakage and component damage often occur. Therefore, there is a need for improved HVMOS components. Utility Model Content

[0003] The utility model provides a high-voltage component structure including: a deep well region of the first conductivity type disposed in a substrate, a doped region disposed on the deep well region; a well region of the first conductivity type surrounding the deep well region and the doped region; a source region disposed on the well region, a drain region disposed on the doped region, and a first pickup region of the first conductivity type disposed on the well region. The first pickup region laterally contacts the source region, and the first pickup region, the well region, and the deep well region are electrically connected.

[0004] In some embodiments, the doped region includes a second conductivity type opposite to the first conductivity type. In some embodiments, the first conductivity type is p-type and the second conductivity type is n-type. In some embodiments, the source region includes the second conductivity type. In some embodiments, the high voltage component structure further includes a gate structure disposed on the substrate. In some embodiments, the doping concentration of the deep well region is substantially greater than the doping concentration of the well region. In some embodiments, the doping concentration of the deep well region is substantially less than the doping concentration of the well region. In some embodiments, the substrate includes the first conductivity type.

[0005] The present invention provides a high-voltage element structure including: a high-voltage element disposed on a substrate, the high-voltage element including a source region, a drain region, and a gate structure. The structure also includes a first protective structure surrounding the source region and the drain region of the high-voltage element, the first protective structure including a first pickup region, a first well region, and a first deep well region. The structure also includes a first isolation structure disposed between the source region of the high-voltage element and the first pickup region of the first protective structure, and the first isolation structure includes a first conductive layer disposed in the first isolation region.

[0006] In some embodiments, the high-voltage element structure further includes a second protective structure surrounding the first protective structure, wherein the second protective structure includes a second pickup region, a second well region, and a second deep well region. In some embodiments, the first protective structure includes a first conductivity type, and the second protective structure includes a second conductivity type opposite to the first conductivity type. In some embodiments, the first conductivity type is p-type, and the second conductivity type is n-type. In some embodiments, the high-voltage element structure further includes a second isolation structure disposed between the first pickup region of the first protective structure and the second pickup region of the second protective structure, wherein the second isolation structure includes a second conductive layer disposed in the second isolation region. In some embodiments, the second isolation structure further includes a third conductive layer disposed in the second isolation region, wherein the second conductive layer is adjacent to the first pickup region of the first protective structure, and the third conductive layer is adjacent to the second pickup region of the second protective structure. In some embodiments, the first isolation structure further includes a fourth conductive layer disposed in the first isolation region, wherein the first conductive layer is adjacent to the first pickup region of the first protective structure, and the fourth conductive layer is adjacent to the source region of the high-voltage element.

[0007] Based on the above, the utility model relates to a high voltage component structure including a protective structure and a method for forming the same. The protective structure having a pickup region docked with a source region results in a smaller protective structure, thereby saving layout area. In some embodiments, the high voltage component includes one or more isolation regions, and one or more conductive layers are formed in the isolation regions to improve pickup efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The various aspects of the present disclosure will be best understood by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, the various features are not drawn to scale. In fact, the size of the various features may be arbitrarily increased or reduced for clarity of discussion.

[0009] Figure 1A and Figure 1B A top view of a high voltage component structure is shown according to some embodiments.

[0010] Figure 2 According to some embodiments, Figure 1A A cross-sectional view of the high voltage component structure taken at section AA.

[0011] Figure 3A-3C A top view of a high voltage component structure is shown according to some embodiments.

[0012] Figure 4A and Figure 4B A top view of a high voltage component structure is shown according to some embodiments.

[0013] Figure 5-Figure 14 A cross-sectional side view of a high voltage component structure according to an alternative embodiment is shown.

[0014] Figures 15A-15H Cross-sectional side views of isolation structures at various stages of fabrication are shown in accordance with some embodiments. DETAILED DESCRIPTION

[0015] The following disclosure provides many different embodiments or examples for implementing the different features of the provided target. The following describes specific examples of components and arrangements to simplify the disclosure. Of course, these are only examples and are not intended to be limiting. For example, the following description may include an embodiment in which the first feature and the second feature are formed to be in direct contact, and may also include an embodiment in which an additional feature may be formed between the first feature and the second feature so that the first feature and the second feature may not be in direct contact. In addition, the disclosure may reuse component numbers and / or letters in various examples. This repetition is for the purpose of brevity and clarity, rather than indicating the relationship between the various embodiments and / or configurations discussed by itself.

[0016] Additionally, for ease of description, spatially relative terms such as "beneath," "below," "lower," "above," "over," "on," "top," "upper," etc. may be used herein to describe the relationship of one component or feature shown in the figures to another (other) component or feature. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein should be interpreted accordingly.

[0017] According to some embodiments of the present disclosure, a high voltage element structure including a protective structure and a method for forming the same are provided. In some embodiments, the high voltage element is an HVMOS transistor, and the protective structure includes a pickup region docked with a source region. The protective structure having a pickup region docked with a source region results in a smaller protective structure, thereby saving layout area. In some embodiments, the HVMOS element includes one or more isolation regions, such as a shallow trench isolation (STI) region or a deep trench isolation (DTI) region, and one or more conductive layers are formed in the isolation region to improve n-type deep well (DNW) to isolation (ISO) pickup efficiency.

[0018] Figure 1A and Figure 1B A top view of a high voltage component structure 100 is shown in accordance with some embodiments. Figure 2 According to some embodiments, Figure 1AA cross-sectional view of the high voltage component structure 100 taken at section AA. Figure 2 As shown, in some embodiments, the high voltage element structure 100 includes a substrate 102. The substrate 102 may include an elemental semiconductor containing silicon or germanium in a single crystal form, a polycrystalline form, or an amorphous form; a compound semiconductor material including at least one of silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and indium antimonide; an alloy semiconductor material including at least one of SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and GaInAsP; any other suitable material; or a combination thereof. In some embodiments, the alloy semiconductor substrate may be a SiGe alloy having a gradient Ge feature, wherein the Si and Ge compositions change from one ratio at one position to another ratio at another position. In another embodiment, the SiGe alloy is formed on a silicon substrate. In some embodiments, the SiGe alloy may be mechanically strained by another material in contact with the SiGe alloy. In addition, the substrate 102 may be a semiconductor on an insulator, such as silicon on an insulator (SOI). In some embodiments, the substrate 102 may include a doped epitaxial layer. In some embodiments, the substrate 102 may have a multilayer structure, or the substrate 102 may include a multilayer compound semiconductor structure. In some embodiments, the substrate 102 is doped with p-type dopants, such as boron (B), other Group III elements, or any combination thereof.

[0019] The high voltage component structure 100 includes a deep well region 110 disposed in a substrate 102. In some embodiments, the deep well region 110 includes a first conductivity type, and the substrate 102 includes the same conductivity type. In some embodiments, the deep well region 110 includes a first conductivity type, and the substrate 102 includes a second conductivity type. The first conductivity type and the second conductivity type are opposite to each other. In some embodiments, the first conductivity type is p-type, and the second conductivity type is n-type. In some embodiments, the n-type dopant includes arsenic (As), phosphorus (P), other Group V elements, or any combination thereof, and the p-type dopant includes boron (B), other Group III elements, or any combination thereof. Although the substrate 102 and the deep well region 110 include the same type of dopant, the doping concentration of the deep well region 110 may be greater than the doping concentration of the substrate 102.

[0020] The doped region 112 is disposed on the deep well region 110. The doped region 112 includes a conductivity type opposite to that of the deep well region 110. In some embodiments, the doped region 112 is a high voltage n-type doped region (HVNDD), the deep well region 110 is a p-type deep well region (DPW), and the substrate 102 is a p-type substrate. In some embodiments, the deep well region 110 and the doped region 112 are formed by an implantation process. That is, the deep well region 110 and the doped region 112 can be implanted together. For example, first, a patterned mask is formed on the substrate 102, and the doped region 112 is exposed. Then, a P-type dopant is implanted into the deep well region 110, and then an n-type dopant is implanted into the doped region 112.

[0021] The high voltage device structure 100 may further include a well region 114 surrounding the deep well region 110 and the doped region 112. In some embodiments, the well region 114 includes the same conductivity type as the deep well region 110. For example, the well region 114 may be a p-type well region (SHP) and the deep well region 110 is a DPW. As described below, the well region 114 and the deep well region 110 are part of a protective structure that electrically isolates a device (e.g., a HVMOS transistor) from an adjacent device (due to a pn junction between the deep well region 110 and the doped region 112). In some embodiments, the doping concentration of the deep well region 110 is substantially greater than the doping concentration of the well region 114. As a result, electrical isolation is improved. In some embodiments, the doping concentration of the deep well region 110 is substantially less than the doping concentration of the well region 114. As a result, the breakdown voltage is improved, thereby improving device performance.

[0022] like Figure 1A , Figure 1B as well as Figure 2 As shown, the high voltage device structure 100 includes a source region 116S and a drain region 116D. In some embodiments, the source region 116S is formed on the well region 114, and the drain region 116D is formed on the doped region 112. Figure 2 As shown. The source region 116S and the drain region 116D may be formed simultaneously in the same implantation process. In some embodiments, the source region 116S and the drain region 116D are n-type and are heavily doped to, for example, about 10 19 / cm 3 Up to about 10 21 / cm 3 The n-type impurity concentration is between 100 and 110, and is referred to as an N+ region. A photoresist (not shown) is formed to define the positions of the source region 116S and the drain region 116D.

[0023] like Figure 1A , Figure 1B as well as Figure 2As shown, the conductive contact 119D is formed on the drain region 116D, and the conductive contact 119S is formed on the source region 116S. The conductive contacts 119S, 119D may include a conductive material, such as TiN, W, Ru, Mo, Co, Cu or other suitable conductive materials. In addition, a silicide layer (not shown) may be formed between the conductive contact 119S and the source region 116S and between the conductive contact 119D and the drain region 116D. The silicide layer may include nickel silicide (NiSi), nickel platinum silicide (NiPtSi), nickel platinum germanium silicide (NiPtGeSi), nickel germanium silicide (NiGeSi), ytterbium silicide (YbSi), platinum silicide (PtSi), iridium silicide (IrSi), erbium silicide (ErSi), cobalt silicide (CoSi), other suitable materials or combinations thereof. As Figure 1A and Figure 1B As shown, three conductive contacts 119S and three conductive contacts 119D are shown. However, the number of conductive contacts 119S, 119D can be any suitable number and is not limited to three.

[0024] like Figure 1A , Figure 1B as well as Figure 2 As shown, pick-up regions 118A and 118B are formed on the surface of the well region 114 by an additional implantation step. In some embodiments, the conductivity type of the pick-up regions 118A and 118B is opposite to the conductivity type of the source region 116S and the drain region 116D. For example, the pick-up regions 118A and 118B are p-type and are heavily doped, for example, at about 10 19 / cm 3 Up to about 10 21 / cm 3 A p-type impurity concentration between 100 and 110 is called a P+ region. A photoresist (not shown) is formed to define the positions of the pickup regions 118A and 118B, and the pickup regions 118A and 118B may be formed simultaneously in the same implantation process.

[0025] In some embodiments, a conductive contact 121 is formed on the pickup region 118A. The conductive contact 121 may include the same material as the conductive contacts 119S, 119D. A silicide layer (not shown) may be formed between the conductive contact 121 and the pickup region 118A. In some embodiments, the pickup region 118B and the source region 116S are in lateral contact with each other. That is, the pickup region 118B and the source region 116S are butted against each other. A single silicide layer may be formed on the pickup region 118B and the source region 116S, and the pickup region 118B and the source region 116S may share the same conductive contact 119S.

[0026] like Figure 2As shown, the high voltage device structure 100 includes one or more isolation regions 120. In some embodiments, the isolation region 120 can be formed by forming trenches in the substrate 102, the well region 114, and the doped region 112, filling the trenches with a dielectric material (e.g., SiO2, high density plasma (HDP) oxide, or other suitable dielectric materials), and performing a planarization process, such as chemical mechanical polishing, to flatten the surface of the filled dielectric material. The resulting isolation region 120 can be a shallow trench isolation (STI) region. Figure 1A and Figure 1B As shown, some isolation regions 120 may be omitted for clarity. In some embodiments, the outer isolation region 120 is in the shape of a closed ring or frame.

[0027] like Figure 2 As shown, the high-voltage component structure 100 also includes a gate structure 130. The gate structure 130 includes a gate electrode layer 134 and a gate dielectric layer 132 between the substrate 102 and the gate electrode layer 134. The gate electrode layer 134 includes a conductive material, such as polysilicon, silicon germanium and / or at least one metal material including elements and compounds, such as Mo, Cu, W, Ti, Ta, TiN, TaN, NiSi, CoSi or other suitable conductive materials known in the art. In some embodiments, the gate electrode layer 134 includes a work function metal layer (not shown), which provides an n-type metal work function or a p-type metal work function for the metal gate. The p-type metal work function material includes, for example, ruthenium, palladium, platinum, cobalt, nickel, conductive metal oxides or other suitable materials. The n-type metal work function material includes materials such as hafnium, zirconium, titanium, tantalum, aluminum, metal carbides (such as hafnium carbide, zirconium carbide, titanium carbide and aluminum carbide), aluminides or other suitable materials.

[0028] The gate dielectric layer 132 may be a single layer or a multilayer structure. In some embodiments, the gate dielectric layer 132 is a multilayer structure including an interface layer and a high-k dielectric layer. The interface layer may include a dielectric material such as silicon oxide, silicon nitride, silicon oxynitride, other dielectric materials or a combination thereof. The high-k dielectric layer may include a high-k dielectric material such as HfO2, HfSiO, HfSiON, HfTaO, HfTiO, HfZrO, other suitable high-k dielectric materials or a combination thereof. In some embodiments, the high-k dielectric material may be further selected from metal oxides, metal nitrides, metal silicates, transition metal oxides, transition metal nitrides, transition metal silicates, metal oxynitrides, metal aluminates and combinations thereof.

[0029] In some embodiments, the gate structure 130 may include a gate spacer 136 disposed on the sidewalls of the gate electrode layer 134 and the gate dielectric layer 132. The gate spacer 136 may be a single layer or a multi-layer structure. In some embodiments, the gate spacer 136 includes a silicon oxide layer and a silicon nitride layer. The formation of the gate spacer 136 may include depositing a blanket dielectric layer and then performing anisotropic etching to remove a horizontal portion of the blanket dielectric layer. The gate electrode layer 134 may be disposed on the well region 114, the doped region 112, and the isolation region 120, as shown in FIG. Figure 2 In some embodiments, the gate spacer 136 may be disposed on the source region 116S.

[0030] like Figure 1A and Figure 1B As shown, the gate spacers 136 are omitted for clarity. One or more conductive contacts 138 are formed on the gate electrode layer 134. The conductive contacts 138 may include the same material as the conductive contacts 119S, 119D. The number of conductive contacts 138 may be any suitable number.

[0031] Gate structure 130, source region 116S, and drain region 116D may form device 140. Device 140 may be a transistor, such as a HVMOS transistor. In some embodiments, a voltage greater than about 10V, such as about 20V or more, may be applied to conductive contact 119D.

[0032] Pickup regions 118A, 118B, well region 114, and deep well region 110 form the aforementioned protection structure 150 to electrically isolate element 140. By forming pickup region 118B to be in lateral contact with source region 116S and electrically connecting pickup region 118B to pickup region 118A, the layout area can be reduced. In other words, pickup region 118B and source region 116S are combined to save layout area. In some embodiments, as Figure 1A As shown, pickup zone 118A may include three sides that partially surround element 140. In some embodiments, pickup zone 118A is disposed on opposite sides of pickup zone 118B.

[0033] Figure 3A-3C FIG. 1 shows a top view of a high voltage component structure 100 according to some embodiments. Figure 3A As shown, the high voltage device structure 100 includes a plurality of devices 140 partially surrounded by a pick-up region 118A of a protection structure 150. Each device 140 includes a pick-up region 118B connected to a source region 116S. Each pick-up region 118B is connected to a source region 116S by a deep well region 110 and a well region 114 ( Figure 2 ) is electrically connected to the pickup region 118A. Figure 3BAs shown, the pick-up region 118A of the protection structure 150 is disposed adjacent to the plurality of components 140. For example, the pick-up region 118A is disposed adjacent to the drain region 116D of each component 140, and the source region 116S of each component 140 is in lateral contact with the pick-up region 118B. Each pick-up region 118B is connected to the deep well region 110 and the well region 114 ( Figure 2 ) is electrically connected to the pickup region 118A.

[0034] like Figure 3C As shown, two components 140 are connected to each other and share the source region 116S and the pickup region 118B. The pickup region 118A completely surrounds the two components 140. Each pickup region 118B is connected to the deep well region 110 and the well region 114 ( Figure 2 ) is electrically connected to the pickup region 118A. FIG. 3A to FIG. 3C The guard structure 150 in the embodiment electrically isolates two or more components 140 from adjacent components. The merged pickup region 118B and source region 116S can save Figure 3A and Figure 3B The array layout area in . Figure 3C The merged pickup region 118B and source region 116S of the two elements 140 shown may save multi-finger area and may enhance electrostatic discharge protection.

[0035] Figure 4A and Figure 4B FIG. 1 shows a top view of a high voltage component structure 100 according to some embodiments. For clarity, Figure 4A and Figure 4B The pickup region 118A is omitted. Figure 4A As shown, the guard structure 150 includes a single continuous pickup region 118B that is laterally in contact with the source region 116S of the element 140 along a first axis (the x-axis). Figure 4B As shown, the protection structure 150 includes a plurality of pickup regions 118B interposed between the plurality of source regions 116S on a second axis (y axis), wherein the second axis is substantially perpendicular to the first axis. Each of the plurality of pickup regions 118B may extend to a sidewall of the gate electrode layer 134. In some embodiments, Figure 4B The pickup region 118B shown in FIG. 1 is disposed on the gate spacer 136 ( Figure 2 The ratio of the pickup region 118B to the source region 116S may be one to one, such as Figure 4B The ratio may range between one to one and one to four. Figure 4A The continuous pickup region 118B shown in FIG. 1 may result in a lower source resistance. However, electrostatic discharge and electrically safe operating areas may be negatively impacted by the continuous pickup region 118B. Figure 4BThe multiple discrete pickup regions 118B shown in FIG. 1 may result in improved electrostatic discharge and electrically safe operating area. However, source resistance is negatively affected by the multiple discrete pickup regions 118B.

[0036] Figure 5-Figure 12 1 shows a cross-sectional side view of a high voltage component structure 100 according to an alternative embodiment. Figure 5 As shown, in some embodiments, the pickup region 118B does not exist and is replaced by the pickup region 164. The pickup region 164 may include the same conductivity type and doping concentration as the pickup region 118B. The pickup region 164 is separated from the source region 116S by a first isolation structure 184a. The first isolation structure 184a will be described in detail below.

[0037] In some embodiments, the high voltage component structure 100 includes a second deep well region 160 disposed below the deep well region 110 and the well region 114. The conductivity type of the second deep well region 160 is opposite to the conductivity type of the deep well region 110 and the well region 114. In some embodiments, the deep well region 160 is n-type, the deep well region 110 is p-type, and the well region is p-type. The second well region 162 is formed in the substrate 102 and on the deep well region 160. The well region 162 includes the same conductivity type as the deep well region 160. In some embodiments, the well region 162 is n-type. The pickup region 166 is formed on the well region 162. The pickup region 166 includes the same conductivity type as the well region 162. In some embodiments, the pickup region 166 is n-type. In some embodiments, the pickup region 166 may be referred to as an N+ region.

[0038] In some embodiments, the high voltage device structure 100 further includes a well region 163 formed in the substrate 102 and a pickup region 168 formed on the well region 163. The well region 163 may have the same conductivity type and doping concentration as the well region 114, and the pickup region 168 may have the same conductivity type and doping concentration as the pickup region 164. In some embodiments, the pickup region 168 may be referred to as a P+ region.

[0039] In some embodiments, the high voltage device structure 100 includes a first protective structure 180 surrounding the device 140. The device 140 may include a source region 116S, a drain region 116D, and a gate structure 130. In some embodiments, the first protective structure 180 includes a pickup region 164, a well region 114 ( Figure 5 Only a portion is shown), deep well area 110 and formed in Figure 5 The pickup area (not shown) on the part of the well area 114 not shown in the figure may be the pickup area 118A ( Figure 2 ). The layout area of ​​the high voltage component structure 100 is larger than Figure 2The layout area of ​​the high-voltage device structure 100 shown in FIG. 1 is because the first isolation structure 184a is formed between the pickup region 164 and the source region 116S. In some embodiments, the high-voltage device structure 100 further includes a second protection structure 182 surrounding the first protection structure 180. The second protection structure 182 includes the pickup region 166, the well region 162 ( Figure 5 Only part is shown in the figure), deep well area 160 ( Figure 5 only part of it is shown) and formed in Figure 5 The pick-up region (not shown) is on the portion of the well region 162 not shown in FIG. Each of the protection structures 180 , 182 includes regions having the same conductivity type.

[0040] like Figure 5 As shown, the pickup region 164 of the protective structure 180 is separated from the pickup region 166 of the protective structure 182 by a second isolation structure 184b. The pickup region 166 of the protective structure 182 is separated from the pickup region 168 by a third isolation structure 184c. Each isolation structure 184a, 184b, 184c includes an isolation region 120 and a conductive layer 176. Each conductive layer 176 may include a conductive material, such as a metal or a metal nitride. By applying a voltage, such as a positive voltage, to the conductive layer 176 of the isolation structures 184a, 184b, 184c, a smooth electric field is generated around the protective structures 180, 182, thereby enhancing the electrical isolation characteristics of the protective structures 180, 182. In addition, the pickup efficiency at the pickup regions 164, 166 is improved. In some embodiments, each isolation region 120 has a thickness T1 ranging from about 20 nm to about 100 nm, and each conductive layer 176 has a thickness T2 ranging from about 200 nm to about 280 nm. Thickness T1 may be about 10% to about 50% of thickness T2. If thickness T1 is less than about 10% of thickness T2, conductive layer 176 and adjacent well regions 114, 162, 163 may not be adequately isolated. On the other hand, if thickness T1 is greater than about 50% of thickness T2, the benefits of having conductive layer 176 may be reduced.

[0041] As described above, the isolation structures 184a, 184b, 184c may be closed loop or frame-shaped. In some embodiments, each conductive layer 176 is also closed loop or frame-shaped. In some embodiments, each isolation structure 184a, 184b, 184c includes a plurality of discrete conductive layers 176 disposed in the corresponding isolation region 120. In some embodiments, each isolation structure 184a, 184b, 184c includes one or more continuous conductive layers 176 disposed in one or more sides of the isolation region 120.

[0042] A plurality of conductive contacts 170, 172, 174 are formed on the pickup regions 164, 166, 168, respectively. A plurality of conductive contacts 178 are formed on corresponding isolation structures 184a, 184b, 184c. The conductive contacts 170, 172, 174, 178 may include the same material as the conductive contact 119S.

[0043] In some embodiments, each isolation structure includes two discrete conductive layers 176+, 176- disposed in a single isolation region 120, such as Figure 6 For example, in the isolation region 120 disposed between a p-type well region (e.g., well region 114) and an n-type well region (e.g., well region 162), the conductive layer 176- is disposed adjacent to the p-type well region, and the conductive layer 176+ is disposed adjacent to the n-type well region, as shown in FIG. Figure 6 During operation, a positive voltage is applied to the conductive layer 176+ and a negative voltage is applied to the conductive layer 176-. In this way, a smooth electric field is generated to help the guard structures 180, 182 to electrically isolate the element 140. Conductive contacts 178+, 178- are formed on the corresponding conductive layers 176+, 176-.

[0044] In some embodiments, the conductive layer 176+ does not exist, and each isolation structure 184a, 184b, 184c includes a conductive layer 176- disposed in the isolation region 120 adjacent to the p-type well region (eg, well region 114, 163), such as Figure 7 As shown. Conductive contact 178+ also does not exist. In some embodiments, conductive layer 176- does not exist, and each isolation structure 184a, 184b, 184c includes a conductive layer 176+ disposed in isolation region 120 adjacent to an n-type well or doped region (e.g., well region 162 and source region 116S), as shown. Figure 8 As shown, the conductive contact 178- does not exist either. That is, the conductive layer 176+ or the conductive layer 176- can be formed asymmetrically in the isolation region 120 with respect to the xz plane.

[0045] As described above, in some embodiments, the isolation region 120 is an STI region. In some embodiments, the isolation region 120 is a DTI region. Fig. 9As shown, the isolation region 120 disposed between the well region 114 and the well region 162 and between the well region 162 and the well region 163 extends to the deep well region 160. Therefore, the isolation structures 184b and 184c each include a conductive layer 176 disposed in the isolation region 120 (or DTI region). In some embodiments, the isolation structure 184a includes a conductive layer 176 disposed in the isolation region 120 (or STI region). In some embodiments, the isolation region 120 of the isolation structure 184b has a thickness T3 ranging from about 50nm to about 150nm, and the thickness of the conductive layer 176 of the isolation structure 184b has a thickness T4 ranging from about 2.5 microns to about 3.3 microns. In some embodiments, the thickness T3 is about 1.5% to about 50% of the thickness T4.

[0046] In some embodiments, each isolation structure includes two discrete conductive layers 176+, 176- disposed in a single isolation region 120, such as Fig.10 For example, in the isolation region 120 disposed between a p-type well region (e.g., well region 114) and an n-type well region (e.g., well region 162), the conductive layer 176- is disposed adjacent to the p-type well region, and the conductive layer 176+ is disposed adjacent to the n-type well region, as shown in FIG. Fig.10 As shown, conductive contacts 178+, 178- are formed on corresponding conductive layers 176+, 176-.

[0047] In some embodiments, the conductive layer 176+ does not exist, and each isolation structure 184a, 184b, 184c includes a conductive layer 176- disposed in the isolation region 120 adjacent to the p-type well region (eg, well region 114, 163), such as Fig.11 . The conductive contact 178+ is also absent. In some embodiments, the conductive layer 176- is absent, and each isolation structure 184a, 184b, 184c includes a conductive layer 176+ disposed in the isolation region 120 adjacent to the n-type well or doped region (e.g., the well region 162 and the source region 116S), as shown in FIG. Fig.12 As shown, the conductive contact 178- does not exist either. That is, the conductive layer 176+ or the conductive layer 176- can be formed asymmetrically in the isolation region 120 with respect to the xz plane.

[0048] In some embodiments, the protection structure 182, the isolation structure 184b, and the well region 162 do not exist, and the substrate 102 is thinned to a thickness T5 of about several microns, such as Fig.13 shown. Fig.13The high voltage component structure 100 shown may be part of a three-dimensional IC (3DIC) package. For a thinned substrate 102, a region 190 of the substrate 102 may be depleted or inverted due to the negative voltage applied to the conductive layer 176 of the isolation structure 184C during operation. The depleted or inverted region 190 helps to electrically isolate the component 140 from adjacent components of the 3DIC package.

[0049] In some embodiments, the conductive layer 176 is not present in the isolation region 120. Fig.14 As shown, substrate 102 is thinned to a few microns to expose the bottom of isolation region 120, which contacts other components of the 3DIC package. The exposed isolation region 120 (which may be a DTI region or an STI region) helps to electrically isolate component 140 from adjacent components of the 3DIC package.

[0050] Figures 15A-15H 2 shows a cross-sectional side view of an isolation structure 200 at various stages of fabrication according to some embodiments. The isolation structure 200 may be Fig.10 or Figure 6 The isolation structures 184a, 184b, 184c are shown. Fig.15A As shown, an opening 202 is formed in a substrate (eg, substrate 102). Next, as Fig. 15B As shown, an oxide layer 204 is formed in the opening 202. The oxide layer 204 may be formed by any suitable process. In some embodiments, the oxide layer 204 is formed by an oxidation process that oxidizes the exposed surface of the substrate 102. The oxide layer 204 may have a thickness ranging from about 20 nm to about 40 nm. Fig. 15C As shown, a dielectric layer 206 is formed on the oxide layer 204. The dielectric layer 206 can be formed by any suitable process. In some embodiments, the dielectric layer 206 is formed by ALD. The dielectric layer 206 may include any suitable dielectric material. In some embodiments, the dielectric layer 206 includes silicon nitride. The dielectric layer 206 has a thickness ranging from about 25 nm to about 35 nm, and the dielectric layer 206 can act as a CMP stop layer during a subsequent conductor CMP process. In some embodiments, the k value of the dielectric layer 206 is substantially higher than the k value of the oxide layer 204.

[0051] like Fig.15D As shown, a conductive material 208 is formed on the dielectric layer 206 to fill the opening 202. The conductive material 208 may include the same material as the conductive layer 176. The conductive material 208 may be formed by any suitable process, such as PVD or ECP. Fig.15EAs shown, a planarization process, such as a CMP process, is performed to remove a portion of the conductive material 208 formed on the dielectric layer 206 outside the opening 202. As described above, the dielectric layer 206 can be used as a CMP stop layer for the planarization process.

[0052] like Fig.15F As shown, conductive material 208 is patterned. In some embodiments, a central portion of conductive material 208 is removed to form two conductive layers 208+, 208-, which may be conductive layers 176+, 176-. In some embodiments, a side portion of conductive material 208 is removed to form one of conductive layers 208+, 208-. The patterning of conductive material 208 forms an opening 211 separating conductive layers 208+, 208-. Next, as shown in FIG. Figure 15G As shown, a dielectric material 210 is formed in the opening 211 and on the substrate. The dielectric material 210 may include any suitable dielectric material. In some embodiments, the dielectric material 210 includes the same material as the isolation region 120. In some embodiments, the dielectric material 210 includes an oxide and is formed by ALD. By using ALD, the gap filling characteristics of the dielectric material 210 are improved. Next, as shown in FIG. Fig.15H As shown, a planarization process is performed to remove a portion of the dielectric material 210 formed outside the opening 211. The planarization process may be a CMP process. In some embodiments, a portion of the dielectric layer 206 formed outside the opening 202 may also be removed by the planarization process.

[0053] The present disclosure provides a high-voltage component structure 100 and a method for forming the same. In some embodiments, the high-voltage component structure 100 includes a protective structure 150 having a pickup region 118B docked with a source region 116S. In some embodiments, the high-voltage component structure 100 includes one or more isolation structures 184a-184c. Some embodiments can achieve advantages. For example, a protective structure 150 having a pickup region 118B docked with a source region 116S can result in a smaller protective structure, thereby saving layout area. The isolation structures 184a-184c include one or more conductive layers 176 formed in the isolation region 120 to improve the pickup efficiency and electrical isolation of the component 140.

[0054] One embodiment is a high-voltage component structure. The structure includes a deep well region of the first conductivity type disposed in a substrate, a doped region disposed on the deep well region, a well region of the first conductivity type surrounding the deep well region and the doped region, a source region disposed on the well region, a drain region disposed on the doped region, and a first pickup region of the first conductivity type disposed on the well region. The first pickup region laterally contacts the source region, and the first pickup region, the well region, and the deep well region are electrically connected.

[0055] Another embodiment is a high-voltage element structure. The structure includes a high-voltage element disposed on a substrate, the high-voltage element including a source region, a drain region, and a gate structure. The structure also includes a first protective structure surrounding the source region and the drain region of the high-voltage element, the first protective structure including a first pickup region, a first well region, and a first deep well region. The structure also includes a first isolation structure disposed between the source region of the high-voltage element and the first pickup region of the first protective structure, and the first isolation structure includes a first conductive layer disposed in the first isolation region.

[0056] Another embodiment is a method. The method includes forming a first opening in a substrate, forming an oxide layer in the first opening, depositing a dielectric layer on the oxide layer in the first opening, depositing a conductive material on the dielectric layer to fill the first opening, patterning the conductive material to form a second opening separating the two conductive layers, and depositing a dielectric material in the second opening.

[0057] The foregoing summarizes the features of several embodiments so that those skilled in the art can better understand the various aspects of the present disclosure. Those skilled in the art should understand that they can easily use the present disclosure as a basis for designing or modifying other processes and structures for performing the same purpose and / or achieving the same advantages of the embodiments described herein. Those skilled in the art should also appreciate that such equivalent structures do not depart from the spirit and scope of the present invention, and various modifications, substitutions, and changes can be made to this document without departing from the spirit and scope of the present invention.

Claims

1. A high voltage component structure, characterized in that: include: A deep well region of a first conductivity type is disposed in the substrate; The doping region is arranged on the deep well region; The well region of the first conductivity type surrounds the deep well region and the doped region; The source region is arranged on the well region; The drain region is disposed on the doped region; and The first pickup region of the first conductivity type is disposed on the well region, wherein the first pickup region laterally contacts the source region, and the first pickup region, the well region and the deep well region are electrically connected.

2. The high voltage component structure according to claim 1, characterized in that: The doped region includes a second conductivity type opposite to the first conductivity type.

3. The high voltage component structure according to claim 2, characterized in that: The source region includes the second conductivity type.

4. The high voltage component structure according to claim 1, characterized in that: The doping concentration of the deep well region is substantially greater than the doping concentration of the well region.

5. A high voltage component structure, characterized in that: include: The high voltage component is arranged on the substrate, and the high voltage component includes a source region, a drain region and a gate structure; A first protection structure surrounds the source region and the drain region of the high voltage element, wherein the first protection structure includes a first pickup region, a first well region, and a first deep well region; as well as A first isolation structure is disposed between the source region of the high-voltage element and the first pickup region of the first protection structure, wherein the first isolation structure includes a first conductive layer disposed in the first isolation region.

6. The high voltage component structure according to claim 5, characterized in that: A second protective structure is also included that surrounds the first protective structure, wherein the second protective structure includes a second pickup area, a second well area, and a second deep well area.

7. The high voltage component structure according to claim 6, characterized in that: The first guard structure includes a first conductivity type, and the second guard structure includes a second conductivity type opposite to the first conductivity type.

8. The high voltage component structure according to claim 6, characterized in that: Also included is a second isolation structure disposed between the first pickup region of the first guard structure and the second pickup region of the second guard structure, wherein the second isolation structure includes a second conductive layer disposed in the second isolation region.

9. The high voltage component structure according to claim 8, characterized in that: The second isolation structure further includes a third conductive layer disposed in a second isolation region, wherein the second conductive layer is adjacent to the first pickup region of the first guard structure, and the third conductive layer is adjacent to the second pickup region of the second guard structure.

10. The high voltage component structure according to claim 5, characterized in that: The first isolation structure further includes a fourth conductive layer disposed in the first isolation region, wherein the first conductive layer is adjacent to the first pickup region of the first protection structure, and the fourth conductive layer is adjacent to the source region of the high-voltage element.

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