Semiconductor device

Abstract

A semiconductor device is mainly characterized in that a first circuit layer, a bottom wiring layer and a plurality of conductive columns are formed on a bearing structure, the plurality of conductive columns are electrically connected with the first circuit layer and the bottom wiring layer, and then a coating layer for coating the plurality of conductive columns is formed on the first circuit layer and the bottom wiring layer, the coating layer comprises a magnetic material, a top wiring layer and a second circuit layer are formed on the coating layer, the plurality of conductive columns are electrically connected with the top wiring layer and the second circuit layer, and the bottom wiring layer, the plurality of conductive columns and the top wiring layer form a conductor structure. And an inductor module is formed by the conductor structure and the coating layer enclosed by the conductor structure.

Description

Technical Field

[0001] The present application relates to a semiconductor device, and more particularly to a semiconductor device integrating an inductor module. Background Art

[0002] With the rapid development of portable electronic products in recent years, the development of various related products is also moving towards high density, high performance, light, thin, short and small trends. To this end, the industry has developed various integrated multi-functional packaging forms in order to meet the requirements of light, thin, short and high density of electronic products.

[0003] For example, wireless communication technology has been widely used in various consumer electronic products to receive or send various wireless signals. Among them, the patch antenna is widely used in the wireless communication modules of electronic products such as cell phones and personal digital assistants (PDAs) due to its small size, light weight and easy manufacturing. At the same time, in communication or high-frequency semiconductor devices, it is often necessary to electrically connect most radio frequency passive components such as resistors, inductors, capacitors and oscillators to the packaged semiconductor chip so that the semiconductor chip has specific current characteristics or sends signals.

[0004] Furthermore, with the evolution of technology, the demand for electronic products is moving towards heterogeneous integration, and for this reason, 3D multi-chip packaging modules are gradually emerging. Figure 1 The semiconductor package 1 shown in the figure combines an inductor device 11 on a semiconductor chip 10 , and the semiconductor chip 10 and the inductor device 11 are electrically connected via a circuit structure 12 .

[0005] However, the conventional inductor device 11 occupies too much surface area of ​​the semiconductor chip 10 , making it difficult to reduce the volume of the semiconductor package 1 . This not only fails to meet the requirements of a thin and compact semiconductor package, but also lacks electromagnetic shielding protection.

[0006] Therefore, how to overcome the various problems of the above-mentioned prior art has become a topic that needs to be solved urgently. Utility Model Content

[0007] In view of the various deficiencies of the above-mentioned prior art, the present application provides a semiconductor device, comprising: a supporting structure; a first circuit layer, disposed on the supporting structure; a bottom wiring layer, disposed on the supporting structure; a plurality of conductive pillars, disposed on the supporting structure and electrically connected to the first circuit layer and the bottom wiring layer; a covering layer, disposed on the first circuit layer and the bottom wiring layer and covering the plurality of conductive pillars, wherein the covering layer contains a magnetic material; a top wiring layer, disposed on the covering layer; and a second circuit layer, disposed on the covering layer, and making the plurality of conductive pillars electrically connected to the top wiring layer and the second circuit layer; wherein the bottom wiring layer, the plurality of conductive pillars and the top wiring layer constitute a conductor structure, and the conductor structure and the covering layer surrounded by it constitute an inductor module.

[0008] The present application also provides a method for manufacturing a semiconductor device, including: providing a supporting structure; forming a first circuit layer, a bottom wiring layer and a plurality of conductive pillars on the supporting structure, and electrically connecting the plurality of conductive pillars to the first circuit layer and the bottom wiring layer; forming a coating layer covering the plurality of conductive pillars on the first circuit layer and the bottom wiring layer, wherein the coating layer contains a magnetic material; and forming a top wiring layer and a second circuit layer on the coating layer, and electrically connecting the plurality of conductive pillars to the top wiring layer and the second circuit layer; wherein the bottom wiring layer, the plurality of conductive pillars and the top wiring layer constitute a conductor structure, and the conductor structure and the coating layer enclosed by it constitute an inductor module.

[0009] In the aforementioned semiconductor device and its manufacturing method, the first circuit layer is electrically connected to the supporting structure.

[0010] In the aforementioned semiconductor device and the manufacturing method thereof, the first circuit layer, the bottom wiring layer, the top wiring layer and the second circuit layer are redistribution wiring layers (RDL).

[0011] In the aforementioned semiconductor device and its manufacturing method, the first circuit layer includes a first insulator and a plurality of first conductive circuits combined with the first insulator, the bottom wiring layer includes a plurality of bottom wirings, the top wiring layer includes a plurality of top wirings, and the second circuit layer includes a second insulator and a plurality of second conductive circuits combined with the second insulator.

[0012] In the aforementioned semiconductor device and its manufacturing method, each of the conductive pillars has a first end and a second end relative to each other, the first end can be selectively electrically connected to the multiple bottom-layer circuits and / or the multiple first conductive circuits, and the second end of the conductive pillar can be selectively electrically connected to the multiple top-layer circuits and / or the multiple second conductive circuits.

[0013] In the aforementioned semiconductor device and its manufacturing method, the cladding layer has a first surface and a second surface opposite to each other, so that the cladding layer is disposed on the first circuit layer and the bottom wiring layer with its first surface, and the plurality of conductive pillars are exposed on the second surface of the cladding layer.

[0014] As can be seen from the above, the semiconductor device and its manufacturing method of the present application mainly form a three-dimensional coil-type inductor through a top wiring layer, multiple conductive pillars, a bottom wiring layer and a coating layer with a magnetic material to increase magnetic flux and have a shielding effect. At the same time, the three-dimensional coil-type inductor occupies a small surface area of ​​the bearing structure, and can be reduced in size by changing the RDL layout according to needs, which is conducive to meeting the needs of miniaturization. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a cross-sectional schematic diagram of a conventional semiconductor package.

[0016] FIG. 2A to FIG. 2D It is a cross-sectional schematic diagram of a method for manufacturing a semiconductor device of the present application.

[0017] Figure 3 It is a top view schematic diagram of the inductor module of the semiconductor device of the present application.

[0018] Main component symbols

[0019] 1 Semiconductor Package

[0020] 10. Semiconductor Chip

[0021] 11 Inductor

[0022] 12 Line structure

[0023] 2 Semiconductor devices

[0024] 2a Conductor structure

[0025] 2b Inductor module

[0026] 20 Load-bearing structure

[0027] 21 First circuit layer

[0028] 210 First Insulator

[0029] 211 First Conductive Circuit

[0030] 22 Bottom wiring layer

[0031] 221 bottom line

[0032] 23 Conductive column

[0033] 231 First End

[0034] 232 Second end

[0035] 24 Coating

[0036] 241 First Surface

[0037] 242 Second Surface

[0038] 25 Top wiring layer

[0039] 251 Top Line

[0040] 26 Second circuit layer

[0041] 260 Second Insulator

[0042] 261 A second conductive circuit. DETAILED DESCRIPTION

[0043] The following describes the implementation methods of the present application through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification.

[0044] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings attached to this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of this application, so they have no substantial technical significance. Any modification of the structure, change in the proportion relationship, or adjustment of the size, without affecting the effects and purposes that can be achieved by this application, should still fall within the scope of the technical contents disclosed in this application. At the same time, the terms such as "upper", "first", "second", "third", and "one" cited in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of this application. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of this application without substantially changing the technical contents.

[0045] FIG. 2A to FIG. 2D It is a cross-sectional schematic diagram of a method for manufacturing the semiconductor device 2 of the present application.

[0046] like Figure 2A As shown, a supporting structure 20 is provided, and at least one first circuit layer 21 is formed on the supporting structure 20, wherein the first circuit layer 21 includes a first insulator 210 and a plurality of first conductive circuits 211 combined with the first insulator 210. In this embodiment, only one layer of the first circuit layer 21 is illustrated, and in other embodiments, a plurality of first circuit layers 21 may be formed.

[0047] The aforementioned supporting structure 20 may be a wafer, a chip, a substrate, an interposer or a general carrier, etc., and the first circuit layer 21 may be selectively electrically connected to the supporting structure 20. In addition, the first circuit layer 21 may be a redistribution layer (RDL), the first insulator 210 may be, for example, polybenzoxazole (PBO), polyimide (PI), prepreg (PP) or other dielectric materials, and the material of the first conductive line 211 may be, for example, metal copper.

[0048] like Figure 2B As shown, a bottom wiring layer 22 and a plurality of conductive pillars 23 are formed on the supporting structure 20 (the first circuit layer 21), wherein the bottom wiring layer 22 includes a plurality of bottom circuits 221, and the plurality of conductive pillars 23 are electrically connected to the plurality of bottom circuits 221 of the bottom wiring layer 22 and the plurality of first conductive circuits 211 of the first circuit layer 21.

[0049] In this embodiment, the bottom wiring layer 22 can be manufactured by an RDL process, and each of the conductive pillars 23 has a first end 231 and a second end 232 relative to each other, wherein the first end 231 can selectively electrically connect the plurality of bottom lines 221 and / or the plurality of first conductive lines 211 .

[0050] In other embodiments, since the first circuit layer 21 and the bottom wiring layer 22 can be manufactured by an RDL process, the first circuit layer 21 and the bottom wiring layer 22 can be manufactured in the same layer at the same time.

[0051] like Figure 2C As shown, a covering layer 24 covering the plurality of conductive pillars 23 is formed on the first wiring layer 21 and the bottom wiring layer 22 .

[0052] In this embodiment, the material of the coating layer 24 is polyimide (PI), dry film, epoxy or molding compound. For example, the coating layer 24 can be formed on the supporting structure 20 by liquid compound, injection, lamination or compression molding.

[0053] The coating layer 24 includes a magnetic material (such as magnetic powder) to improve the magnetic permeability. In one embodiment, ferrite can be ground into powder, mixed into epoxy resin and stirred to form the coating layer 24.

[0054] In addition, the covering layer 24 has a first surface 241 and a second surface 242 relative to each other, so that the covering layer 24 is arranged on the first wiring layer 21 and the bottom wiring layer 22 with its first surface 241, and the second end portions 232 of the plurality of conductive pillars 23 can be exposed to the second surface 242 of the covering layer 24 through, for example, a thinning process.

[0055] like Figure 2D As shown in the figure, a top wiring layer 25 and at least one second circuit layer 26 are formed on the second surface 242 of the covering layer 24, wherein the top wiring layer 25 includes a plurality of top circuits 251, and the second circuit layer 26 includes a second insulator 260 and a plurality of second conductive circuits 261 combined with the second insulator 260, and the second end 232 of the conductive column 23 can selectively electrically connect the plurality of top circuits 251 of the top wiring layer 25 and / or the plurality of second conductive circuits 261 of the second circuit layer 26, and the top wiring layer 25 and the second circuit layer 26 can be manufactured by an RDL process.

[0056] In addition, since the second circuit layer 26 and the top wiring layer 25 can be manufactured through an RDL process, the second circuit layer 26 and the top wiring layer 25 can be manufactured in the same layer at the same time.

[0057] In the present embodiment, a conductor structure 2a is constructed by a top wiring layer 25 including a plurality of top wiring lines 251, a plurality of conductive pillars 23, and a bottom wiring layer 22 including a plurality of bottom wiring lines 221. Then, an inductor module 2b is formed by a coating layer 24 including a magnetic material surrounded by the conductor structure 2a, thereby obtaining the semiconductor device 2 of the present application.

[0058] Please also refer to Figure 3, is a partial top view schematic diagram of the inductor module 2b of the semiconductor device 2 of the present application. As shown in the figure, the present application utilizes a top wiring layer 25 including a plurality of top wirings 251, a plurality of conductive pillars 23, and a bottom wiring layer 22 including a plurality of bottom wirings 221 to construct a conductor structure 2a, wherein two ends of a top wiring 251 are respectively connected to the second ends 232 of the two conductive pillars 23, and one end of a bottom wiring 221 is connected to the first end 231 of one of the two conductive pillars 23 and the first end 231 of another conductive pillar 23, and a plurality of the conductive pillars 23 are continuously connected in this manner, thereby forming a conductor structure 2a in the form of a loop coil, and through the coating layer 24 including a magnetic material surrounded by the conductor structure 2a, the conductor structure 2a and the coating layer 24 surrounded by it generate magnetic flux to form the inductor module 2b. Accordingly, the present application adds a material with high magnetic permeability through the coating layer 24 to enhance the magnetic flux generated by the conductor structure, thereby facilitating the improvement of the inductance value.

[0059] Therefore, the present application mainly adds high permeability materials to the coating layer 24, and makes the conductor structure 2a composed of the top wiring layer 25 including multiple top wiring lines 251, multiple conductive pillars 23 and the bottom wiring layer 22 including multiple bottom wiring lines 221 surround the coating layer 24 to generate magnetic flux, thereby forming a semiconductor device 2 with an inductor module 2b. Accordingly, the present application can use RDL line distribution and magnetic materials to make a quasi-inductor coil loop (inductor module) to improve electrical performance, while making the coating layer 24 have magnetic properties, and multiple conductive pillars 23 connect the top wiring layer 25 and the bottom wiring layer 22, thereby making the inductor module 2b shortened in size and not limited by space while having a shielding effect.

[0060] The present application further provides a semiconductor device 2 , comprising a supporting structure 20 , a first circuit layer 21 , a bottom wiring layer 22 , a plurality of conductive pillars 23 , a cladding layer 24 , a top wiring layer 25 and a second circuit layer 26 .

[0061] The first circuit layer 21 is disposed on the supporting structure 20 and can be selectively electrically connected to the supporting structure 20 .

[0062] The bottom wiring layer 22 and a plurality of conductive pillars 23 are disposed on the supporting structure 20 , and the plurality of conductive pillars 23 are electrically connected to the bottom wiring layer 22 and the first circuit layer 21 .

[0063] The covering layer 24 is disposed on the first wiring layer 21 and the bottom wiring layer 22, and covers the plurality of conductive pillars 23. The covering layer 24 includes a magnetic material.

[0064] The top wiring layer 25 and the second circuit layer 26 are disposed on the cladding layer 24 , and the plurality of conductive pillars 23 are electrically connected to the top wiring layer 25 and the second circuit layer 26 .

[0065] The top wiring layer 25 , the plurality of conductive pillars 23 and the bottom wiring 221 constitute a conductor structure 2 a , and the conductor structure 2 a is surrounded by a coating layer 24 containing a magnetic material to form an inductor module 2 b .

[0066] In summary, the semiconductor device of the present application mainly forms a three-dimensional coil-type inductor through a top wiring layer, a plurality of conductive pillars, a bottom wiring layer and a coating layer with a magnetic material to increase magnetic flux and provide a shielding effect. At the same time, the three-dimensional coil-type inductor occupies little surface area of ​​the bearing structure, and can be reduced in size by changing the RDL layout according to needs, which is conducive to meeting the needs of miniaturization.

[0067] The above embodiments are only used to illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art may modify the above embodiments without violating the spirit and scope of the present application. Therefore, the scope of protection of the present application should be as listed in the claims.

Claims

1. A semiconductor device, characterized in that: include: load-bearing structure; A first circuit layer is provided on the supporting structure; A bottom wiring layer is provided on the bearing structure; A plurality of conductive pillars are disposed on the supporting structure and electrically connected to the first wiring layer and the bottom wiring layer; A coating layer, disposed on the first wiring layer and the bottom wiring layer and covering the plurality of conductive pillars, wherein the coating layer includes a magnetic material; A top wiring layer is disposed on the cladding layer; and A second circuit layer is disposed on the cladding layer, and the plurality of conductive posts are electrically connected to the top wiring layer and the second circuit layer; The bottom wiring layer, the plurality of conductive pillars and the top wiring layer form a conductor structure, and the conductor structure and the cladding layer surrounded by it form an inductor module.

2. The semiconductor device according to claim 1, wherein The first circuit layer is electrically connected to the supporting structure.

3. The semiconductor device according to claim 1, wherein: The first circuit layer, the bottom wiring layer, the top wiring layer and the second circuit layer are redistribution circuit layers.

4. The semiconductor device according to claim 1, wherein: The first circuit layer includes a first insulator and a plurality of first conductive circuits combined with the first insulator, the bottom wiring layer includes a plurality of bottom wirings, the top wiring layer includes a plurality of top wirings, and the second circuit layer includes a second insulator and a plurality of second conductive circuits combined with the second insulator.

5. The semiconductor device according to claim 4, wherein: Each of the conductive pillars has a first end and a second end opposite to each other. The first end can be selectively electrically connected to the multiple bottom-layer circuits and / or the multiple first conductive circuits, and the second end of the conductive pillar can be selectively electrically connected to the multiple top-layer circuits and / or the multiple second conductive circuits.

6. The semiconductor device according to claim 1, wherein: The cladding layer has a first surface and a second surface opposite to each other, so that the cladding layer is arranged on the first circuit layer and the bottom wiring layer with its first surface, and the plurality of conductive pillars are exposed from the second surface of the cladding layer.

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