A low stray inductance packaging structure for an IGBT module

Abstract

The purpose of the utility model is to provide a low stray inductance packaging structure of an IGBT module, and to arrange chip positions based on a three-phase three-level NPC inverter topology diagram so that a zero-level commutation circuit used for commutation is parallel to the flow direction of the conduction current, or is distributed on both sides of the same DBC, or is distributed on different DBCs; during actual operation, the interaction between the two currents is greatly reduced, thereby reducing the stray inductance of the entire module during operation.

Description

Technical Field

[0001] The utility model relates to the technical field of IGBT, in particular to a packaging structure with low stray inductance of an IGBT module. Background Art

[0002] The IGBT module packaging field belongs to the microelectronics industry, in which IGBT (insulated gate bipolar transistor) is a composite power device with voltage-type control, large input impedance, low driving power, simple control circuit, small switching loss, fast on-off speed, high operating frequency, large component capacity, etc. An IGBT product includes an insulated copper clad laminate (DBC), an IGBT chip, a freewheeling diode chip (FRD), ultra-pure aluminum wire, etc. It is designed through the layout of the DBC and the unique performance of the chip, and is connected together through reflow sintering and aluminum wire bonding, supplemented by a protective shell (fixed to the DBC) and filled with silicone to finally form a complete IGBT module.

[0003] With the continuous advancement of carbon reduction policies and the instability of wind and solar power, there is a huge demand for energy storage. Among them, electrochemical energy storage accounts for a small proportion of the energy storage market but is increasing rapidly. In 2020, the global new chemical energy storage installed capacity reached 4.68GW, an increase of 60%, and the domestic new capacity reached 1.56GW, an increase of 144%. It is estimated that the cumulative scale of electrochemical energy storage in my country will reach 35-56GW in 2025. Energy storage inverters are the direct supporting products necessary for electrochemical energy storage. The core component of the inverter, NPC1 3-level IGBT module, has a complex circuit that introduces relatively strong stray inductance in the chip, which has a very large impact on the use of IGBT modules. Therefore, the problem of strong stray inductance of the existing NPC1 3-level IGBT module needs to be solved urgently. Utility Model Content

[0004] Based on this, the purpose of the utility model is to provide a low stray inductance packaging structure of an IGBT module; the chip positions are arranged based on the topological diagram, so that the zero-level commutation circuit used for commutation is parallel to the flow direction of the conduction current, or distributed on both sides of the same DBC, or distributed on different DBCs, and the interaction between the two currents is greatly reduced, thereby reducing the stray inductance of the entire module during operation. Specifically, the packaging structure includes:

[0005] A bottom plate, a left DBC, a right DBC, a first IGBT chip, a second IGBT chip, a third IGBT chip, a fourth IGBT chip, a left diode and a right diode; each IGBT chip has an FRD chip reversely connected between its collector and emitter;

[0006] The left DBC is divided into a first chip placement area, a second chip placement area, a first control terminal, a second control terminal and a third control terminal; the left DBC is divided into a third chip placement area, a fourth chip placement area, a fourth control terminal, a fifth control terminal and a sixth control terminal;

[0007] The second chip placement area is arranged between the first chip placement area and the first control terminal and the second control terminal, and the first control terminal and the second control terminal are arranged on the same side of the left-path DBC; the first IGBT chip is arranged in the first chip placement area and the emitter is close to the second chip placement area, and the second IGBT chip is arranged in the second chip placement area and the emitter is close to the second control terminal; the left-path diode is arranged in the second chip placement area and is bonded to the first control terminal; the third control terminal is adjacent to the first control terminal;

[0008] The fourth chip placement area is arranged between the third chip placement area and the fourth control terminal and the sixth control terminal, and the fourth control terminal and the fifth control terminal are arranged on the same side of the right DBC; the third IGBT chip is arranged in the third chip placement area and the emitter is close to the fourth chip placement area, and the fourth IGBT chip is arranged in the fourth chip placement area and the emitter is close to the sixth control terminal; the right-path diode is arranged at the fourth control terminal and is bonded to the fourth chip placement area; the sixth control terminal is adjacent to the fourth control terminal.

[0009] Furthermore, a thermistor is provided on the third chip placement area for detecting the temperature in the third chip placement area.

[0010] Furthermore, the left DBC and the right DBC are respectively arranged on two sides of the bottom plate.

[0011] Furthermore, a first detection port is provided at a common end of the first IGBT chip of the left-path DBC, the left-path diode and the second IGBT chip.

[0012] Furthermore, a second detection port is provided at the common end of the third IGBT chip of the right-path DBC, the right-path diode and the second IGBT chip.

[0013] Furthermore, the first IGBT chip, the second IGBT chip, the third IGBT chip and the fourth IGBT chip are each provided in plurality, and the plurality of IGBT chips in each group are connected in parallel.

[0014] By connecting multiple IGBT chips in parallel, the power of the module can be increased, making it more widely applicable.

[0015] Furthermore, the chips of the IGBT module are connected by aluminum wire bonding.

[0016] In summary, the low stray inductance packaging structure of the IGBT module provided by the utility model, through the position setting of the IGBT chip and the current limiting tube, makes the zero-level commutation circuit used for commutation and the flow direction of the conduction current parallel to each other under different control signals, or distributed on both sides of the same DBC, or distributed on different DBCs, so that the interaction between the two currents is greatly reduced, thereby reducing the stray inductance of the entire module during operation, improving the reliability of the IGBT module, and setting two detection ports to realize rapid troubleshooting of the fault in case of a fault, thereby improving the troubleshooting efficiency and accuracy.

[0017] In order to better understand and implement the present invention, the present invention is described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a topology diagram of an exemplary three-phase three-level NPC inverter;

[0019] Figure 2 A diagram showing a low stray inductance packaging structure of an exemplary IGBT module provided by the utility model;

[0020] Figure 3 for Figure 1 The topology diagram shown is a schematic diagram of the conduction current flow direction and a schematic diagram of the zero-level commutation path under different output currents and output voltages at point P;

[0021] Figure 4 A topological diagram of another exemplary three-phase three-level NPC inverter provided by the utility model;

[0022] Figure 5 This is a structural diagram of an exemplary IGBT module provided by the utility model.

[0023] The technical solution of the present utility model will be clearly and completely described below in conjunction with the drawings of the embodiments of the present application.

[0024] 1: bottom plate; 2: left DBC; 3: right DBC; 4: first IGBT chip; 5: second IGBT chip; 6: third IGBT chip; 7: fourth IGBT chip; 21: first chip placement area; 22: second chip placement area; 31: third chip placement area; 32: fourth chip placement area; 33: thermistor. DETAILED DESCRIPTION

[0025] The IGBT chip includes three ports: Emitter, Collector and Gate. The gate is a switch port that controls the on and off of the IGBT. The current flows from the collector of the IGBT to the emitter of the IGBT. Usually, an FRD (Fast Recovery Diode) is reversely connected between the collector and emitter of the IGBT to protect the IGBT chip. The IGBT chip is widely used in three-level topologies, especially neutral point clamped (NPC) three-level inverters. The three-level inverter is a multi-level inverter topology that is widely used in the field of high-voltage and high-power AC motor frequency conversion speed regulation. This topology is formed by adding a pair of clamping diodes to the neutral point on the basis of two power electronic switching devices connected in series to form a three-phase three-level NPC inverter topology. The three-level topology is a multi-level inverter topology with better effects. It realizes multi-level output voltage through two full-bridge units working alternately. Compared with the traditional two-level inverter, the three-level inverter has higher inverter output waveform quality and lower switching loss. However, due to the more complex structure and multi-branch current, the three-level inverter will introduce higher stray inductance.

[0026] The utility model designs the packaging structure of the IGBT module and the position of the IGBT chip in the three-level inverter, so that the current flows of each bridge arm in the current bridge do not cross or overlap, and the currents between different bridge arms do not interfere with each other, thereby reducing the overall stray inductance of the IGBT module, reducing the loss of the IGBT module and improving the reliability of the IGBT module.

[0027] See also Figure 1 , 2 The utility model provides a low stray inductance packaging structure of an IGBT module, comprising a base plate 1, a left-path DBC2, a right-path DBC3, a first IGBT chip 4, a second IGBT chip 5, a third IGBT chip 6, a fourth IGBT chip 7, a left-path diode D5 and a right-path diode D6; each IGBT chip has an FRD chip reversely connected between its collector and emitter;

[0028] The left DBC2 and the right DBC3 are respectively arranged on the bottom plate 1, the left DBC2 is divided into a first chip placement area 21, a second chip placement area 22, a first control terminal, a second control terminal and a third control terminal; the left DBC2 is divided into a third chip placement area 31, a fourth chip placement area 32, a fourth control terminal, a fifth control terminal and a sixth control terminal;

[0029] The second chip placement area 22 is arranged between the first chip placement area 21 and the first control terminal and the second control terminal, and the first control terminal and the second control terminal are arranged on the same side of the left-side DBC2; the first IGBT chip 4 is arranged in the first chip placement area 21 and the emitter is close to the second chip placement area 22, and the second IGBT chip 5 is arranged in the second chip placement area 22 and the emitter is close to the second control terminal; the left-side diode is arranged in the second chip placement area 22 and is bonded to the copper-clad ceramic substrate where the first control terminal is located by aluminum wire; the third control terminal is adjacent to the first control terminal;

[0030] The fourth chip placement area 32 is arranged between the third chip placement area 31 and the fourth control terminal and the sixth control terminal. The fourth control terminal and the fifth control terminal are arranged on the same side of the right-side DBC3. The third IGBT chip 6 is arranged in the third chip placement area 31 and the emitter is close to the fourth chip placement area 32. The fourth IGBT chip 7 is arranged in the fourth chip placement area 32 and the emitter is close to the sixth control terminal. The right-side diode is arranged at the fourth control terminal and is connected to the fourth chip placement area 32 by aluminum wire bonding. The sixth control terminal is adjacent to the fourth control terminal. Optional

[0031] After the above settings, each area is connected to the chip by aluminum wire bonding. Figure 1 The circuit topology diagram shown in the figure is connected. At this time, there will be different conduction current paths and zero-level commutation paths under different output voltages. Please refer to Figure 3 , Figure 3 It is a schematic diagram of the conduction current flow direction and the zero-level commutation path under different output current and output voltage conditions at point P.

[0032] See also Figure 3 .1, Uout>0, Iout>0, at this time, the first IGBT chip 4 and the second IGBT chip 5 are all turned on, the current flows from N to the first IGBT chip 4 through D5 and then outputs from point P; and DC+ flows through D5 to the first IGBT chip 4 and then outputs from point P, the third IGBT chip 6 and the fourth IGBT chip 7 are turned off at this time; at this time, the combination Figure 3 In the left path DBC2, the current flow from N to D5 to the second IGBT chip 5 and the current flow from DC+ to the first IGBT chip 4 and then to the second IGBT chip 5 are distributed on both sides of the second IGBT chip 5, and the currents of the two do not interfere with each other, thereby reducing the stray inductance of the left path DBC2.

[0033] See also Figure 3.2, Uout<0, Iout<0, at this time, the third IGBT chip 6 and the fourth IGBT chip 7 are all turned on, and the current flows from P through the third IGBT chip 6 and flows into the N point and DC- respectively; the first IGBT chip 4 and the second IGBT chip 5 are turned off at this time. Figure 3 In the right path DBC3, the current flow from P to the third IGBT chip 6 and then through D6 to N is parallel to the current flow from P to the third IGBT chip 6 and then through the fourth IGBT chip 7 to DC-. The currents of the two do not interfere with each other, thus also reducing the stray inductance of the left path DBC2.

[0034] See also Figure 3 .3, Uout>0, Iout<0, at this time, except for the third IGBT chip 6, all other IGBT chips are turned off, the conduction current flows to point N through the third IGBT chip 6, and the zero-level commutation current flows to DC+ through the freewheeling diodes D2 and D1; at this time, combined Figure 2 After analysis, it is found that the two currents flow in different DBCs, the electromagnetic interference between them is smaller and the stray inductance is lower.

[0035] See also Figure 3 .4, Uout>0, Iout<0, at this time, except for the second IGBT chip 5, all other IGBT chips are turned off, the conduction current flows through D5 and then through the second IGBT chip 5 to point P, and the zero-level commutation current flows from DC- through the freewheeling diodes D4 and D3 to point P. At this time, combined Figure 2 , the two currents flow in different DBCs respectively, the electromagnetic interference between them is smaller, and the stray inductance is lower.

[0036] Preferably, a thermistor 33 is also provided on the third chip placement area 31 for detecting the temperature in the third chip placement area 31. Energy consumption is generated during the switching process of the IGBT, and this energy consumption will cause the temperature of the inverter to rise. The temperature detection is achieved by setting the thermistor 33 to connect the electrodes.

[0037] In another embodiment, according to Figure 4 The topology diagram shown in the figure shows the arrangement of the packaging structure. At this time, the left DBC2 and the right DBC3 are respectively arranged on both sides of the bottom plate 1, and the entire DBC is divided into two independent DBCs, and the ports of the two DBCs are separated from each other. This is to avoid the stress pressure brought by the entire DBC, which may cause the DBC to break during the welding process, damage the IGBT module, and solve the problem of too dense electrode welding during the welding process, which is difficult to operate.

[0038] Preferably, a first detection port X1 is provided at the common end of the first IGBT chip 4 of the left DBC2, the left diode and the second IGBT chip 5. A second detection port X2 is provided at the common end of the third IGBT chip 6 of the right DBC3, the right diode and the second IGBT chip 5.

[0039] See also Figure 5 The inverter seals the three-level IGBT module in the housing 9 with high-temperature glue. When the inverter fails, if it is directly dismantled for troubleshooting, the residue of high-temperature glue will affect the efficiency and accuracy of troubleshooting. By reserving the detection port, the electrodes 8 between each component can be connected when a fault occurs, and the fault can be quickly eliminated, which improves the efficiency of fault analysis.

[0040] In summary, the low stray inductance packaging structure of the IGBT module provided by the utility model, through the position setting of the IGBT chip and the current limiting tube, makes the zero-level commutation circuit used for commutation and the flow direction of the conduction current parallel to each other under different control signals, or distributed on both sides of the same DBC, or distributed on different DBCs, so that the interaction between the two currents is greatly reduced, thereby reducing the stray inductance of the entire module during operation, improving the reliability of the IGBT module, and setting two detection ports to realize rapid troubleshooting of the fault in case of a fault, thereby improving the troubleshooting efficiency and accuracy.

[0041] The above-mentioned embodiments only express several implementation methods of the utility model, and the description is relatively specific and detailed, but it cannot be understood as limiting the scope of the utility model patent. It should be pointed out that for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the utility model, which all belong to the protection scope of the utility model.

Claims

1. A low stray inductance packaging structure for an IGBT module, characterized in that: include: A bottom plate, a left DBC, a right DBC, a first IGBT chip, a second IGBT chip, a third IGBT chip, a fourth IGBT chip, and a left diode and a right diode; Each IGBT chip has an FRD chip reversely connected between its collector and emitter; The left DBC is divided into a first chip placement area, a second chip placement area, a first control terminal, a second control terminal and a third control terminal; the left DBC is divided into a third chip placement area, a fourth chip placement area, a fourth control terminal, a fifth control terminal and a sixth control terminal; The second chip placement area is arranged between the first chip placement area and the first control terminal and the second control terminal, and the first control terminal and the second control terminal are arranged on the same side of the left-path DBC; the first IGBT chip is arranged in the first chip placement area and the emitter is close to the second chip placement area, and the second IGBT chip is arranged in the second chip placement area and the emitter is close to the second control terminal; the left-path diode is arranged in the second chip placement area and is bonded to the first control terminal; the third control terminal is adjacent to the first control terminal; The fourth chip placement area is arranged between the third chip placement area and the fourth control terminal and the sixth control terminal, and the fourth control terminal and the fifth control terminal are arranged on the same side of the right DBC; the third IGBT chip is arranged in the third chip placement area with the emitter close to the fourth chip placement area, and the fourth IGBT chip is arranged in the fourth chip placement area with the emitter close to the sixth control terminal; The right diode is arranged at the fourth control terminal and bonded to the fourth chip placement area; the sixth control terminal is adjacent to the fourth control terminal.

2. The low stray inductance packaging structure of an IGBT module according to claim 1, characterized in that: The third chip placement area is also provided with a thermistor for detecting the temperature in the third chip placement area.

3. The low stray inductance packaging structure of the IGBT module according to claim 2, characterized in that: The left DBC and the right DBC are respectively arranged on two sides of the bottom plate.

4. The low stray inductance packaging structure of the IGBT module according to claim 3, characterized in that: A first detection port is provided at a common end of the first IGBT chip of the left-path DBC, the left-path diode and the second IGBT chip.

5. The low stray inductance packaging structure of the IGBT module according to claim 4, characterized in that: A second detection port is provided at the common end of the third IGBT chip of the right DBC, the right diode and the second IGBT chip.

6. The low stray inductance packaging structure of the IGBT module according to any one of claims 1 to 5, characterized in that: There are multiple first IGBT chips, multiple second IGBT chips, multiple third IGBT chips and multiple fourth IGBT chips, and the multiple IGBT chips in each group are connected in parallel.

7. The low stray inductance packaging structure of the IGBT module according to claim 6, characterized in that: The chips of the IGBT module are connected by aluminum wire bonding.

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