Device and circuit

Abstract

The utility model relates to a device and a circuit. There is provided an apparatus comprising: a low dropout regulator circuit comprising: a first amplifier circuit having a positive input node, a negative input node, and an output node; and a pass transistor coupled to an output node of the first amplifier circuit; a load circuit coupled to a positive input node of the first amplifier circuit, the load circuit comprising; a resistor circuit; a current sink; and an external capacitor; a buffer circuit coupled to the negative input node of the first amplifier circuit, the buffer circuit comprising: a second amplifier circuit having a positive input node, a negative input node, and an output node, the output node of the second amplifier circuit being coupled to the negative input node of the first amplifier circuit; and a filter circuit coupled between the output node of the second amplifier circuit and the negative input node of the second amplifier circuit, the filter circuit including a capacitor and a first resistor.

Description

Technical Field

[0001] The present disclosure relates to a voltage regulator circuit including a low dropout regulator and a resistor-capacitor (RC) filter. Background Art

[0002] A voltage regulator is an electronic device designed to stabilize the output voltage of a circuit. There are several types of existing voltage regulators, including linear regulators and switching regulators. Each of these types of voltage regulators has several variations, such as low dropout regulators, buck-boost switching regulators, and flyback switching regulators. These variations offer different trade-offs between efficiency, cost, output voltage range, output current capability, and complexity.

[0003] However, known voltage regulators have several key disadvantages. For example, to maintain accuracy at high load currents, known voltage regulators require large off-chip capacitors, which are expensive and result in lower bandwidth relative to changes in load. The lower bandwidth corresponds to an increase in the reaction time of the regulator in response to changes in load current. When smaller off-chip capacitors are used, the DC gain of the loop is compromised to maintain the stability of the system. In addition, to improve accuracy, some known voltage regulators use multiple comparators, which results in excessive power consumption and takes up a lot of space. Finally, when digital and analog circuit systems are combined in a voltage regulator, the stability of the two components may be more delicate and the circuit system may have a larger form factor. Utility Model Content

[0004] In one aspect, a device is provided, comprising: a low dropout regulator circuit, comprising: a first amplifier circuit having a positive input node, a negative input node, and an output node; and a pass transistor coupled to the output node of the first amplifier circuit; a load circuit coupled to the positive input node of the first amplifier circuit, the load circuit comprising: a resistor circuit; a current sink; and an external capacitor; a buffer circuit coupled to the negative input node of the first amplifier circuit, the buffer circuit comprising: a second amplifier circuit having a positive input node, a negative input node, and an output node, the output node of the second amplifier circuit being coupled to the negative input node of the first amplifier circuit; and a filter circuit coupled between the output node of the second amplifier circuit and the negative input node of the second amplifier circuit, the filter circuit comprising a capacitor and a first resistor.

[0005] According to one embodiment, the gate of the pass transistor is directly coupled to the output node of the first amplifier circuit.

[0006] According to one embodiment, the capacitor and the first resistor of the filter circuit are coupled in parallel.

[0007] According to one embodiment, the output node of the second amplifier circuit is directly coupled to the negative input node of the first amplifier circuit.

[0008] According to one embodiment, the apparatus further includes a second resistor coupled between the filter circuit and the load circuit.

[0009] According to one embodiment, the second resistor is coupled to the negative input node of the second amplifier circuit.

[0010] According to one embodiment, the positive input node of the first amplifier circuit is coupled to the load circuit.

[0011] In another aspect, a circuit is provided, comprising: a first amplifier circuit having a first positive input, a first negative input, and a first output; a second amplifier circuit having a second positive input, a second negative input coupled to the first output and the first negative input, and a second output; a load circuit coupled between the second positive input and the second output; a pass transistor directly coupled to the second output and coupled between the second output and the load circuit; and a filter circuit coupled between the first output and the first negative input.

[0012] According to one embodiment, a load circuit includes a resistor circuit, a current sink, and an external capacitor.

[0013] According to one embodiment, the filter circuit includes a first resistor and a first capacitor.

[0014] According to one embodiment, the first resistor and the first capacitor are coupled in parallel.

[0015] According to one embodiment, the second resistor is coupled between the filter circuit and the load circuit.

[0016] According to one embodiment, a reference voltage is coupled to the first positive input.

[0017] In yet another aspect, a circuit is provided, comprising: a first operational amplifier having a first positive voltage supply node, a first positive input, a first negative input, and a first output coupled to the first negative input; a reference voltage coupled to the first positive input; a second operational amplifier having a second positive voltage supply node, a second positive input, a second negative input coupled to the first output and the first negative input, and a second output; a load circuit coupled between the second positive input and the second output; a pass transistor coupled between the second output and the load circuit; and a filter circuit coupled between the first output and the second negative input.

[0018] According to one embodiment, a first resistor is coupled between the first output and the first negative input.

[0019] According to one embodiment, the filter circuit comprises a second resistor and a first capacitor.

[0020] According to one embodiment, the second resistor is coupled directly between the first output and the second negative input.

[0021] According to one embodiment, an input voltage is coupled to the first positive voltage supply node, the second positive voltage supply node, and the source of the pass transistor.

[0022] According to one embodiment, the first capacitor is coupled to a ground voltage.

[0023] According to one embodiment, the load circuit includes a resistor circuit, a current sink, and a second capacitor. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to better understand the present disclosure, one or more embodiments will now be described by way of example only with reference to the accompanying drawings. In the accompanying drawings, the same reference numerals identify similar elements or actions. In some drawings, the structure is drawn completely to scale. In other drawings, the size and relative position of the elements in the drawings are not necessarily drawn to scale. For example, the size, shape and angle of the various elements can be enlarged and positioned in the accompanying drawings to improve the readability of the accompanying drawings.

[0025] Figure 1 A voltage regulator circuit with reference modulation is schematically shown.

[0026] Figure 2 Schematically and in more detail Figure 1 The voltage regulator circuit.

[0027] Figure 3 A second embodiment of a voltage regulator circuit with reference modulation is schematically shown. DETAILED DESCRIPTION

[0028] Figure 1 A voltage regulator circuit 100 includes a low dropout regulator 102, a load circuit 104 coupled to the low dropout regulator 102, a voltage-to-current converter 106 coupled to the load circuit 104, an RC filter 108 coupled to the voltage-to-current converter 106, and an operational amplifier (Op Amp) voltage buffer 110 coupled between the RC filter 108 and the low dropout regulator 102.

[0029] Reference voltage V REF is input into the operational amplifier 110 and a second input of the operational amplifier 110 is coupled to V OUT (See Figure 2 The output of the operational amplifier 110 is coupled to a first negative input of the low dropout regulator 102. The low dropout regulator 102 is also coupled to a positive input voltage V INThe load circuit 104 is coupled to the output of the low dropout regulator 102 and the output voltage V OUT .

[0030] The voltage-to-current converter 106 , the RC filter 108 , and the operational amplifier voltage buffer 110 together form an inverting and modulating circuit 112 .

[0031] Figure 2 is more detailed Figure 1 The voltage regulator circuit 100. The inverting and modulation circuit 112 includes a first operational amplifier A1, a first resistor R1, a second resistor R2 and a first capacitor C1. The first operational amplifier A1 has a positive input voltage V IN The first positive voltage supplied by the supply node 118. The first operational amplifier A1 has a first positive input 114. The reference voltage V REF is coupled to a first positive input 114 of the first operational amplifier A1. The first operational amplifier A1 also has a first negative input 116 and a first output 120. The first output 120 of the first operational amplifier A1 is the reference voltage V once buffered. REF , that is, the buffered reference voltage V REF-BUFF .

[0032] The first capacitor C1 and the second resistor R2 are coupled in parallel and together form an RC filter 108. The RC filter 108 is coupled between the first output 120 of the first operational amplifier A1 and the first negative input 116 of the first operational amplifier A1. Therefore, the first output 120 of the first operational amplifier A1 is coupled to the first negative input 116, thereby forming Figure 1 The operational amplifier voltage buffer 110 is provided.

[0033] The low voltage dropout regulator 102 is coupled to the output 120 of the first operational amplifier A1. The low voltage dropout regulator 102 includes a second operational amplifier A2 and a pass transistor 122. The second operational amplifier A2 has a positive input voltage V coupled to the output 120 of the first operational amplifier A1. IN The second operational amplifier A2 has a second positive input 124 and a second negative input 130, and the second negative input 130 is directly coupled to the output 120 of the first operational amplifier A1. Figure 1 The output of the operational amplifier voltage buffer 110 is a buffered reference voltage V REF-BUFF is input into the second negative input 130 .

[0034] The second operational amplifier A2 also has an output 126 directly coupled to the gate G of the pass transistor 122. The source S of the pass transistor 122 is coupled to the positive input voltage V IN and a second positive voltage supply node 128 of the second operational amplifier A2.

[0035] The first positive voltage supply node 118, the second positive voltage supply node 128, and the source S of the pass transistor 122 are each coupled to each other and to the positive input voltage V IN .

[0036] The load circuit 104 is coupled to the pass transistor 122 of the low dropout regulator 102. More specifically, the load circuit 104 is coupled to the drain D of the pass transistor 122. The load circuit 104 is also coupled to the output voltage V OUT and the second positive input 124 of the second operational amplifier A2. Note that the source and drain may be interchangeable and the specific use of source S and drain D is used to simplify the discussion.

[0037] The load circuit 104 includes a resistor circuit RL, a current sink IL, and an external capacitor C, each coupled in parallel. EXT The resistor circuit RL, the current sink IL and the external capacitor C EXT Each is coupled to ground voltage 132. Current sink IL represents the load current of the device, which is dynamic.

[0038] The load circuit 104 is directly coupled to the inverting and modulation circuit 112 through a first resistor R1. The first resistor R1 is coupled between the load circuit 104 and a first negative input 116 of the first operational amplifier A1. The first resistor R1 is also coupled between the load circuit 104 and the RC filter 108.

[0039] Furthermore, the first negative input 116 of the first operational amplifier A1 is coupled to the second negative input 130 of the second operational amplifier A2 through the RC filter 108 .

[0040] The voltage regulator circuit 100 of the present disclosure maintains both stability and regulation accuracy without sacrificing bandwidth or cost. When the voltage regulator receives a load current that can have different values ​​over a wide range, it is difficult to stabilize the system. Other known voltage regulators include an external capacitor C that is larger than the present disclosure. EXT This improves accuracy at high load currents, but the larger external capacitor increases the size and cost of the system while reducing bandwidth. The voltage regulator circuit 100 of the present disclosure utilizes a smaller external capacitor C EXT , which allows the overall size of the voltage regulator circuit 100 to remain small and the bandwidth to remain high. Higher bandwidth corresponds to a reduction in the reaction time of the regulator in response to changes in load current.

[0041] Furthermore, when other known voltage regulators use smaller external capacitors, DC gain is compromised in exchange for a more stable system. The voltage regulator circuit 100 of the present disclosure uses a fully analog reference correction circuit system that senses the voltage drop between the output and input and corrects the reference voltage V accordingly. REF , to maintain the output voltage V OUT The reference correction circuit system is implemented as an inverting amplifier configuration, where the output voltage V OUT The change is converted into a proportional current and added to the reference voltage V REF The reference correction circuitry of the present disclosure compromises neither the DC gain nor the stability of the circuit.

[0042] Figure 3 yes Figure 1 and Figure 2 An alternative embodiment of the voltage regulator circuit 100 is provided. Figure 3 The voltage regulator circuit 200 includes a low dropout regulator 202, a load circuit 204, an inverting and modulating circuit 212, and an RC filter 208. Figure 1 and Figure 2 Unlike the embodiment depicted in , the RC filter 208 of the voltage regulator circuit 200 is not included in the inverting and modulating circuit 212. Instead, the inverting and modulating circuit 212 includes only an operational amplifier voltage buffer and a voltage-to-current converter.

[0043] The inverting and modulation circuit 212 includes a first operational amplifier A1, a first resistor R1, and a second resistor R2. The first operational amplifier A1 has a positive input voltage V IN The first operational amplifier A1 has a first positive input 214. The reference voltage V REF is coupled to a first positive input 214 of the first operational amplifier A1. The first operational amplifier A1 also has a first negative input 216 and a first output 220. The first output 220 of the first operational amplifier A1 is the reference voltage V once buffered. REF , that is, V REF-BUFF .

[0044] The first output 220 of the first operational amplifier A1 is coupled to the first negative output 216 of the first operational amplifier A1 through a second resistor R2.

[0045] The RC filter 208 is directly coupled to the first output 220 of the first operational amplifier A1. Figure 1 The output of the operational amplifier voltage buffer 110 is a buffered reference voltage V REF-BUFF is directly input into the RC filter 208 .

[0046] The RC filter 208 includes a third resistor R3 and a first capacitor C1 (which may be formed by MOS and MOM) coupled in parallel. The third resistor R3 is directly coupled to the first output 220 of the first operational amplifier A1. The first capacitor C1 is coupled to the third resistor R3 and directly coupled to a ground voltage 232, which may be 0V.

[0047] The low dropout regulator 202 is coupled to the output 220 of the first operational amplifier A1 through an RC filter 208. The low dropout regulator 202 includes a second operational amplifier A2 and a pass transistor 222. The second operational amplifier A2 has a positive input voltage V IN The second operational amplifier A2 has a second positive input 224 and a second negative input 230, which is directly coupled to the RC filter 208.

[0048] The first negative input 216 of the first operational amplifier A1 is coupled to the second negative input 230 of the second operational amplifier A2 through the RC filter 208 and the second resistor R2. The second negative input 230 of the second operational amplifier A2 is directly coupled to the third resistor R3 of the RC filter 208. The first capacitor C1 is coupled between the third resistor R3 and the second negative input 230 of the second operational amplifier A2.

[0049] The second operational amplifier A2 also has a second output 226 directly coupled to the gate G of the pass transistor 222. The source S of the pass transistor 222 is coupled to the positive input voltage V IN and a second positive voltage supply node 228 of the second operational amplifier A2.

[0050] The first positive voltage supply node 218, the second positive voltage supply node 228, and the source S of the pass transistor 222 are each coupled to each other and to the positive input voltage V IN .

[0051] The load circuit 204 is coupled to the pass transistor 222 of the low dropout regulator 202. More specifically, the load circuit 204 is coupled to the drain D of the pass transistor 222. The load circuit 204 is also coupled to the output voltage V OUT and a second positive input 224 of the second operational amplifier A2.

[0052] The load circuit 204 includes a resistor circuit RL, a current sink IL, and an external capacitor C, each coupled in parallel. EXT The resistor circuit RL, the current sink IL and the external capacitor C EXT Each is coupled to ground voltage 232 .

[0053] The load circuit 204 is directly coupled to the inverting and modulation circuit 212 through a first resistor R1. The first resistor R1 is coupled between the load circuit 204 and a first negative input 216 of the first operational amplifier A1. The first resistor R1 is also coupled between the load circuit 204 and a second resistor R2.

[0054] The first capacitor C1 may be formed using a MOS (Metal-Oxide-Semiconductor) transistor. The first capacitor C1 may be formed using a MOM (Metal-Oxide-Metal) transistor.

[0055] Although Figure 3 The performance of the voltage regulator circuit 200 is similar to Figure 1 and Figure 2 The performance of the voltage regulator circuit 100 in FIG. 2 is improved, but the advantage of grounding the first capacitor C1 is that when the first capacitor C1 is formed using MOS, it occupies a smaller area. Therefore, the size of the voltage regulator circuit 200 is smaller.

[0056] The disclosed architecture has many advantages. First, the accuracy of the system is improved by the reference correction circuitry. In addition, the solution is completely analog and the stability of the circuit is not affected by the small external capacitor C. EXT The present invention does not add an external capacitor C EXT An improved load regulation compared to other known solutions is achieved with a size of 1.5 mm.

[0057] The present disclosure is directed to a fully analog voltage regulator circuit with reference modulation. More specifically, the voltage regulator circuit includes a low dropout regulator, a voltage-to-current converter, a resistor-capacitor (RC) filter, and an operational amplifier (op amp) in an inverting configuration.

[0058] The voltage regulator minimizes the dropout voltage of the circuit by comparing the output voltage of the voltage regulator to a reference voltage and then adjusting the output voltage of the op amp voltage buffer accordingly. If there is no voltage difference between the reference voltage and the output voltage of the voltage regulator, the output voltage of the op amp buffer will be equal to the output voltage of the voltage regulator. If there is a voltage difference between the reference voltage and the output voltage of the voltage regulator, the output voltage of the op amp buffer will increase by a voltage equal to the difference.

[0059] The present disclosure overcomes the deficiencies of the prior art. The reference modulation circuit system is implemented as an inverting amplifier, where the difference between the reference voltage and the output voltage of the voltage regulator is converted into a proportional current and added back to the reference voltage. Reference correction improves the accuracy of the system. In addition, since the circuit is completely analog, the system is more accurate than a digital system and stability verification is simpler. Finally, since the off-chip capacitor does not need to be larger, the voltage regulator improves load regulation without sacrificing bandwidth or cost.

[0060] The present disclosure includes a low dropout regulator circuit, the low dropout regulator circuit including a first amplifier circuit having a positive input node, a negative input node, and an output node, and a pass transistor coupled to the output node of the first amplifier. A load circuit is coupled to the positive input node of the first amplifier circuit, the load circuit including a resistor circuit, a current sink, and an external capacitor. A buffer circuit is coupled to the negative input node of the first amplifier circuit, the buffer circuit including a second amplifier circuit having a positive input node, a negative input node, and an output node. The output node of the second amplifier circuit is coupled to the negative input node of the first amplifier circuit. A filter circuit is coupled between the output node of the second amplifier circuit and the negative input node of the second amplifier circuit, the filter circuit including a capacitor and a first resistor.

[0061] The gate of the pass transistor is directly coupled to the output node of the first amplifier circuit. The capacitor of the filter circuit and the first resistor are coupled in parallel. The output of the second amplifier circuit is directly coupled to the negative input node of the first amplifier circuit.

[0062] The second resistor is coupled between the filter circuit and the load circuit. The second resistor is coupled to the negative input node of the second amplifier circuit. The positive input node of the first amplifier circuit is coupled to the load circuit.

[0063] Embodiments also include a circuit that includes a first amplifier circuit having a first positive input, a first negative input, and a first output. The circuit also includes a second amplifier circuit having a second positive input, a second negative input coupled to the first output and the first negative input, and a second output. A load circuit is coupled between the second positive input and the second output, and a pass transistor is directly coupled to the second output and coupled between the second output and the load circuit. A filter circuit is coupled between the first output and the first negative input.

[0064] The load circuit includes a resistor circuit, a current sink, and an external capacitor. The filter circuit includes a first resistor and a first capacitor, the first resistor and the first capacitor are coupled in parallel. A second resistor is coupled between the filter circuit and the load circuit. A reference voltage is coupled to the first positive input.

[0065] Embodiments also include a circuit comprising a first operational amplifier having a first positive voltage supply node, a first positive input, a first negative input, and a first output coupled to the first negative input. A reference voltage is coupled to the first positive input. The circuit also includes a second operational amplifier having a second positive voltage supply node, a second positive input, a second negative input coupled to the first output and the first negative input, and a second output. A load circuit is coupled between the second positive input and the second output, and a pass transistor is coupled between the second output and the load circuit. A filter circuit is coupled between the first output and the second negative input.

[0066] The first resistor is coupled between the first output and the first negative input. The filter circuit includes a second resistor and a first capacitor. The second resistor is directly coupled between the first output and the second negative input. The input voltage is coupled to the first positive voltage supply node, the second positive voltage supply node, and the source of the pass transistor.

[0067] The first capacitor is coupled to a ground voltage. The load circuit includes a resistor circuit, a current sink, and a second capacitor.

[0068] The various embodiments described above can be combined to provide further embodiments. Aspects of the embodiments can be modified, if necessary to employ the concepts of the various patents, applications, and publications to provide further embodiments.

[0069] These and other changes can be made to the embodiments in light of the above detailed description. In general, in the appended claims, the terms used should not be interpreted as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be interpreted to include all possible embodiments and the full range of equivalents to which these claims are entitled. Therefore, the claims are not limited by the disclosure.

Claims

1. A device, characterized in that: include: A low dropout regulator circuit comprising: a first amplifier circuit having a positive input node, a negative input node, and an output node; and a pass transistor coupled to an output node of the first amplifier circuit; a load circuit coupled to the positive input node of the first amplifier circuit, the load circuit comprising; Resistor circuits; current sink; and External capacitor; a buffer circuit coupled to the negative input node of the first amplifier circuit, the buffer circuit comprising: a second amplifier circuit having a positive input node, a negative input node, and an output node, the output node of the second amplifier circuit being coupled to the negative input node of the first amplifier circuit; and A filter circuit is coupled between the output node of the second amplifier circuit and the negative input node of the second amplifier circuit, the filter circuit including a capacitor and a first resistor.

2. The device according to claim 1, characterized in that The gate of the pass transistor is directly coupled to the output node of the first amplifier circuit.

3. The device according to claim 1, characterized in that The capacitor and the first resistor of the filter circuit are coupled in parallel.

4. The device according to claim 1, characterized in that The output node of the second amplifier circuit is directly coupled to the negative input node of the first amplifier circuit.

5. The device according to claim 1, characterized in that Also included is a second resistor coupled between the filter circuit and the load circuit.

6. The device according to claim 5, characterized in that The second resistor is coupled to the negative input node of the second amplifier circuit.

7. The device according to claim 1, characterized in that The positive input node of the first amplifier circuit is coupled to the load circuit.

8. A circuit, characterized in that: include: a first amplifier circuit having a first positive input, a first negative input, and a first output; a second amplifier circuit having a second positive input, a second negative input coupled to the first output and the first negative input, and a second output; a load circuit coupled between the second positive input and the second output; a pass transistor coupled directly to the second output and coupled between the second output and a load circuit; as well as A filter circuit is coupled between the first output and the first negative input.

9. The circuit according to claim 8, characterized in that The load circuit includes a resistor circuit, a current sink, and an external capacitor.

10. The circuit according to claim 8, characterized in that The filter circuit includes a first resistor and a first capacitor.

11. The circuit according to claim 10, characterized in that The first resistor and the first capacitor are coupled in parallel.

12. The circuit according to claim 8, characterized in that The second resistor is coupled between the filter circuit and the load circuit.

13. The circuit according to claim 8, characterized in that A reference voltage is coupled to the first positive input.

14. A circuit, characterized in that: include: a first operational amplifier having a first positive voltage supply node, a first positive input, a first negative input, and a first output coupled to the first negative input; a reference voltage coupled to the first positive input; a second operational amplifier having a second positive voltage supply node, a second positive input, a second negative input coupled to the first output and the first negative input, and a second output; a load circuit coupled between the second positive input and the second output; a pass transistor coupled between the second output and a load circuit; as well as A filter circuit is coupled between the first output and the second negative input.

15. The circuit according to claim 14, characterized in that A first resistor is coupled between the first output and the first negative input.

16. The circuit according to claim 15, characterized in that The filter circuit includes a second resistor and a first capacitor.

17. The circuit according to claim 16, characterized in that The second resistor is coupled directly between the first output and the second negative input.

18. The circuit according to claim 14, characterized in that An input voltage is coupled to the first positive voltage supply node, the second positive voltage supply node, and the source of the pass transistor.

19. The circuit according to claim 16, characterized in that The first capacitor is coupled to a ground voltage.

20. The circuit according to claim 16, characterized in that The load circuit includes a resistor circuit, a current sink, and a second capacitor.

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