Chip upgrading instrument

Abstract

The utility model relates to the technical field of selenium drum chips, in particular to a chip upgrading instrument which comprises a host and at least one single-chip microcomputer, the host is in communication connection with a cloud server, and the host is in communication connection with the single-chip microcomputers at the same time through differential conversion chips; wherein the single-chip microcomputer comprises a host communication interface, a single-chip microcomputer master control program debugging port, a single-chip microcomputer master control program downloading port, at least one selenium drum chip upgrading port and an upgrading data transmission port. The chip upgrading instrument provided by the utility model has a one-key reset upgrading technology, the host and the chip are connected through a port, the host is then connected with the cloud server and downloads upgrading data, so that a client is helped to reactivate the blocked chip, the chip upgrading instrument builds the own cloud server, the upgrading data can be updated in real time after the host is networked, and the upgrading efficiency is improved. The firmware problem is solved, meanwhile, the time cost generated by refunding and changing goods is saved, and huge losses caused by frequent firmware upgrading to customers are greatly reduced.

Description

Technical Field

[0001] The present application relates to the technical field of toner cartridge chips, and more specifically, to a chip upgrader. Background Art

[0002] The cartridge chip is used to store relevant data of the cartridge, such as toner color, serial number, remaining toner, page yield (maximum number of printable pages), number of printed pages, manufacturer, production date, etc. In order to improve the authentication capability of consumable chips, original manufacturers often upgrade the firmware of printing equipment, but the existing technology usually requires the chip to be returned to the factory and upgraded with chip upgrade equipment so that the chip can be used normally. However, this method can only operate on one chip alone, and traditional equipment is prone to errors in the authentication link, resulting in chip upgrade failure and locking, which greatly affects the user experience of the consumable box.

[0003] Therefore, those skilled in the art need a method to solve the above technical problems. Utility Model Content

[0004] The embodiment of the present application provides a chip upgrade instrument, which can, to a certain extent, reset the upgrade technology with one key, helping customers to reactivate blocked chips.

[0005] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by the practice of the present application.

[0006] According to one aspect of an embodiment of the present application, a chip upgrader is provided, which includes a host and at least one single-chip microcomputer, wherein the host is communicatively connected to a cloud server, and the host is communicatively connected to each single-chip microcomputer simultaneously through a differential conversion chip; wherein the single-chip microcomputer includes a host communication interface, a single-chip microcomputer master control program debugging port, a single-chip microcomputer master control program download port, at least one toner cartridge chip upgrade port, and an upgrade data transmission port.

[0007] In some embodiments of the present application, each single-chip microcomputer is connected to the network port of the host through a corresponding host communication interface, and the communication protocol between the host and each single-chip microcomputer is the SPI protocol.

[0008] In some embodiments of the present application, the microcontroller master program debug port includes a TX port and an RX port, wherein the TX port is a port for sending debug data, and the RX port is a port for receiving debug data, and the microcontroller master program debug port is used to determine whether the remaining ports are operating normally.

[0009] In some embodiments of the present application, the MCU master program download port is used to burn the program to the MCU update program version.

[0010] In some embodiments of the present application, the upgrade data transmission port includes a Slave_CS port, a Slave_SCK port and a Slave_MISO port, wherein the Slave_CS port corresponds to receiving a selection signal; the Slave_SCK port corresponds to receiving a clock signal, which is equivalent to a pulse signal, and a pulse signal corresponds to one data; the Slave_MISO port corresponds to receiving an indication signal for inputting upgrade data to the consumable to be upgraded.

[0011] In some embodiments of the present application, the single chip microcomputer further includes a detection signal input port and an output control port, and the output control port is used to output a corresponding control instruction according to the detection signal received by the detection signal input port.

[0012] In some embodiments of the present application, the single chip microcomputer further includes an external crystal oscillator port.

[0013] In some embodiments of the present application, the single chip microcomputer further includes a reset port.

[0014] In the technical solutions provided in some embodiments of the present application, the chip upgrader includes a host and at least one single-chip microcomputer, the host is connected to the cloud server in communication, and the host is connected to each single-chip microcomputer in communication at the same time through a differential conversion chip; wherein the single-chip microcomputer includes a host communication interface, a single-chip microcomputer master program debugging port, a single-chip microcomputer master program download port, at least one cartridge chip upgrade port, and an upgrade data transmission port. The chip upgrader has a one-key reset upgrade technology to help customers reactivate blocked chips, and the chip upgrader builds its own cloud server. After the host is connected to the Internet, it can update the upgrade data in real time to solve firmware problems, while saving the time cost of returns and exchanges, greatly reducing the huge losses caused to customers due to frequent firmware upgrades.

[0015] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present application, and together with the specification, are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0017] Figure 1 A schematic diagram of a chip upgrader according to an embodiment of the present application is shown;

[0018] Figure 2A schematic diagram of a single chip microcomputer according to an embodiment of the present application is shown;

[0019] The detailed description of each number is as follows:

[0020] Chip upgrader 100; host 101; single chip computer 102 cloud server 103 differential conversion chip 104 single chip computer 105; host communication interface 10201; single chip computer master control program debugging port 10202 single chip computer master control program download port 10203; toner cartridge chip upgrade port 10204 upgrade data transmission port 10205. DETAILED DESCRIPTION

[0021] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be more comprehensive and complete and fully convey the concept of the example embodiments to those skilled in the art.

[0022] The flowcharts shown in the accompanying drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps can be decomposed, and some operations / steps can be combined or partially combined, so the actual execution order may change according to actual conditions.

[0023] It should be noted that the "multiple" mentioned in this article refers to two or more. "And / or" describes the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0024] See also Figure 1 .

[0025] Figure 1 A schematic diagram of a chip upgrader according to an embodiment of the present application is shown, wherein the chip upgrader 100 includes a host 101 and at least one single-chip microcomputer 102, wherein the host is communicatively connected to a cloud server 103, and the host 101 is communicatively connected to the single-chip microcomputer 102 and the single-chip microcomputer 105 at the same time through a differential conversion chip 104; wherein the single-chip microcomputer 102 includes a host communication interface 10201, a single-chip microcomputer master control program debugging port 10202, a single-chip microcomputer master control program download port 10203, at least one toner cartridge chip upgrade port 10204, and an upgrade data transmission port 10205.

[0026] In one embodiment of the present application, the host and the single-chip microcomputer use SPI communication. In the past, the SPI communication mode can be a single host and a single-chip microcomputer or a single host and multiple single-chip microcomputers, but when there are multiple single-chip microcomputers, the host can only communicate with one single-chip microcomputer at a time. In addition, the differential conversion chip can be selected as LTC4332, so that the host can communicate with multiple single-chip microcomputers at the same time, and the transmission distance is 1000 times farther than the traditional SPI communication.

[0027] The chip upgrader provided in this application has a one-key reset upgrade technology. It connects the host and the chip through a port, and the host then connects to the cloud server and downloads the upgrade data, thereby helping customers reactivate the blocked chip. The chip upgrader builds its own cloud server, and the host can update the upgrade data in real time after connecting to the Internet to solve firmware problems. At the same time, it saves the time cost of returns and exchanges, and greatly reduces the huge losses caused to customers due to frequent firmware upgrades.

[0028] Next, the microcontroller in the chip upgrader will be described in detail.

[0029] See also Figure 2 , Figure 2 A schematic diagram of a single-chip microcomputer according to an embodiment of the present application is shown, wherein the single-chip microcomputer includes a host communication interface 10201, a single-chip microcomputer master control program debugging port 10202, a single-chip microcomputer master control program download port 10203, at least one toner cartridge chip upgrade port 10204, and an upgrade data transmission port 10205. Each single-chip microcomputer is connected to the network port of the host through the corresponding host communication interface 10201, and the communication protocol between the host and each single-chip microcomputer is the SPI protocol.

[0030] Please continue reading Figure 2 , the single-chip master control program debugging port 10202 may include a TX port and an RX port, wherein the TX port is a port for sending debugging data, and the RX port is a port for receiving debugging data, and the single-chip master control program debugging port 10202 is used to determine whether the remaining ports are operating normally. Specifically, the single-chip master control program debugging port 10202 is not used for data transmission between the slave and the consumable chip, but is only used for debugging the program, wherein TX is a port for sending debugging data, and RX is a port for receiving debugging data, to determine whether each port is operating normally.

[0031] Please continue reading Figure 2 The single-chip microcomputer master control program download port 10203 is used to burn the program to the single-chip microcomputer to update the program version.

[0032] Please continue reading Figure 2The upgrade data transmission port 10205 includes a Slave_CS port, a Slave_SCK port and a Slave_MISO port, wherein the Slave_CS port corresponds to receiving a selection signal. If this signal is at a low level, the slave is selected; the Slave_SCK port corresponds to receiving a clock signal, which is equivalent to a pulse signal, and a pulse signal corresponds to one data; the Slave_MISO port corresponds to receiving an indication signal for inputting upgrade data to the consumable to be upgraded. When this signal is generated, each time there is a pulse signal on the Slave_SCK port, upgrade data is input to the chip of the consumable to be upgraded.

[0033] Please continue reading Figure 2 The single chip microcomputer further includes a detection signal input port HP_IN and an output control terminal DAC_DIN, wherein the output control port DAC_DIN is used to output a corresponding control instruction according to the detection signal received by the detection signal input port HP_IN.

[0034] Please continue reading Figure 2 The single-chip microcomputer may further include an external crystal oscillator port for connecting an external crystal oscillator component to ensure normal operation of the single-chip microcomputer. The external crystal oscillator port may include an OSC_IN input port and an OSC_OUT output port.

[0035] Please continue reading Figure 2 The single-chip microcomputer may further include a reset port RST for realizing a reset function, the single-chip microcomputer may further include a detection signal generating port GND_VCC for stimulating a detection signal for a toner cartridge chip, and the single-chip microcomputer may further include a clock signal port SWDCLK.

[0036] Please continue reading Figure 2 The single chip microcomputer may further include a toner cartridge chip power control port 3.3V_CE, and the power on and off of the toner cartridge chip may be controlled through the toner cartridge chip power control port 3.3V_CE.

[0037] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the embodiments disclosed herein. The present application is intended to cover any variations, uses or adaptations of the present application, which follow the general principles of the present application and include common knowledge or customary technical means in the art that are not disclosed in the present application.

[0038] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A chip upgrade device, characterized in that: The chip upgrader includes a host and at least one single-chip microcomputer, the host is communicatively connected to a cloud server, and the host is communicatively connected to each single-chip microcomputer simultaneously through a differential conversion chip; The single-chip microcomputer includes a host communication interface, a single-chip microcomputer main control program debugging port, a single-chip microcomputer main control program download port, at least one toner cartridge chip upgrade port, and an upgrade data transmission port.

2. The chip upgrade device according to claim 1, characterized in that: Each single-chip microcomputer is connected to the network port of the host through a corresponding host communication interface, and the communication protocol between the host and each single-chip microcomputer is the SPI protocol.

3. The chip upgrade device according to claim 1, characterized in that: The single-chip computer main control program debugging port includes a TX port and an RX port, wherein the TX port is a port for sending debugging data, and the RX port is a port for receiving debugging data. The single-chip computer main control program debugging port is used to determine whether the remaining ports are operating normally.

4. The chip upgrade device according to claim 1, characterized in that: The single-chip microcomputer master control program download port is used to burn the program to the single-chip microcomputer to update the program version.

5. The chip upgrade device according to claim 1, characterized in that: The upgrade data transmission port includes a Slave_CS port, a Slave_SCK port and a Slave_MISO port, wherein the Slave_CS port corresponds to receiving a selection signal; the Slave_SCK port corresponds to receiving a clock signal, which is equivalent to a pulse signal, and a pulse signal corresponds to one data; the Slave_MISO port corresponds to receiving an indication signal for inputting upgrade data to the consumable to be upgraded.

6. The chip upgrade device according to claim 1, characterized in that: The single chip microcomputer further comprises a detection signal input port and an output control port, wherein the output control port is used to output a corresponding control instruction according to the detection signal received by the detection signal input port.

7. The chip upgrade device according to claim 1, characterized in that: The single chip microcomputer also includes an external crystal oscillator port.

8. The chip upgrade device according to claim 1, characterized in that: The single chip microcomputer also includes a reset port.

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