Printer consumable chip with reduced CS terminals

Abstract

According to the printer consumable chip capable of reducing CS terminals, the function of the gating terminal CS is simulated through the analog circuit, it is ensured that one terminal can be reduced on the front face of the substrate, the number of through holes needing to be punched from an integrated chip ASIC on the back face of the substrate to the terminal on the front face is reduced, and then the machining procedures are reduced; based on the technical scheme in the invention, the overall production cost can be reduced on the basis of keeping the function of the consumable chip.

Description

Technical Field

[0001] The utility model relates to the technical field of consumable chips, in particular to a printer consumable chip with reduced CS terminals. Background Art

[0002] Printer consumables usually refer to consumable products for printers such as toner cartridges and ink cartridges. In smart printers, consumables usually have chips for functions such as identification of consumables, printing technology, and reading of remaining consumables. Consumable chips include: substrates and integrated chips ASIC. The technical solution shown in the patent with publication number CN219405854U discloses a printer consumable chip that our company is using. Figure 1 As shown, a plurality of metal contact terminals (pads) are provided on the front side of the substrate of the consumable chip of the prior art, including: a select terminal (CS, sometimes also called a reset terminal), a clock terminal (SCLK), a data terminal (DATA), a power terminal (VDD) and a ground terminal (GND).

[0003] ASIC is set on the back of the substrate, and ASIC includes: memory, digital circuit and analog circuit; depending on the specific packaging method, the connection method of the analog circuit and the metal terminal on the front of the substrate is slightly different. In COB (Chips on Board) packaging, multiple solder joints of the analog circuit are electrically connected to the conductor on the back of the substrate through bonding wires, and the conductor is electrically connected to the contact terminal on the front of the substrate through the substrate via hole to form a consumable chip; in SMD (Surface Mounted Devices) packaging, multiple solder joints of the analog circuit are electrically connected to the pins / leads of the package body through bonding wires, and the pins / leads of the package body are electrically connected to the conductor on the back of the substrate through SMT (Surface Mounted Technology) technology, and the conductor is electrically connected to the contact terminal on the front of the substrate through the substrate via hole to form a consumable chip. When the consumable chip is installed on the consumable container, the printer contact is connected through the terminal on the front of the substrate to establish communication with the printer. With the current process, it is difficult to reduce the cost of consumable chips with existing structures in large-scale production. Therefore, how to further reduce the cost while maintaining the function of the consumables is a problem that needs to be faced. Utility Model Content

[0004] In order to further reduce the processing cost of consumable chips, the utility model provides a printer consumable chip with reduced CS terminals, which can reduce the overall production cost while maintaining the functions of the consumable chip.

[0005] The technical solution of the utility model is as follows: a printer consumable chip with reduced CS terminals, comprising: a substrate and an integrated chip ASIC, wherein the terminals are arranged on the front side of the substrate, and the integrated chip ASIC is arranged on the back side of the substrate; the integrated chip ASIC comprises: an analog circuit, wherein the pressure welding points in the analog circuit are respectively electrically connected to the corresponding terminals on the front side of the substrate;

[0006] The terminals include: a clock terminal, a data terminal, a ground terminal and a power terminal;

[0007] It is characterized in that the analog circuit includes: an analog circuit of the selection terminal.

[0008] It is further characterized by:

[0009] The analog circuit of the gate terminal includes: a diode D5 and a capacitor C1;

[0010] The anode of the diode D5 is connected to the welding point of the clock terminal, the cathode of the diode D5 is connected to one end of the capacitor C1 and the welding point of the gate terminal, and the other end of the capacitor C1 is grounded;

[0011] The integrated chip ASIC also includes: a digital circuit and a memory, wherein the digital circuit is connected to the analog circuit and the memory respectively.

[0012] The present application provides a printer consumable chip with a reduced CS terminal, which simulates the function of the selection terminal CS through an analog circuit, ensuring that one terminal can be reduced on the front side of the substrate, and also reducing the number of vias required to be drilled from the integrated chip ASIC on the back side of the substrate to the terminal on the front side, thereby reducing the processing steps; based on the technical solution in the present application, the overall production cost can be reduced while maintaining the function of the consumable chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a schematic diagram of the chip structure in the prior art;

[0014] Figure 2 This is a schematic diagram of the chip structure without the CS contact point in this application;

[0015] Figure 3 An example of the relationship between CS and SCLK waveforms;

[0016] Figure 4 It is a CS rectifier circuit. DETAILED DESCRIPTION

[0017] like Figure 2As shown, the present application includes a printer consumable chip with reduced CS terminals, which includes: a substrate and an integrated chip ASIC, a terminal pad is set on the front side of the substrate, and an integrated chip ASIC is set on the back side of the substrate. The integrated chip ASIC includes: an analog circuit, a digital circuit and a memory, and the digital circuit is respectively connected to the analog circuit and the memory; the terminal solder joints in the analog circuit are electrically connected to the corresponding contact terminals on the front side of the substrate based on different packaging methods.

[0018] The terminals arranged on the front side of the substrate include: a clock terminal SCLK, a data terminal DATA, a grounding terminal GND and a power supply terminal VDD. That is, the number of contact terminals on the substrate in the technical solution of the present application is changed from 5 terminals in the prior art to 4 terminals, which can also reduce the bonding of one solder joint and the number of vias required to be drilled from the integrated chip ASIC on the back side of the substrate to the terminals on the front side, thereby reducing the processing steps and the overall cost.

[0019] When the selection terminal is removed from the front side of the substrate, in order to realize the function of the selection terminal, the present application sets an analog circuit of the selection terminal in the analog circuit.

[0020] In actual work, when the printer controller needs to communicate with the consumable chip, the controller chip will first send a signal to the consumable chip. The signal sent by the controller chip includes: SCLK clock signal data and CS selection signal data. For the consumable chip implemented based on the existing technology, because the CS selection terminal is set on the front of the substrate, the CS signal data sent by the printer controller will be based on the CS selection terminal, and sent to the CS terminal solder joint of the integrated chip ASIC on the back of the substrate through the lead, and then sent to the integrated chip ASIC. In the technical solution of the present application, the CS selection terminal is removed on the front of the substrate, and the CS signal is extracted by the SCLK signal sent by the printer control chip based on the selection terminal analog circuit to simulate the CS selection signal data sent by the printer controller.

[0021] The analog circuit of the gate terminal in this application is a rectifier circuit. Figure 3 , is an example of a signal including CS data sent by the printer controller. According to the signal diagram, the CS signal is a constant high-level signal, and after the CS signal is pulled high, the SCLK signal is a periodically changing square wave signal. In this application, a rectifier circuit is set to extract and rectify the SCLK to obtain the CS signal.

[0022] like Figure 4As shown, a rectifier circuit is set as an analog circuit of the selection terminal, specifically including: a diode D5 and a capacitor C1; the anode of the diode D5 is connected to the soldering point of the clock terminal SCLK terminal in the analog circuit, the cathode of the diode D5 is connected to one end of the capacitor C1 and the soldering point of the CS selection terminal, and the other end of the capacitor C1 is grounded.

[0023] When the SCLK terminal soldering point is sent to a high level, it is sent to the clock terminal CS terminal soldering point and charges the capacitor C1 through the diode D5; when the SCLK terminal soldering point is at a low level, due to the presence of the diode D5, the CS selection terminal soldering point and the SCLK terminal soldering point are disconnected, and the capacitor C1 is discharged, providing a high level for the CS selection terminal soldering point until the SCLK terminal soldering point is sent to a high level again. That is, the periodically changing square wave signal of SCLK is rectified into a constant high level signal of CS through the rectifier circuit, replacing the CS signal sent from the printer controller. The present application can replace the original CS selection terminal on the front of the substrate through the analog circuit of the selection terminal.

[0024] In specific practical applications, the terminals on the substrate further include: test terminals, and whether to set the test terminals is selected according to actual needs. The specific setting method is implemented based on the existing technology.

Claims

1. A printer consumable chip with reduced CS terminals, comprising: A substrate and an integrated chip ASIC, wherein terminals are arranged on the front side of the substrate and the integrated chip ASIC is arranged on the back side of the substrate; The integrated chip ASIC comprises: an analog circuit, wherein the pads in the analog circuit are electrically connected to corresponding terminals on the front side of the substrate; The terminals include: a clock terminal, a data terminal, a ground terminal and a power terminal; The feature of the invention is that the analog circuit comprises: an analog circuit of a selection terminal.

2. According to claim 1, a printer consumable chip with reduced CS terminals is characterized in that: The analog circuit of the gate terminal includes: a diode D5 and a capacitor C1; The anode of the diode D5 is connected to the soldering point of the clock terminal, the cathode of the diode D5 is connected to one end of the capacitor C1 and the soldering point of the gate terminal, and the other end of the capacitor C1 is grounded.

3. According to claim 1, a printer consumable chip with reduced CS terminals is characterized in that: The integrated chip ASIC also includes: a digital circuit and a memory, wherein the digital circuit is connected to the analog circuit and the memory respectively.

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