Industrial control mainboard display circuit with anti-interference function

Abstract

According to the industrial control mainboard display circuit with the anti-interference function, the interference blocking module and the level conversion module are connected with the CPU chip, the interference blocking module can block direct-current component interference of image signals and clock signals, and the level conversion module can conduct level conversion operation on SDA signals and SCL signals. The surge suppression module is connected with the interference blocking module and can suppress surge voltage of the image signal and the clock signal. The common-mode interference suppression module is connected with the surge suppression module and can suppress common-mode interference of the image signal and the clock signal. The electrostatic protection module is connected with the common-mode interference suppression module and the level conversion module, the electrostatic protection module can discharge electrostatic interference of an image signal, a clock signal, an SDA signal and an SCL signal, and the interface module can transmit the image signal, the clock signal, the SDA signal and the SCL signal to an industrial control mainboard display device.

Description

Technical Field

[0001] The utility model relates to the technical field of circuits, and particularly relates to an industrial control mainboard display circuit with an anti-interference function. Background Art

[0002] In modern society, the application field of human-computer interaction technology is very extensive. However, human-computer interaction requires a display device to display an interface. In a display circuit, a CPU is used to send an image signal. The display device can receive the image signal, and the display device can generate an image based on the image signal. However, the image signal is easily interfered with during the transmission process, resulting in errors in the image signal, and further causing poor conditions such as blurred images, snowflakes, and spots.

[0003] Therefore, it is necessary to provide an industrial control mainboard display circuit with an anti-interference function to solve the above technical problems. Summary of the Utility Model

[0004] The utility model provides an industrial control mainboard display circuit with an anti-interference function, effectively solving the technical problem that the image signal is easily interfered with during the transmission process.

[0005] The utility model provides an industrial control mainboard display circuit with an anti-interference function, which is used to perform anti-interference operations on the image signal, clock signal, SDA signal, and SCL signal output by the CPU chip, and includes

[0006] An interference blocking module, connected to the CPU chip, for blocking the DC component interference of the image signal and the clock signal;

[0007] A surge suppression module, connected to the interference blocking module, for suppressing the surge voltage of the image signal and the clock signal;

[0008] A common-mode interference suppression module, connected to the surge suppression module, for suppressing the common-mode interference of the image signal and the clock signal;

[0009] A level conversion module, connected to the CPU chip, for performing level conversion operations on the SDA signal and the SCL signal, so that the levels of the SDA signal and the SCL signal are consistent;

[0010] An electrostatic protection module, connecting the common-mode interference suppression module and the level conversion module, for discharging the electrostatic interference of the image signal, the clock signal, the SDA signal, and the SCL signal;

[0011] The interface module, connected to the electrostatic protection module, is used to transmit the image signal, the clock signal, the SDA signal, and the SCL signal to the display device of the industrial control main board, and the display device of the industrial control main board is used to generate an image based on the image signal.

[0012] Further, the display circuit of the industrial control main board further includes an interference isolation module. One end of the interference isolation module is connected to the surge suppression module, and one end of the interference isolation module is connected to the common-mode interference suppression module. The interference isolation module is used to block the DC component interference of the internal traces of the circuit board.

[0013] Further, the interference blocking module includes a first coupling capacitor, and the surge suppression module includes a surge protector. One end of the first coupling capacitor is connected to the CPU chip, and the other end of the first coupling capacitor is connected to the surge protector. The first coupling capacitor blocks the DC component interference of the image signal and the clock signal, and the surge protector is used to suppress the surge voltage of the image signal and the clock signal.

[0014] Further, the common-mode interference suppression module includes a common-mode inductor. One end of the common-mode inductor is connected to the surge protector, and the other end of the common-mode inductor is connected to the electrostatic protection module. The common-mode inductor is used to suppress the common-mode interference of the image signal and the clock signal.

[0015] Further, the level conversion module includes a first MOS transistor and a second MOS transistor. The source electrode of the first MOS transistor is connected to the CPU chip, and the source electrode of the first MOS transistor is used to receive the SCL signal. The gate electrode of the first MOS transistor is connected to the 1.8V power supply, and the drain electrode of the first MOS transistor is connected to the 5V power supply and the electrostatic protection module. The first MOS transistor is used to perform a level conversion operation on the SCL signal;

[0016] The source electrode of the second MOS transistor is connected to the CPU chip, and the source electrode of the second MOS transistor is used to receive the SDA signal. The gate electrode of the second MOS transistor is connected to the 1.8V power supply, and the drain electrode of the second MOS transistor is connected to the 5V power supply and the electrostatic protection module. The second MOS transistor is used to perform a level conversion operation on the SDA signal.

[0017] Further, the electrostatic protection module includes a first electrostatic protector and a second electrostatic protector. The first electrostatic protector includes a first input pin and a first output pin. The first input pin is connected to the common-mode inductor, and the first output pin is connected to the interface module. The first electrostatic protector is used to discharge the electrostatic interference of the image signal and the clock signal;

[0018] The second electrostatic protector includes a second input pin and a second output pin. The second input pin is connected to the drain of the first MOS transistor and the drain of the second MOS transistor. The second output pin is connected to the interface module. The second electrostatic protector is used to discharge the electrostatic interference of the SDA signal and the SCL signal.

[0019] Further, the interface module includes a digital video interface. The digital video interface includes a first receiving pin, a second receiving pin, and a third receiving pin. Both the first receiving pin and the second receiving pin are connected to the first output pin. The first receiving pin is used to receive the image signal. The second receiving pin is used to receive the clock signal. The third receiving pin is connected to the second output pin. The third receiving pin is used to receive the SDA signal and the SCL signal;

[0020] The digital video interface is used to connect to the industrial control motherboard display device and transmit the image signal, the clock signal, the SDA signal, and the SCL signal to the industrial control motherboard display device.

[0021] Further, the digital video interface includes a ground pin. The industrial control motherboard display circuit further includes an electromagnetic interference suppression module. The electromagnetic interference suppression module is connected to the ground pin. The electromagnetic interference suppression module is used to perform electromagnetic interference suppression operations on the digital video interface.

[0022] Further, the interface module further includes a filtering unit. The filtering unit is connected to the third receiving pin. The filtering unit is used to perform filtering operations on the SDA signal and the SCL signal.

[0023] Further, the digital video interface includes an HDP pin. The HDP pin is used to output a detection signal. The CPU chip is used to determine whether the digital video interface is connected to the industrial control motherboard display device based on the detection signal. The interface module includes a third MOS transistor. The gate of the third MOS transistor is connected to the CPU chip. The drain of the third MOS transistor is connected to the HDP pin. The source of the third MOS transistor is grounded. The third MOS transistor is used to isolate the CPU chip.

[0024] Compared with the prior art, the beneficial effects of the present utility model are as follows: The present utility model provides an industrial control mainboard display circuit with anti-interference function, which can perform anti-interference operations on the image signal, clock signal, SDA signal, and SCL signal output by the CPU chip. Among them, the industrial control mainboard display circuit includes an interference blocking module, a surge suppression module, a common-mode interference suppression module, a level conversion module, an electrostatic protection module, and an interface module. The interference blocking module can block the DC component interference of the image signal and the clock signal, thereby reducing signal attenuation and distortion. The common-mode interference suppression module can suppress the common-mode interference of the image signal and the clock signal, thus effectively improving the stability and waveform integrity of the image signal and the clock signal. And, the surge suppression module can suppress the surge voltage of the image signal and the clock signal, and the electrostatic protection module discharges the electrostatic interference of the image signal, clock signal, SDA signal, and SCL signal. Therefore, the anti-interference ability of the image signal can be improved, and the reliability of the circuit is enhanced. Even when the image signal is transmitted over a long distance, it is difficult for external power equipment to cause electrical interference to the image signal, and the image signal will not be deleted, deformed, or distorted. Therefore, the setting of the industrial control mainboard display circuit effectively solves the technical problem that the image signal is easily interfered during the transmission process. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model or the prior art, the following briefly introduces the drawings required to be used in the embodiments. The drawings described below are only the corresponding drawings of some embodiments of the present utility model.

[0026] Figure 1 It is a structural diagram of an embodiment of the industrial control mainboard display circuit with anti-interference function of the present utility model.

[0027] Figure 2 It is a circuit diagram of the interference blocking module of an embodiment of the industrial control mainboard display circuit with anti-interference function of the present utility model.

[0028] Figure 3 It is a circuit diagram of the surge suppression module of an embodiment of the industrial control mainboard display circuit with anti-interference function of the present utility model.

[0029] Figure 4 It is a circuit diagram of the pull-down resistor of an embodiment of the industrial control mainboard display circuit with anti-interference function of the present utility model.

[0030] Figure 5 It is a circuit diagram of the interference isolation module, common-mode interference suppression module, and electrostatic protection module of an embodiment of the industrial control mainboard display circuit with anti-interference function of the present utility model.

[0031] Figure 6The circuit diagram of the pull-up resistor of an embodiment of the industrial control mainboard display circuit with anti-interference function of the present utility model.

[0032] Figure 7 The circuit diagram of the interface module of an embodiment of the industrial control mainboard display circuit with anti-interference function of the present utility model.

[0033] Figure 8 The circuit diagram of the electromagnetic interference suppression module of an embodiment of the industrial control mainboard display circuit with anti-interference function of the present utility model.

[0034] Figure 9 The circuit diagram of the third MOS transistor of an embodiment of the industrial control mainboard display circuit with anti-interference function of the present utility model.

[0035] Figure 10 The circuit diagram of the electrostatic protector of an embodiment of the industrial control mainboard display circuit with anti-interference function of the present utility model.

[0036] In the figure, 10 is the industrial control mainboard display circuit; 11 is the interference blocking module; 12 is the surge suppression module; 13 is the common-mode interference suppression module; 14 is the level conversion module; 15 is the electrostatic protection module; 16 is the interface module; 161 is the filtering unit; 17 is the interference isolation module; 18 is the CPU chip; 19 is the electromagnetic interference suppression module. Detailed implementation manners

[0037] Next, the technical solutions in the embodiments of the present utility model will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all the embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present utility model.

[0038] The directional terms mentioned in the present utility model, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side", "top" and "bottom" and other words, are only with reference to the orientation of the accompanying drawings. The directional terms used are for explaining and understanding the present utility model, rather than for limiting the present utility model.

[0039] The terms "first", "second", etc. in the terms of the present utility model are only for descriptive purposes, and cannot be understood as indicating or implying relative importance, nor as a limitation on the sequence.

[0040] In the figure, the units with similar structures are denoted by the same reference numerals.

[0041] Please refer to Figure 1, the present utility model provides an industrial control mainboard display circuit 10 with anti-interference function. The industrial control mainboard display circuit 10 is used to perform anti-interference operations on the image signal, clock signal, SDA signal, and SCL signal output by the CPU chip 18. Moreover, the industrial control mainboard display circuit 10 is applied to a circuit board. Among them, the industrial control mainboard display circuit 10 includes an interference blocking module 11, a surge suppression module 12, a common-mode interference suppression module 13, a level conversion module 14, an electrostatic protection module 15, and an interface module 16.

[0042] Please refer to Figure 1 and Figure 2 , the interference blocking module 11 is connected to the CPU chip 18. The surge suppression module 12 is connected to the interference blocking module 11. The interference blocking module 11 includes a first coupling capacitor, and the surge suppression module 12 includes a surge protector. One end of the first coupling capacitor is connected to the CPU chip 18, and the other end of the first coupling capacitor is connected to the surge protector. Among them, the first coupling capacitor includes first coupling capacitor C313, first coupling capacitor C314, first coupling capacitor C315, first coupling capacitor C316, first coupling capacitor C317, first coupling capacitor C318, first coupling capacitor C319, and first coupling capacitor C320. Among them, the clock signal is a group of differential signals, and the image signal is three groups of differential signals. The clock signal is respectively input into the circuit through the first coupling capacitor C313 and the first coupling capacitor C314. The first group of image signals is input into the circuit through the first coupling capacitor C315 and the first coupling capacitor C316. The second group of image signals is input into the circuit through the first coupling capacitor C317 and the first coupling capacitor C318. The third group of image signals is input into the circuit through the first coupling capacitor C319 and the first coupling capacitor C320. The interference blocking module can be used to block the DC component interference of the image signal and the clock signal, reduce the attenuation distortion of the signal, and the interference blocking module can output the image signal and the clock signal after blocking the DC component interference.

[0043] Please refer to Figure 2 and Figure 3, The surge protectors are surge protector TVS44 and surge protector TVS45. The first coupling capacitor C313 is connected to the I / O_1 pin of surge protector TVS44, and the first coupling capacitor C314 is connected to the I / O_2 pin of surge protector TVS44. The first coupling capacitor C315 is connected to the I / O_3 pin of surge protector TVS44, and the first coupling capacitor C316 is connected to the I / O_4 pin of surge protector TVS44. The first coupling capacitor C317 is connected to the I / O_1 pin of surge protector TVS45, and the first coupling capacitor C318 is connected to the I / O_2 pin of surge protector TVS45. The first coupling capacitor C319 is connected to the I / O_3 pin of surge protector TVS45, and the first coupling capacitor C320 is connected to the I / O_4 pin of surge protector TVS45. During signal transmission, the signal is affected by external devices, resulting in some signals exceeding the specified threshold and causing damage to circuit components. However, the display circuit 10 of the industrial control main board is provided with a surge protector, which can suppress the surge voltage of the image signal and the clock signal. Therefore, the surge protector can output the image signal and the clock signal after suppressing the surge voltage. Thus, the surge protector can prevent the overvoltage image signal and clock signal from damaging the subsequent circuit components.

[0044] Please refer to Figure 4 , The display circuit 10 of the industrial control main board further includes a plurality of pull-down resistors and the fourth MOS transistor Q20, and the plurality of pull-down resistors are connected in parallel. After the circuit works normally, the pull-down resistors can provide a stable signal reference point. The plurality of pull-down resistors are controlled by one MOS transistor. The gate of the fourth MOS transistor Q20 is connected to the control power supply VCC3. The source of the fourth MOS transistor Q20 is grounded. Among them, the plurality of pull-down resistors are respectively resistor R274, resistor R275, resistor R276, resistor R277, resistor R278, resistor R279, resistor R280, and resistor R281. One end of resistor R274 is connected to the first coupling capacitor C313, and the other end of resistor R274 is connected to the drain of the fourth MOS transistor Q20. One end of resistor R274 is connected to the first coupling capacitor C313, and the other end of resistor R274 is connected to the drain of the fourth MOS transistor Q20. One end of resistor R275 is connected to the first coupling capacitor C314, and the other end of resistor R275 is connected to the drain of the fourth MOS transistor Q20. One end of resistor R276 is connected to the first coupling capacitor C320, and the other end of resistor R276 is connected to the drain of the fourth MOS transistor Q20. One end of resistor R277 is connected to the first coupling capacitor C319, and the other end of resistor R277 is connected to the drain of the fourth MOS transistor Q20.

[0045] Please refer to Figure 4, One end of resistor R278 is connected to the first coupling capacitor C317, and the other end of resistor R278 is connected to the drain of the fourth MOS transistor Q20. One end of resistor R279 is connected to the first coupling capacitor C318, and the other end of resistor R279 is connected to the drain of the fourth MOS transistor Q20. One end of resistor R280 is connected to the first coupling capacitor C316, and the other end of resistor R280 is connected to the drain of the fourth MOS transistor Q20. One end of resistor R281 is connected to the first coupling capacitor C315, and the other end of resistor R281 is connected to the drain of the fourth MOS transistor Q20. When the CPU chip 18 is not powered, the signal output by the CPU chip 18 cannot be effectively output, which can avoid unstable display of the subsequent image signal.

[0046] Please refer to Figure 5 , The display circuit 10 of the industrial control main board further includes an interference isolation module 17. One end of the interference isolation module 17 is connected to the surge suppression module 12, and one end of the interference isolation module 17 is connected to the common-mode interference suppression module 13. The interference isolation module 17 includes second coupling capacitors, and the second coupling capacitors are respectively the second coupling capacitor C211, the second coupling capacitor C212, the second coupling capacitor C213, the second coupling capacitor C214, the second coupling capacitor C215, the second coupling capacitor C216, the second coupling capacitor C217, and the second coupling capacitor C218. The display circuit 10 of the industrial control main board further includes first resistors, and the first resistors are respectively resistor R255, resistor R256, resistor R257, resistor R258, resistor R259, resistor R260, resistor R261, and resistor R262.

[0047] Please refer to Figure 3 and Figure 5 , One end of the second coupling capacitor C211 is connected to the I / O_1 pin of the surge protector TVS44, and the other end of the second coupling capacitor C211 is connected to the resistor R255. One end of the second coupling capacitor C212 is connected to the I / O_2 pin of the surge protector TVS44, and the other end of the second coupling capacitor C212 is connected to the resistor R256. One end of the second coupling capacitor C213 is connected to the I / O_3 pin of the surge protector TVS44, and the other end of the second coupling capacitor C213 is connected to the resistor R257. One end of the second coupling capacitor C214 is connected to the I / O_4 pin of the surge protector TVS44, and the other end of the second coupling capacitor C214 is connected to the resistor R258. The interference isolation module 17 is used to block the DC component interference of the internal traces of the circuit board, so that the interference isolation module 17 can output the image signal and data signal after blocking the DC component interference.

[0048] Please refer to Figure 3 and Figure 5, One end of the second coupling capacitor C215 is connected to the I / O_1 pin of the surge protector TVS45, and the other end of the second coupling capacitor C215 is connected to the resistor R259. One end of the second coupling capacitor C216 is connected to the I / O_2 pin of the surge protector TVS45, and the other end of the second coupling capacitor C212 is connected to the resistor R260. One end of the second coupling capacitor C217 is connected to the I / O_3 pin of the surge protector TVS45, and the other end of the second coupling capacitor C213 is connected to the resistor R261. One end of the second coupling capacitor C218 is connected to the I / O_4 pin of the surge protector TVS45, and the other end of the second coupling capacitor C214 is connected to the resistor R262. The image signal and the clock signal are both transmitted by differential traces, and the transmission rate of the differential signal is relatively high. To ensure the stability and quality of signal transmission, impedance matching is required for the circuit. Therefore, a first resistor is connected in series between the second coupling capacitor and in the display circuit 10 of this industrial control main board. This first resistor can be used for impedance matching operations, and the parameters of this first resistor can be adjusted according to the actual signal transmission.

[0049] Please refer to Figure 5 , The common-mode interference suppression module 13 is connected to the surge suppression module 12. The common-mode interference suppression module 13 includes a common-mode inductor. One end of the common-mode inductor is connected to the surge protector, and the other end of the common-mode inductor is connected to the electrostatic protection module 15. The common-mode inductor is used to suppress the common-mode interference of the image signal and the clock signal.

[0050] Please refer to Figure 5 , The common-mode inductor includes common-mode inductors B13, B14, B15, and B16. The common-mode inductor B13 is connected to the resistors R255 and R256, the common-mode inductor B14 is connected to the resistors R257 and R258. The common-mode inductor B15 is connected to the resistors R259 and R260, and the common-mode inductor B16 is connected to the resistors R261 and R262. The common-mode interference suppression module 13 is used to suppress the common-mode interference of the image signal and the clock signal. The common-mode interference suppression module can output the image signal and the clock signal after suppressing the common-mode interference. The setting of this common-mode interference suppression module can improve the stability and waveform integrity of the signal.

[0051] Please refer to Figure 5 and Figure 6, the level conversion module 14 is connected to the CPU chip 18. The level conversion module 14 includes a first MOS transistor Q17 and a second MOS transistor Q18. The source of the first MOS transistor Q17 is connected to the CPU chip 18. The source of the first MOS transistor Q17 is used to receive the SCL signal, and the gate of the first MOS transistor Q17 is connected to the 1.8V power supply. The drain of the first MOS transistor Q17 is connected to the 5V power supply and the electrostatic protection module 15. The first MOS transistor Q17 is used to perform a level conversion operation on the SCL signal, so that the level of the SCL signal can be switched between 0V and 5V. The source of the second MOS transistor Q18 is connected to the CPU chip 18, and the source of the second MOS transistor Q18 is used to receive the SDA signal. The gate of the second MOS transistor Q18 is connected to the 1.8V power supply, and the drain of the second MOS transistor Q18 is connected to the 5V power supply and the electrostatic protection module 15. The second MOS transistor Q18 is used to perform a level conversion operation on the SDA signal. Thus, the level of the SDA signal can be switched between 0V and 5V. The level conversion module 14 is used to perform a level conversion operation on the SDA signal and the SCL signal, so that the levels of the SDA signal and the SCL signal are consistent. Therefore, the level conversion module can output the level-converted SDA signal and SCL signal.

[0052] Please refer to Figure 6 and Figure 7 , the output signal level of the CPU chip 18 is 1.8V, and the output signal level of the digital video interface J18 is 5V. Since a unified level is required for normal transmission at both ends of the signal, the signal needs to be level-converted when the levels are inconsistent. Moreover, the PN junction of the MOS transistor can achieve signal level conversion. Therefore, the level conversion module 14 is provided with a first MOS transistor Q17 and a second MOS transistor Q18. At the same time, the MOS transistor can also isolate the CPU chip 18, thus effectively protecting the signal pins of the CPU chip 18 and preventing the CPU chip 18 from being damaged by external transient loads. Also, the cost of the MOS transistor is relatively low, which is beneficial to saving the cost of circuit design.

[0053] Please refer to Figure 6 , in the idle state, the level conversion module 14 needs to default to a high level. Therefore, a pull-up resistor R271 is set between the 5V power supply and the drain of the first MOS transistor Q17, and a pull-up resistor R272 is set between the 5V power supply and the drain of the second MOS transistor Q18. When the wiring distance on the circuit board is relatively long, near the digital video interface J18, a pull-up resistor R221 and a pull-up resistor R222 can be added respectively to prevent the signal level at the port from decreasing due to line loss. Additionally, near the digital video interface J18, a series resistor can also be set, and this series resistor can be used for impedance matching of the line, thereby improving the signal quality, reducing signal attenuation, and filtering out external signal spikes.

[0054] Please refer to Figure 5 , the electrostatic protection module 15 is connected to the common-mode interference suppression module 13 and the level conversion module 14. The electrostatic protection module 15 includes a first electrostatic protector and a second electrostatic protector. The first electrostatic protector includes a first input pin and a first output pin. The first input pin is connected to the common-mode inductor. The first output pin is connected to the interface module 16. The first electrostatic protector is used to discharge the electrostatic interference of the image signal and the clock signal. Among them, the first electrostatic protector is electrostatic protector U27, electrostatic protector U29, electrostatic protector U30, electrostatic protector U28. The first input pin I1 and the first input pin I2 of the electrostatic protector U27 are connected to the common-mode inductor B13. The first input pin I1 and the first input pin I2 of the electrostatic protector U29 are connected to the common-mode inductor B14. The first input pin I1 and the first input pin I2 of the electrostatic protector U30 are connected to the common-mode inductor B15. The first input pin I1 and the first input pin I2 of the electrostatic protector U28 are connected to the common-mode inductor B16.

[0055] Please refer to Figure 5 , the second electrostatic protector is electrostatic protector U26. The second electrostatic protector includes a second input pin and a second output pin. The display circuit 10 of the industrial control main board further includes a resistor R227 and a resistor R228. The resistor R227 is connected between the second input pin I1 of the electrostatic protector U26 and the drain of the first MOS transistor Q17. The resistor R228 is connected between the second input pin I2 of the electrostatic protector U26 and the drain of the second MOS transistor Q18. The second output pin is connected to the interface module 16. The second electrostatic protector is used to discharge the electrostatic interference of the SDA signal and the SCL signal. Since the electrostatic protection module 15 is used to discharge the electrostatic interference of the image signal, the clock signal, the SDA signal and the SCL signal, the electrostatic protection module can output the image signal, the clock signal, the SDA signal and the SCL signal after discharging the electrostatic interference. The electrostatic protector can protect against external input electrostatic interference and discharge abnormal charges in time, so the electrostatic protector effectively protects the internal components of the circuit.

[0056] Please refer to Figure 5 , Figure 6 and Figure 10 , the display circuit 10 of the industrial control main board further includes an electrostatic protector U41. The I1 pin of the electrostatic protector U41 is connected to the drain of the first MOS transistor Q17. The I2 pin of the electrostatic protector U41 is connected to the drain of the second MOS transistor Q18. The electrostatic protector U41 is used to further protect against external input electrostatic interference. The O1 pin of the electrostatic protector U41 is connected to one end of the resistor R227. The O2 pin of the electrostatic protector U41 is connected to the resistor R228.

[0057] Please refer to Figure 5 and Figure 7, the interface module 16 is connected to the electrostatic protection module 15. The interface module 16 includes a digital video interface J18. The digital video interface J18 includes a first receiving pin, a second receiving pin, and a third receiving pin. Both the first receiving pin and the second receiving pin are connected to a first output pin. The first receiving pin is used to receive the image signal after discharging the electrostatic interference, and the second receiving pin is used to receive the clock signal after discharging the electrostatic interference. The third receiving pin is connected to a second output pin. The third receiving pin is used to receive the SDA signal after discharging the electrostatic interference and the SCL signal after discharging the electrostatic interference.

[0058] Please refer to Figure 5 and Figure 7 , the digital video interface J18 is used to transmit the image signal, the clock signal, the SDA signal, and the SCL signal to the industrial control motherboard display device. The industrial control motherboard display device is used to generate an image based on the image signal. The clock signal is applied in a synchronous digital circuit. The clock signal provides a reference frequency so that all circuit elements in the circuit can work at the same frequency. The SCL signal is a serial clock signal, and the SCL signal is transmitted on the I2C bus. The SCL signal is provided by a master device (such as a microcontroller), and the SCL signal is used to synchronize the data transmission of all devices on the I2C bus. The SDA signal is a serial data signal, and the SDA signal is transmitted on the I2C bus. The SDA signal can be provided by the master device or the slave device, and the SDA signal is used to transmit data on the I2C bus. The data changes between high and low levels on the SDA signal under the clock synchronization of the SCL signal, thereby realizing data transmission.

[0059] Please refer to Figure 5 and Figure 7, the first receiving pin includes a first receiving pin D0+, a first receiving pin D0-, a first receiving pin D1+, a first receiving pin D1-, a first receiving pin D2+, and a first receiving pin D2-. The first receiving pin D0+ is connected to the first output pin O2 of the electrostatic protector U28, and the first receiving pin D0- is connected to the first output pin O1 of the electrostatic protector U28. The first receiving pin D1+ is connected to the first output pin O1 of the electrostatic protector U30, and the first receiving pin D1- is connected to the first output pin O2 of the electrostatic protector U30. The first receiving pin D2+ is connected to the first output pin O1 of the electrostatic protector U29, and the first receiving pin D2- is connected to the first output pin O2 of the electrostatic protector U28. The second receiving pin includes a second receiving pin CLK- and a second receiving pin CLK+, the second receiving pin CLK- is connected to the first output pin O2 of the electrostatic protector U27, and the second receiving pin CLK+ is connected to the first output pin O1 of the electrostatic protector U27. The third receiving pin includes a third receiving pin SCL and a third receiving pin SDA, the third receiving pin SCL is connected to the second output pin O1 of the electrostatic protector U26, and the third receiving pin SDA is connected to the second output pin O2 of the electrostatic protector U26.

[0060] Please refer to Figure 7 and Figure 8 , the digital video interface J18 includes a ground pin, and the industrial control main board display circuit 10 further includes an electromagnetic interference suppression module 19. The electromagnetic interference suppression module 19 is connected to the ground pin, and the electromagnetic interference suppression module 19 is used to perform electromagnetic interference suppression operations on the digital video interface J18. The electromagnetic interference module includes a stitching capacitor C308, a stitching capacitor C309, a stitching capacitor C310, a stitching capacitor C311, and a stitching capacitor C312, and the stitching capacitors C308, C309, C310, C311, and C312 are all connected in parallel. In the circuit board port design of the digital video interface J18, the GND copper plating at the connector and the internal GND copper plating adopt a single-point grounding wiring method, and at the same time, a stitching capacitor is set between the two GND copper platings, which can be used to filter out external interference and enhance the anti-interference ability of the industrial control main board display circuit 10 of the product.

[0061] Please refer to Figure 7, the interface module 16 further includes a filtering unit 161. The filtering unit 161 is connected to the third receiving pin, and the filtering unit 161 is used to perform filtering operations on the SDA signal and the SCL signal. Among them, the filtering unit 161 includes a filtering capacitor C304 and a filtering capacitor C303. One end of the filtering capacitor C304 is connected to the third receiving pin SCL, and the other end of the filtering capacitor C304 is grounded. One end of the filtering capacitor C303 is connected to the third receiving pin SDA, and the other end of the filtering capacitor C303 is grounded. The filtering capacitor can be used to filter out the spike clutter of the SDA signal and the SCL signal, thereby improving the stability of the SDA signal and the SCL signal.

[0062] Please refer to Figure 7 and Figure 9 , the digital video interface J18 includes HDP pins, and the HDP pins are used to output detection signals. The CPU chip 18 is used to determine whether the digital video interface J18 is connected to the industrial control motherboard display device based on the detection signals. When the voltage value of the detection signal is greater than the first set value, the CPU chip 18 can determine that the digital video interface J18 has been connected to the industrial control motherboard display device. When the voltage of the detection signal is less than the second set value, the CPU chip 18 can determine that the digital video interface J18 is not connected to the industrial control motherboard display device. The interface module 16 includes a third MOS transistor Q19, and the gate of the third MOS transistor Q19 is connected to the CPU chip 18. The drain of the third MOS transistor Q19 is connected to the HDP pin, and the source of the third MOS transistor Q19 is grounded. The third MOS transistor Q19 is used to perform isolation operations on the CPU chip 18. The interface module 16 further includes a resistor R273. One end of the resistor R273 is connected to the gate of the third MOS transistor Q19, and the other end of the resistor R273 is grounded.

[0063] Please refer to Figure 2 and Figure 3 , using the third MOS transistor Q19 to isolate the CPU chip 18 can prevent the signal pins of the CPU chip 18 from being damaged by external abnormal loads. The signal output by the CPU chip 18 controls the gate of the third MOS transistor Q19. The CPU chip 18 can output a high-level signal to turn on the third MOS transistor Q19, thereby forcibly pulling down the HDP pin of the digital video interface J18 to the ground terminal. And, in the connector of the digital video interface J18, a capacitor and a transient voltage suppression diode can be respectively configured for the HDP pin and the ground terminal. The capacitor and the transient voltage suppression diode can filter out signal spikes and discharge high electrical loads, thereby making the signals inside the circuit stable and protecting the electronic devices in the circuit.

[0064] The digital video interface J18 includes HOST pins. The interface module 16 further includes a transient voltage suppression diode TVS26 and a capacitor C302. One end of the transient voltage suppression diode TVS26 is connected to the HOST pin, and the other end of the transient voltage suppression diode TVS26 is grounded. The capacitor C302 is connected in parallel with the transient voltage suppression diode TVS26. The digital video interface J18 includes a power supply pin +5V, and the power supply pin +5V is connected to a 5V power supply. The interface module 16 further includes a transient voltage suppression diode TVS43, a decoupling capacitor C306, a decoupling capacitor C307, and an inductor L4. One end of the inductor L4 is connected to the 5V power supply, and the other end of the inductor L4 is connected to a diode D18. One end of the decoupling capacitor C306 is connected to the inductor L4, and the other end of the decoupling capacitor C306 is grounded. The decoupling capacitor C307 is connected in parallel with the decoupling capacitor C306, and the transient voltage suppression diode TVS43 is connected in parallel with the decoupling capacitor C306. The interface module 16 further includes a diode D18. The positive electrode of the diode D18 is connected to the inductor L4, and the negative electrode of the diode D18 is connected to the +5V pin.

[0065] The digital video interface J18 can be powered by a 5V power supply. The 5V power supply is blocked by an inductor L4, which can avoid adverse effects on the power supply caused by external ripples and the like. And the interface module 16 is configured with a decoupling capacitor C306 and a decoupling capacitor C307, and the decoupling capacitor C306 and the decoupling capacitor C307 can filter out the ripples of the 5V power supply. The transient voltage suppression diode TVS43 is used to clamp and limit the voltage of the 5V power supply, ensuring the stability of the voltage at the power supply output terminal. The setting of the diode D18 can ensure the unidirectional outward output of the power supply, effectively avoid the external current from flowing into the power supply, and also avoid damage to the device caused by the reverse input of the power supply due to wiring errors.

[0066] The working principle of the present utility model is as follows: When the display circuit 10 of the industrial control main board works, first, the CPU chip outputs an image signal and a clock signal. The image signal and the clock signal flow through the interference blocking module 11, and the first coupling capacitor of the interference blocking module 11 can block the DC component interference of the image signal and the clock signal. Then, the image signal and the clock signal flow through the surge suppression module 12, and the surge protector of the surge suppression module 12 can perform a surge voltage suppression operation on the image signal and the clock signal. Next, the image signal and the clock signal flow through the common-mode interference suppression module 13, and the common-mode inductor of the common-mode interference suppression module 13 can perform a common-mode interference suppression operation on the image signal and the clock signal. In order to block the DC component interference of the internal traces of the circuit board, an interference isolation module 17 is provided between the surge suppression module 12 and the common-mode interference suppression module 13. Subsequently, the image signal and the clock signal flow through the electrostatic protection module 15, and the first electrostatic protector of the electrostatic protection module 15 can discharge the electrostatic interference of the image signal and the clock signal. Then, the digital video interface J18 of the interface module 16 receives the image signal and the clock signal. Moreover, the digital video interface J18 can transmit the image signal and the clock signal to the display device of the industrial control main board, and the display device of the industrial control main board can generate an image based on the image signal. At the same time, the CPU chip also outputs an SDA signal and an SCL signal. Then, the SDA signal and the SCL signal flow through the level conversion module 14. The level conversion module 14 can perform a level conversion operation on the SDA signal and the SCL signal, so that the levels of the SDA signal and the SCL signal are consistent. Next, the SDA signal and the SCL signal flow through the electrostatic protection module 15, and the second electrostatic protector of the electrostatic protection module 15 can discharge the electrostatic interference of the SDA signal and the SCL signal. Subsequently, the digital video interface J18 of the interface module 16 receives the SDA signal and the SCL signal. Moreover, the digital video interface J18 can transmit the SDA signal and the SCL signal to the display device of the industrial control main board. In order to filter the SDA signal and the SCL signal, the interface module 16 is also provided with a filtering unit 161. In order to suppress electromagnetic interference of the digital video interface J18, the display circuit 10 of the industrial control main board is provided with an electromagnetic interference suppression module.

[0067] The utility model provides an industrial control mainboard display circuit with anti-interference function, which can perform anti-interference operations on the image signal, clock signal, SDA signal and SCL signal output by the CPU chip. Among them, the industrial control mainboard display circuit includes an interference blocking module, a surge suppression module, a common-mode interference suppression module, a level conversion module, an electrostatic protection module and an interface module. The interference blocking module can block the DC component interference of the image signal and the clock signal, thereby reducing the attenuation and distortion of the signal. The common-mode interference suppression module can perform suppression operations on the common-mode interference of the image signal and the clock signal, thus effectively improving the stability and waveform integrity of the image signal and the clock signal. And, the surge suppression module can perform suppression operations on the surge voltage of the image signal and the clock signal, and the electrostatic protection module discharges the electrostatic interference of the image signal, clock signal, SDA signal and SCL signal. Thus, the anti-interference ability of the image signal can be improved, and the reliability of the circuit is enhanced. Even when the image signal is transmitted over a long distance, it is difficult for external power equipment to cause electrical interference to the image signal, and the image signal will not be deleted, deformed or distorted. Therefore, the setting of the industrial control mainboard display circuit effectively solves the technical problem that the image signal is easily interfered during the transmission process.

[0068] In summary, although the present utility model has been disclosed above with preferred embodiments, the above preferred embodiments are not intended to limit the present utility model. Those of ordinary skill in the art can make various changes and modifications without departing from the spirit and scope of the present utility model. Therefore, the protection scope of the present utility model is subject to the scope defined by the claims.

Claims

1. An industrial control motherboard display circuit with anti-interference function, used for performing anti-interference operation on the image signal, clock signal, SDA signal and SCL signal output by the CPU chip, characterized in that: These include, An interference blocking module, connected to the CPU chip, for blocking interference of DC components of the image signal and the clock signal; A surge suppression module, connected to the interference blocking module, and configured to suppress surge voltages of the image signal and the clock signal; A common mode interference suppression module, connected to the surge suppression module, and configured to suppress the common mode interference of the image signal and the clock signal; A level conversion module, connected to the CPU chip, for performing a level conversion operation on the SDA signal and the SCL signal, so that the levels of the SDA signal and the SCL signal are consistent; An electrostatic protection module, connected to the common mode interference suppression module and the level conversion module, and used for discharging electrostatic interference of the image signal, the clock signal, the SDA signal and the SCL signal; The interface module is connected to the electrostatic protection module and is used to transmit the image signal, the clock signal, the SDA signal and the SCL signal to the industrial control mainboard display device, and the industrial control mainboard display device is used to generate an image based on the image signal.

2. The industrial control mainboard display circuit with anti-interference function according to claim 1, characterized in that: The industrial control mainboard display circuit also includes an interference isolation module, one end of the interference isolation module is connected to the surge suppression module, and one end of the interference isolation module is connected to the common mode interference suppression module. The interference isolation module is used to block the DC component interference of the internal wiring of the circuit board.

3. The industrial control mainboard display circuit with anti-interference function according to claim 1, characterized in that: The interference blocking module includes a first coupling capacitor, and the surge suppression module includes a surge protector. One end of the first coupling capacitor is connected to the CPU chip, and the other end of the first coupling capacitor is connected to the surge protector. The first coupling capacitor blocks the DC component interference of the image signal and the clock signal, and the surge protector is used to suppress the surge voltage of the image signal and the clock signal.

4. The industrial control mainboard display circuit with anti-interference function according to claim 3, characterized in that: The common-mode interference suppression module includes a common-mode inductor, one end of which is connected to the surge protector, and the other end of which is connected to the electrostatic protection module. The common-mode inductor is used to suppress common-mode interference of the image signal and the clock signal.

5. The industrial control mainboard display circuit with anti-interference function according to claim 4, characterized in that: The level conversion module includes a first MOS tube and a second MOS tube, the source of the first MOS tube is connected to the CPU chip, the source of the first MOS tube is used to receive the SCL signal, the gate of the first MOS tube is connected to a 1.8V power supply, the drain of the first MOS tube is connected to a 5V power supply and the electrostatic protection module, and the first MOS tube is used to perform a level conversion operation on the SCL signal; The source of the second MOS tube is connected to the CPU chip, the source of the second MOS tube is used to receive the SDA signal, the gate of the second MOS tube is connected to a 1.8V power supply, the drain of the second MOS tube is connected to a 5V power supply and the electrostatic protection module, and the second MOS tube is used to perform a level conversion operation on the SDA signal.

6. The industrial control mainboard display circuit with anti-interference function according to claim 5, characterized in that: The electrostatic protection module includes a first electrostatic protector and a second electrostatic protector, the first electrostatic protector includes a first input pin and a first output pin, the first input pin is connected to the common mode inductor, the first output pin is connected to the interface module, and the first electrostatic protector is used to discharge electrostatic interference of the image signal and the clock signal; The second electrostatic protector includes a second input pin and a second output pin, the second input pin is connected to the drain of the first MOS tube and the drain of the second MOS tube, the second output pin is connected to the interface module, and the second electrostatic protector is used to discharge electrostatic interference of the SDA signal and the SCL signal.

7. The industrial control mainboard display circuit with anti-interference function according to claim 6, characterized in that: The interface module includes a digital video interface, and the digital video interface includes a first receiving pin, a second receiving pin, and a third receiving pin, wherein the first receiving pin and the second receiving pin are both connected to the first output pin, the first receiving pin is used to receive the image signal, the second receiving pin is used to receive the clock signal, and the third receiving pin is connected to the second output pin, and the third receiving pin is used to receive the SDA signal and the SCL signal; The digital video interface is used to connect to the industrial control mainboard display device, and transmit the image signal, the clock signal, the SDA signal and the SCL signal to the industrial control mainboard display device.

8. The industrial control mainboard display circuit with anti-interference function according to claim 7, characterized in that: The digital video interface includes a ground pin, and the industrial control mainboard display circuit also includes an electromagnetic interference suppression module, which is connected to the ground pin and is used to suppress electromagnetic interference on the digital video interface.

9. The industrial control mainboard display circuit with anti-interference function according to claim 7, characterized in that: The interface module further includes a filtering unit, which is connected to the third receiving pin and is used for performing filtering operations on the SDA signal and the SCL signal.

10. The industrial control mainboard display circuit with anti-interference function according to claim 7, characterized in that: The digital video interface includes an HDP pin, which is used to output a detection signal. The CPU chip is used to determine whether the digital video interface is connected to an industrial control mainboard display device based on the detection signal. The interface module includes a third MOS tube, a gate of the third MOS tube is connected to the CPU chip, a drain of the third MOS tube is connected to the HDP pin, a source of the third MOS tube is grounded, and the third MOS tube is used to isolate the CPU chip.

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