Packaging structure

Abstract

The utility model provides a packaging structure, which is applied to the technical field of semiconductors. Specifically, in the packaging structure provided by the utility model, the bump structure is specifically arranged in the stacking layer comprising the plurality of passivation layers, and the bump structure comprises the plurality of bumps which are arranged at intervals along the horizontal direction, so that the plurality of passivation layers are arranged around the bump structure; the level of the bump structure for resisting moisture invasion and protecting a surface circuit layer is improved, the bump structure with a plurality of bumps is formed, a structure foundation is built, and the plurality of bumps which are arranged at intervals in the horizontal direction are further arranged in the bump structure. The stress of the bump structure is dispersed to a plurality of contact surfaces of the plurality of bumps and the bonding pad layer and the passivation layer, so that the problem of cracking of the bottom of the bump structure is avoided, and finally the capability of resisting pressure and shear force of the packaging structure comprising the bump structure is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductors, and particularly relates to a packaging structure. Background Art

[0002] Today, with the rapid development of informatization, the market prospect of integrated circuits is becoming more and more broad. Correspondingly, the industries of integrated circuit design, chip manufacturing, and integrated circuit packaging have all developed rapidly. In China, the integrated circuit packaging industry has become an important economic growth point of the integrated circuit industry. In order to meet the various requirements of integrated circuit components such as high-speed processing, multi-functionality, integration, miniaturization, and low cost, the integrated circuit packaging technology also needs to develop towards miniaturization and high density. Currently, the commonly used integrated circuit packaging technologies include Ball Grid Array (BGA), Chip Scale Package (CSP), and Multi-Chip Module (MCM). In the integrated circuit packaging technology, the packaging density of the integrated circuit refers to the degree of the number of pins contained in a unit area. For high-density integrated circuit packaging, shortening the length of the wiring helps to improve the signal transmission speed. Therefore, the application of bumps has become the mainstream of high-density packaging. Summary of the Utility Model

[0003] The purpose of the utility model is to provide a packaging structure, and specifically propose a bump structure arranged in a multi-layer passivation layer and including a plurality of bumps arranged at intervals in the horizontal direction, so as to avoid cracking at the bottom of the bump structure and improve the ability of the bump structure to resist moisture intrusion, pressure, and shear force.

[0004] To achieve the above purpose, the utility model provides a packaging structure, which specifically may include:

[0005] A substrate;

[0006] A solder pad layer located on a part of the surface of the substrate;

[0007] A stacked layer located on the substrate and at least including a first passivation layer and a second passivation layer stacked in sequence from bottom to top, and a plurality of grooves are formed in the stacked layer in the horizontal direction;

[0008] A bump structure located on the stacked layer, and at least part of the bump structure conformally fills the plurality of grooves. The bump structure includes a plurality of bumps, the plurality of bumps correspond to the plurality of grooves one by one, and at least one stepped surface arranged in the horizontal direction is provided on the side wall of each groove.

[0009] In some alternative examples, the packaging structure of the utility model may further include:

[0010] The sputtering layer is located between the bump structure, the solder pad layer and the substrate.

[0011] In some alternative examples, the groove width of the groove extending in the horizontal direction may gradually decrease from the groove opening to the surface direction close to the substrate.

[0012] In some alternative examples, the included angle range between the side wall of the groove and the extension line of its groove bottom in the horizontal direction may be: 44° to 89°.

[0013] In some alternative examples, the ratio range of the groove width to the groove depth of the groove is: 1:3 to 3:1.

[0014] In some alternative examples, three grooves may be formed in the stacked layer. The three grooves include a first groove with the groove bottom exposing a partial surface of the solder pad layer, and a second groove and a third groove respectively located on both sides of the first groove and with the groove bottom exposing a partial surface of the stacked layer.

[0015] In some alternative examples, the groove width range of the first groove is: 14 μm to 123 μm.

[0016] In some alternative examples, the groove width range of the second groove or the third groove may be: 3 μm to 30 μm.

[0017] In some alternative examples, the groove bottom of the first groove may be higher than the groove bottom of the second groove, and the groove bottoms of the second groove and the third groove may be at the same horizontal height.

[0018] In some alternative examples, the spacing between the first groove and the second groove in the horizontal direction may be equal to the spacing between the first groove and the third groove in the horizontal direction.

[0019] In some alternative examples, the range of the spacing may be: 2 μm to 21 μm.

[0020] In some alternative examples, the side wall of the first groove has N-level stepped surfaces that decrease successively from high to low in the vertical direction, and the side wall of the second groove or the third groove has M-level stepped surfaces that decrease successively from high to low in the vertical direction, where N = M + 1, and 5 ≥ N > M ≥ 1.

[0021] In some alternative examples, the stacked layer may further include:

[0022] A third passivation layer located on the second passivation layer.

[0023] In some alternative examples, the bump structure may further include:

[0024] A copper pillar, located on the bump structure and electrically connected to the bump structure;

[0025] A tin cap, located on the copper pillar.

[0026] In some alternative examples, the thickness of the second passivation layer ≥ the thickness of the first passivation layer, and the thickness of the third passivation layer is the same as the thickness of the second passivation layer.

[0027] In some alternative examples, the thickness range of the first passivation layer is 1 μm to 10 μm.

[0028] Compared with the prior art, the present utility model has at least the following technical effects:

[0029] In the packaging structure provided by the present utility model, the bump structure is specifically arranged in a stacked layer including multiple passivation layers, and the bump structure includes a plurality of bumps arranged at intervals in the horizontal direction. By arranging multiple passivation layers around the bump structure, the ability of the bump structure to resist moisture intrusion and protect the surface circuit layer is improved, and a structural foundation is built for forming a bump structure with multiple bumps. Further, by arranging a plurality of bumps arranged at intervals in the horizontal direction in the bump structure, the stress of the bump structure is dispersed to multiple contact surfaces of the plurality of bumps with the solder pad layer and the passivation layer, that is, the problem of cracking at the bottom of the bump structure is avoided, so as to ultimately improve the ability of the packaging structure including the bump structure to resist pressure and shear force. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The drawings are used to provide a further understanding of the present application and constitute a part of the specification. They are used to explain the present application together with the following specific embodiments, but do not constitute a limitation to the present application. In the drawings:

[0031] Figure 1 It is a schematic cross-sectional structure diagram of a prior art packaging structure;

[0032] Figure 2 It is an example diagram of the cross-sectional structure of the packaging structure provided in the embodiment of the present utility model;

[0033] Figure 3 It is another example diagram of the cross-sectional structure of the packaging structure provided in the embodiment of the present utility model.

[0034] Among them, the reference numerals are:

[0035] 1 - bump, 2 - metal pad, 3 - passivation layer, 4 - copper pillar, 10 - packaging structure, 100 - substrate, 110 - solder pad layer, 120 - stacking layer, 121 - pad passivation layer, 122 - first passivation layer, 123 - second passivation layer, 124 - third passivation layer, 101 - first groove, 102 - second groove, 103 - third groove, 130 - sputtering layer, 140 - bump structure, 141 - first bump, 142 - second bump, 143 - third bump, 144 - copper pillar, 150 - tin cap, AA - stepped surface.

[0036] In the drawings, like components are denoted by like reference numerals, and the drawings are not drawn to scale. Detailed implementation manners

[0037] The following describes the implementation manners of the present utility model through specific specific examples. Those skilled in the art can easily understand other advantages and effects of the present utility model from the content disclosed in this specification. The present utility model can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present utility model.

[0038] The terms used in the utility model are only for the purpose of describing specific implementation manners and are not intended to limit the present utility model. Unless otherwise defined in this application document, the technical terms or scientific terms used in the present utility model should be the ordinary meanings understood by those of ordinary skill in the field to which the present utility model belongs. The "first", "second" and similar terms used in the specification and claims of the present utility model do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, terms such as "a" or "one" do not indicate a quantity limitation, but indicate that there is at least one. "Multiple" or "several" means two or more. Unless otherwise indicated, terms such as "upper / upper layer" and / or "lower / lower layer" are only for convenience of description and are not limited to one position or a spatial orientation. The terms "including" or "comprising" and similar terms mean that the elements or structures appearing before "including" or "comprising" cover the elements or structures listed after "including" or "comprising" and their equivalents, and do not exclude other elements or structures. The terms "connected" or "coupled" and similar terms are not limited to physical or mechanical connections, and may include electrical connections, whether direct or indirect. The singular forms "a", "the" and "said" used in the specification and claims of the present utility model are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0039] For the convenience of unified description, the present utility model defines a horizontal direction and a vertical direction hereinafter, and defines directions X and Y in the accompanying drawings of the specification. Among them, the horizontal direction corresponds to X in the accompanying drawings of the specification (hereinafter simply referred to as the X direction), the X direction is a direction parallel to the surface of the substrate, and the substrate is a base material for forming the bump structure proposed by the present utility model; the vertical direction corresponds to Y in the accompanying drawings of the specification (hereinafter simply referred to as the Y direction), and the Y direction is perpendicular to the X direction.

[0040] The core idea of the present utility model is: to provide a packaging structure, and specifically propose a bump structure with multi-point support and multi-level stepped shape by means of multiple passivation layers, so as to improve the level of the bump structure's resistance to moisture intrusion and protection of the surface circuit layer, and avoid cracking at the bottom of the bump structure.

[0041] To distinguish from the prior art, the bump structure in the prior art will be introduced hereinafter first.

[0042] Specifically, please refer to Figure 1 , Figure 1 which is a schematic cross-sectional structure diagram of a prior art packaging structure.

[0043] Currently, in order to avoid the stress problem of the bump structure in the packaging structure, the bump structure in the existing packaging structure mainly gradually releases stress by optimizing the design of the bump and increasing the thickness of the passivation layer. As Figure 1 shown in the structure, its stress cannot be dispersed to multiple contact surfaces including the bump 1, the metal pad 2, and the passivation layer 3, so the situation of cracking at the bottom of the bump often occurs, that is, the overall ability of the bump structure in the existing packaging structure to resist pressure and shear force is weak. In addition, the level of the existing packaging structure to resist moisture intrusion and protect the surface circuit layer by only relying on a single passivation layer is also low.

[0044] Therefore, the prior art is limited to designing an interlaced tooth-like structure or an interlaced convex structure between the metal pad and the copper column 4, and fails to transfer the stress to the outside for release, making it difficult to cope with the challenges of increased stress or complex stress.

[0045] To solve the above problems, the present utility model proposes a packaging structure, and the core idea of the present utility model is: to propose a bump structure with multi-point support and multi-level stepped shape by means of multiple passivation layers, so as to improve the level of the bump structure's resistance to moisture intrusion and protection of the surface circuit layer, avoid cracking at the bottom of the bump structure, and give clear requirements for the characteristic dimensions of the multiple passivation layers and the multi-level stepped bump structure, so as to realize an HBT wafer bump structure suitable for complex stress scenarios.

[0046] Please refer to Figure 2 , Figure 2This is an exemplary diagram of the cross-sectional structure of the encapsulation structure provided in the embodiments of the present invention. As Figure 2 shown, in the embodiments of the present invention, the encapsulation structure 10 includes: a substrate 100, a solder pad layer 110, a stacked layer 120, a sputtering layer 130, a bump structure 140, and a tin cap 150. Among them, the solder pad layer 110 is located on a partial surface of the substrate 100; the stacked layer 120 is located on the substrate 100 and at least includes a first passivation layer 122 and a second passivation layer 123 stacked in sequence from bottom to top, and a plurality of grooves are formed in the stacked layer 120 in the horizontal direction; the sputtering layer 130 is located between the bump structure 140, the solder pad layer 110, and the substrate 100; the bump structure 140 is located on the stacked layer 130, and at least a part of the bump structure 140 conformally fills into the plurality of grooves, the bump structure includes a plurality of bumps, the plurality of bumps correspond to the plurality of grooves one by one, and at least one stepped surface arranged in the horizontal direction is provided on the side wall of each groove.

[0047] In this embodiment, the substrate 100 is any suitable substrate material well known in the art. For example, it may be a silicon substrate, a silicon-containing substrate (such as SiC, SiGe), or a substrate composed of other suitable materials, etc., and is not limited thereto. And the substrate 100 may be the top layer of an integrated circuit device, such as a top metal layer, a passivation layer, etc. In one embodiment, as is known in the art, an integrated circuit (not shown) is formed on and / or inside the substrate 100. For the purpose of clarity, the layers and components of the substrate 100 (including transistors such as HBT transistors, interconnect layers, post-passivation interconnects, redistribution layers, etc.) may be omitted from the drawings because they are unnecessary for understanding the present invention.

[0048] The solder pad layer 110 is located on a partial surface of the substrate 100. Exemplarily, as Figure 2 shown, it may be located on a partial surface of the middle region of the substrate 100. In one embodiment, the material of the solder pad layer 110 may be titanium (Ti), titanium nitride (TiN), copper nickel (CuNi), aluminum (Al), gold, copper, tungsten, or other suitable materials, and is not limited thereto. And according to the use, the thickness of the solder pad layer 110 in the vertical direction may be in the range of about 0.1 μm (micrometer) to about 5 μm (micrometer), and preferably the material of the solder pad layer 110 is copper.

[0049] The stacked layer 120 has a multi-layer structure, and specifically includes a pad passivation layer 121, a first passivation layer 122, a second passivation layer 123, and a third passivation layer 124 stacked in sequence from bottom to top. Specifically, the pad passivation layer 121 covers the substrate 100 and the solder joint layer 110, and has an opening in the middle part area of the solder joint layer 110, so that the pad passivation layer 121 is divided into a first part and a second part that do not directly contact through the opening. Similarly, the first passivation layer 122, the second passivation layer 123, and the third passivation layer 124 all have openings, and together form a first groove (i.e., the corresponding position of the first bump 141) located in the middle area of the stacked layer 120 and exposing a part of the surface of the solder pad layer 110 at the bottom, and a second groove (i.e., the corresponding position of the second bump 142) and a third groove (i.e., the corresponding position of the third bump 143) located on both sides of the first groove and exposing a part of the stacked layer 120 at the bottom. The sputtering layer 130 is located below the bump structure 140 formed in the stacked layer 120. The bump structure 140 specifically includes a first bump 141, a second bump 142, a third bump 143, and a copper pillar 144, wherein the first bump 141 corresponds to the first groove, the second bump 142 corresponds to the second groove, the third bump 143 corresponds to the third groove, and the copper pillar 144 covers the three bumps to electrically connect them into an integral structure. The tin cap 150 is located on the copper pillar 144.

[0050] It should be understood that since the multiple grooves in the multi-layer structure of the stacked layer 120 in the embodiment of the present invention are gradually formed during the sequential formation of different passivation layers, the sputtering layer 130 located below the bump structure 140 and on the inner surface of the groove is also formed layer by layer according to different passivation layers.

[0051] In one embodiment, the manufacturing process of the stacked layer 120 and the sputtering layer 130 located within its opening may include: first depositing on the substrate 100 and the solder pad layer 110 two times successively a passivation layer material (i.e., the pad passivation layer 121 and the first passivation layer 122) with a thickness of 3 to 22 micrometers and 3 to 22 micrometers (such as 10 micrometers) respectively along the vertical direction. For example, polymers, BCB, PBO, PI or similar materials, but not limited thereto. Then, an opening is etched in the passivation layer material corresponding to the upper part of the solder pad layer 110 to expose most of the surface of the solder pad layer 110. The opening divides both the pad passivation layer 121 and the first passivation layer 122 into a first part and a second part that do not directly contact each other. After that, a sputtering layer material, such as copper, is formed on the sidewall of the opening and the surface of the solder pad layer 110 exposed at the bottom of the opening. It should be particularly noted that in the present invention, the sidewalls of the openings located in the pad passivation layer 121 and the first passivation layer 122 each have an inclination angle with respect to the bottom of their openings (i.e., the angle between the sidewall of the finally formed groove and the extension line of the groove bottom in the horizontal direction). Exemplarily, the range of the inclination angle is: 44° to 89°, that is, it can specifically be 44°, 45°, 50°, 60°, 70°, 80° or 85°, 89°, etc. And the width range of the opening in the horizontal direction is 14μm to 123μm, and the projection shape of the opening in the vertical direction can be at least one of a circle, an ellipse, a rectangle or a square. Then, a passivation layer material with a thickness of 10 micrometers along the vertical direction (i.e., the second passivation layer 123) is deposited, and an opening with the same inclination angle but an increased width in the horizontal direction is formed above the openings formed in the pad passivation layer 121 and the first passivation layer 122. At the same time, an opening with the same inclination angle but a smaller width in the horizontal direction is formed in the second passivation layer 123 on both sides of this opening, so as to form partial regions constituting the second groove and the third groove. After that, a sputtering layer material, such as copper, is formed on the sidewall of the opening and the surface of the first passivation layer 122 exposed at the bottom of the opening. Subsequently, using the same process steps, a passivation layer material with a thickness of 10 micrometers along the vertical direction (i.e., the third passivation layer 124) is deposited again, and an opening with an increased width in the horizontal direction is formed in the third passivation layer 124 at the corresponding position above the three openings located in the second passivation layer 123, and the openings located in the pad passivation layer 121, the first passivation layer 122, the second passivation layer 123 and the third passivation layer 124 are connected in the vertical direction, that is, the first groove located in the middle and the third groove and the fourth groove located on both sides of the first groove are obtained.

[0052] It should be understood that the grooves and the openings in the present invention are in a corresponding relationship.

[0053] In one embodiment, the groove widths of the first groove, the second groove, and the third groove located within the stacked layer 120 gradually decrease from the groove opening towards the surface close to the substrate 100 in the horizontal direction, and the ratio range of the groove width to the groove depth of the first groove, the second groove, and the third groove is: 1:3 to 3:1, and preferably 1:1. Specifically, the groove width range of the first groove may be: 14 μm to 123 μm., the groove width range of the second groove or the third groove is: 3 μm to 30 μm; the bottom of the first groove is higher than the bottom of the second groove, and the bottoms of the second groove and the third groove are at the same horizontal height; the distance between the first groove and the second groove in the horizontal direction is equal to the distance between the first groove and the third groove in the horizontal direction. Exemplarily, the range of the distance is: 2 μm to 21 μm.

[0054] As Figure 2 shown, in the embodiment of the present invention, the shape of the first bump 141 located within the first groove is the same as the shape of the first groove, and moreover, the shape of the second bump 142 located within the second groove is the same as the shape of the second groove, and the shape of the third bump 143 located within the third groove is the same as the shape of the third groove; thus, the inclination angle between the side wall and the bottom of the groove is the inclination angle between the side walls of each part of the bump and its bottom, and this inclination angle is also the inclination angle between the sputtering layer 130 conformal with each bump and located below the bump structure 140 and the corresponding passivation layer on its outer side. In addition, since the shapes of the first groove (i.e., the first bump 141), the second groove (i.e., the second bump 142), and the third groove (i.e., the third bump 143) in the embodiment of the present invention are all multi-step shapes, for the convenience of description, the part extending horizontally from the groove can be called a stepped surface, such as Figure 2 shown by AA. Therefore, since the second groove and the third groove are formed correspondingly after depositing the second passivation layer 123, the number of stepped surfaces or the number of steps they have is less than the number of stepped surfaces or the number of steps of the first groove. Exemplarily, the side wall of the first groove (i.e., the first bump 141) has N stepped surfaces decreasing successively from high to low in the vertical direction, and the side wall of the second groove (i.e., the second bump 142) or the third groove (i.e., the third bump 143) has M stepped surfaces decreasing successively from high to low in the vertical direction, where N = M + 1, and 5 ≥ N > M ≥ 1.

[0055] Obviously, in the embodiment of the present invention Figure 2The corresponding example is a schematic structural diagram showing that the first bump 141 has three levels of steps in the vertical direction, and the second bump 142 and the third bump 143 have two levels of steps in the vertical direction. In other embodiments, the first bump 141 may also have two levels of steps in the vertical direction, and the second bump 142 and the third bump 143 have one level of steps in the vertical direction, as Figure 3 shown. Or, the first bump 141 may also have four levels of steps in the vertical direction, and the second bump 142 and the third bump 143 have three levels of steps in the vertical direction. Or, the first bump 141 may also have five levels of steps in the vertical direction, and the second bump 142 and the third bump 143 have four levels of steps in the vertical direction, etc.

[0056] It should be understood that in other embodiments of the present invention, when forming the structure where the first bump 141 has four or five levels of steps in the vertical direction, and the second bump 142 and the third bump 143 have three or four levels of steps in the vertical direction, it is also necessary to continue depositing the corresponding number of layers of the passivation layer on the top surface of the stacking layer 120 to build a film structure foundation for forming a bump structure with multiple bumps.

[0057] And, after forming the first bump 141, the second bump 142, the third bump 143 and the copper pillar 144 that electrically connects the three, the tin cap 150 located on the top surface of the copper pillar 144 can be fabricated. Among them, the tin cap 150 can be a single-layer structure or a multi-layer structure, such as Figure 2 or Figure 3 shown. Specifically, the process of fabricating the tin cap 150 may include: depositing materials such as nickel and tin-silver by electroplating process, and the shape of the tin cap 150 can be T-shaped or U-shaped, but not limited thereto.

[0058] It should be noted that the methods, processes, and materials involved in the present invention are all prior arts.

[0059] In summary, in the packaging structure provided by the present invention, the bump structure is specifically arranged in the stacking layer including multiple layers of passivation layer, and the bump structure includes multiple bumps arranged at intervals in the horizontal direction. By setting multiple layers of passivation layer around the bump structure, the ability of the bump structure to resist moisture intrusion and protect the surface circuit layer is improved, and a structural foundation is built for forming a bump structure with multiple bumps. Further, by arranging multiple bumps arranged at intervals in the horizontal direction in the bump structure, the stress of the bump structure is dispersed to multiple contact surfaces of the multiple bumps with the solder pad layer and the passivation layer, that is, the problem of cracking at the bottom of the bump structure is avoided, so as to ultimately improve the ability of the packaging structure including the bump structure to resist pressure and shear force.

[0060] The above description is only a description of the preferred embodiments of the present utility model, and does not limit any scope of the present utility model. Any changes and modifications made by those of ordinary skill in the art of the present utility model according to the above disclosure shall fall within the protection scope of the claims.

Claims

1. A packaging structure, characterized in that: include: substrate; A pad layer, located on a portion of the surface of the substrate; A stacked layer, located on the substrate, and comprising at least a first passivation layer and a second passivation layer stacked in sequence from bottom to top, wherein a plurality of grooves are opened in the stacked layer along a horizontal direction; A bump structure is located on the stacked layer, and at least a portion of the bump structure is conformally filled into the multiple grooves. The bump structure includes a plurality of bumps, and the plurality of bumps correspond one-to-one to the plurality of grooves, and the side wall of each of the grooves has at least one stepped surface arranged in a horizontal direction.

2. The packaging structure according to claim 1, characterized in that: Also includes: The sputtering layer is located between the bump structure, the pad layer and the substrate.

3. The packaging structure according to claim 1, characterized in that: The groove width extending in the horizontal direction gradually decreases from the groove opening to the surface close to the substrate.

4. The packaging structure according to claim 3, characterized in that: The angle between the side wall of the groove and the extension line of the groove bottom in the horizontal direction ranges from 44° to 89°.

5. The packaging structure according to claim 3, characterized in that: The ratio of the groove width to the groove depth of the groove is in the range of 1:3 to 3:

1.

6. The packaging structure according to claim 3, characterized in that: Three grooves are opened in the stacking layer, and the three grooves include a first groove whose bottom exposes a portion of the surface of the pad layer, and a second groove and a third groove respectively located on both sides of the first groove and whose bottom exposes a portion of the stacking layer.

7. The packaging structure according to claim 6, characterized in that: The width of the first groove is in the range of 14 μm to 123 μm.

8. The packaging structure according to claim 6, characterized in that: The width of the second groove or the third groove ranges from 3 μm to 30 μm.

9. The packaging structure according to claim 6, characterized in that: The bottom of the first groove is higher than the bottom of the second groove, and the bottoms of the second groove and the third groove are located at the same level.

10. The packaging structure according to claim 6, characterized in that: The distance between the first groove and the second groove in the horizontal direction is equal to the distance between the first groove and the third groove in the horizontal direction.

11. The packaging structure according to claim 10, characterized in that: The range of the spacing is 2 μm to 21 μm.

12. The packaging structure according to claim 6, characterized in that: The sidewall of the first groove has N-level step surfaces that decrease from high to low in the vertical direction, and the sidewall of the second groove or the third groove has M-level step surfaces that decrease from high to low in the vertical direction, wherein N=M+1, and 5≥N>M≥1.

13. The packaging structure according to claim 1, characterized in that: The stacking layer further includes: The third passivation layer is located on the second passivation layer.

14. The packaging structure according to claim 1, wherein: The bump structure further includes: The copper column is located on the bump structure and is electrically connected to the bump structure.

15. The packaging structure according to claim 13, characterized in that: The thickness of the second passivation layer is greater than or equal to the thickness of the first passivation layer, and the thickness of the third passivation layer is the same as the thickness of the second passivation layer.

16. The packaging structure according to claim 15, characterized in that: The thickness of the first passivation layer is in the range of 1 μm to 10 μm.

Images