Connection detection circuit and device

By using a connection detection circuit between the master and slave equipment and using a control line for connection detection, the problem of high connection detection cost between devices is solved, and a more economical and simple connection detection method is achieved.

CN223022356UActive Publication Date: 2025-06-24TCL TECH ELECTRONICS (HUIZHOU) CO LTD
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Patent Information

Application Number
CN202421398160.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-06-18
Publication Date
2025-06-24
Estimated Expiration
2034-06-18

AI Technical Summary

Technical Problem

When the two devices are far apart, the cost of connection detection between the master and slave devices is high.

Method used

A connection detection circuit is provided, including a master device detection circuit in the master device and a slave device detection circuit in the slave device, connected by a control line, and output a detection voltage according to the connection detection signal to determine the device connection state.

Benefits of technology

By reducing the required number of control lines, the cost of connection detection between master and slave devices is reduced and the connection detection process is simplified.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The utility model discloses a connection detection circuit and equipment, and relates to the technical field of signal detection, the connection detection circuit comprises a master equipment detection circuit arranged in master equipment and a slave equipment detection circuit arranged in slave equipment, and the master equipment detection circuit and the slave equipment detection circuit are connected through a control line; wherein the master device detection circuit accesses a connection detection signal, and the master device detection circuit is used for outputting a first detection voltage according to the connection detection signal and determining a slave device connection state based on the first detection voltage; the slave device detection circuit is used for outputting a second detection voltage according to the connection detection signal and determining the connection state of the master device based on the second detection voltage. According to the invention, when the distance between the two devices is long, the cost of connection detection between the master device and the slave device is reduced.
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Description

Technical Field

[0001] The present application relates to the technical field of signal detection, and particularly to a connection detection circuit and device. Background Art

[0002] With the development of signal detection technology, users also put forward higher requirements for the connection detection of signal detection devices.

[0003] Traditional connection detection methods require at least two control lines and corresponding control interfaces (at least two control lines are required to achieve two-way communication between the master device and the slave device) to achieve connection detection between the master device and the slave device. This connection detection method will result in high costs for connection detection between the master device and the slave device when the distance between the two devices is far (the length of the control line used becomes longer) due to the need to use at least two control lines and corresponding control interfaces.

[0004] The above content is only used to assist in understanding the technical solution of the present application, and does not represent an admission that the above content is prior art. Summary of the Utility Model

[0005] The main purpose of the present application is to provide a connection detection circuit and device, aiming to solve the technical problem of high costs for connection detection between the master device and the slave device when the distance between the two devices is far.

[0006] To achieve the above object, the present application provides a connection detection circuit. The connection detection circuit includes a master device detection circuit provided in the master device and a slave device detection circuit provided in the slave device. The master device detection circuit is connected to the slave device detection circuit through a control line;

[0007] Wherein, the master device detection circuit accesses a connection detection signal. The master device detection circuit is configured to output a first detection voltage according to the connection detection signal and determine the connection state of the slave device based on the first detection voltage;

[0008] The slave device detection circuit is configured to output a second detection voltage according to the connection detection signal and determine the connection state of the master device based on the second detection voltage.

[0009] In one embodiment, the master device detection circuit includes a connection detection control circuit, a master device connection circuit, and a master device result output circuit. The connection detection control circuit is connected to the master device connection circuit and the master device result output circuit. The master device connection circuit is connected to the first end of the control line. The connection detection control circuit includes:

[0010] A first resistor, the first end of which accesses the connection detection signal;

[0011] The first triode, the first end of the first triode is connected to the second end of the first resistor, and the second end of the first triode is grounded;

[0012] The second resistor, the first end of the second resistor is connected to the third end of the first triode, and the second end of the second resistor is connected to the main device connection circuit and the main device result output circuit.

[0013] In one embodiment, the connection detection control circuit further includes:

[0014] The transistor, the first end of the transistor is connected to the second end of the second resistor, the second end of the transistor is connected to the main device connection circuit, and the third end of the transistor is connected to the main device result output circuit;

[0015] The third resistor, the first end of the third resistor is connected to the first end of the transistor and the second end of the second resistor, and the second end of the third resistor is connected to the second end of the transistor and the main device connection circuit;

[0016] The first capacitor, the first end of the first capacitor is connected to the first end of the transistor and the second end of the second resistor, and the second end of the first capacitor is connected to the third end of the transistor and the main device result output circuit.

[0017] In one embodiment, the main device result output circuit includes:

[0018] The fourth resistor, the second end of the fourth resistor is connected to the third end of the transistor;

[0019] The fifth resistor, the second end of the fifth resistor is connected to the first end of the fourth resistor, and the first end of the fifth resistor is grounded;

[0020] The second triode, the first end of the second triode is connected to the second end of the fifth resistor and the first end of the fourth resistor, and the second end of the second triode is grounded;

[0021] The sixth resistor, the first end of the sixth resistor is connected to the first detection port and the third end of the second triode, and the second end of the sixth resistor is connected to the main device power supply.

[0022] In one embodiment, the main device connection circuit includes:

[0023] The seventh resistor, the first end of the seventh resistor is connected to the second end of the transistor, and the second end of the seventh resistor is connected to the first end of the control line;

[0024] The second capacitor, the second end of the second capacitor is connected to the first end of the seventh resistor, and the first end of the second capacitor is grounded.

[0025] In one embodiment, the slave device detection circuit includes a slave device connection circuit and a slave device result output circuit. The slave device connection circuit is connected to the slave device result output circuit and the second end of the control line. The slave device connection circuit includes:

[0026] An eighth resistor, the first end of the eighth resistor is connected to the second end of the control line, and the second end of the eighth resistor is connected to the slave device result output circuit;

[0027] A third capacitor, the second end of the third capacitor is connected to the second end of the eighth resistor and the slave device result output circuit, and the first end of the third capacitor is grounded;

[0028] A ninth resistor, the first end of the ninth resistor is connected to the second end of the eighth resistor and the slave device result output circuit, and the second end of the ninth resistor is connected to the slave device power supply.

[0029] In one embodiment, the slave device result output circuit includes:

[0030] A third triode, the first end of the third triode is connected to the second end of the eighth resistor, and the third end of the third triode is connected to the second end of the ninth resistor and the slave device power supply;

[0031] A tenth resistor, the first end of the tenth resistor is connected to the second end of the third triode;

[0032] An eleventh resistor, the first end of the eleventh resistor is grounded, and the second end of the eleventh resistor is connected to the second end of the tenth resistor;

[0033] A fourth triode, the first end of the fourth triode is connected to the second end of the eleventh resistor and the second end of the tenth resistor, and the second end of the fourth triode is grounded;

[0034] A twelfth resistor, the first end of the twelfth resistor is connected to the second detection port and the third end of the fourth triode, and the second end of the twelfth resistor is connected to the slave device power supply.

[0035] In one embodiment, the slave device result output circuit includes:

[0036] A reset unit, the first end of the reset unit is connected to the second end of the eighth resistor, and the second end of the reset unit is grounded;

[0037] A twelfth resistor, the first end of the twelfth resistor is connected to the second detection port and the third end of the reset unit, and the second end of the twelfth resistor is connected to the slave device power supply.

[0038] In one embodiment, the reset unit includes a reset chip, on which a reset input port, a reset output port, and a ground port are provided. The reset input port serves as the first end of the reset unit, the reset output port serves as the third end of the reset unit, and the ground port serves as the second end of the reset unit.

[0039] In addition, to achieve the above object, the present application further provides a connection detection device, which includes the above-mentioned connection detection circuit.

[0040] The embodiment of the present application provides a connection detection circuit, which includes a master device detection circuit provided in a master device and a slave device detection circuit provided in a slave device. The master device detection circuit is connected to the slave device detection circuit through a control line. Among them, the master device detection circuit accesses a connection detection signal, and is configured to output a first detection voltage according to the connection detection signal and determine the connection state of the slave device based on the first detection voltage; the slave device detection circuit is configured to output a second detection voltage according to the connection detection signal and determine the connection state of the master device based on the second detection voltage. By connecting the master device detection circuit and the slave device detection circuit through a control line, different detection voltages can be determined respectively based on the connection detection signal accessed by the master device detection circuit, and the connection state of the master device or the slave device can be determined based on the detection voltage. Thus, different detection voltages can be determined by accessing the connection detection signal through a control line and the master device detection circuit, and the connection state of the master device or the slave device can be determined based on the detection voltage, so that the connection state between the master device and the slave device can be directly determined, thereby reducing the cost of connection detection between the master device and the slave device. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 It is a schematic framework diagram of the first embodiment of the connection detection circuit of the present application;

[0042] Figure 2 It is a circuit schematic diagram of the master device detection circuit in the connection detection circuit of the present application;

[0043] Figure 3 It is a circuit schematic diagram of the slave device detection circuit in the connection detection circuit of the present application;

[0044] Figure 4 It is another circuit schematic diagram of the slave device detection circuit in the connection detection circuit of the present application;

[0045] Figure 5 It is a circuit schematic diagram of the connection detection circuit of the present application;

[0046] Figure 6 It is another circuit schematic diagram of the connection detection circuit of the present application.

[0047] The realization, functional features, and advantages of the present application will be further described in conjunction with embodiments with reference to the accompanying drawings.

[0048] Explanation of the reference numerals in the accompanying drawings:

[0049] 100, master device; 10, master device detection circuit; 200, slave device; 20, slave device detection circuit; 300, control line; M3V3, master device power supply; MOUT, first detection port; Q1 - Q4, first transistor - fourth transistor; G1, transistor; R1 - R12, first resistor - twelfth resistor; C1 - C3, first capacitor - third capacitor; CTRL, connection detection signal; C3V3, slave device power supply; COUT, second detection port; U1, reset chip; VCC, reset input port; GND, ground port; RST, reset output port; 11, connection detection control circuit; 12, master device connection circuit; 13, master device result output circuit; 21, slave device connection circuit; 22, slave device result output circuit; 221, reset unit. Detailed implementation manners

[0050] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0051] To better understand the technical solution of the present application, the following will be described in detail in conjunction with the drawings of the specification and specific implementation manners.

[0052] In a conventional signal detection circuit, the control between the master device and the slave device is unidirectional. When inserting connection detection between the two devices, usually only the slave device knows that it has been connected to the master device, while the master device does not know whether there is a connection to the slave device. If a design for bidirectional connection detection is required, usually two or more control lines are used to achieve mutual detection and control, which will lead to an increase in the control lines connecting the two devices. Especially when the two devices are far apart, the cost of the connection lines will be relatively high, and the connection and assembly are complex.

[0053] Therefore, based on the deficiencies of the above connection detection circuit, the connection detection circuit of the present application is proposed. In the embodiments of the present application, the master device detection circuit and the slave device detection circuit are connected through a control line, and different detection voltages can be determined respectively based on the connection detection signal accessed by the master device detection circuit. Based on the detection voltage, the connection state of the master device or the slave device is determined. Thus, different detection voltages can be determined by accessing the connection detection signal through one control line and the master device detection circuit, and the connection state between the master device and the slave device can be directly determined based on the detection voltage, thereby reducing the cost of connection detection between the master device and the slave device.

[0054] Based on this, the embodiments of the present application provide a connection detection circuit. Refer toFigure 1 , Figure 1 This is a schematic diagram of the framework of the first embodiment of the connection detection circuit of the present application.

[0055] Referring to Figure 1 , the present application provides a connection detection circuit. The connection detection circuit includes a master device detection circuit 10 provided in the master device 100 and a slave device detection circuit 20 provided in the slave device 200. The master device detection circuit 10 is connected to the slave device detection circuit 20 through a control line 300;

[0056] Among them, the master device detection circuit 10 accesses a connection detection signal CTRL. The master device detection circuit 10 is configured to output a first detection voltage according to the connection detection signal CTRL and determine the connection state of the slave device 200 based on the first detection voltage;

[0057] The slave device detection circuit 20 is configured to output a second detection voltage according to the connection detection signal CTRL and determine the connection state of the master device 20 based on the second detection voltage.

[0058] In this embodiment, to implement the connection detection between the master device 100 and the slave device 200, a master device detection circuit 10 is provided in the master device 100 and a slave device detection circuit 20 is provided in the slave device 200. The master device detection circuit 10 and the slave device detection circuit 20 in the master device 100 and the slave device 200 are connected through a control line 300. The master device detection circuit 10 outputs a first detection voltage according to the connection detection signal CTRL and determines the connection state of the slave device 200 based on the first detection voltage. The slave device detection circuit 20 outputs a second detection voltage according to the connection detection signal CTRL and determines the connection state of the master device 20 based on the second detection voltage. Among them, the master device 100 can be a device for signal detection, such as an oscilloscope for detecting display, etc. The slave device 200 refers to a device for generating or collecting signals, such as a signal generator for generating signals, etc. The connection detection signal CTRL refers to a signal indicating whether connection detection is required, which can be directly controlled by a control chip in the master device 100 or the slave device 200, or controlled by connecting a high level or a low level through a key switch. If the connection detection signal CTRL is at a high level (it can be made to input a high level at the connection detection signal CTRL through a key switch), it is determined that the connection detection circuit can perform mutual connection detection. If the connection detection signal CTRL is at a low level, it is determined that the connection detection circuit cannot perform connection detection. Therefore, when it is necessary to perform connection detection between the master device 100 and the slave device 200, the connection detection signal CTRL can be kept at a high level all the time to achieve real-time detection of the connection state between the master device 100 and the slave device 200. The first detection voltage refers to the output voltage of the master device detection circuit 10 when the master device detection circuit 10 and the slave device detection circuit 20 work based on the connection detection signal CTRL. Whether the master device 100 is connected to the slave device 200 can be known based on this voltage. The second detection voltage refers to the output voltage of the slave device detection circuit 20 when the master device detection circuit 10 and the slave device detection circuit 20 work based on the connection detection signal CTRL. Whether the slave device 200 is connected to the master device 100 can be known based on this voltage. At this time, only 1 control port and its corresponding control line 300 are needed to implement the mutual detection control between the master device 100 and the slave device 200. The control connection lines are few and the connection is convenient, avoiding the phenomenon of using multiple control lines to implement connection detection between the master device 100 and the slave device 200. At the same time, based on the detection voltage, it is convenient to implement the intelligent connection recognition function without manual switching of the working mode (it can be switched to the connection detection mode and the non-connection detection mode based on the connection detection signal CTRL). The master device 100 or the slave device 200 (the connection detection signal CTRL can be controlled by the master device 100 or the slave device 200, which is not limited here) can control the opening and closing of the bidirectional detection function to achieve the purpose of intelligent control.

[0059] In one embodiment, the master device detection circuit 10 and the slave device detection circuit 20 can be directly connected to the control line 300 without affecting the operation between the master device 100 and the slave device 200. For example, when the connection detection signal CTRL is at a low level, the master device detection circuit 10 and the slave device detection circuit 20 do not implement the connection detection function, that is, at this time, regardless of whether the master device 100 and the slave device 200 are connected, the detection result will not be output (the intuitive manifestation of this embodiment is whether the first / second detection voltage is output); when the connection detection signal CTRL is at a high level, if the slave device 200 is connected to the master device 100, the first detection voltage determined based on the connection detection signal CTRL is at a low level, then it is determined that the master device 100 is connected to the slave device 200. If the slave device 200 is not connected to the master device 100, the first detection voltage determined based on the connection detection signal CTRL is at a high level, then it is determined that the master device 100 is not connected to the slave device 200; if the master device 100 is connected to the slave device 200, the second detection voltage determined based on the connection detection signal CTRL is at a high level, then it is determined that the slave device 200 is connected to the master device 100. If the master device 100 is not connected to the slave device 200, the second detection voltage determined based on the connection detection signal CTRL is at a low level, then it is determined that the slave device 200 is not connected to the master device 100. Thus, the connection detection between the master device 100 and the slave device 200 can be realized through a single control line 300, reducing the cost of connection detection between the master device 100 and the slave device 200.

[0060] Further, based on the first embodiment of the present application above, a second embodiment of the connection detection circuit of the present application is proposed. Refer to Figure 2 , Figure 2 which is a circuit schematic diagram of the master device detection circuit in the connection detection circuit of the present application. The master device detection circuit 10 includes a connection detection control circuit 11, a master device connection circuit 12, and a master device result output circuit 13. The connection detection control circuit 11 is connected to the master device connection circuit 12 and the master device result output circuit 13. The master device connection circuit 12 is connected to the first end of the control line 300. The connection detection control circuit 11 includes:

[0061] A first resistor R1, the first end of the first resistor R1 is connected to the connection detection signal CTRL;

[0062] A first triode Q1, the first end of the first triode Q1 is connected to the second end of the first resistor R1, and the second end of the first triode Q1 is grounded;

[0063] A second resistor R2, the first end of the second resistor R2 is connected to the third end of the first triode Q1, and the second end of the second resistor R2 is connected to the master device connection circuit 12 and the master device result output circuit 13.

[0064] In this embodiment, the master device detection circuit 10 includes a connection detection control circuit 11, and determines whether to enable the connection detection function between the master device 100 and the slave device 200 through the connection detection control circuit 11. The connection detection control circuit 11 is composed of a first resistor R1, a first triode Q1, and a second resistor R2, and controls whether to perform connection detection through the high and low levels of the connection detection signal CTRL. It should be noted that the first end of the first triode Q1 can be the base of the triode, the second end of the first triode Q1 can be the emitter, the third end of the first triode Q1 can be the collector, and the first triode Q1 is an NPN triode. According to the characteristics of the NPN triode, when the connection detection signal CTRL is at a high level, the first triode Q1 conducts to the ground, and at this time, the second end of the second resistor R2 is at a low level; when the connection detection signal CTRL is at a low level, the first triode Q1 does not conduct, and at this time, there is no output at the second end of the second resistor R2. It should be noted that the connection detection signal CTRL can be directly connected to a high level, or the second end of the second resistor R2 can be directly connected to a low level, which can ensure that the connection detection function is continuously enabled.

[0065] In one embodiment, the connection detection control circuit 11 further includes:

[0066] A transistor G1, the first end of the transistor G1 is connected to the second end of the second resistor R2, the second end of the transistor G1 is connected to the master device connection circuit 12, and the third end of the transistor G1 is connected to the master device result output circuit 13;

[0067] A third resistor R3, the first end of the third resistor R3 is connected to the first end of the transistor G1 and the second end of the second resistor R2, and the second end of the third resistor R3 is connected to the second end of the transistor G1 and the master device connection circuit 12;

[0068] A first capacitor C1, the first end of the first capacitor C1 is connected to the first end of the transistor G1 and the second end of the second resistor R2, and the second end of the first capacitor C1 is connected to the third end of the transistor G1 and the master device result output circuit 13.

[0069] In this embodiment, the connection detection control circuit 11 further includes a circuit composed of a transistor G1, and the connection state of the slave device 200 is detected based on the conduction and cut-off of the transistor G1. Among them, the transistor G1 is a P-type transistor. The first end of the transistor G1 is the gate of the transistor G1, the third end of the transistor G1 is the source of the transistor G1, and the second end of the transistor G1 is the drain of the transistor G1. Because of the input of the high and low levels of the connection detection signal CTRL, the second end of the second resistor R2 can be controlled to be high level or low level. At this time, the second end of the second resistor R2 is connected to the first end of the transistor G1. At this time, if the first end of the transistor G1 receives a low level, according to the conduction characteristics of the P-type transistor, the transistor G1 conducts, and the main device result output circuit 13 is connected to the slave device detection circuit 20. When the first end of the transistor G1 receives a high level, according to the conduction characteristics of the P-type transistor, the transistor G1 cuts off, and the connection between the slave device detection circuit 20 and the main device result output circuit 13 is disconnected. That is, at this time, the output level of the first triode Q1 in the connection detection control circuit 11 is used to control whether the connection detection circuit needs to implement the connection detection function, and the connection detection control circuit 11 can be intelligently controlled to implement the connection detection.

[0070] Further, based on the first embodiment and / or the second embodiment of the present application above, a third embodiment of the connection detection circuit of the present application is proposed. The main device result output circuit 13 includes:

[0071] A fourth resistor R4, the second end of the fourth resistor R4 is connected to the third end of the transistor G1;

[0072] A fifth resistor R5, the second end of the fifth resistor R5 is connected to the first end of the fourth resistor R4, and the first end of the fifth resistor R5 is grounded;

[0073] A second triode Q2, the first end of the second triode Q2 is connected to the second end of the fifth resistor R5 and the first end of the fourth resistor R4, and the second end of the second triode Q2 is grounded;

[0074] A sixth resistor R6, the first end of the sixth resistor R6 is connected to the first detection port MOUT and the third end of the second triode Q2, and the second end of the sixth resistor R6 is connected to the main device power supply M3V3.

[0075] Specifically, the main device connection circuit 12 includes:

[0076] A seventh resistor R7, the first end of the seventh resistor R7 is connected to the second end of the transistor G1, and the second end of the seventh resistor R7 is connected to the first end of the control line 300;

[0077] The second capacitor C2, the second end of the second capacitor C2 is connected to the first end of the seventh resistor R7, and the first end of the second capacitor C2 is grounded.

[0078] In this embodiment, the master device connection circuit 12 includes a seventh resistor R7 and a second capacitor C2, which can realize the connection with the slave device detection circuit 20, or can be connected in other connection manners, which are not limited herein. The function of the master device result output circuit 13 is to control the output of different levels based on different input levels to indicate whether it is connected to the slave device 200. For example, when the connection detection signal CTRL controls the transistor G1 to conduct through the connection detection control circuit 11, if the slave device 200 is connected to the master device 100 at this time, a high level will be output at the third end of the transistor G1. Since the second triode Q2 is an NPN triode, the high level controls the second triode Q2 to conduct. At this time, the first detection port MOUT is grounded through the second triode Q2, that is, the first detection port MOUT outputs a low level, determining that it is connected to the slave device 200; a low level will be output at the third end of the transistor G1, controlling the second triode Q2 not to conduct. At this time, the first detection port MOUT is connected to the master device power supply M3V3 through the sixth resistor R6, that is, the first detection port MOUT outputs a high level, determining that it is not connected to the slave device 200. Among them, the master device power supply M3V3 and the slave device power supply C3V3 can both be 3.3V power supplies, or can be power supplies with different amplitudes, which are not limited herein. Refer to Figure 5 , Figure 5 FIG. is a circuit schematic diagram of the connection detection circuit of the present application. The detection of the master device detection circuit 10 will be described below:

[0079] Opening and closing of the connection detection function: The control chip in the master device 100, such as a SOC (System-on-a-Chip), controls the connection detection signal CTRL. When the connection detection signal CTRL is at a high level, according to the NPN triode characteristics of the first triode Q1, it can be known that the first triode Q1 is saturated and conducting, that is, the collector of the first triode Q1 is grounded and becomes a low level. At this time, the VGS voltage of the transistor G1 is greater than the threshold conduction voltage, and the transistor G1 conducts, which is to turn on the connection detection function; conversely, when the connection detection signal CTRL is at a low level, according to the NPN triode characteristics of the first triode Q1, it can be known that the first triode Q1 is cut off. At this time, the transistor G1 will also be cut off because the VGS voltage is less than the threshold conduction voltage, which is to turn off the connection detection function. The following separately describes turning off the connection detection function and turning on the connection detection function:

[0080] When the connection detection function is enabled (transistor G1 is turned on), the slave device 200 connects to the master device 100: At this time, the high level in the slave device detection circuit 20 passes through the source of the transistor G1 to the drain of the transistor G1. The output voltage (high level) of the drain of the transistor G1 is divided by the fourth resistor R4 and the fifth resistor R5 and provided to the base of the second triode Q2. According to the NPN triode characteristics of the second triode Q2, it can be known that the second triode Q2 is turned on. The collector of the second triode Q2 is directly connected to the low level and becomes the low level, that is, the first detection port MOUT outputs the low level, and the master device 100 recognizes that it is in the state of connecting to the slave device 200.

[0081] When the connection detection function is enabled (transistor G1 is turned on) and the slave device 200 is not connected to the master device 100: The slave device detection circuit 20 disconnects from the source connection of the transistor G1, that is, there is no high level provided to the source of the transistor G1. At this time, the base of the second triode Q2 is at the low level. According to the NPN triode characteristics of the second triode Q2, it can be known that the second triode Q2 is cut off, that is, the first detection port MOUT is directly connected to the master device power supply M3V3 through the sixth resistor R6, that is, the first detection port MOUT outputs the high level, and the master device 100 recognizes that it is in the state of not connecting to the slave device 200.

[0082] When the connection detection function is disabled (transistor G1 is cut off), regardless of whether the transistor G1 is connected to the slave device detection circuit 20, the VGS voltage of the transistor G1 cannot reach the threshold conduction voltage. According to the conduction characteristics of the transistor G1, it can be known that the transistor G1 is not turned on at this time. At this time, the base of the second triode Q2 is at the low level. According to the NPN triode characteristics of the second triode Q2, it can be known that the second triode Q2 is cut off, that is, the first detection port MOUT is directly connected to the master device power supply M3V3 through the sixth resistor R6, that is, the first detection port MOUT outputs the high level, and the master device 100 recognizes that it is in the state of not connecting to the slave device 200.

[0083] Furthermore, based on the first embodiment, the second embodiment, and / or the third embodiment of the present application described above, a fourth embodiment of the connection detection circuit of the present application is proposed. Refer to Figure 3 , Figure 3 As shown in the circuit schematic diagram of the slave device detection circuit in the connection detection circuit of the present application, the slave device detection circuit 20 includes a slave device connection circuit 21 and a slave device result output circuit 22. The slave device connection circuit 21 is connected to the slave device result output circuit 22 and the second end of the control line 300. The slave device connection circuit 21 includes:

[0084] An eighth resistor R8, the first end of the eighth resistor R8 is connected to the second end of the control line 300, and the second end of the eighth resistor R8 is connected to the slave device result output circuit 22;

[0085] A third capacitor C3, a second end of the third capacitor C3 is connected to a second end of the eighth resistor R8 and the slave device result output circuit 22, and a first end of the third capacitor C3 is grounded;

[0086] A ninth resistor R9, a first end of the ninth resistor R9 is connected to the second end of the eighth resistor R8 and the slave device result output circuit 22, and a second end of the ninth resistor R9 is connected to the slave device power supply C3V3.

[0087] In this embodiment, the slave device connection circuit 21 is used to connect to a second end of the control line 300 and realize connection with the master device connection circuit 12. At this time, because the second end of the ninth resistor R9 is connected to the slave device power supply C3V3, when connecting to the master device connection circuit 12, a high level can be provided for the master device detection circuit 10 to realize the detection of the slave device. That is, the above connection detection signal CTRL makes the transistor G1 conduct through the connection detection control circuit 11. At this time, the high level in the slave device connection circuit 21 flows from the source of the transistor G1 to the drain of the transistor G1 to control the working state of the second triode Q2, and different levels can be output at the first detection port MOUT based on the working state of the second triode Q2 to display the connection detection result. At the same time, the slave device connection circuit 21 can also provide a level for subsequent detection of the master device 100 by the slave device 200, and the connection detection between the slave device 200 and the master device 100 can be realized.

[0088] In one embodiment, the slave device result output circuit 22 includes:

[0089] A third triode Q3, a first end of the third triode Q3 is connected to the second end of the ninth resistor R9 and the second end of the eighth resistor R8, and a third end of the third triode Q3 is connected to the slave device power supply C3V3;

[0090] A tenth resistor R10, a first end of the tenth resistor R10 is connected to the second end of the third triode Q3;

[0091] An eleventh resistor R11, a first end of the eleventh resistor R11 is grounded, and a second end of the eleventh resistor R11 is connected to the second end of the tenth resistor R10;

[0092] A fourth triode Q4, a first end of the fourth triode Q4 is connected to the second end of the eleventh resistor R11 and the second end of the tenth resistor R10, and a second end of the fourth triode Q4 is grounded;

[0093] The twelfth resistor R12, the first end of the twelfth resistor R12 is connected to the second detection port COUT and the third end of the fourth triode Q4, and the second end of the twelfth resistor R12 is connected to the slave device power supply C3V3.

[0094] In this embodiment, the slave device result output circuit 22 controls the second detection port COUT to output different levels based on the output voltage of the slave device connection circuit 21. For example, on the premise of enabling the connection detection function, assuming that the output voltage of the slave device connection circuit 21 controls the third triode Q3 and the fourth triode Q4 to conduct simultaneously, at this time, the second detection port COUT is grounded and outputs a low level, determining that it is connected to the master device 100; when the output voltage of the slave device connection circuit 21 controls the fourth triode Q4 not to conduct, at this time, the second detection port COUT is connected to the slave device power supply C3V3 and outputs a high level, determining that it is not connected to the master device 100. Among them, the third triode Q3 and the fourth triode Q4 are NPN triodes, and the master device power supply M3V3 and the slave device power supply C3V3 can both be 3.3V power supplies or power supplies with different amplitudes, which are not limited here. Refer to Figure 5 , the detection of the slave device detection circuit 20 is described as follows:

[0095] When the connection detection function is enabled (the transistor G1 conducts), the master device 100 is connected to the slave device 200: the conduction process of its transistor G1 is a conduction control process based on the connection detection signal CTRL, which will not be described again here. At this time, assume that the circuit Figure 5 The resistance values of each resistor in, such as the resistance values of the ninth resistor R9, the eighth resistor R8, the seventh resistor R7, and the fourth resistor R4 in the circuit Figure 5 are 4700 ohms, 10 ohms, 100 ohms, and 2200 ohms respectively. At this time, the output voltage of the slave device connection circuit 21 can be calculated, that is, the base voltage of the third triode Q3 = (10 + 100 + 2200) / (10 + 100 + 2200 + 4700) * (3.3V - 0.6) + 0.6 = 1.5V, where 0.6 is the conduction voltage of the third triode Q3 and the conduction voltage of the transistor G1 respectively. Then calculate the emitter voltage of the third triode Q3 = 1.5V - 0.6V = 0.9V; that is, the base voltage of the fourth triode Q4 = R11 / (R11 + R10) * 0.9 = 8.2 / (24 + 8.2) * 0.9 = 0.23V (assuming the resistance values of R11 and R10 are 2400 and 820 respectively), 3.3V is the slave device power supply C3V3. According to the characteristics of the NPN triode, the fourth triode Q4 does not conduct, the second detection port COUT is connected to the slave device power supply C3V3, and a high level is output. The slave device 200 is recognized as being in a state of being connected to the master device 100. It should be noted that the resistance values of each resistor in the circuit can be set according to the actual situation and are not limited here.

[0096] When the connection detection function is enabled (the transistor G1 is turned on) and the master device 100 is not connected to the slave device 200: The level of the slave device power supply C3V3 passes through the ninth resistor R9 to the base of the third triode Q3. According to the characteristics of the NPN triode, the third triode Q3 is turned on at this time, and the emitter of the third triode Q3 outputs a high level, which is divided by the tenth resistor R10 and the eleventh resistor R11 and provided to the base of the fourth triode Q4. According to the characteristics of the NPN triode, the fourth triode Q4 is turned on at this time, and the collector of the fourth triode Q4 outputs a low level, that is, the second detection port COUT is grounded and outputs a low level, and the slave device 200 recognizes that it is in a state of not being connected to the master device 100.

[0097] When the connection detection function is disabled (the transistor G1 is turned off): Regardless of whether the master device 100 is connected or not, the level of the slave device power supply C3V3 passes through the ninth resistor R9 to the base of the third triode Q3. According to the characteristics of the NPN triode, the third triode Q3 is turned on at this time, and the emitter of the third triode Q3 outputs a high level, which is divided by the tenth resistor R10 and the eleventh resistor R11 and provided to the base of the fourth triode Q4. According to the characteristics of the NPN triode, the fourth triode Q4 is turned on at this time, and the collector of the fourth triode Q4 outputs a low level, that is, the second detection port COUT is grounded and outputs a low level, and the slave device 200 recognizes that it is in a state of not being connected to the master device 100.

[0098] In one embodiment, referring to Figure 4 , Figure 4 is another circuit schematic diagram of the slave device detection circuit in the connection detection circuit of the present application. The slave device result output circuit 22 includes:

[0099] A reset unit 221, the first end of the reset unit 221 is connected to the second end of the eighth resistor R8, and the second end of the reset unit 221 is grounded;

[0100] A twelfth resistor R12, the first end of the twelfth resistor R12 is connected to the second detection port COUT and the third end of the reset unit 221, and the second end of the twelfth resistor R12 is connected to the slave device power supply C3V3.

[0101] Specifically, the reset unit 221 includes a reset chip U1. A reset input port VCC, a reset output port, and a ground port GND are provided on the reset chip U1. The reset input port VCC serves as the first end of the reset unit 221, the reset output port RST serves as the third end of the reset unit 221, and the ground port GND serves as the second end of the reset unit 221.

[0102] In this embodiment, referring to Figure 6 ,Figure 6 This is another circuit schematic diagram of the connection detection circuit of the present application. The slave device result output circuit 22 may further include a reset unit 221 and a twelfth resistor R12. As Figure 5 , when connected to the master device 100, the base voltage of the third triode Q3 (the second end of the eighth resistor R8) is 1.5V. At this time, the second detection port COUT is connected to the slave device power supply C3V3 and outputs a high level, while Figure 6 , when the second end of the eighth resistor R8 is pulled down to 1.5V, the reset output port RST directly outputs a low level, as Figure 5 , when not connected to the master device 100, the base voltage of the third triode Q3 (the second end of the eighth resistor R8) is at a high level. At this time, the second detection port COUT is grounded and outputs a low level, while Figure 6 , when the second end of the eighth resistor R8 is not pulled down, the reset output port RST directly outputs a high level. That is, the principle of the reset unit 221 is that when the input is pulled down, the output is at a low level, and when the input is not pulled down, the output is at a high level. That is, when connected to the master device 100, the second detection port COUT outputs a low level, and the slave device 200 recognizes it as the state of being connected to the master device 100; when not connected to the master device 100 or the connection detection function is turned off, the second detection port COUT outputs a high level, and the slave device 200 recognizes it as the state of not being connected to the master device 100. Furthermore, only 1 signal communication port can be used, the circuit design is simple, two-way detection and control can be achieved, the dual-device linkage control is simple, the number of connection signal lines is small, the detection and control are stable, the cost is low, and the market competitiveness of the product is improved.

[0103] The present application further provides a connection detection device, including the above-mentioned connection detection circuit. Among them, the connection detection device includes a master device 100 and a slave device 200. The master device 100 is provided with a master device detection circuit 10, and the slave device 200 is provided with a slave device detection circuit 20.

[0104] The device provided by the present application can solve the technical problem of high cost in connection detection between the master device and the slave device. Compared with the prior art, the beneficial effects of the device provided by the present application are the same as those of the device circuit provided in the above embodiments, and will not be elaborated here.

[0105] The above are only partial embodiments of the present application, and thus do not limit the patent scope of the present application. Any equivalent structural transformation made under the technical concept of the present application by using the content of the specification and drawings of the present application, or any direct / indirect application in other related technical fields is included in the patent protection scope of the present application.

Claims

1. A connection detection circuit, characterized in that: The connection detection circuit includes a master device detection circuit arranged in the master device and a slave device detection circuit arranged in the slave device, and the master device detection circuit is connected to the slave device detection circuit via a control line; The master device detection circuit receives a connection detection signal, and the master device detection circuit is used to output a first detection voltage according to the connection detection signal, and determine the connection state of the slave device based on the first detection voltage; The slave device detection circuit is used to output a second detection voltage according to the connection detection signal, and determine the master device connection state based on the second detection voltage.

2. The connection detection circuit according to claim 1, characterized in that: The master device detection circuit includes a connection detection control circuit, a master device connection circuit and a master device result output circuit, wherein the connection detection control circuit is connected to the master device connection circuit and the master device result output circuit, and the master device connection circuit is connected to the first end of the control line, and the connection detection control circuit includes: a first resistor, a first end of the first resistor being connected to the connection detection signal; A first transistor, wherein a first end of the first transistor is connected to a second end of the first resistor, and a second end of the first transistor is grounded; A second resistor, wherein a first end of the second resistor is connected to the third end of the first transistor, and a second end of the second resistor is connected to the main device connection circuit and the main device result output circuit.

3. The connection detection circuit according to claim 2, characterized in that: The connection detection control circuit also includes: a transistor, wherein a first end of the transistor is connected to a second end of the second resistor, a second end of the transistor is connected to the master device connection circuit, and a third end of the transistor is connected to the master device result output circuit; a third resistor, wherein a first end of the third resistor is connected to the first end of the transistor and the second end of the second resistor, and a second end of the third resistor is connected to the second end of the transistor and the master device connection circuit; A first capacitor, wherein a first end of the first capacitor is connected to a first end of the transistor and a second end of the second resistor, and a second end of the first capacitor is connected to a third end of the transistor and a main device result output circuit.

4. The connection detection circuit according to claim 3, characterized in that: The master device result output circuit comprises: a fourth resistor, wherein a second end of the fourth resistor is connected to the third end of the transistor; a fifth resistor, a second end of the fifth resistor being connected to a first end of the fourth resistor, and a first end of the fifth resistor being grounded; a second triode, wherein a first end of the second triode is connected to the second end of the fifth resistor and the first end of the fourth resistor, and a second end of the second triode is grounded; A sixth resistor, wherein a first end of the sixth resistor is connected to the first detection port and the third end of the second transistor, and a second end of the sixth resistor is connected to a main device power supply.

5. The connection detection circuit according to claim 3, characterized in that: The main device connection circuit comprises: a seventh resistor, wherein a first end of the seventh resistor is connected to the second end of the transistor, and a second end of the seventh resistor is connected to the first end of the control line; A second capacitor, wherein a second end of the second capacitor is connected to a first end of the seventh resistor, and a first end of the second capacitor is grounded.

6. The connection detection circuit according to claim 5, characterized in that: The slave device detection circuit includes a slave device connection circuit and a slave device result output circuit, wherein the slave device connection circuit is connected to the slave device result output circuit and the second end of the control line, and the slave device connection circuit includes: an eighth resistor, wherein a first end of the eighth resistor is connected to the second end of the control line, and a second end of the eighth resistor is connected to the slave device result output circuit; a third capacitor, wherein a second end of the third capacitor is connected to the second end of the eighth resistor and the slave device result output circuit, and a first end of the third capacitor is grounded; A ninth resistor, wherein a first end of the ninth resistor is connected to the second end of the eighth resistor and the slave device result output circuit, and a second end of the ninth resistor is connected to a slave device power supply.

7. The connection detection circuit according to claim 6, characterized in that: The slave device result output circuit comprises: a third triode, wherein a first end of the third triode is connected to the second end of the eighth resistor, and a third end of the third triode is connected to the second end of the ninth resistor and the slave device power supply; a tenth resistor, a first end of the tenth resistor being connected to the second end of the third triode; an eleventh resistor, a first end of the eleventh resistor being grounded, and a second end of the eleventh resistor being connected to the second end of the tenth resistor; a fourth triode, wherein a first end of the fourth triode is connected to a second end of the eleventh resistor and a second end of the tenth resistor, and a second end of the fourth triode is grounded; A twelfth resistor, wherein a first end of the twelfth resistor is connected to the second detection port and the third end of the fourth transistor, and a second end of the twelfth resistor is connected to the slave device power supply.

8. The connection detection circuit according to claim 6, characterized in that: The slave device result output circuit comprises: a reset unit, wherein a first end of the reset unit is connected to a second end of the eighth resistor, and a second end of the reset unit is grounded; A twelfth resistor, wherein a first end of the twelfth resistor is connected to the second detection port and a third end of the reset unit, and a second end of the twelfth resistor is connected to the slave device power supply.

9. The connection detection circuit according to claim 8, characterized in that: The reset unit includes a reset chip, on which a reset input port, a reset output port and a ground port are arranged, wherein the reset input port serves as a first end of the reset unit, the reset output port serves as a third end of the reset unit, and the ground port serves as a second end of the reset unit.

10. A connection detection device, characterized in that: The connection detection device comprises a connection detection circuit as claimed in any one of claims 1 to 9.