USB controller, device and system

By designing a USB controller that includes a speed selection module and a switch module, the problem that traditional USB standards are difficult to compatible with full-speed and low-speed devices is solved, and efficient data transmission of multiple devices is supported without replacing hardware.

CN223022678UActive Publication Date: 2025-06-24SHENZHEN YSPRING TECH
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Patent Information

Application Number
CN202422098217.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-27
Publication Date
2025-06-24
Estimated Expiration
2034-08-27

AI Technical Summary

Technical Problem

Traditional USB standards are difficult to flexibly compatible with full-speed and low-speed devices, resulting in users needing to select different chips and controllers according to device speed, increasing the complexity of use and limiting the flexibility and scalability of the system.

Method used

Design a USB controller, including a CPU module, a speed selection module, a communication interface module, a switch module, a clock module and a data processing module. The speed selection module receives the control command of the CPU module, sends control signals to the communication interface module, and controls the switch module to select the corresponding speed mode, so that the communication interface module and external USB devices can transmit data.

Benefits of technology

It supports full-speed devices and low-speed devices without replacing hardware, with high flexibility and adaptability, can cope with various complex transmission scenarios, and realizes efficient data transmission with external USB devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the technical field of USB, and discloses a USB controller, device and system, and the USB controller comprises a CPU module, a speed selection module, a communication interface module, a switch module, a clock module and a data processing module. The speed selection module sends a control signal to the communication interface module according to a control instruction issued by the CPU module; the clock module provides a clock source for the USB controller during working according to the control instruction of the CPU module; the data processing module performs USB protocol analysis and internal data processing according to the control instruction of the CPU module; the communication interface module is connected with an external USB device, and controls the switch module to select a corresponding speed mode according to the control signal, so that the communication interface module performs data transmission with the external USB device according to the corresponding speed mode. The USB controller provided by the utility model supports different data transmission speed modes, and can cope with various complex transmission scenes.
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Description

Technical Field

[0001] This application relates to the technical field of communication interfaces, and particularly to a USB controller, device, and system. Background Art

[0002] Today, with the rapid development of information technology, the Universal Serial Bus (USB), as a widely used interface standard, is of great importance. Traditional USB standards are mainly divided into two categories: USB 1.0 and USB 1.1. Among them, USB 1.0 is designed to support low-speed devices (LS) with a data transfer rate of 1.5 Mbps, mainly for low-bandwidth peripherals such as keyboards and mice; while USB 1.1 increases the transfer rate to 12 Mbps and supports full-speed devices (FS), suitable for application scenarios such as printers and scanners that require higher data transfer rates. However, with the increasing complexity in the field of communication interface technology, the limitations of traditional USB standards are gradually emerging. Especially in scenarios where low-speed and full-speed devices need to be connected simultaneously, users have to face the challenge of hardware compatibility. Due to the differences between USB 1.0 and USB 1.1 in the physical layer, protocol layer, etc., traditional solutions often require users to select corresponding chips and controllers for adaptation according to the speed type of the device, which not only increases the complexity of use but also limits the flexibility and scalability of the system. Utility Model Content

[0003] In view of this, embodiments of this application provide a USB controller, device, and system, which can effectively solve the problem that the prior art cannot flexibly compatible and use full-speed and low-speed devices, etc.

[0004] In a first aspect, an embodiment of this application provides a USB controller, including: a CPU module, a speed selection module, a communication interface module, a switch module, a clock module, and a data processing module;

[0005] The speed selection module is connected to the CPU module, and the speed selection module is configured to send a control signal to the communication interface module according to a control instruction issued by the CPU module;

[0006] The clock module is connected to the data processing module, and the clock module is configured to provide a clock source for the operation of the USB controller according to the control instruction of the CPU module;

[0007] The data processing module is connected to the communication interface module, and the data processing module is configured to perform USB protocol parsing and internal data processing according to the control instruction of the CPU module;

[0008] The communication interface module is used to connect to an external USB device and control the switch module to select a corresponding speed mode according to the control signal, so that the communication interface module performs data transmission with the external USB device according to the corresponding speed mode.

[0009] In some embodiments, the switch module includes a first switch, a second switch, and a pull-up resistor, and the communication interface module includes differential signal transmission terminals;

[0010] The first signal terminal of the first switch is connected to the first end of the pull-up resistor, and the second signal terminal of the first switch is connected to the first end of the differential signal transmission terminal; the first signal terminal of the second switch is connected to the first end of the pull-up resistor, and the second signal terminal of the second switch is connected to the second end of the differential signal transmission terminal.

[0011] In some embodiments, the signal receiving terminal of the speed selection module is connected to the signal sending terminal of the CPU module, and the first signal sending terminal of the speed selection module is respectively connected to the first signal receiving terminal of the communication interface module and the controlled terminal of the switch module;

[0012] The speed selection module is configured to send a full-speed selection signal to the communication interface module when receiving a full-speed control instruction issued by the CPU module, so that the communication interface module controls the first switch of the switch module to close, and then performs data transmission based on the full-speed mode.

[0013] In some embodiments, the speed selection module is further configured to send a low-speed selection signal to the communication interface module when receiving a low-speed control instruction issued by the CPU module, so that the communication interface module controls the second switch of the switch module to close, and then performs data transmission based on the low-speed mode.

[0014] In some embodiments, the first signal sending terminal of the communication interface module is connected to the first switch or the second switch of the switch module.

[0015] In some embodiments, the clock module includes a frequency divider, and the frequency divider is configured to divide the clock signal generated by the clock module to provide the clock source for the operation of the USB controller.

[0016] In some embodiments, the speed modes include a full-speed mode and a low-speed mode, and the operating frequency of the full-speed mode is 6-10 times that of the low-speed mode.

[0017] In some embodiments, the operating frequency of the low-speed mode is 6 MHz, and the operating frequency of the full-speed mode is 48 MHz.

[0018] In a second aspect, an embodiment of the present application provides a USB device, including the USB controller described in the first aspect above.

[0019] In a third aspect, an embodiment of the present application provides a USB system, including a USB host and a USB slave that communicate based on the USB protocol, where the USB slave includes the USB controller described in the first aspect above.

[0020] The embodiments of the present application have the following beneficial effects:

[0021] A USB controller, device, and system of the present application receive a control instruction issued by the CPU module through a speed selection module, send a corresponding control signal to a communication interface module according to the control instruction, so that the communication interface module controls a switch module according to the control signal, and further enables the communication interface module to perform data transmission with an external USB device in a corresponding speed mode. Moreover, a stable clock source is provided for the USB controller through a clock module, and efficient data processing of the USB protocol and internal data is performed through a data processing module. That is, through the collaborative work of each module, the USB controller has high flexibility and adaptability, supports full-speed devices and low-speed devices without replacing hardware, enables it to handle various complex transmission scenarios, and realizes efficient data transmission with external USB devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0023] Figure 1 Shows a first structural schematic diagram of the USB controller according to an embodiment of the present application;

[0024] Figure 2 Shows a second structural schematic diagram of the USB controller according to an embodiment of the present application;

[0025] Figure 3 Shows a third structural schematic diagram of the USB controller according to an embodiment of the present application;

[0026] Figure 4 Shows a first application schematic diagram of the USB controller according to an embodiment of the present application;

[0027] Figure 5 Shows a second application schematic diagram of the USB controller according to an embodiment of the present application.

[0028] Description of Main Component Symbols:

[0029] 10: USB controller; 100: CPU module; 110: Speed selection module; 120: Communication interface module; 130: Switch module; 131: Pull-up resistor; 132: First switch; 133: Second switch; 140: Clock module; 141: Divider; 150: Data processing module; DP: First end of differential signal transmission end; DN: Second end of differential signal transmission end; 20: USB device; 300: USB system; 310: USB host; 320: USB slave. Detailed Implementation Manner

[0030] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments.

[0031] Generally, the components of the embodiments of the present application described and illustrated herein can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application claimed, but merely represents selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of protection of the present application.

[0032] Hereinafter, the terms "including", "having" and their cognates that can be used in various embodiments of the present application are only intended to represent specific features, numbers, steps, operations, elements, components or combinations of the foregoing items, and should not be construed as first excluding the existence of one or more other features, numbers, steps, operations, elements, components or combinations of the foregoing items or increasing the possibility of one or more features, numbers, steps, operations, elements, components or combinations of the foregoing items. In addition, the terms "first", "second", "third", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0033] Unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which various embodiments of the present application belong. The terms (such as those defined in a commonly used dictionary) will be interpreted as having the same meaning as the contextual meaning in the relevant technical field and will not be interpreted as having an idealized meaning or an overly formal meaning unless clearly defined in various embodiments of the present application.

[0034] Next, some embodiments of the present application will be described in detail in conjunction with the accompanying drawings. Without conflict, the following embodiments and the features in the embodiments can be combined with each other.

[0035] Considering the problem that in the prior art, the device is not flexible to use. If full-speed and low-speed devices need to be used simultaneously, different chips and controllers need to be found for adaptation, a USB controller, device, and system are proposed. The speed selection module receives the control instructions sent by the CPU module, and sends corresponding control signals to the communication interface module according to the control instructions, so that the communication interface module controls the switch module according to the control signals, and further enables the communication interface module to perform data transmission with the external USB device 20 according to the corresponding speed mode. The clock module provides a stable clock source for the USB device 20, and the data processing module performs efficient data processing for the USB device 20. That is, through the collaborative work of each module, the USB controller has high flexibility and adaptability, and supports full-speed and low-speed devices without replacing hardware, enabling it to handle various complex transmission scenarios and achieving efficient data transmission with the external USB device 20.

[0036] The following will describe the USB controller, device, and system in conjunction with some specific embodiments.

[0037] In one embodiment, Figure 1 A schematic structural diagram of the USB controller according to an embodiment of the present application is shown. Exemplarily, the USB controller 10 includes: a CPU module 100, a speed selection module 110, a communication interface module 120, a switch module 130, a clock module 140, and a data processing module 150. The speed selection module 110 is connected to the CPU module 100, and the speed selection module 110 is configured to send control signals to the communication interface module 120 according to the control instructions sent by the CPU module 100; the clock module 140 is connected to the data processing module 150, and the clock module 140 is configured to provide a clock source for the operation of the USB controller 10 according to the control instructions of the CPU module 100; the data processing module 150 is connected to the communication interface module 120, and the data processing module 150 is configured to perform USB protocol parsing and internal data processing according to the control instructions of the CPU module 100; the communication interface module 120 is configured to connect to the external USB device 20, and control the switch module 130 to select the corresponding speed mode according to the control signal, so that the communication interface module 120 performs data transmission with the external USB device 20 according to the corresponding speed mode.

[0038] Exemplarily, the CPU is the core processing module of the USB controller 10, responsible for executing control logic, sending control instructions, and managing other modules, and controlling the operation of the entire USB controller 10. The control signal indicates at which speed mode the communication interface module 120 transfers data with the external USB device 20. The frequency of the clock source may be adjusted according to the selected speed mode to ensure that the USB controller 10 can transfer data at the correct speed.

[0039] The USB controller of this embodiment receives the control instructions issued by the CPU module 100 through the speed selection module 110, sends the corresponding control signals to the communication interface module 120 according to the control instructions, so that the communication interface module 120 controls the switch module 130 according to the control signals, and further enables the communication interface module 120 to transfer data with the external USB device 20 according to the corresponding speed mode. Moreover, a stable clock source is provided for the USB controller 10 through the clock module 140, and efficient data processing of the USB protocol and internal data is performed through the data processing module 150. That is, through the collaborative work of each module, the USB controller 10 has high flexibility and adaptability, can handle various complex transmission scenarios, and realizes efficient data transmission with the external USB device 20. It can be understood that in the embodiments of this application, no structural improvements are made to the clock module 140 and the data processing module 150 required to implement USB protocol communication, and they can be completely implemented by corresponding modules or chips with the same functions in existing USB technologies, which are not limited here.

[0040] In one embodiment, as Figure 2 shown, the switch module 130 in the USB controller 10 includes a first switch 132, a second switch 133, and a pull-up resistor 131. The communication interface module 120 includes a differential signal transmission end. Among them, the first signal end of the first switch 132 is connected to the first end of the pull-up resistor 131, and the second signal end of the first switch 132 is connected to the first end DP of the differential signal transmission end. The first signal end of the second switch 133 is connected to the first end of the pull-up resistor 131, and the second signal end of the second switch 133 is connected to the second end DN of the differential signal transmission end.

[0041] Exemplarily, the switch module 130 is responsible for controlling the on / off of the signal flow and switching different circuit paths inside the USB controller 10 to realize the function of the communication interface module 120 transferring data with the external USB device 20 according to the corresponding speed mode.

[0042] Among them, the switch module 130 is composed of a first switch 132, a second switch 133 and a pull-up resistor 131. The first switch 132 has a first signal terminal and a second signal terminal, and the second switch 133 has a first signal terminal and a second signal terminal, which are used to control the on and off of the signal. The pull-up resistor 131 is used to pull the signal line to a high-level state to ensure the stability of the signal line; the differential signal transmission terminal is an interface technology commonly used in high-speed data transmission, and signals are transmitted through two lines (it should be noted that here they refer to the first end DP and the second end DN of the differential signal transmission terminal) respectively.

[0043] That is to say, the first switch 132 and the second switch 133 are connected to a pull-up resistor 131 through their first signal terminals, ensuring that when the switch is off or the signal is not activated, the differential signal line can maintain a stable high-level state; the second signal terminal of the first switch 132 is connected to the first end DP of the differential signal transmission terminal, and the second signal terminal of the second switch 133 is connected to the second end DN of the differential signal transmission terminal. In this way, when the switch is closed, the signal can be transmitted to the differential signal line through these two switches, thereby realizing communication with external devices.

[0044] The USB controller of this embodiment independently controls the two signal lines of the differential signal transmission terminal through the first switch 132 and the second switch 133, and at the same time uses the pull-up resistor 131 to ensure that when the switch is off, the signal line can maintain a high-level state.

[0045] In one embodiment, as Figure 2 shown, the signal receiving end of the speed selection module 110 in the USB controller 10 is connected to the signal sending end of the CPU module 100, and the first signal sending end of the speed selection module 110 is respectively connected to the first signal receiving end of the communication interface module 120 and the controlled end of the switch module 130;

[0046] The speed selection module 110 is used to send a full-speed selection signal to the communication interface module 120 when receiving a full-speed control instruction issued by the CPU module 100, so that the communication interface module 120 controls the first switch 132 of the switch module 130 to close, and then data transmission is carried out based on the full-speed mode.

[0047] Exemplarily, the second signal sending end of the speed selection module 110 is connected to the first signal receiving end of the data processing module 150, and the third signal sending end of the speed selection module 110 is connected to the signal receiving end of the clock module 140.

[0048] Among them, the CPU module 100 sends a full-speed control instruction to the speed selection module 110. After receiving the full-speed selection signal from the CPU module 100, the speed selection module 110 sends the full-speed selection signal to the communication interface module 120. The communication interface module 120 controls the closing of the first switch 132 of the switch module 130 according to the full-speed selection signal. At this time, the entire USB controller 10 is in the full-speed mode and ready for data transmission. That is, at this time, data will be transmitted between the USB device 20 and the host in the full-speed mode through the communication interface module 120.

[0049] It should be noted that "full speed" usually refers to a data transmission speed defined in the USB standard, which is faster than low speed.

[0050] In the USB controller of this embodiment, the CPU module 100 serves as the control center and controls the data transmission speed by sending instructions to the speed selection module 110. The speed selection module 110 then sends corresponding signals to the communication interface module 120 and the switch module 130 according to the received instructions, finally realizing the switching of the data transmission rate, enabling the USB controller 10 to flexibly adapt to different data transmission requirements and improving the flexibility and efficiency of the system.

[0051] In one embodiment, as Figure 2 shown, the speed selection module 110 in the USB controller 10 is also used to send a low-speed selection signal to the communication interface module 120 when receiving a low-speed control instruction issued by the CPU module 100, so that the communication interface module 120 controls the closing of the second switch 133 of the switch module 130, and then data transmission is carried out based on the low-speed mode.

[0052] Exemplarily, when the speed selection module 110 receives a low-speed control instruction from the CPU module 100, it sends a low-speed selection signal to the communication interface module 120 to inform the communication interface module 120 to switch to the low-speed mode for data transmission, controls the closing of the second switch 133 of the switch module 130, and the second switch 133 is the physical switch circuit for the low-speed mode and is used for data transmission in the low-speed mode.

[0053] Among them, the low-speed mode means that the data transmission between the USB device 20 and the host will become slower, but it can be more energy-efficient or more compatible with some devices.

[0054] For example, the speed selection module 110 selects an appropriate data transmission speed mode according to the received instruction. In addition to the low-speed and full-speed modes, the USB standard also supports multiple speed modes, such as High Speed and SuperSpeed, etc. Each mode has its specific application scenarios and transmission speeds. It should be noted that the speed mode can be determined according to the specific application scenarios and requirements.

[0055] In the USB controller of this embodiment, the speed selection module 110 switches the data transmission speed according to the instruction of the CPU module 100. By controlling the closing of the switches in the switch module 130, the communication interface module 120 can flexibly adjust the data transmission mode to meet different application requirements, making the USB controller 10 highly flexible and adaptable to cope with various complex transmission scenarios.

[0056] In one embodiment, as Figure 2 shown, the first signal sending end of the communication interface module 120 in the USB controller 10 is connected to the first switch 132 or the second switch 133 of the switch module 130.

[0057] Exemplarily, the second signal sending end of the communication interface module 120 is connected to the third signal receiving end of the data processing module 150, and the signal sending end of the CPU module 100 is connected to the signal receiving end of the speed selection module 110. That is, when the CPU module 100 sends control instructions such as low speed or full speed to the speed selection module 110, the speed selection module 110 generates corresponding low-speed or full-speed selection signals according to the control instructions and sends them to the communication interface module 120. After receiving the corresponding low-speed or full-speed selection signals, the communication interface module 120 controls the corresponding first switch 132 or the second switch 133 in the switch module 130 to close, so that the communication interface module 120 performs data transmission with the external USB device 20 according to the corresponding speed mode.

[0058] It should be noted that the "first switch 132" and "second switch 133" here are exemplary names, and the naming and quantity of the switch module 130 may vary according to the specific design and requirements of the USB controller 10. In addition, although the description mentions the "first signal receiving end" and "first signal sending end", this does not mean that there is only one such port in the USB controller 10; in fact, in order to support complex functions such as multi-channel and multi-speed modes, the USB controller 10 may contain multiple signal receiving ends and sending ends inside.

[0059] In the USB controller of this embodiment, the data transmission path and speed mode are controlled by the closing states of the switches in the switch module 130, thereby realizing data transmission between the USB controller 10 and the external device based on a specific speed mode.

[0060] In one embodiment, as Figure 3 shown, the clock module 140 in the USB controller 10 includes a frequency divider 141, and the frequency divider 141 is used to divide the clock signal generated by the clock module 140 to provide a clock source for the operation of the USB controller 10.

[0061] Exemplarily, the signal receiving end of the clock module 140 is connected to the third signal sending end of the speed selection module 110, and the signal sending end of the clock module 140 is connected to the second signal receiving end of the data processing module 150. The clock signal generated by the clock module 140 is usually generated based on a system clock (such as the clock signal of the CPU) or an external crystal oscillator. However, different parts inside the USB controller 10 may have different frequency requirements for the clock signal. For example, the full-speed mode may require a higher clock frequency to support full-speed data transmission, while the low-speed mode may only require a lower clock frequency to save power or simplify the design. Therefore, the original clock signal generated by the clock module 140 can be frequency-divided by the frequency divider 141 to adapt to different modes. Specifically, it is to convert a high-frequency clock signal into multiple low-frequency clock signals, or reduce the frequency of the clock signal to the required level, so as to meet the different frequency requirements of different modules inside the USB controller 10.

[0062] The USB controller of this embodiment provides a stable and reliable clock source for the operation of the USB controller 10 through the clock module 140, and meets the requirements of different speed modes and low power consumption through frequency division processing.

[0063] In one embodiment, the speed mode includes a full-speed mode and a low-speed mode, and the operating frequency of the full-speed mode is 6-10 times that of the low-speed mode. Among them, the operating frequency refers to the rate of the clock signal used when the device or system executes its corresponding function, usually expressed in hertz (Hz), and determines the speed of processing data inside the device.

[0064] Exemplarily, the operating frequency of the full-speed mode can be 6 times, 8 times, 10 times, etc. that of the low-speed mode, and can be specifically set according to actual needs. It should be noted that in the embodiment of the present application, when the operating frequency of the full-speed mode is 8 times that of the low-speed mode, it is the optimal choice, that is, at this operating frequency, the device can execute operations at a higher speed, process data faster, and have a shorter response time.

[0065] Exemplarily, the Low Speed Mode is generally applicable to devices with low requirements for data transfer speed but strict requirements for power consumption and cost, such as keyboards, mice, etc. The Full Speed Mode provides a higher data transfer speed than the Low Speed Mode and is usually applicable to devices that require faster data transfer speed, such as printers, scanners, etc. In practical applications, the USB controller 10 will automatically select or switch to an appropriate speed mode according to the type and speed requirements of the connected USB device 20.

[0066] In addition, in addition to the Low Speed Mode and the Full Speed Mode, the USB standard also defines higher speed modes such as the High Speed Mode and the Super Speed Mode to support faster data transfer requirements.

[0067] The USB controller of this embodiment supports different data transfer requirements by selecting different speed modes.

[0068] In one embodiment, if the operating frequency of the Low Speed Mode is 6 MHz, the operating frequency of the Full Speed Mode can be 48 MHz.

[0069] For example, Low Speed Mode: The operating frequency of the Low Speed Mode is 6 MHz (megahertz). The Low Speed Mode is usually used in scenarios with low speed requirements. In this mode, the performance of the device (such as data processing speed, response time, etc.) will be correspondingly reduced. Full Speed Mode: The operating frequency of the Full Speed Mode is 48 MHz (megahertz). The Full Speed Mode is 6 - 10 times that of the Low Speed Mode, indicating that in the Full Speed Mode, the device can perform operations at a higher speed, process data faster, and have a shorter response time. The Full Speed Mode is suitable for scenarios that require high performance, such as real-time data processing, high-speed communication, etc. It should be noted that the operating frequency can be determined according to specific application scenarios and requirements.

[0070] The USB controller of this embodiment has high flexibility and adaptability by limiting the operating frequencies of the Low Speed Mode and the Full Speed Mode, and can handle various complex transmission scenarios.

[0071] This application embodiment also provides a USB device, such as Figure 4 shown, the USB device 20 includes the USB controller 10 mentioned in any of the above embodiments.

[0072] This application embodiment also provides a USB system, such as Figure 5 shown, the USB system 300 includes a USB host 310 and a USB slave 320 that communicate based on the USB protocol, and the USB slave 320 includes the USB controller 10 mentioned in any of the above embodiments.

[0073] As described above, this is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application.

Claims

1. A USB controller, characterized in that: include: CPU module, speed selection module, communication interface module, switch module, clock module and data processing module; The speed selection module is connected to the CPU module, and the speed selection module is used to send a control signal to the communication interface module according to the control instruction issued by the CPU module; The clock module is connected to the data processing module, and is used to provide a clock source for the USB controller when it works according to the control instruction of the CPU module; The data processing module is connected to the communication interface module, and is used to perform USB protocol analysis and internal data processing according to the control instructions of the CPU module; The communication interface module is used to connect to an external USB device, and controls the switch module to select a corresponding speed mode according to the control signal, so that the communication interface module performs data transmission with the external USB device according to the corresponding speed mode.

2. The USB controller according to claim 1, characterized in that: The switch module includes a first switch, a second switch and a pull-up resistor, and the communication interface module includes a differential signal transmission terminal; The first signal end of the first switch is connected to the first end of the pull-up resistor, and the second signal end of the first switch is connected to the first end of the differential signal transmission end; the first signal end of the second switch is connected to the first end of the pull-up resistor, and the second signal end of the second switch is connected to the second end of the differential signal transmission end.

3. The USB controller according to claim 2, characterized in that: The signal receiving end of the speed selection module is connected to the signal sending end of the CPU module, and the first signal sending end of the speed selection module is respectively connected to the first signal receiving end of the communication interface module and the controlled end of the switch module; The speed selection module is used to send a full-speed selection signal to the communication interface module when receiving the full-speed control instruction issued by the CPU module, so that the communication interface module controls the first switch of the switch module to close, and then performs data transmission based on the full-speed mode.

4. The USB controller according to claim 3, characterized in that: The speed selection module is also used to send a low-speed selection signal to the communication interface module when receiving a low-speed control instruction issued by the CPU module, so that the communication interface module controls the second switch of the switch module to close, and then performs data transmission based on the low-speed mode.

5. The USB controller according to claim 2, characterized in that: The first signal sending end of the communication interface module is connected to the first switch or the second switch of the switch module.

6. The USB controller according to claim 1, characterized in that: The clock module comprises a frequency divider, and the frequency divider is used to divide the frequency of the clock signal generated by the clock module to provide the clock source when the USB controller works.

7. The USB controller according to claim 1, characterized in that: The speed mode includes a full-speed mode and a low-speed mode, and the operating frequency of the full-speed mode is 6-10 times the operating frequency of the low-speed mode.

8. The USB controller according to claim 7, characterized in that: The operating frequency of the low-speed mode is 6 MHz, and the operating frequency of the full-speed mode is 48 MHz.

9. A USB device, characterized in that: The USB device at least includes the USB controller as described in any one of claims 1-8.

10. A USB system, characterized in that: The USB system comprises a USB host and a USB slave communicating based on a USB protocol, and the USB slave comprises a USB controller as claimed in any one of claims 1 to 8.