Code receiving circuit of host
By designing a host code receiving circuit, using field effect tubes and multiple resistors to control the voltage of the receiving signal port, the communication quality problem caused by circuit impedance changes in fire bus communication is solved, and higher communication robustness and lower power consumption are achieved.
Patent Information
- Application Number
- CN202421550743.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-02
- Publication Date
- 2025-06-24
- Estimated Expiration
- 2034-07-02
AI Technical Summary
In the second bus communication in the field of fire protection, changes in circuit impedance lead to changes in current amplitude, making it difficult to quantitatively judge the high and low level of the current, which in turn affects the communication quality.
A host code receiving circuit is designed, using a field effect tube and multiple resistors to control the voltage of the receiving signal port, reduce the pull-down resistor voltage division, and improve the accuracy of the processor in level judgment.
It effectively solves the problem of communication quality affected during long-distance communication of the fire bus, improves communication robustness, and reduces the power consumption when nodes send signals.
Smart Images
Figure CN223024428U_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present utility model relate to the field of electronics, and more specifically, to a host code receiving circuit. Background Art
[0002] At present, two-wire communication used in the fire protection field is achieved by detecting current. When the circuit voltage is relatively constant and the circuit impedance changes, it will inevitably lead to a change in the current amplitude. At this time, how to quantitatively determine the high and low levels of the current will become a problem, that is, how to set the threshold for judging high or low current will become a problem.
[0003] For example, if the circuit voltage is 5V and the circuit impedance is 100R, the pull-down current at this time is 5V / 100R = 50mA. If the sampling resistor is 10R and the amplification factor of the current sampling circuit is 10, the output voltage at this time is 5V, which is determined as high. However, when the circuit needs to meet the current limiting function of explosion-proof design and the line impedance is increased to 300R, the voltage output by the current sampling circuit will drop to 1.67V. If the threshold is not recalibrated, it is difficult to determine as high. This means that once the node is used again at 1500m, if the threshold is set too extremely, it will be more difficult to identify that the node has an alarm, which will be difficult to ensure the consistency of the product.
[0004] In view of the above problems, there is currently no effective solution. Summary of the Utility Model
[0005] The embodiments of the present utility model provide a host code receiving circuit to at least solve the problem that the communication quality is affected during long-distance communication of the fire protection bus in the related art.
[0006] According to an embodiment of the present utility model, a host code receiving circuit is provided, including: a field effect transistor, a first resistor, a second resistor, a third resistor, and a first receiving port. Among them, the source electrode of the field effect transistor is connected to the first end of the first resistor, the gate electrode is connected to the first end of the second resistor, and the drain electrode is connected to the first end of the third resistor; the second end of the first resistor is connected to the first receiving port.
[0007] In an exemplary embodiment, the second end of the first resistor is further connected to the first end of the second resistor.
[0008] In an exemplary embodiment, the host code receiving circuit further includes a diode: the positive electrode of the diode is connected to the source electrode of the field effect transistor.
[0009] In an exemplary embodiment, the host code receiving circuit further includes a second receiving port: the negative electrode of the diode is connected to the second receiving port.
[0010] In an exemplary embodiment, the second end of the second resistor in the host code receiving circuit is grounded.
[0011] In an exemplary embodiment, the second end of the third resistor in the host code receiving circuit is connected to a power supply.
[0012] In an exemplary embodiment, the host code receiving circuit further includes a third receiving port, and the third receiving port is connected to the drain of the field effect transistor.
[0013] In an exemplary embodiment, the field effect transistor is an NMOS transistor.
[0014] In an exemplary embodiment, the third resistor is a megaohm-level resistor.
[0015] In an exemplary embodiment, when the host code receiving circuit is in the code receiving state, the control signal received by the first receiving port is set high.
[0016] Through the present utility model, the source of the field effect transistor in the host code receiving circuit is connected to the first end of the first resistor, the gate is connected to the first end of the second resistor, and the drain is connected to the first end of the third resistor; the second end of the first resistor is connected to the first receiving port. Since when the host code receiving circuit is in the code receiving state, the control signal received by the first receiving port is set high. Once the S pole of M1 (NMOS transistor) is pulled low, the receiving signal port can be pulled low. The resistance value of R3 is selected as a megaohm-level resistor, and the larger it is, the better it can reduce the voltage division of the pull-down resistor, thus facilitating the processor to better implement level judgment. Therefore, the phenomenon of misjudgment by the processor will not occur, the problem that the communication quality is affected during long-distance communication of the fire fighting bus can be solved, and the effect of improving the communication quality during long-distance communication of the fire fighting bus can be achieved. Description of the Drawings
[0017] Figure 1 is a schematic diagram of the general node code sending method according to an embodiment of the present utility model;
[0018] Figure 2 is a schematic diagram of the host code receiving circuit according to an embodiment of the present utility model;
[0019] Figure 3 is a schematic diagram of the communication waveform according to an embodiment of the present utility model. Detailed Embodiments
[0020] Hereinafter, embodiments of the present utility model will be described in detail with reference to the drawings and in conjunction with the embodiments.
[0021] As Figure 1It is the node that controls whether to pull down the bus to send a signal according to the information it wants to transmit. Currently, the R4 resistors on the market are generally small, so the current detection scheme is relatively mainstream. If R4 is large or the line is too long, etc., resulting in too large line impedance, it is very easy to cause communication anomalies. Moreover, pulling down the bus to send a signal through R4 will inevitably increase the power consumption of the product.
[0022] Therefore, this application proposes as Figure 2 the design scheme that when the host is in the code receiving state, the bus power supply is turned off, the receive control signal is set high, so that once the S pole of M1 (NMOS transistor) is pulled down, the receive signal port can be pulled down. D1 prevents voltage from pouring in when the bus is powered, protecting the chip and also preventing communication misoperations. VDD is the pull-up level of the port, which can be selected according to the withstand voltage of the chip port. The resistance value of R3 is selected as a megaohm-level resistor. The larger it is, the better it will reduce the voltage division of the pull-down resistor, thus facilitating the processor to better implement level judgment. And the line impedance is basically an ohm-level impedance. Even if the current-limiting resistor 330R is introduced, the voltage division at this time is VDD*330 / (330 + 1M), which is much less than 0.3VDD, so it will not cause misjudgment by the processor.
[0023] As Figure 2 shown, a host code receiving circuit is provided, including: a field effect transistor M1, a first resistor R1, a second resistor R2, a third resistor R3, and a first receiving port P1. Among them, the source S of the field effect transistor is connected to the first end of the first resistor, the gate G is connected to the first end of the second resistor, and the drain D is connected to the first end of the third resistor; the second end of the first resistor is connected to the first receiving port.
[0024] In an exemplary embodiment, the second end of the first resistor is further connected to the first end of the second resistor.
[0025] In an exemplary embodiment, the host code receiving circuit further includes a diode D1: the positive pole of the diode is connected to the source of the field effect transistor.
[0026] In an exemplary embodiment, the host code receiving circuit further includes a second receiving port P2: the negative pole of the diode is connected to the second receiving port.
[0027] In an exemplary embodiment, the second end of the second resistor in the host code receiving circuit is grounded.
[0028] In an exemplary embodiment, the second end of the third resistor in the host code receiving circuit is connected to the power supply.
[0029] In an exemplary embodiment, the host code receiving circuit further includes a third receiving port P3, and the third receiving port is connected to the drain of the field effect transistor.
[0030] In an exemplary embodiment, the field effect transistor is an NMOS transistor.
[0031] In an exemplary embodiment, the third resistor is a megaohm-level resistor.
[0032] In an exemplary embodiment, when the host code receiving circuit is in the code receiving state, the first receiving port receives a control signal to be set high.
[0033] The above-mentioned first port is used to receive a control signal, and the second and third ports receive signals.
[0034] The specific communication waveform is as Figure 3 shown. VCC is the bus power supply. VDD is the pull-up voltage value of the signal receiving port. Phase ①: The host sends a code to the node, and the node performs a code sending operation after a certain time after receiving the code. Phases ② and ③ are the code sending preparation phases of the node. In phase ②, the bus is in the power supply state, and there is no communication at this time. When the host is ready to receive the code, the received control signal is set high, and phase ③ is entered. In this phase, the VCC power supply is turned off, so the bus is in a floating state. At this time, the bus is pulled up to the high level of the received control signal (generally VDD) through R1 and D1. Therefore, the bus voltage will surely not be lower than the voltage of VDD minus the voltage drop of the D1 transistor. Therefore, only when the node pulls low, M1 conducts, causing the signal of the receiving port to be pulled low, and thus phase ④ is entered to perform node signal communication. After the node finishes sending the signal, the received control signal is pulled low, and the bus waveform is pulled back to VCC again.
[0035] This application solves the problem that the communication quality is affected during long-distance communication of the fire protection bus, and can be compatible with node devices that communicate in the pull-current mode. It achieves the technical effects of being unaffected by the line impedance, improving the robustness of communication, and reducing the power consumption when the node sends signals.
[0036] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the principle of the present invention shall be included within the protection scope of the present invention.
Claims
1. A host code receiving circuit, characterized in that: include: A field effect tube, a first resistor, a second resistor, a third resistor, and a first receiving port, wherein: The source of the field effect tube is connected to the first end of the first resistor, the gate is connected to the first end of the second resistor, and the drain is connected to the first end of the third resistor; The second end of the first resistor is connected to the first receiving port.
2. The host code receiving circuit according to claim 1, characterized in that: The second end of the first resistor is also connected to the first end of the second resistor.
3. The host code receiving circuit according to claim 1, characterized in that: Also includes diodes: The anode of the diode is connected to the source of the field effect transistor.
4. The host code receiving circuit according to claim 3, characterized in that: Also includes a second receiving port: A cathode of the diode is connected to the second receiving port.
5. The host code receiving circuit according to any one of claims 1 to 4, characterized in that: A second terminal of the second resistor is grounded.
6. The host code receiving circuit according to any one of claims 1 to 4, characterized in that: The second end of the third resistor is connected to a power source.
7. The host code receiving circuit according to any one of claims 1 to 4, characterized in that: Also includes a third receive port: The third receiving port is connected to the drain of the field effect tube.
8. The host code receiving circuit according to claim 1, characterized in that: The field effect transistor is an NMOS transistor.
9. The host code receiving circuit according to claim 1, characterized in that: The third resistor is a megohm-level resistor.
10. The host code receiving circuit according to claim 1, characterized in that: When the host code receiving circuit is in the code receiving state, the first receiving port receives a control signal high.