High-precision clock device based on VCTCXO

Abstract

The utility model provides a high-precision clock device based on VCTCXO, which is applied to the technical field of power cable monitoring and comprises a Beidou satellite module, a phase-locked counting module, a frequency regulator and a clock unit, the phase lock counting module generates a square wave signal according to a clock signal of the clock unit and synchronizes the square wave signal with a received Beidou pulse signal of the Beidou satellite module, and the synchronized square wave signal is transmitted to a load end through the clock load interface; and the phase-locked counting module is also used for counting the frequency of the clock signal output by the clock unit within the interval time of the two Beidou pulse signals, and controlling the frequency regulator to generate a corresponding fine tuning voltage to regulate the oscillation frequency of the clock unit. According to the high-precision clock device based on the VCTCXO, the square wave signal synchronized with the Beidou pulse signal is generated based on the VCTCXO, the frequency of the square wave signal is measured through the frequency regulator to provide output reference feedback, and the time synchronization precision is improved.

Description

Technical Field

[0001] The utility model belongs to the technical field of power cable monitoring, and particularly relates to a high-precision clock device based on VCTCXO. Background Art

[0002] In the field of power cable monitoring, due to the different lengths of transmission lines, which can be several hundred meters at the shortest and dozens of kilometers at the longest, the time synchronization for monitoring traveling waves at both ends needs to be accurate to the nanosecond level. The monitoring devices in the actual field are often installed at both ends of the circuit. This installation method determines that conventional time synchronization methods such as optical fibers cannot be used, and there is also a time difference of the speed of light in optical fiber time synchronization itself. A too long distance cannot meet the requirements. In addition, the commonly used wireless base station time synchronization method has a large time difference problem.

[0003] The transmission speed of electrical signals in the cable is close to the speed of light. Therefore, in order to measure the fault signals transmitted in the circuit, it is necessary to obtain the signal waveforms within the same moment (within 100 ns, the equivalent speed of light is about 30 meters), which also requires higher synchronization of the sampling time.

[0004] In the prior art, the scheme of using the second pulse of GPS as the clock reference relies too much on the quality of GPS signals. When the GPS signals are weak, the time synchronization accuracy will drop rapidly, and there is no ability to cope with the loss of satellite signals for a short time. In addition, the scheme of using tcxo as the clock reference cannot ensure the synchronization between two modules because tcxo itself has a certain deviation value. Without reference calibration, the deviation value will become larger and larger with the accumulation of time. Summary of the Utility Model

[0005] In view of the above problems in the prior art, the purpose of the utility model is to provide a high-precision clock device based on VCTCXO, which generates a square wave signal synchronized with the Beidou pulse signal based on VCTCXO, and measures the frequency of the square wave signal through a frequency regulator to provide output reference feedback, so as to improve the time synchronization accuracy.

[0006] A high-precision clock device based on VCTCXO includes a Beidou satellite module, a phase-locked counting module, a frequency regulator, and a clock unit. The clock unit is used to generate a clock signal. The phase-locked counting module generates a square wave signal with a preset frequency according to the clock signal output by the clock unit and synchronizes it with the Beidou pulse signal received by the Beidou satellite module. The synchronized square wave signal is transmitted to the load end through a clock load interface;

[0007] The phase-locked counting module is also used to count the frequency of the clock signal output by the clock unit within the interval time between two Beidou pulse signals, so as to control the frequency regulator to generate a corresponding fine-tuning voltage to adjust the oscillation frequency of the clock unit.

[0008] Preferably, the clock unit includes a crystal oscillator U1. The VC-TCXO pin of the crystal oscillator U1 is connected to the fine-tuning voltage of the frequency regulator. The OUT pin of the crystal oscillator U1 is connected to the IN+ pin of the clock buffer U2 through a capacitor C91. A resistor R180 is also connected to the OUT pin of the crystal oscillator U1, and the other end of the resistor R180 is grounded.

[0009] Preferably, the VCC pin of the crystal oscillator U1 is connected to a first power supply. A capacitor C83 is also connected to the VCC pin of the crystal oscillator U1, and the other end of the capacitor C83 is grounded; the GND pin of the crystal oscillator U1 is grounded. A capacitor C81 is also connected to the VC-TCXO pin of the crystal oscillator U1, and the other end of the capacitor C81 is grounded.

[0010] Preferably, the IN- pin of the clock buffer U2 is grounded through a capacitor C163. A resistor R183 is connected to the OUT1 pin of the clock buffer U2. The other end of the resistor R183 is connected in parallel with a resistor C166 and a resistor R184. The other end of the resistor R184 is connected to a capacitor C165, and the other end of the capacitor C165 is grounded. The other end of the capacitor C166 outputs a clock signal. The OUT2 pin of the clock buffer U2 is grounded through a resistor R1.

[0011] Preferably, a resistor R93 and a resistor R182 are connected in parallel to the FILTA pin of the clock buffer U2. The other end of the capacitor R93 is connected to a second power supply. The other end of the resistor R182 is grounded; the FILTB pin of the clock buffer U2 is connected to the second power supply through a resistor R92. A capacitor C162 is connected to the second power supply, and the other end of the capacitor C162 is grounded; the GND pin, SD1 pin, GNDOUT pin, and SD2 pin of the clock buffer U2 are all grounded.

[0012] The beneficial effects of the present utility model are as follows: The high-precision clock device based on VCTCXO generates a square wave signal synchronized with the Beidou pulse signal based on VCTCXO, and measures the frequency of the square wave signal through a frequency regulator to provide output reference feedback, thereby providing a high-precision stable clock, and thus improving the accuracy of time synchronization.

[0013] In addition, when the Beidou pulse signal of the Beidou satellite module fails and the time synchronization signal is lost, long-term maintenance compensation is achieved through the mutual cooperation of the phase-locked counting module and the frequency regulator, and the stable frequency output is continued to be maintained by relying on VCTCXO, meeting the high-reliability requirements of the monitoring device for the time synchronization accuracy. Description of the Drawings

[0014] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0015] Figure 1 It is a system block diagram of the utility model;

[0016] Figure 2 It is a circuit diagram of the clock unit of the utility model. DETAILED DESCRIPTION

[0017] Embodiment 1

[0018] like Figure 1 As shown in the figure, a high-precision clock device based on VCTCXO is installed in a transmission line monitoring device to solve the remote synchronization problem of the transmission line monitoring device. The clock device is used to synchronize the oscillation signal generated by the VCTCXO with the acquired satellite second pulse signal, thereby obtaining a high-precision stable clock signal, which is used to provide to the corresponding user unit to improve the accuracy of time synchronization. Among them, VCTCXO is a voltage-controlled temperature compensated crystal oscillator, such as Figure 2 The crystal oscillator U2 is shown.

[0019] Specifically, the clock device includes a Beidou satellite module, a phase-locked counting module, a frequency regulator and a clock unit, wherein the clock unit is used to generate a clock signal, which can be used as the operating clock of the system and can also be used for precise clock counting.

[0020] The frequency regulator is used to generate a stable low-noise DC voltage to adjust the oscillation frequency of the VCTCXO so that it can be accurately adjusted within a small range.

[0021] The phase-locked counting module includes a phase-locked loop and a frequency counter, wherein the phase-locked loop generates a square wave signal of a preset frequency according to the clock signal output by the clock unit and synchronizes with the Beidou pulse signal received from the Beidou satellite module. The synchronized square wave signal is transmitted to the load end through the clock load interface. The frequency of the square wave signal in this embodiment is 1HZ. The frequency counter counts the frequency of the clock signal output by the clock unit within the interval between two Beidou pulse signals, thereby controlling the frequency regulator to generate a corresponding fine-tuning voltage to adjust the oscillation frequency of the clock unit.

[0022] The cooperation between the phase-locked counting module and the frequency regulator forms a measurement feedback relationship. The measurement basis is the rising edge of the two timing pulses of the Beidou satellite module, and the output frequency of the VCTCXO is measured. The function of the frequency regulator is to store the actual frequency value of the VCTCXO measured by the phase-locked counting module, and feed back the error to the VCTCXO to keep its frequency stable.

[0023] likeFigure 2 As shown, the clock unit includes a crystal oscillator U1 and a clock buffer U2. Among them, the VC-TCXO pin of the crystal oscillator U1 is connected to the fine-tuning voltage of the frequency regulator. The OUT pin of the crystal oscillator U1 is connected to the IN+ pin of the clock buffer U2 through a capacitor C91. A resistor R180 is also connected to the OUT pin of the crystal oscillator U1, and the other end of the resistor R180 is grounded.

[0024] The VCC pin of the crystal oscillator U1 is connected to the first power supply. A capacitor C83 is also connected to the VCC pin of the crystal oscillator U1, and the other end of the capacitor C83 is grounded. The GND pin of the crystal oscillator U1 is grounded. A capacitor C81 is also connected to the VC-TCXO pin of the crystal oscillator U1, and the other end of the capacitor C81 is grounded.

[0025] The IN- pin of the clock buffer U2 is grounded through a capacitor C163. A resistor R183 is connected to the OUT1 pin of the clock buffer U2. The other end of the resistor R183 is connected in parallel with a resistor C166 and a resistor R184. The other end of the resistor R184 is connected to a capacitor C165, and the other end of the capacitor C165 is grounded. The other end of the capacitor C166 outputs a clock signal. The OUT2 pin of the clock buffer U2 is grounded through a resistor R1.

[0026] A resistor R93 and a resistor R182 are connected in parallel to the FILTA pin of the clock buffer U2. The other end of the capacitor R93 is connected to the second power supply. The other end of the resistor R182 is grounded. The FILTB pin of the clock buffer U2 is connected to the second power supply through a resistor R92. A capacitor C162 is connected to the second power supply, and the other end of the capacitor C162 is grounded. The GND pin, SD1 pin, GNDOUT pin, and SD2 pin of the clock buffer U2 are all grounded.

[0027] Working principle: For this high-precision clock device based on VCTCXO, when in use, the clock device obtains satellite timing information and timing pulses through the Beidou satellite module, and after processing, they are used to calibrate the internal phase-locked loop and frequency counter.

[0028] Specifically, the clock unit is based on VCTCXO to generate a square wave signal. The frequency and edge of this square wave signal are synchronized with the timing pulses of the obtained Beidou satellite module. At the same time, the phase-locked counting module starts to count the frequency of the internal VCTCXO. Two timing pulses form a cycle, and the result is latched to the frequency regulator. The device latches the frequency measurement result through the frequency regulator, compares it with the previous results, and feeds the comparison result back to the VCTCXO as the output reference of the VCTCXO. The clock load interface of the device obtains the output of the phase-locked counting module, buffers it, and then sends it to the connection interface for loads such as the CPU to retrieve and use for synchronization.

[0029] It should be noted that if the Beidou satellite module suddenly loses the satellite signal and remains unrecovered for a long time, the device can still work within the error range relying on the output of the VCTCXO, no longer relying on the timing pulse of the Beidou satellite module, and the reference for counting is the latched value of the previous frequency regulator, with a low dependence on the Beidou satellite module.

[0030] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or perform equivalent replacements for some of the technical features. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A high-precision clock device based on VCTCXO, characterized in that: It includes a Beidou satellite module, a phase-locked counting module, a frequency regulator and a clock unit. The clock unit is used to generate a clock signal. The phase-locked counting module generates a square wave signal of a preset frequency according to the clock signal output by the clock unit and synchronizes with the Beidou pulse signal received from the Beidou satellite module. The synchronized square wave signal is transmitted to the load end through the clock load interface; The phase-locked counting module is also used to count the frequency of the clock signal output by the clock unit within the interval between two Beidou pulse signals, thereby controlling the frequency regulator to generate a corresponding fine-tuning voltage to adjust the oscillation frequency of the clock unit.

2. The high-precision clock device based on VCTCXO according to claim 1, characterized in that: The clock unit includes a crystal oscillator U1, a VC-TCXO pin of the crystal oscillator U1 is connected to the fine-tuning voltage of the frequency regulator, an OUT pin of the crystal oscillator U1 is connected to the IN+ pin of the clock buffer U2 via a capacitor C91, a resistor R180 is also connected to the OUT pin of the crystal oscillator U1, and the other end of the resistor R180 is grounded.

3. The high-precision clock device based on VCTCXO according to claim 2, characterized in that: The VCC pin of the crystal oscillator U1 is connected to a power supply 1, and a capacitor C83 is also connected to the VCC pin of the crystal oscillator U1, and the other end of the capacitor C83 is grounded; The GND pin of the crystal oscillator U1 is grounded, and the VC-TCXO pin of the crystal oscillator U1 is also connected to a capacitor C81, and the other end of the capacitor C81 is grounded.

4. The high-precision clock device based on VCTCXO according to claim 2, characterized in that: The IN- pin of the clock buffer U2 is grounded through a capacitor C163, the OUT1 pin of the clock buffer U2 is connected to a resistor R183, the other end of the resistor R183 is connected in parallel with resistors C166 and R184, the other end of the resistor R184 is connected to a capacitor C165, the other end of the capacitor C165 is grounded, the other end of the capacitor C166 outputs a clock signal, and the OUT2 pin of the clock buffer U2 is grounded through a resistor R1.

5. The high-precision clock device based on VCTCXO according to claim 4, characterized in that: The FILTA pin of the clock buffer U2 is connected in parallel with a resistor R93 and a resistor R182, the other end of the capacitor R93 is connected to the power supply 2, and the other end of the resistor R182 is grounded; The FILTB pin of the clock buffer U2 is connected to the second power supply through the resistor R92, the second power supply is connected to a capacitor C162, and the other end of the capacitor C162 is grounded; The GND pin, SD1 pin, GNDOUT pin and SD2 pin of the clock buffer U2 are all grounded.

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