Audio signal analyzer

Abstract

The utility model relates to an audio signal analyzer which comprises an impedance matching circuit, a low-pass filter, a peak detection circuit, a variable gain amplification circuit, a voltage raising circuit, an AD conversion module, an FFT conversion module and a display module. The audio signal analyzer takes a 32-bit MCU-STM32F103 as a main controller, samples audio signals through AD conversion, carries out fast Fourier transform operation through an FFT conversion module, processes the audio signals, and displays the frequency spectrum of the signals through a high-resolution LCD liquid crystal display. The audio signal analyzer is small in size, low in power consumption and high in precision, an input signal can be divided into two sections, and the two sections enter different gain amplification circuits to be amplified respectively, so that the audio signal analyzer is an ideal solution.

Description

Technical Field

[0001] The utility model relates to the field of audio processing, and particularly relates to an audio signal analyzer. Background Art

[0002] The statements herein only provide background art related to the utility model and do not necessarily constitute prior art.

[0003] An audio signal analyzer is an essential tool in the fields of electronic testing and audio analysis. It has a rich variety of functions. It can measure basic parameters of audio signals such as frequency, amplitude, and phase, and can also perform tests on advanced parameters such as harmonic distortion, signal-to-noise ratio, and dynamic range. In addition, the audio signal analyzer can also provide functions such as spectrum analysis, 1 / 3 octave analysis, octave analysis, and sound pressure level measurement, providing comprehensive support for the design and performance testing of audio equipment.

[0004] In addition, audio signal analyzers have a wide range of applications in fields such as audio engineering, television stations, radio, music production, and performance sites. For example, in the design and production process of audio equipment, audio signal analyzers can be used to measure the performance of various audio equipment, including microphones, power amplifiers, speakers, etc. By testing indicators such as the frequency response characteristics, harmonic distortion, and signal-to-noise ratio of audio equipment, it can ensure that the quality of audio equipment meets the design requirements.

[0005] However, at the same time, the inventor found that there are some technical problems in existing audio signal analyzers, such as:

[0006] (1) The volume is relatively large, and it is not small and portable enough to use.

[0007] (2) The measurement accuracy is not high and the power consumption is relatively high.

[0008] (3) For audio signals, only amplification with a fixed gain multiple within a single channel can be performed, resulting in a relatively weak dynamic regulation ability of the audio signal analyzer for measurable signals. Summary of the Utility Model

[0009] The purpose of the utility model is to provide an audio signal analyzer, which includes an impedance matching circuit, a low-pass filter, a peak detection circuit, a variable gain amplifier circuit, a voltage boosting circuit, an AD conversion module, an FFT conversion module, and a display module; the impedance matching circuit, the low-pass filter, the peak detection circuit, the variable gain amplifier circuit, the voltage boosting circuit, the AD conversion module, the FFT conversion module, and the display module are connected in sequence by wire.

[0010] The variable gain amplifier circuit is provided with a first-stage gain amplifier circuit and a second-stage gain amplifier circuit at the same time; among them, the first-stage gain amplifier circuit includes resistors R6 and R7, and also includes an operational amplifier U2, positive and negative levels, and a ground terminal.

[0011] The second-stage gain amplifier circuit includes resistors R8, R9, R10, R11, R12, and R13, and also includes operational amplifiers U3 and U4, positive and negative levels, and a ground terminal.

[0012] In the first-stage gain amplifier circuit, the 1 port of the operational amplifier U2 is connected to the signal input terminal, the 2 port of the operational amplifier U2 is simultaneously connected to one end of the resistor R7 and the resistor R6, the other end of the resistor R7 is grounded, the other end of the resistor R6 is connected to the 4 port of the operational amplifier U2, and the 5 port and the 3 port of the operational amplifier U2 are respectively connected to the positive and negative levels.

[0013] In the second-stage gain amplifier circuit, one end of the resistor R8 is connected to the signal input terminal, the other end of the resistor R8 is simultaneously connected to one end of the resistor R9 and the 1 port of the operational amplifier U3, the 2 port of the operational amplifier U3 is connected to one end of the resistor R10, the other end of the resistor R10 is grounded, the 3 port and the 5 port of the operational amplifier U3 are respectively connected to the positive and negative levels; the 4 port of the operational amplifier U3 and the other end of the resistor R9 are simultaneously connected to one end of the resistor R11, the other end of the resistor R11 is simultaneously connected to the 1 port of the operational amplifier U4 and one end of the resistor R12, and the other end of the resistor R12 is connected to the 4 port of the operational amplifier U4; the 2 port of the operational amplifier U4 is connected to one end of the resistor R13, the other end of the resistor R13 is grounded; the 3 port and the 5 port of the operational amplifier U4 are respectively connected to the positive and negative levels.

[0014] To make the impedance matching circuit meet the actual needs, a resistor with a resistance value equal to the actual required resistance value is connected in parallel at the in-phase terminal of the operational amplifier of the impedance matching circuit.

[0015] The low-pass filter is used to filter out medium and high-frequency signals.

[0016] The peak detection circuit includes resistors R18, R19, and R20, and also includes a capacitor C4, operational amplifiers U6 and U7, and diodes D1 and D2; the unidirectional conductivity of the diodes and the charge and discharge characteristics of the capacitor are used to detect and hold the peak value.

[0017] The voltage boosting circuit can realize voltage boosting within a range of 1.5V.

[0018] Operations such as liquid crystal display, FFT conversion, power calculation, AD conversion, and gain selection control are all implemented by the STM32 single-chip microcomputer.

[0019] The display module is an LCD liquid crystal display, which adopts a TFT module and has a parallel bus interface.

[0020] Advantages of the above one or more technical solutions:

[0021] (1) The present utility model is designed by using an embedded system analyzer. All kinds of control and calculation parts (liquid crystal display, FFT conversion, power calculation, AD conversion, gain selection control, etc.) are implemented by an STM32 single-chip microcomputer, further reducing the volume of the audio signal analyzer.

[0022] (2) The CPU used in the present utility model is the STM32F103xx enhanced series. The STM32 series of microcontrollers are 32-bit microcontrollers (single-chip microcomputers) developed and produced by STMicroelectronics with an ARM Cortex-M3 core, and are specifically designed for high-performance, low-cost, and low-power embedded applications. Using the STM32F103xx enhanced series of single-chip microcomputers as controllers for control and operation can maintain low power consumption while ensuring the measurement accuracy of the audio signal analyzer.

[0023] (3) The amplification circuit of the present utility model is simultaneously provided with a first-fold gain amplification circuit and a second-fold gain amplification circuit, which can dynamically expand the range of measurable signals, and thus realize the amplification of signals within different peak value ranges. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The specification drawings forming a part of this application are used to provide a further understanding of this application. The schematic embodiments of this application and their descriptions are used to explain this application and do not constitute a limitation to this application.

[0025] Figure 1 It is the overall design block diagram of the embodiment of the present utility model.

[0026] Figure 2 It is the schematic diagram of the impedance matching circuit of the embodiment of the present utility model.

[0027] Figure 3 It is the schematic diagram of the low-pass filter circuit of the embodiment of the present utility model.

[0028] Figure 4 It is the schematic diagram of the peak detection circuit of the embodiment of the present utility model.

[0029] Figure 5 It is the schematic diagram of the first-fold gain amplification circuit in the variable gain amplification circuit of the embodiment of the present utility model.

[0030] Figure 6 It is the schematic diagram of the second-fold gain amplification circuit in the variable gain amplification circuit of the embodiment of the present utility model.

[0031] Figure 7 Schematic diagram of the voltage boosting circuit according to an embodiment of the present invention.

[0032] Figure 8 Control and operation flowchart of the single-chip microcomputer STM32 in an embodiment of the present invention. Specific embodiments

[0033] In order to make the objectives, technical solutions and advantages of the present invention more clear and understandable, the present invention will be further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0034] As Figure 1 shown, an embodiment of the present application provides an audio signal analyzer, including an impedance matching circuit, a low-pass filter, a peak detection circuit, a variable gain amplifier circuit, a voltage boosting circuit, an AD conversion module, an FFT conversion module, and a display module; wherein, the impedance matching circuit, the low-pass filter, the peak detection circuit, the variable gain amplifier circuit, the voltage boosting circuit, the AD conversion module, the FFT conversion module, and the display module are sequentially connected by wire.

[0035] As Figure 2 shown, the impedance matching circuit includes a resistor R1 with a resistance value of 50 Ω, and also includes a dual operational amplifier U1A of model NE5532P, +8V level, -8V level and a ground terminal.

[0036] Specifically, one end of the resistor R1 is connected to the 1 port of the operational amplifier U1A as the signal input terminal, and the other end of the resistor R1 is grounded; the 2 port and 4 port of the operational amplifier U1A are connected to the signal output terminal, and the 3 port and 5 port of the dual operational amplifier U1A are respectively connected to the -8V level and +8V level. The 50-ohm impedance matching circuit satisfies the 50-ohm input impedance by connecting a 50-ohm resistor in parallel at the non-inverting terminal of the dual operational amplifier U1A.

[0037] As Figure 3 shown, the circuit where the low-pass filter is located includes resistors R2, R3 with resistance values of 2 kΩ each, and resistors R4, R5 with resistance values of 1 kΩ each, and also includes capacitors C1, C2 with capacitance values of 10 nF each, an operational amplifier U1 of model OP07AH, +10V level, -10V level and a ground terminal.

[0038] Specifically, one end of resistor R3 is connected to the signal input terminal, and the other end of resistor R3 is connected to one end of capacitor C1 through one end of resistor R2. The other end of resistor R2 is connected to port 1 of operational amplifier U1 through one end of capacitor C2, and the other end of capacitor C2 is grounded; one end of resistor R5 and one end of resistor R4 are connected to port 2 of operational amplifier U1, and the other end of resistor R5 is grounded; the other end of resistor R4 is connected to the other end of capacitor C1. Port 5 and port 3 of operational amplifier U1 are connected to +10V level and -10V level respectively. Among them, the low-pass filter is an active low-pass filter designed by using OP07 and its peripheral components, which can be used to filter out high-frequency signals above 10KHz.

[0039] As Figure 4 shown, in order to better achieve different amplification factors for different signals, a peak detection circuit is added before the comparison circuit. Specifically, the peak detection circuit includes resistors R18, R19, R20, and also includes capacitor C4, operational amplifiers U6, U7, and diodes D1, D2. The unidirectional conductivity of the diode and the charge and discharge characteristics of the capacitor are utilized to detect and hold the peak value. When the input signal is greater than the conduction voltage of the diode, the diode conducts to charge the capacitor. When the signal starts to decrease after reaching the maximum, the voltage non-mutation characteristic of the capacitor is utilized to hold the peak value and output it to the subsequent circuit. The field effect transistor and the triode circuit are used to release the held peak value within a certain time, and then the subsequent peak value is detected.

[0040] In the variable gain amplifier circuit, a first-stage gain amplifier circuit and a second-stage gain amplifier circuit are simultaneously set. In this embodiment, the first-stage gain amplifier circuit has a 5-fold gain amplification, and the second-stage gain amplifier circuit has a 0.5-fold gain amplification, which can respectively achieve the amplification of signals within the peak value ranges of 50mv - 300mv and 300mv - 5V. Specifically:

[0041] As Figure 5 shown, the 5-fold gain amplifier circuit in the variable gain amplifier circuit includes resistors R6 and R7 with resistance values of 4kΩ and 1kΩ respectively, and also includes operational amplifier U2 of model OP07AH, +10V level, -10V level, and the ground terminal; among them, port 1 of operational amplifier U2 is connected to the signal input terminal, port 2 of operational amplifier U2 is simultaneously connected to one end of resistor R7 and resistor R6, the other end of resistor R7 is grounded, and the other end of resistor R6 is connected to port 4 of operational amplifier U2; port 3 and port 5 of operational amplifier U2 are connected to -10V level and +10V level respectively.

[0042] As Figure 6As shown in the figure, the 0.5 - fold gain amplifier circuit in the variable - gain amplifier circuit includes resistors R8, R9, R10, R12, R13 with a resistance value of 1 kΩ each and resistor R11 with a resistance value of 2 kΩ. It also includes operational amplifiers U3 and U4 of model OP07AH, + 10V level, - 10V level, and a ground terminal. Among them, one end of resistor R8 is connected to the signal input terminal, and the other end of resistor R8 is simultaneously connected to one end of resistor R9 and port 1 of operational amplifier U3. Port 2 of operational amplifier U3 is connected to one end of resistor R10, and the other end of resistor R10 is grounded. Ports 3 and 5 of operational amplifier U3 are connected to + 10V level and - 10V level respectively. Port 4 of operational amplifier U3 and the other end of resistor R9 are simultaneously connected to one end of resistor R11. The other end of resistor R11 is simultaneously connected to port 1 of operational amplifier U4 and one end of resistor R12. The other end of resistor R12 is connected to port 4 of operational amplifier U4. Port 2 of operational amplifier U4 is connected to one end of resistor R13, and the other end of resistor R13 is grounded. Ports 3 and 5 of operational amplifier U4 are connected to + 10V level and - 10V level respectively.

[0043] Since the negative reference voltage of the ADC of STM32 is 0, it is necessary to raise the voltage above 0. Therefore, a voltage - raising circuit as shown in Figure 7 the figure is designed. The voltage - raising circuit includes resistors R14, R17 with a resistance value of 2.2 kΩ each and resistors R15, R16 with a resistance value of 6.8 kΩ each. It also includes an operational amplifier U5 of model OP07A.

[0044] Specifically, one end of resistor R17 is connected to the signal input terminal. The other end of resistor R17 and one end of resistor R16 are connected to port 1 of operational amplifier U5. The other end of resistor R16 is connected to + 5V level. Port 2 of operational amplifier U5 and one end of resistor R14 are connected to one end of resistor R15. The other end of resistor R15 is grounded, and the other end of resistor R14 is connected to port 4 of operational amplifier U5. Ports 5 and 3 of operational amplifier U5 are connected to positive and negative levels respectively. This voltage - raising circuit can achieve a voltage raise within a range of 1.5V.

[0045] A 12 - bit AD conversion module is selected. The fastest conversion time is 1 μs. Among them, the ADC module also has a self - calibration function, which can improve the conversion accuracy when the environmental conditions change. The basic parameters of the ADC are 12 - bit resolution, and the input range is 0 to 3.6V.

[0046] The FFT conversion module uses a 32-bit high-performance and low-power MCU - STM32F103 microprocessor (which can have up to 3 advanced 12-bit AD conversion modules built-in). Specifically, this microprocessor includes 7 groups of 16-bit GPIO ports, 5 groups of USART serial ports, and multiple external interrupt ports; and the peripherals include multiple timers, SPI communication ports, FSMC LCD control ports, and 12-bit ADC conversion ports; the maximum power consumption is 118 mW, and the standby power consumption is 7 μW.

[0047] The STM32F103 enhanced series of microprocessors are 32-bit microcontrollers developed and produced by STMicroelectronics with the ARM Cortex-M3 core. They are specifically designed for high-performance, low-cost, and low-power embedded applications. The STM32F103xx enhanced series of single-chip microcomputers are used as controllers for control and arithmetic operations, and can maintain low power consumption while ensuring the measurement accuracy of the audio signal analyzer.

[0048] When using the audio signal analyzer, the control and arithmetic operations are all implemented by the STM32 single-chip microcomputer, which also further reduces the volume of the audio signal analyzer. Specifically, when the STM32 single-chip microcomputer completes operations such as LCD display, FFT conversion, power calculation, AD conversion, and gain selection control, it executes the process as Figure 8 shown, that is: first, perform program initialization. After the initialization is completed, sequentially execute AD sampling, FFT calculation, obtain power and spectrum, judge periodicity, and LCD display.

[0049] The display module is an LCD liquid crystal display, using a 3.2-inch TFT module ILI9320 and having a parallel bus interface with 8080 timing and 16-bit. The resolution is 320 * 240. The panel used for the LCD liquid crystal display has 16M colors and has high stability.

[0050] The utility model can analyze the frequency components of audio signals in the frequency range of 20 Hz to 10 KHz through a low-pass filter; the dynamic range of the measurable voltage (peak-to-peak value) of the system can be extended to 50 mV - 5 V through a multi-channel amplifier circuit; the spectrum analysis results can be stably displayed in real time on the liquid crystal screen; the periodicity of the signal is judged by extracting the characteristics of the spectrum data, which is an ideal solution for an audio signal analyzer.

[0051] Although the specific implementation manners of the present utility model are described above in conjunction with the drawings, it is not a limitation to the protection scope of the present utility model. Those skilled in the art should understand that based on the technical solutions of the present utility model, various modifications or deformations that can be made by those skilled in the art without creative labor are still within the protection scope of the present utility model.

Claims

1. An audio signal analyzer, characterized in that: include: An impedance matching circuit, a variable gain amplifier circuit, a voltage raising circuit, an AD conversion module and an FFT conversion module; the variable gain amplifier circuit is also provided with a first gain amplifier circuit and a second gain amplifier circuit; The audio signal passes through an impedance matching circuit, a variable gain amplifier circuit, a voltage boost circuit, an AD conversion module, and an FFT conversion module which are connected in sequence.

2. An audio signal analyzer according to claim 1, characterized in that: The first gain amplifier circuit includes resistors R6 and R7, and also includes an operational amplifier U2, positive and negative levels and a ground terminal; specifically, port 1 of the operational amplifier U2 is connected to the signal input terminal, port 2 of the operational amplifier U2 is simultaneously connected to resistors R7 and one end of resistor R6, the other end of resistor R7 is grounded, the other end of resistor R6 is connected to port 4 of the operational amplifier U2, and ports 5 and 3 of the operational amplifier U2 are connected to positive and negative levels respectively, wherein the model of the operational amplifier U2 is OP07AH.

3. The audio signal analyzer according to claim 1, characterized in that: The second gain amplifier circuit includes resistors R8, R9, R10, R11, R12, and R13, operational amplifiers U3, U4, positive and negative voltage levels, and a ground terminal.

4. An audio signal analyzer according to claim 3, characterized in that: In the second gain amplifier circuit, one end of resistor R8 is connected to the signal input end, the other end of resistor R8 is simultaneously connected to one end of resistor R9 and port 1 of operational amplifier U3, port 2 of operational amplifier U3 is connected to one end of resistor R10, the other end of resistor R10 is grounded, and ports 3 and 5 of operational amplifier U3 are respectively connected to positive and negative levels; port 4 of operational amplifier U3 and the other end of resistor R9 are simultaneously connected to one end of resistor R11, the other end of resistor R11 is simultaneously connected to port 1 of operational amplifier U4 and one end of resistor R12, and the other end of resistor R12 is connected to port 4 of operational amplifier U4; port 2 of operational amplifier U4 is connected to one end of resistor R13, and the other end of resistor R13 is grounded; port 3 and port 5 of operational amplifier U4 are respectively connected to positive and negative levels, wherein the models of operational amplifiers U3 and U4 are OP07AH.

5. The audio signal analyzer according to claim 1, characterized in that: In order to make the impedance matching circuit meet actual needs, a resistor with a resistance value equal to the actually required resistance value is connected in parallel to the non-inverting end of the operational amplifier of the impedance matching circuit.

6. The audio signal analyzer according to claim 1, characterized in that: A low-pass filter is also included, and the low-pass filter is used to filter out medium and high frequency signals.

7. The audio signal analyzer according to claim 1, characterized in that: It also includes a peak detection circuit, which includes resistors R18, R19, R20, capacitor C4, operational amplifiers U6, U7, diodes D1, D2; the unidirectional conductivity of the diode and the charge and discharge characteristics of the capacitor are used to detect and maintain the peak value.

8. The audio signal analyzer according to claim 1, characterized in that: The voltage boost circuit can achieve voltage boost within a range of 1.5V.

9. The audio signal analyzer according to claim 1, characterized in that: LCD display, FFT conversion, power calculation, AD conversion and gain selection control are all implemented by the STM32 microcontroller.

10. The audio signal analyzer according to claim 1, characterized in that: It also includes a display module, which is an LCD liquid crystal display, adopts a TFT module and has a parallel bus interface.

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