Display card power supply state detection circuit

Abstract

The utility model relates to a video card power supply state detection circuit which comprises a video card chip, a first power supply module used for detecting a 1.2 V voltage source, a second power supply module used for detecting a 12V voltage source and a third power supply module used for detecting video memory voltage. And the first power supply module, the second power supply module and the third power supply module are respectively connected with an I2C interface of the display card chip. The value of the register of the power supply IC is detected through the I2C interface, various parameters of the power supply are fed back in real time, any external jig does not need to be externally connected, and real-time online detection can be conveniently carried out during large-area production.

Description

Technical Field

[0001] The utility model relates to the technical field of graphics card power detection, in particular to a graphics card power state detection circuit. Background Art

[0002] At present, the power supply used by the graphics card is a black box for developers or users. All working conditions of the power supply need to be assisted by tools such as multimeters and oscilloscopes for testing. When testing, the radiator of the graphics card needs to be disassembled, and fixtures need to be connected for testing. And the test results need to be professionally analyzed to finally obtain the required data; or, relevant debugging interfaces need to be reserved externally and connected to relevant debugging tools, and then relevant data can be read through the original factory's test software. The existing technologies have the following problems:

[0003] 1. At present, it is not intuitive enough, and the test operations are very cumbersome, relatively difficult, and require relatively high professional skills;

[0004] 2. For graphics cards that need to be mass-produced, the quantity is huge. We cannot disassemble each graphics card. Normally, if a certain phase of the power supply does not work, the graphics card can still be powered on and work normally. If a load test is suddenly performed at this time, the current of each phase may increase, and in the worst case, it may cause the MOS to burn out;

[0005] 3. If a power protection action occurs, we cannot intuitively know which protection mechanism causes it, and need to exclude and confirm one by one, or use auxiliary tools such as oscilloscopes for test confirmation;

[0006] 4. There are many manufacturers of the power supply used by the graphics card. Usually, four to five manufacturers are used on a formed board. Different manufacturers cannot be compatible with software and cannot be unified. If all power supply states need to be detected, it cannot be achieved. Summary of the Invention

[0007] The utility model provides a graphics card power state detection circuit, aiming at solving the problems that the existing graphics card power detection is not intuitive enough and cannot detect multiple power supplies uniformly.

[0008] The utility model provides a graphics card power state detection circuit, including a graphics card chip, a first power module for detecting a 1.2V voltage source, a second power module for detecting a 12V voltage source, and a third power module for detecting a video memory voltage. The first power module, the second power module, and the third power module are respectively connected to the I2C interface of the graphics card chip.

[0009] As a further improvement of the present utility model, the first power supply module includes a voltage conversion chip U1. The 9th and 10th pins of the voltage conversion chip U1 are connected to the graphics card chip. The 5th pin of the voltage conversion chip U1 is connected to one end of a resistor R3. The other end of the resistor R3 is connected to one end of a capacitor C7. The 3rd pin of the voltage conversion chip U1 is connected to the other end of the capacitor C7. The 3rd pin of the voltage conversion chip U1 is connected to one end of an inductor L1. The other end of the inductor L1 is connected to one end of a capacitor C10. The other end of the capacitor C10 is grounded. The 8th pin of the voltage conversion chip U1 is connected to one end of a resistor R6. The other end of the resistor R6 is respectively connected to one end of a resistor R4 and one end of a resistor R5. The other end of the resistor R4 and the other end of the inductor L1 are both connected to a 1.2V voltage. The other end of the resistor R5 is grounded. Both ends of a capacitor C8 are connected to both ends of the resistor R4. The 2nd pin of the voltage conversion chip U1 is connected to a 12V voltage. One end of a capacitor C6 is connected to the 2nd pin of the voltage conversion chip U1. The 7th pin of the voltage conversion chip U1 is connected to one end of a capacitor C9. The 1st pin of the voltage conversion chip U1 is connected to one end of a resistor R7. The other end of the capacitor C6, the other end of the capacitor C9, the other end of the resistor R7, and the 4th pin of the voltage conversion chip U1 are all grounded.

[0010] As a further improvement of the present utility model, the second power supply module includes a voltage and current detection chip U2. The 23rd and 24th pins of the voltage and current detection chip U2 are connected to the graphics card chip. The 2nd pin of the voltage and current detection chip U2 is connected to one end of a resistor R18. The other end of the resistor R18 outputs a 12V_INP signal. The 5th pin of the voltage and current detection chip U2 is connected to one end of a resistor R19. The other end of the resistor R19 outputs a 12V_PEX8_INP signal. The 32nd pin of the voltage and current detection chip U2 is connected to one end of a resistor R12. The other end of the resistor R12 is grounded. Both ends of a capacitor C13 are connected to both ends of the resistor R12. The 7th pin of the voltage and current detection chip U2 is connected to one end of a resistor R13. The other end of the resistor R13 is grounded. Both ends of a capacitor C14 are connected to both ends of the resistor R13.

[0011] As a further improvement of the present utility model, the 3rd pin of the voltage and current detection chip U2 is connected to one end of a resistor R8. The other end of the resistor R8 outputs a 12V_INP signal. The 6th pin of the voltage and current detection chip U2 is connected to one end of a resistor R10. The other end of the resistor R10 outputs a 12V_PEX8_INP signal. A resistor R11 is connected between the 6th pin and the 9th pin of the current detection chip U2. A resistor R9 is connected between the 3rd pin and the 9th pin of the current detection chip U2. One end of a capacitor C12 is connected to one end of the resistor R11. One end of a capacitor C11 is connected to one end of the resistor R9. The other end of the capacitor C11 and the other end of the capacitor C12 are both grounded.

[0012] As a further improvement of the present utility model, one end of resistor R14 is connected to pin 25 of voltage and current detection chip U2, one end of resistor R14 is connected to one end of resistor R15, the other end of resistor R14 is connected to 5V voltage, one end of resistor R16 is connected to pin 26 of voltage and current detection chip U2, one end of resistor R16 is connected to one end of resistor R17, the other end of resistor R16 is connected to VCC voltage, and the other ends of resistor R15 and resistor R17 are both grounded.

[0013] As a further improvement of the present utility model, one end of resistor R20 is connected to pin 22 of voltage and current detection chip U2, one end of resistor R20 is connected to one end of resistor R21, the other end of resistor R20 is connected to VCC voltage, one end of resistor R22 is connected to pin 21 of voltage and current detection chip U2, one end of resistor R22 is connected to one end of resistor R23, the other end of resistor R22 is connected to VCC voltage, and the other ends of resistor R21 and resistor R23 are both grounded.

[0014] As a further improvement of the present utility model, the third power supply module includes a voltage conversion chip U3. Pins 21 and 22 of voltage conversion chip U3 are connected to the graphics card chip. Pin 23 of voltage conversion chip U3 is connected to one end of resistor R39. One end of resistor R39 is connected to one end of resistor R40. The other end of resistor R39 is connected to VCC voltage. Pin 24 of voltage conversion chip U3 is connected to one end of resistor R38. One end of resistor R38 is connected to one end of resistor R37. The other end of resistor R37 is connected to VCC voltage. The other ends of resistor R38 and resistor R40 are grounded.

[0015] As a further improvement of the present utility model, the 8th pin of the voltage conversion chip U3 is connected to one end of the resistor R31, the other end of the resistor R31 is connected to one end of the resistor R32, the other end of the resistor R32 is connected to one end of the resistor R34, one end of the resistor R35 is connected to the other end of the resistor R34, the 7th pin of the voltage conversion chip U3 is connected to one end of the resistor R34, the 6th pin of the voltage conversion chip U3 is connected to one end of the resistor R33, the other end of the resistor R33 is connected to one end of the capacitor C27, the other end of the capacitor C27 is connected to one end of the resistor R35, the other end of the resistor R35 is connected to the 10th pin of the voltage conversion chip U3, one end of the capacitor C26 is connected to the 8th pin of the voltage conversion chip U3, the other end of the capacitor C26 is grounded, the 10th pin of the voltage conversion chip U3 is connected to one end of the resistor R26, the other end of the resistor R26 is grounded, the 11th pin of the voltage conversion chip U3 is respectively connected to one end of the resistor R27, one end of the resistor R28 and one end of the capacitor C24, the other end of the capacitor C24 is connected to the 12th pin of the voltage conversion chip U3, one end of the capacitor C25 is connected to one end of the capacitor C24, the other end of the capacitor C25 is connected to one end of the resistor R30, the other end of the resistor R30 is connected to the other end of the capacitor C24, the other end of the resistor C27 is connected to one end of the resistor R29, the other end of the resistor R29 outputs a signal, the other end of the resistor R28 is connected to one end of the capacitor C23, and the other end of the capacitor C23 is connected to one end of the resistor R29.

[0016] As a further improvement of the present utility model, the pin 2 of the voltage conversion chip U3 is connected to the gate of the field effect transistor QG17. The drain of the field effect transistor QG17 is connected to a 12V voltage. One end of the capacitor C17 is connected to the drain of the field effect transistor QG17, and the other end of the capacitor C17 is grounded. The source of the field effect transistor QG17 is connected to one end of the inductor L2. The other end of the inductor L2 is connected to the video memory voltage. One end of the capacitor C21 is connected to the other end of the inductor L2, and the other end of the capacitor C21 is grounded. The pin 1 of the voltage conversion chip U3 is connected to one end of the resistor R24. The other end of the resistor R24 is connected to one end of the capacitor C18. The other end of the capacitor C18 is connected to one end of the inductor L2. The pin 20 of the voltage conversion chip U3 is connected to one end of the inductor L2. The pin 19 of the voltage conversion chip U3 is connected to the gate of the field effect transistor QG18. The source of the field effect transistor QG18 is grounded. The drain of the field effect transistor QG18 is connected to one end of the inductor L2; The pin 14 of the voltage conversion chip U3 is connected to the gate of the field effect transistor QG19. The drain of the field effect transistor QG19 is connected to a 12V voltage. One end of the capacitor C19 is connected to the drain of the field effect transistor QG19, and the other end of the capacitor C19 is grounded. The source of the field effect transistor QG19 is connected to one end of the inductor L3. The other end of the inductor L3 is connected to the video memory voltage. One end of the capacitor C22 is connected to the other end of the inductor L3, and the other end of the capacitor C22 is grounded. The pin 15 of the voltage conversion chip U3 is connected to one end of the resistor R25. The other end of the resistor R25 is connected to one end of the capacitor C20. The other end of the capacitor C20 is connected to one end of the inductor L3. The pin 16 of the voltage conversion chip U3 is connected to one end of the inductor L3. The pin 17 of the voltage conversion chip U3 is connected to the gate of the field effect transistor QG20. The source of the field effect transistor QG20 is grounded. The drain of the field effect transistor QG20 is connected to one end of the inductor L3.

[0017] As a further improvement of the present utility model, the pin 1 of the graphics card chip is connected to one end of the resistor R43. The pin 2 of the graphics card chip is connected to one end of the resistor R44. The pin 3 of the graphics card chip is connected to one end of the resistor R45. The pin 4 of the graphics card chip is connected to one end of the resistor R46. The pin 5 of the graphics card chip is connected to one end of the resistor R47. The pin 6 of the graphics card chip is connected to one end of the resistor R48. The other ends of the resistor R43, the resistor R44, the resistor R45, the resistor R46, the resistor R47 and the resistor R48 are all connected to the VCC voltage.

[0018] The beneficial effects of the present utility model are as follows: By detecting the values of the registers of the power supply IC through the I2C interface, various parameters of the power supply can be fed back in real time, without the need to externally connect any additional fixtures, which is convenient for real-time online detection during large-scale production. Description of the Drawings

[0019] Figure 1 is the connection diagram of each circuit module of the present utility model;

[0020] Figure 2 is the circuit connection diagram of the first power supply module of the present utility model;

[0021] Figure 3 is the circuit connection diagram of the second power supply module of the present utility model;

[0022] Figure 4 is the circuit connection diagram of the third power supply module of the present utility model;

[0023] Figure 5 is the circuit connection diagram of the graphics card chip of the present utility model. Specific embodiments

[0024] In order to make the objectives, technical solutions and advantages of the present utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments.

[0025] As Figures 1-5 shown, the present utility model provides a graphics card power status detection circuit, which includes a graphics card chip, a first power supply module for detecting a 1.2V voltage source, a second power supply module for detecting a 12V voltage source, and a third power supply module for detecting the video memory voltage. The first power supply module, the second power supply module and the third power supply module are respectively connected to the I2C interface of the graphics card chip.

[0026] As an embodiment of the present utility model, the first power supply module includes a voltage conversion chip U1. The 9th and 10th pins of the voltage conversion chip U1 are connected to the graphics card chip. The 5th pin of the voltage conversion chip U1 is connected to one end of a resistor R3. The other end of the resistor R3 is connected to one end of a capacitor C7. The 3rd pin of the voltage conversion chip U1 is connected to the other end of the capacitor C7. The 3rd pin of the voltage conversion chip U1 is connected to one end of an inductor L1. The other end of the inductor L1 is connected to one end of a capacitor C10. The other end of the capacitor C10 is grounded. The 8th pin of the voltage conversion chip U1 is connected to one end of a resistor R6. The other end of the resistor R6 is respectively connected to one end of a resistor R4 and one end of a resistor R5. The other end of the resistor R4 and the other end of the inductor L1 are both connected to a 1.2V voltage. The other end of the resistor R5 is grounded. Both ends of a capacitor C8 are connected to both ends of the resistor R4. The 2nd pin of the voltage conversion chip U1 is connected to a 12V voltage. One end of a capacitor C6 is connected to the 2nd pin of the voltage conversion chip U1. The 7th pin of the voltage conversion chip U1 is connected to one end of a capacitor C9. The 1st pin of the voltage conversion chip U1 is connected to one end of a resistor R7. The other end of the capacitor C6, the other end of the capacitor C9, the other end of the resistor R7 and the 4th pin of the voltage conversion chip U1 are all grounded.

[0027] As another embodiment of the present utility model, the second power supply module includes a voltage and current detection chip U2. The 23rd and 24th pins of the voltage and current detection chip U2 are connected to the graphics card chip. The 2nd pin of the voltage and current detection chip U2 is connected to one end of a resistor R18, and the other end of the resistor R18 outputs a 12V_INP signal. The 5th pin of the voltage and current detection chip U2 is connected to one end of a resistor R19, and the other end of the resistor R19 outputs a 12V_PEX8_INP signal. The 32nd pin of the voltage and current detection chip U2 is connected to one end of a resistor R12, and the other end of the resistor R12 is grounded. Both ends of a capacitor C13 are connected to both ends of the resistor R12. The 7th pin of the voltage and current detection chip U2 is connected to one end of a resistor R13, and the other end of the resistor R13 is grounded. Both ends of a capacitor C14 are connected to both ends of the resistor R13.

[0028] As another embodiment of the present utility model, the 3rd pin of the voltage and current detection chip U2 is connected to one end of a resistor R8, and the other end of the resistor R8 outputs a 12V_INP signal. The 6th pin of the voltage and current detection chip U2 is connected to one end of a resistor R10, and the other end of the resistor R10 outputs a 12V_PEX8_INP signal. A resistor R11 is connected between the 6th pin and the 9th pin of the current detection chip U2. A resistor R9 is connected between the 3rd pin and the 9th pin of the current detection chip U2. One end of a capacitor C12 is connected to one end of the resistor R11. One end of a capacitor C11 is connected to one end of the resistor R9. The other end of the capacitor C11 and the other end of the capacitor C12 are both grounded.

[0029] As another embodiment of the present utility model, one end of a resistor R14 is connected to the 25th pin of the voltage and current detection chip U2. One end of the resistor R14 is connected to one end of a resistor R15. The other end of the resistor R14 is connected to a 5V voltage. One end of a resistor R16 is connected to the 26th pin of the voltage and current detection chip U2. One end of the resistor R16 is connected to one end of a resistor R17. The other end of the resistor R16 is connected to a VCC voltage. The other ends of the resistor R15 and the resistor R17 are both grounded.

[0030] As another embodiment of the present utility model, one end of a resistor R20 is connected to the 22nd pin of the voltage and current detection chip U2. One end of the resistor R20 is connected to one end of a resistor R21. The other end of the resistor R20 is connected to a VCC voltage. One end of a resistor R22 is connected to the 21st pin of the voltage and current detection chip U2. One end of the resistor R22 is connected to one end of a resistor R23. The other end of the resistor R22 is connected to a VCC voltage. The other ends of the resistor R21 and the resistor R23 are both grounded.

[0031] As another embodiment of the present utility model, the third power supply module includes a voltage conversion chip U3. The 21st and 22nd pins of the voltage conversion chip U3 are connected to the graphics card chip. The 23rd pin of the voltage conversion chip U3 is connected to one end of a resistor R39. One end of the resistor R39 is connected to one end of a resistor R40. The other end of the resistor R39 is connected to the VCC voltage. The 24th pin of the voltage conversion chip U3 is connected to one end of a resistor R38. One end of the resistor R38 is connected to one end of a resistor R37. The other end of the resistor R37 is connected to the VCC voltage. The other end of the resistor R38 and the other end of the resistor R40 are grounded.

[0032] As another embodiment of the present utility model, the 8th pin of the voltage conversion chip U3 is connected to one end of a resistor R31. The other end of the resistor R31 is connected to one end of a resistor R32. The other end of the resistor R32 is connected to one end of a resistor R34. One end of a resistor R35 is connected to the other end of the resistor R34. The 7th pin of the voltage conversion chip U3 is connected to one end of the resistor R34. The 6th pin of the voltage conversion chip U3 is connected to one end of a resistor R33. The other end of the resistor R33 is connected to one end of a capacitor C27. The other end of the capacitor C27 is connected to one end of the resistor R35. The other end of the resistor R35 is connected to the 10th pin of the voltage conversion chip U3. One end of a capacitor C26 is connected to the 8th pin of the voltage conversion chip U3. The other end of the capacitor C26 is grounded. The 10th pin of the voltage conversion chip U3 is connected to one end of a resistor R26. The other end of the resistor R26 is grounded. The 11th pin of the voltage conversion chip U3 is respectively connected to one end of a resistor R27, one end of a resistor R28, and one end of a capacitor C24. The other end of the capacitor C24 is connected to the 12th pin of the voltage conversion chip U3. One end of a capacitor C25 is connected to one end of the capacitor C24. The other end of the capacitor C25 is connected to one end of a resistor R30. The other end of the resistor R30 is connected to the other end of the capacitor C24. The other end of the resistor C27 is connected to one end of a resistor R29. The other end of the resistor R29 outputs a signal. The other end of the resistor R28 is connected to one end of a capacitor C23. The other end of the capacitor C23 is connected to one end of the resistor R29.

[0033] As another embodiment of the present utility model, the 2-pin of the voltage conversion chip U3 is connected to the gate of the field effect transistor QG17. The drain of the field effect transistor QG17 is connected to a 12V voltage. One end of the capacitor C17 is connected to the drain of the field effect transistor QG17, and the other end of the capacitor C17 is grounded. The source of the field effect transistor QG17 is connected to one end of the inductor L2. The other end of the inductor L2 is connected to the video memory voltage. One end of the capacitor C21 is connected to the other end of the inductor L2, and the other end of the capacitor C21 is grounded. The 1-pin of the voltage conversion chip U3 is connected to one end of the resistor R24. The other end of the resistor R24 is connected to one end of the capacitor C18. The other end of the capacitor C18 is connected to one end of the inductor L2. The 20-pin of the voltage conversion chip U3 is connected to one end of the inductor L2. The 19-pin of the voltage conversion chip U3 is connected to the gate of the field effect transistor QG18. The source of the field effect transistor QG18 is grounded. The drain of the field effect transistor QG18 is connected to one end of the inductor L2. The 14-pin of the voltage conversion chip U3 is connected to the gate of the field effect transistor QG19. The drain of the field effect transistor QG19 is connected to a 12V voltage. One end of the capacitor C19 is connected to the drain of the field effect transistor QG19, and the other end of the capacitor C19 is grounded. The source of the field effect transistor QG19 is connected to one end of the inductor L3. The other end of the inductor L3 is connected to the video memory voltage. One end of the capacitor C22 is connected to the other end of the inductor L3, and the other end of the capacitor C22 is grounded. The 15-pin of the voltage conversion chip U3 is connected to one end of the resistor R25. The other end of the resistor R25 is connected to one end of the capacitor C20. The other end of the capacitor C20 is connected to one end of the inductor L3. The 16-pin of the voltage conversion chip U3 is connected to one end of the inductor L3. The 17-pin of the voltage conversion chip U3 is connected to the gate of the field effect transistor QG20. The source of the field effect transistor QG20 is grounded. The drain of the field effect transistor QG20 is connected to one end of the inductor L3.

[0034] As another embodiment of the present utility model, the 1-pin of the graphics card chip is connected to one end of the resistor R43. The 2-pin of the graphics card chip is connected to one end of the resistor R44. The 3-pin of the graphics card chip is connected to one end of the resistor R45. The 4-pin of the graphics card chip is connected to one end of the resistor R46. The 5-pin of the graphics card chip is connected to one end of the resistor R47. The 6-pin of the graphics card chip is connected to one end of the resistor R48. The other ends of the resistor R43, the resistor R44, the resistor R45, the resistor R46, the resistor R47 and the resistor R48 are all connected to the VCC voltage.

[0035] The utility model provides a graphics card power state detection circuit, which includes a graphics card chip, and also includes a 1V2_POWER module, a 1V8_POWER module, an NVVDD, an FBVDDQ module, a PEX_VDD module and a 12V_SENSOR module required for power supply of the graphics card (GPU). These power modules transfer their respective working data to the GPU side through the I2C communication interface. The GPU transfers the data back to WINDOWS through the underlying hardware and then through the software interface of NVAPI. WINDOWS then presents all the power-related information of the GPU in real time through the interface of the AP.

[0036] Among the power modules listed above, the 1V8_POWER module, the PEX_VDD and the 1V2_POWER module have the same circuit, so they will not be listed again and are uniformly referred to as the first power module. The NVVDD module and the FBVDDQ module have the same circuit, so they will not be listed again and are uniformly referred to as the third power module.

[0037] As Figure 2 shown, the first power module generates a 1.2V voltage required for the operation of the graphics card. The voltage conversion chip U1 is a power chip, and the capacitors C6, C9, and C10 are power filter capacitors; the resistors R3, the capacitor C7, and the inductor L1 form a chip DC buck circuit for voltage conversion; the resistors R4, R5, R6, and the capacitor C8 form a feedback loop of the power supply for adjusting the output voltage. The resistor R7 is used to set the I2C address of the chip, which is the slave address for GPU_I2C communication. Here, we default it to be 0x62. SDA and SCL are used to connect to the GPU host computer, and through this pair of lines, the internal information is transferred to the GPU side.

[0038] As Figure 3 shown, the second power module is used to detect the current and voltage of the gold finger and the external 12V. Among them, U2 is a 12V voltage and current detection chip. The resistors R18, R19, R12, R13, and the capacitors C13, C14 form a voltage and current detection loop for reading the 12V voltage and current in real time. The resistors R8, R9, R10, R11, and the capacitors C11, C12 form a 12V power-on detection timing sequence. The resistors R16, R17, R14, R15 form the logic timing of the chip. SCL and SDA are connected to the GPU_I2C interface, and through this pair of lines, the 12V voltage / current information is transferred to the GPU side in real time.

[0039] As Figure 4As shown, the third power supply module generates the video memory voltage required for the GPU to operate. U3 is the voltage conversion chip for FBVDDQ required by the graphics card chip. Resistors R41 and R42 are used to set the frequency of FBVDDQ and the overcurrent protection current point. Resistors R37, R38, R39, and R40 are used to set the I2C communication address of the chip. Resistor R36 is the pull-up signal resistor after the voltage is stably output. Resistors R31, R32, R33, R34, R35, and capacitors C26 and C27 form the voltage regulation loop of the chip to adjust the output voltage. Capacitor C16 is the filtering capacitor for the chip power supply. Resistors R24, capacitor C18, R25, C20, field effect transistors QG17, QG18, QG19, QG20, and inductors L2 and L3 form the DC buck circuit of the chip. Capacitors C17, C21, and C22 are the filtering capacitors for the output voltage. Resistors R26, R27, R28, R9, and capacitor C23 form the negative feedback loop of the voltage to detect and adjust the voltage at the output end. Resistors R30, capacitors C25 and C24 are the compensation loop of the chip.

[0040] As Figure 5 shown, G1 represents the graphics card chip. Resistors R43, R44, R45, R46, R47, and R48 are the pull-up resistors for the I2C interface. When the level of the I2C interface is pulled low, data transmission will occur. In this embodiment, I2CB is used for this pair of I2C interfaces, and this I2C is connected to all power supply chips. Each power supply chip has a different address. Different chips send the information of the internal registers, such as voltage information, frequency information, overcurrent point, overvoltage point, and the magnitude of each phase current, etc., to the GPU end according to different addresses. The GPU end will decode according to different addresses and register information and finally present it to the AP end of WINDOWS.

[0041] During debugging or factory testing, the graphics card itself is relatively enclosed, and it is necessary to monitor the power supply information of the graphics card in real time, such as the current magnitude of each phase of the power supply, the total current magnitude, the output voltage magnitude, and power protection detection, such as overcurrent protection, overvoltage protection, undervoltage protection, MOS overtemperature protection, switching frequency detection, and power efficiency detection, etc. By listing these items, it is simple and clear to know the power supply health status of the graphics card. Whether it is the current magnitude of a certain power supply, or a certain phase of a certain power supply not working, or when an abnormality occurs, whether the warning is overcurrent protection, overvoltage protection, or the GPU frequency is too low, check whether it is caused by too low power efficiency. Especially at the factory end, faulty graphics cards can be directly detected, preventing some faulty cards from reaching the user end. We can also easily locate the problem points based on this information and perform repairs quickly. For ordinary users, it is also very necessary to monitor the power supply information of their own graphics cards in real time for regular maintenance and upkeep of the graphics card.

[0042] The above content is a further detailed description of the present utility model in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present utility model is only limited to these descriptions. For those of ordinary skill in the technical field to which the present utility model belongs, without departing from the concept of the present utility model, several simple deductions or substitutions can still be made, which should all be regarded as belonging to the protection scope of the present utility model.

Claims

1. A graphics card power state detection circuit, characterized in that It includes a graphics card chip, a first power supply module for detecting a 1.2V voltage source, a second power supply module for detecting a 12V voltage source, and a third power supply module for detecting a video memory voltage. The first power supply module, the second power supply module, and the third power supply module are respectively connected to the I2C interface of the graphics card chip.

2. The detection circuit for the power supply state of a graphics card according to claim 1, wherein The first power supply module includes a voltage conversion chip U1. The 9th and 10th pins of the voltage conversion chip U1 are connected to the graphics card chip. The 5th pin of the voltage conversion chip U1 is connected to one end of a resistor R3. The other end of the resistor R3 is connected to one end of a capacitor C7. The 3rd pin of the voltage conversion chip U1 is connected to the other end of the capacitor C7. The 3rd pin of the voltage conversion chip U1 is connected to one end of an inductor L1. The other end of the inductor L1 is connected to one end of a capacitor C10. The other end of the capacitor C10 is grounded. The 8th pin of the voltage conversion chip U1 is connected to one end of a resistor R6. The other end of the resistor R6 is respectively connected to one end of a resistor R4 and one end of a resistor R5. The other end of the resistor R4 and the other end of the inductor L1 are both connected to a 1.2V voltage. The other end of the resistor R5 is grounded. Both ends of a capacitor C8 are connected to both ends of the resistor R4. The 2nd pin of the voltage conversion chip U1 is connected to a 12V voltage. One end of a capacitor C6 is connected to the 2nd pin of the voltage conversion chip U1. The 7th pin of the voltage conversion chip U1 is connected to one end of a capacitor C9. The 1st pin of the voltage conversion chip U1 is connected to one end of a resistor R7. The other end of the capacitor C6, the other end of the capacitor C9, the other end of the resistor R7, and the 4th pin of the voltage conversion chip U1 are all grounded.

3. The detection circuit for the power supply state of a graphics card according to claim 1, wherein The second power supply module includes a voltage and current detection chip U2. The 23rd and 24th pins of the voltage and current detection chip U2 are connected to the graphics card chip. The 2nd pin of the voltage and current detection chip U2 is connected to one end of a resistor R18. The other end of the resistor R18 outputs a 12V_INP signal. The 5th pin of the voltage and current detection chip U2 is connected to one end of a resistor R19. The other end of the resistor R19 outputs a 12V_PEX8_INP signal. The 32nd pin of the voltage and current detection chip U2 is connected to one end of a resistor R12. The other end of the resistor R12 is grounded. Both ends of a capacitor C13 are connected to both ends of the resistor R12. The 7th pin of the voltage and current detection chip U2 is connected to one end of a resistor R13. The other end of the resistor R13 is grounded. Both ends of a capacitor C14 are connected to both ends of the resistor R13.

4. The detection circuit for the power supply state of a graphics card according to claim 3, wherein The 3rd pin of the voltage and current detection chip U2 is connected to one end of a resistor R8. The other end of the resistor R8 outputs a 12V_INP signal. The 6th pin of the voltage and current detection chip U2 is connected to one end of a resistor R10. The other end of the resistor R10 outputs a 12V_PEX8_INP signal. A resistor R11 is connected between the 6th pin and the 9th pin of the current detection chip U2. A resistor R9 is connected between the 3rd pin and the 9th pin of the current detection chip U2. One end of a capacitor C12 is connected to one end of the resistor R11. One end of a capacitor C11 is connected to one end of the resistor R9. The other end of the capacitor C11 and the other end of the capacitor C12 are both grounded.

5. The detection circuit for the power supply state of a graphics card according to claim 3, wherein One end of resistor R14 is connected to pin 25 of voltage and current detection chip U2. One end of resistor R14 is connected to one end of resistor R15. The other end of resistor R14 is connected to a 5V voltage. One end of resistor R16 is connected to pin 26 of voltage and current detection chip U2. One end of resistor R16 is connected to one end of resistor R17. The other end of resistor R16 is connected to a VCC voltage. The other ends of resistor R15 and resistor R17 are both grounded.

6. The detection circuit for the power supply state of a graphics card according to claim 3, wherein One end of resistor R20 is connected to pin 22 of voltage and current detection chip U2. One end of resistor R20 is connected to one end of resistor R21. The other end of resistor R20 is connected to a VCC voltage. One end of resistor R22 is connected to pin 21 of voltage and current detection chip U2. One end of resistor R22 is connected to one end of resistor R23. The other end of resistor R22 is connected to a VCC voltage. The other ends of resistor R21 and resistor R23 are both grounded.

7. The detection circuit for the power supply state of a graphics card according to claim 1, wherein The third power supply module includes a voltage conversion chip U3. Pins 21 and 22 of voltage conversion chip U3 are connected to the graphics card chip. Pin 23 of voltage conversion chip U3 is connected to one end of resistor R39. One end of resistor R39 is connected to one end of resistor R40. The other end of resistor R39 is connected to a VCC voltage. Pin 24 of voltage conversion chip U3 is connected to one end of resistor R38. One end of resistor R38 is connected to one end of resistor R37. The other end of resistor R37 is connected to a VCC voltage. The other ends of resistor R38 and resistor R40 are grounded.

8. The detection circuit for the power supply state of a graphics card according to claim 7, wherein, Pin 8 of voltage conversion chip U3 is connected to one end of resistor R31. The other end of resistor R31 is connected to one end of resistor R32. The other end of resistor R32 is connected to one end of resistor R34. One end of resistor R35 is connected to the other end of resistor R34. Pin 7 of voltage conversion chip U3 is connected to one end of resistor R34. Pin 6 of voltage conversion chip U3 is connected to one end of resistor R33. The other end of resistor R33 is connected to one end of capacitor C27. The other end of capacitor C27 is connected to one end of resistor R35. The other end of resistor R35 is connected to pin 10 of voltage conversion chip U3. One end of capacitor C26 is connected to pin 8 of voltage conversion chip U3. The other end of capacitor C26 is grounded. Pin 10 of voltage conversion chip U3 is connected to one end of resistor R26. The other end of resistor R26 is grounded. Pin 11 of voltage conversion chip U3 is respectively connected to one end of resistor R27, one end of resistor R28 and one end of capacitor C24. The other end of capacitor C24 is connected to pin 12 of voltage conversion chip U3. One end of capacitor C25 is connected to one end of capacitor C24. The other end of capacitor C25 is connected to one end of resistor R30. The other end of resistor R30 is connected to the other end of capacitor C24. The other end of resistor C27 is connected to one end of resistor R29. The other end of resistor R29 outputs a signal. The other end of resistor R28 is connected to one end of capacitor C23. The other end of capacitor C23 is connected to one end of resistor R29.

9. The detection circuit for the power supply state of a graphics card according to claim 7, wherein, The 2nd pin of the voltage conversion chip U3 is connected to the gate of the field effect transistor QG17. The drain of the field effect transistor QG17 is connected to a 12V voltage. One end of the capacitor C17 is connected to the drain of the field effect transistor QG17, and the other end of the capacitor C17 is grounded. The source of the field effect transistor QG17 is connected to one end of the inductor L2. The other end of the inductor L2 is connected to the video memory voltage. One end of the capacitor C21 is connected to the other end of the inductor L2, and the other end of the capacitor C21 is grounded. The 1st pin of the voltage conversion chip U3 is connected to one end of the resistor R24. The other end of the resistor R24 is connected to one end of the capacitor C18. The other end of the capacitor C18 is connected to one end of the inductor L2. The 20th pin of the voltage conversion chip U3 is connected to one end of the inductor L2. The 19th pin of the voltage conversion chip U3 is connected to the gate of the field effect transistor QG18. The source of the field effect transistor QG18 is grounded. The drain of the field effect transistor QG18 is connected to one end of the inductor L2; The 14th pin of the voltage conversion chip U3 is connected to the gate of the field effect transistor QG19. The drain of the field effect transistor QG19 is connected to a 12V voltage. One end of the capacitor C19 is connected to the drain of the field effect transistor QG19, and the other end of the capacitor C19 is grounded. The source of the field effect transistor QG19 is connected to one end of the inductor L3. The other end of the inductor L3 is connected to the video memory voltage. One end of the capacitor C22 is connected to the other end of the inductor L3, and the other end of the capacitor C22 is grounded. The 15th pin of the voltage conversion chip U3 is connected to one end of the resistor R25. The other end of the resistor R25 is connected to one end of the capacitor C20. The other end of the capacitor C20 is connected to one end of the inductor L3. The 16th pin of the voltage conversion chip U3 is connected to one end of the inductor L3. The 17th pin of the voltage conversion chip U3 is connected to the gate of the field effect transistor QG20. The source of the field effect transistor QG20 is grounded. The drain of the field effect transistor QG20 is connected to one end of the inductor L3.

10. The detection circuit for the power supply state of a graphics card according to claim 1, characterized in that, The 1st pin of the graphics card chip is connected to one end of the resistor R43. The 2nd pin of the graphics card chip is connected to one end of the resistor R44. The 3rd pin of the graphics card chip is connected to one end of the resistor R45. The 4th pin of the graphics card chip is connected to one end of the resistor R46. The 5th pin of the graphics card chip is connected to one end of the resistor R47. The 6th pin of the graphics card chip is connected to one end of the resistor R48. The other ends of the resistor R43, the resistor R44, the resistor R45, the resistor R46, the resistor R47 and the resistor R48 are all connected to the VCC voltage.

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