Solar cell, photovoltaic module and photovoltaic system
By controlling the pit density in the central area of the polycrystalline silicon layer is smaller than the edge area, the passivation failure and leakage caused by the pit during the preparation of polycrystalline silicon solar cell is solved, and higher safety and efficiency are achieved.
Patent Information
- Application Number
- CN202422210446.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-09
- Publication Date
- 2025-07-29
- Estimated Expiration
- 2034-09-09
AI Technical Summary
During the preparation process of existing polysilicon solar cells, the distribution of silicon powder particles forms pits, resulting in passivation failure and leakage.
By controlling the pit density in the central area of the polysilicon layer to be smaller than the edge area, the pit size and depth are reduced, the surface flatness of the polysilicon layer is ensured, and the pits are avoided to penetrate the polysilicon layer and cause leakage.
The passivation effect of the polysilicon layer is improved to ensure the safety of solar cells and the photoelectric conversion efficiency.
Smart Images
Figure CN223168620U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of solar cells, and particularly relates to a solar cell, a photovoltaic module and a photovoltaic system. Background Art
[0002] A solar cell is a device that directly converts light energy into electrical energy through the photovoltaic effect. When the solar cell is illuminated by light with a certain illumination intensity, a voltage can be output instantaneously and a current can be generated in the case of a closed circuit.
[0003] In the current solar cell market, crystalline silicon solar cells account for more than 90% of the share. Among crystalline silicon solar cells, polysilicon occupies a dominant position. During the preparation and production process of polysilicon, a large amount of silicon powder agglomerates into silicon powder particles and is distributed on the surface of polysilicon. During the subsequent cleaning process, the silicon powder particles are washed away, forming pits on the polysilicon surface, resulting in damage to the polysilicon layer, causing passivation failure in the area of the pits, affecting the photoelectric conversion efficiency. Moreover, due to the too large particle size of the silicon powder particles, the pits are also too large and too deep. In severe cases, the pits even penetrate the polysilicon layer, causing leakage. Summary of the Utility Model
[0004] An embodiment of the utility model provides a solar cell, aiming to solve the problem that the density of pits on the surface of existing polysilicon is too large, resulting in passivation failure or even leakage.
[0005] The embodiment of the utility model is implemented as follows. A solar cell includes:
[0006] A substrate having opposite front and back surfaces; and
[0007] A polysilicon layer disposed on the front and / or back surface, and a plurality of pits are formed on the surface of the polysilicon layer away from the substrate;
[0008] One surface of the substrate where the polysilicon layer is disposed includes an edge region and a central region located in the middle of the edge region;
[0009] The polysilicon layer includes:
[0010] When the polysilicon layers on the same surface of the substrate are of the same doping type, the density of pits on the polysilicon layer in the central region is less than or equal to the density of pits on the polysilicon layer in the edge region; or
[0011] When different doping type polysilicon layers are disposed on the same surface of the substrate, the density of pits on the polysilicon layer in the central region is less than or equal to the density of pits on the polysilicon layer of the same doping type in the edge region.
[0012] Further, the density of pits in the central region is M1 pieces / mm2 , 0 ≤ M1 ≤ 5, the density of the pits in the edge region is M2 pits / mm 2 , 0 ≤ M2 ≤ 500.
[0013] Furthermore, the size of at least part of the pits in the central region is less than or equal to the size of at least part of the pits in the edge region.
[0014] Furthermore, the size of the pits in the central region is D1 microns, 0 < D1 ≤ 5, and the size of the pits in the edge region is D2 microns, 0 < D2 ≤ 10.
[0015] Furthermore, the edge region is a region extending 20 mm from the outer peripheral edge of the substrate towards the geometric center of the substrate.
[0016] Furthermore, the number of pits gradually decreases along the direction from the outer peripheral edge of the substrate towards the geometric center of the substrate.
[0017] Furthermore, the solar cell is a single-sided TOPCon cell, and the single-sided TOPCon cell includes a first passivation layer, a second passivation layer, an emitter layer, a tunneling passivation contact structure, a first electrode, and a second electrode;
[0018] The emitter layer and the first passivation layer are sequentially disposed on the front surface of the substrate, and the first electrode passes through the first passivation layer to contact the emitter layer;
[0019] The tunneling passivation contact structure and the second passivation layer are sequentially disposed on the back surface of the substrate. The tunneling passivation contact structure includes a tunneling layer and a polysilicon layer, and the second electrode passes through the second passivation layer to contact the polysilicon layer.
[0020] Furthermore, the solar cell is a double-sided TOPCon cell, and the double-sided TOPCon cell includes a first passivation layer, a second passivation layer, a first tunneling passivation contact structure, a second tunneling passivation contact structure, a first electrode, and a second electrode;
[0021] The first tunneling passivation contact structure and the first passivation layer are sequentially disposed on the front surface of the substrate, and the second tunneling passivation contact structure and the second passivation layer are sequentially disposed on the back surface of the substrate;
[0022] Both the first tunneling passivation contact structure and the second tunneling passivation contact structure include a tunneling layer and a polysilicon layer;
[0023] The first electrode passes through the first passivation layer to contact the polysilicon layer of the first tunneling passivation contact structure;
[0024] The second electrode passes through the second passivation layer to contact the polysilicon layer of the second tunneling passivation contact structure.
[0025] Further, the solar cell is a back-contact cell, which includes a first polarity region, a second polarity region, a passivation layer, a first electrode, and a second electrode;
[0026] The first polarity region and the second polarity region are alternately and spacedly arranged on the back surface of the substrate in sequence. The first polarity region and the second polarity region include polysilicon layers of different doping types;
[0027] The passivation layer is disposed on the side surface of the first polarity region and the second polarity region away from the substrate;
[0028] The first electrode passes through the passivation layer and contacts the first polarity region;
[0029] The second electrode passes through the passivation layer and contacts the second polarity region.
[0030] In a second aspect, the present application further provides a photovoltaic module, which includes the solar cell as described above.
[0031] In a third aspect, the present application further provides a photovoltaic system, which includes the photovoltaic module as described above.
[0032] The beneficial effect of the present application is that the solar cell of the present application includes a substrate, the substrate has opposite front and back surfaces; and a polysilicon layer disposed on the front and / or back surface. The surface of the polysilicon layer away from the substrate has a plurality of pits; the side surface of the substrate where the polysilicon layer is disposed includes an edge region and a central region located in the middle of the edge region; the polysilicon layer includes: when the polysilicon layers on the same surface of the substrate are of the same doping type, the density of the pits on the polysilicon layer in the central region is less than or equal to the density of the pits on the polysilicon layer in the edge region; when different doping type polysilicon layers are disposed on the same surface of the substrate, the density of the pits on the polysilicon layer in the central region is less than or equal to the density of the pits on the polysilicon layer of the same doping type in the edge region. By controlling the density of the pits in the central region to be less than the density of the pits in the edge region, the size and depth of the pits are reduced, the surface flatness of the polysilicon layer is ensured, the passivation effect is ensured, and further, the situation of leakage caused by the pits being too deep to penetrate the polysilicon layer can be avoided, ensuring the safety of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Figure 1 is a schematic diagram of the polysilicon surface of a solar cell provided by the prior art with densely distributed pits;
[0034] Figure 2 is a schematic structural diagram of a single-sided TOPCon cell of a solar cell provided by the present application;
[0035] Figure 3 is a schematic diagram of a polysilicon central region without pits in an embodiment of the solar cell provided by the present application;
[0036] Figure 4 It is a schematic diagram of a recessed area distribution on the edge of polycrystalline silicon in an embodiment of the solar cell provided by this application;
[0037] Figure 5 It is a schematic diagram of the recess size comparison on the surface of the polycrystalline silicon edge in an embodiment of the solar cell provided by this application;
[0038] Figure 6 It is a schematic diagram of the structure of a double-sided TOPCon cell in an embodiment of the solar cell provided by this application;
[0039] Figure 7 It is a schematic diagram of the structure of a back-contact cell in an embodiment of the solar cell provided by this application;
[0040] Figure 8 It is a schematic diagram of the structure of a polycrystalline silicon layer with a single doping type in an embodiment of the solar cell provided by this application;
[0041] Figure 9 It is a schematic diagram of the structure of a polycrystalline silicon layer with different doping types in an embodiment of the solar cell provided by this application.
[0042] Description of reference numerals:
[0043] 100, substrate; 200, polycrystalline silicon layer; 210, edge region; 220, central region; 300, recess; 410, first passivation layer; 420, second passivation layer; 430, tunneling layer; 440, first polarity region; 450, second polarity region; 510, emitter layer; 610, first electrode; 620, second electrode. Detailed implementation manners
[0044] In order to make the objectives, technical solutions and advantages of the present utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. The examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals represent the same or similar elements or elements with the same or similar functions from beginning to end. The embodiments described below by referring to the accompanying drawings are exemplary and are only used to explain the present utility model and should not be construed as a limitation to the present utility model. In addition, it should be understood that the specific embodiments described herein are only used to explain the present utility model and are not used to limit the present utility model.
[0045] In the description of the present utility model, it should be understood that the orientation or positional relationship indicated by the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom", etc. is based on the orientation or positional relationship shown in the drawings. These are only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present utility model.
[0046] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of the present utility model, "a plurality of" means two or more, unless otherwise specifically defined.
[0047] In the description of the present utility model, it should be noted that unless otherwise clearly specified and defined, the terms "installed", "connected" and "coupled" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection or a connection capable of mutual communication; it can be directly connected, or indirectly connected through an intermediate medium, and can be the communication inside two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.
[0048] In the present utility model, unless otherwise clearly specified and defined, the first feature being "above" or "below" the second feature may include the direct contact between the first and second features, or may include the situation where the first and second features are not in direct contact but in contact through other features therebetween. Moreover, the first feature being "above", "over" and "on top of" the second feature includes that the first feature is directly above and obliquely above the second feature, or merely means that the horizontal height of the first feature is higher than that of the second feature. The first feature being "under", "beneath" and "underneath" the second feature includes that the first feature is directly below and obliquely below the second feature, or merely means that the horizontal height of the first feature is lower than that of the second feature.
[0049] The following disclosure provides many different embodiments or examples for implementing different structures of the present utility model. To simplify the disclosure of the present utility model, the components and settings of specific examples are described below. Of course, they are only examples and are not intended to limit the present utility model. In addition, the present utility model may repeat reference numerals and / or reference letters in different examples. Such repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present utility model provides examples of various specific processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.
[0050] The solar cell of the present application includes a substrate having opposite front and back surfaces; and a polysilicon layer disposed on the front and / or back surface. The surface of the polysilicon layer away from the substrate has a plurality of pits. One side surface of the substrate where the polysilicon layer is disposed includes an edge region and a central region located in the middle of the edge region. The polysilicon layer includes: when the polysilicon layers on the same surface of the substrate are of the same doping type, the density of the pits on the polysilicon layer located in the central region is less than or equal to the density of the pits on the polysilicon layer located in the edge region; when different doping types of polysilicon layers are disposed on the same surface of the substrate, the density of the pits on the polysilicon layer located in the central region is less than or equal to the density of the pits on the polysilicon layer of the same doping type located in the edge region. By controlling the density of the pits in the central region to be less than the density of the pits in the edge region, reducing the size and depth of the pits, ensuring the surface flatness of the polysilicon layer, ensuring the passivation effect, and further avoiding the situation of leakage caused by the pits being too deep to penetrate the polysilicon layer, thus ensuring the safety of the solar cell.
[0051] During the preparation and production process of the polysilicon of the existing solar cells, a large amount of silicon powder agglomerates into silicon powder particles and is distributed on the surface of the polysilicon. During the subsequent cleaning process, the silicon powder particles will be washed away. After the silicon powder particles are washed away, pits will be formed on the surface of the polysilicon, as Figure 1 shown, resulting in damage to the polysilicon layer, causing the passivation of the pit region to fail, and even when the pits are too deep to penetrate the polysilicon layer, there will be a risk of leakage.
[0052] Embodiment 1
[0053] As Figures 2 to 9 shown, an embodiment of the present application provides a solar cell, including:
[0054] A substrate 100 having opposite front and back surfaces; and
[0055] A polysilicon layer 200 disposed on the front and / or back surface. The surface of the polysilicon layer 200 away from the substrate 100 has a plurality of pits 300;
[0056] One side of the substrate 100 where the polysilicon layer 200 is disposed includes an edge region 210 and a central region 220 located in the middle of the edge region 210;
[0057] The polysilicon layer 200 includes:
[0058] When the polysilicon layers 200 on the same side of the substrate are of the same doping type, the density of the pits 300 on the polysilicon layer 200 in the central region 220 is less than or equal to the density of the pits 300 on the polysilicon layer 200 in the edge region 210; or
[0059] When polysilicon layers 200 of different doping types are disposed on the same side of the substrate, the density of the pits 300 on the polysilicon layer 200 in the central region 220 is less than or equal to the density of the pits 300 on the polysilicon layer 200 of the same doping type in the edge region 210.
[0060] In implementation, the substrate 100 can be an N-type silicon wafer or a P-type silicon wafer. Among them, the N-type silicon wafer is obtained by adding a pentavalent element (such as phosphorus or arsenic) to silicon raw materials, and these pentavalent elements provide extra free electrons; the P-type silicon wafer is obtained by adding a trivalent element (such as boron or gallium) to silicon raw materials, and these trivalent elements control the diffusion of electron holes, which will not be elaborated here.
[0061] The substrate 100 has a front side and a back side. Among them, the front side of the substrate 100 corresponds to the light-receiving surface of the solar cell. Similarly, the back side of the substrate 100 corresponds to the backlight surface of the solar cell.
[0062] Optionally, the substrate 100 can be a single-crystalline silicon wafer. The single-crystalline silicon wafer is a single crystal formed by slowly cooling molten silicon raw materials. The crystal structure is tightly ordered, and it has high conversion efficiency, stability, and lifespan.
[0063] Optionally, the substrate 100 can be a multi-crystalline silicon wafer. The multi-crystalline silicon wafer is a form of elemental silicon. When molten elemental silicon solidifies under supercooled conditions, silicon atoms are arranged in a diamond lattice form to form many crystal nuclei. If these crystal nuclei grow into grains with different crystal plane orientations, then these grains combine to crystallize into multi-crystalline silicon.
[0064] Optionally, the surface of the substrate 100 can be a polished surface or a textured surface, which is not limited. Among them, the textured surface is obtained by performing a texturing process on the surface of the substrate 100 to fabricate an uneven pyramid structure 600 on the surface of the substrate 100. By using the light trapping effect of the uneven textured surface, the absorption of sunlight is increased, the reflectivity is reduced, the short-circuit current is increased, and the photoelectric conversion efficiency of the solar cell is improved.
[0065] Optionally, the texturing process includes but is not limited to acid texturing, alkali texturing, mechanical texturing, electrochemical texturing, reactive ion etching texturing, laser texturing, and mask texturing, etc., which will not be elaborated here.
[0066] In some embodiments, a polysilicon layer 200 can be deposited on the basis of a single-crystalline silicon wafer or a polycrystalline silicon wafer. For example, the polysilicon layer 200 is prepared by using a CVD (Chemical Vapor Deposition) device, and the polysilicon layer 200 is grown by controlling the working parameters of the CVD device. The working parameters include but are not limited to parameters such as the temperature, pressure, and gas flow rate of the growth environment of the polysilicon layer 200, and are not limited.
[0067] In some embodiments, the process flow of preparing the polysilicon layer 200 by chemical vapor deposition includes:
[0068] 1. Clean the substrate 100 to improve the crystallization quality of the silicon layer;
[0069] 2. Anneal and pre-treat the substrate 100 to improve the flatness and crystallization performance of the surface of the substrate 100;
[0070] 3. Place the pre-treated substrate 100 into the CVD reaction chamber, evacuate the chamber to a certain vacuum degree, and exclude oxygen and impurities;
[0071] 4. Introduce a silicon source gas into the reaction chamber. Usually, silane (〖SiH〗_4) or trimethylsilane, etc. is used as the silicon source;
[0072] 5. Introduce hydrogen into the reaction chamber as a dilution gas;
[0073] 6. Control the temperature in the reaction chamber within a suitable temperature range, such as 600 - 900 °C;
[0074] 7. At a suitable temperature, the silicon source gas and the dilution gas undergo a chemical reaction to produce silicon carbide or gaseous silicide;
[0075] 8. The carbide or silicide will be deposited on the surface of the silicon substrate 100, and gradually form the polysilicon layer 200. By controlling the reaction time, the thickness of the required polysilicon layer 200 can be controlled, and after the reaction is completed, the substrate 100 is cooled to room temperature to solidify the polysilicon layer 200.
[0076] When implemented, the preparation process steps of the polysilicon layer 200 are as follows:
[0077] In the first step, place the cleaned silicon wafer into the loading chamber of the hot-wire CVD equipment, evacuate to 10-3 Pa, use tantalum wire as the hot-wire material, and then preheat the silicon wafer to 100 °C; transfer the silicon wafer into the coating chamber, evacuate to 10-4 Pa, heat the hot-wire to 1600 °C, introduce carbon dioxide to oxidize the surface of the silicon wafer, with an oxidation reaction time of 50 seconds to form a 1.5-nm-thick oxide layer; then heat to 100 °C and perform heat treatment for 200 s.
[0078] In the second step, evacuate the residual gas in the chamber to 10-4 Pa, use tantalum wire as the hot-wire material, heat the hot-wire to 2000 °C, introduce silane and phosphine, and deposit an amorphous silicon thin film at a rate of 20 nm / s. The thickness of the amorphous silicon thin film can be controlled by controlling the coating time. After the coating is completed, send the silicon wafer into the unloading chamber and break the vacuum to unload the wafer.
[0079] In the third step, send the coated silicon wafer into a quartz tube furnace for heat treatment: evacuate to 10-4 Pa, introduce argon as a protective gas, maintain the gas pressure at 20 Pa, heat up to 400 °C, and keep the temperature for 60 min; then heat up to 700 °C and keep the temperature for 5 min, and cool down to 400 °C to unload the wafer.
[0080] In some possible embodiments, the polycrystalline silicon layer 200 can also be realized through the following preparation process steps:
[0081] In the first step, place the cleaned silicon wafer into the loading chamber of the hot-wire CVD equipment, evacuate to 10-3 Pa, use tantalum wire as the hot-wire material, and then preheat the silicon wafer to 100 °C; transfer the silicon wafer into the first coating chamber, evacuate to 10-4 Pa, heat the hot-wire to 1600 °C, introduce carbon dioxide to oxidize the surface of the silicon wafer, with an oxidation reaction time of 2 seconds to form a 1.5-nm-thick oxide layer, and then heat to 300 °C and perform heat treatment for 10 s.
[0082] In the second step, evacuate the residual gas in the chamber to 10-4 Pa, use tantalum wire as the hot-wire material, transfer the silicon wafer into the second coating chamber, heat the hot-wire to 2000 °C, introduce silane and phosphine, and deposit a 100-nm-thick amorphous silicon thin film at a rate of 10 nm / s. After the coating is completed, send the silicon wafer into the unloading chamber and break the vacuum to unload the wafer.
[0083] In the third step, send the coated silicon wafer into a quartz tube furnace for heat treatment: evacuate to 10-4 Pa, introduce argon as a protective gas, maintain the gas pressure at 2000 Pa, heat up to 300 °C, and keep the temperature for 60 min; then heat up to 900 °C and keep the temperature for 3 min, and cool down to 400 °C to unload the wafer.
[0084] In some possible embodiments, the polycrystalline silicon layer 200 can also be realized through the following preparation process steps:
[0085] First step: Place the cleaned silicon wafer into the wafer loading chamber of the hot wire CVD equipment, evacuate to 10-3 Pa, use tantalum wire as the hot wire material, and then preheat the silicon wafer to 100 °C; transfer the silicon wafer into the first coating chamber, evacuate to 10-4 Pa, heat the hot wire to 1200 °C, introduce ozone to oxidize the surface of the silicon wafer, with an oxidation reaction time of 30 seconds to form an oxide layer with a thickness of 2.0 nm, and then heat to 200 °C for heat treatment for 50 s.
[0086] Second step: Evacuate the residual gas in the cavity to 10-4 Pa, use tantalum wire as the hot wire material, transfer the silicon wafer into the second coating chamber, heat the hot wire to 2000 °C, introduce silane and phosphine, and coat at a rate of 1 nm / s to deposit a 50-nm amorphous silicon thin film. After the coating is completed, send the silicon wafer into the wafer unloading chamber and break the vacuum to unload the wafer.
[0087] Third step: Send the coated silicon wafer into a quartz tube furnace for heat treatment: evacuate to 10-4 Pa, introduce nitrogen (containing 1% hydrogen) as the protective gas, keep the air pressure at 1000 Pa, heat up to 500 °C, and keep warm for 60 min; then heat up to 800 °C and keep warm for 4 min, and cool down to 400 °C to unload the wafer.
[0088] In some possible embodiments, a polysilicon layer 200 can also be prepared by using a PVD (Physical Vapor Deposition) device, without limitation.
[0089] The front and back sides of the substrate 100 can be divided into a central region 220 and an edge region 210. That is to say, the polysilicon layer 200 can be distributed in the central region 220 or in the edge region 210.
[0090] During the growth of the polysilicon layer 200, some silicon powder will agglomerate to form silicon powder particles, and these silicon powder particles are distributed on the surface of the polysilicon layer 200. That is to say, the silicon powder particles can be regarded as small black dots on the surface of the polysilicon layer 200.
[0091] By controlling parameters such as temperature, pressure, and gas flow rate during the growth process of the polysilicon layer 200, the density of silicon powder particles in the polysilicon layer 200 in the central region 220 is made less than the density of silicon powder particles in the polysilicon layer 200 in the edge region 210. In the preparation process flow of a solar cell, the polysilicon layer 200 needs to be cleaned, and the silicon powder particles will be washed away during the cleaning process, thereby forming pits 300 at the positions of the original silicon powder particles on the surface of the polysilicon layer 200. Since the density of silicon powder particles in the polysilicon layer 200 in the central region 220 is less than the density of silicon powder particles in the polysilicon layer 200 in the edge region 210, the density of pits 300 in the polysilicon layer 200 in the central region 220 is less than the density of pits 300 in the polysilicon layer 200 in the edge region 210.
[0092] In implementation, the edge region 210 is a region that extends 20 millimeters from the outer periphery of the substrate 100 towards the geometric center of the substrate 100.
[0093] In some possible embodiments, the density of pits 300 in the central region 220 is M1 pits / mm 2 , where 0 ≤ M1 ≤ 5. Exemplarily, there may be 1, 2, 3, or 4 pits 300 per square millimeter in the central region 220. For example, there may be no pits 300 per square millimeter in the central region 220, as Figure 3 shown.
[0094] Optionally, the density of pits 300 in the edge region 210 is M2 pits / mm 2 , where 0 ≤ M2 ≤ 500. For example, there may be 1, 10, 30, 40, 100, 200, 300, 400, or any value from 0 to 500 pits 300 per square millimeter in the edge region 210, as Figure 4 shown, without limitation.
[0095] Optionally, the number of pits 300 gradually decreases from the outer periphery of the substrate 100 towards the geometric center of the substrate 100. In some possible embodiments, at a position 5 mm away from the outer periphery of the substrate 100, the probability of the appearance of pits 300 is the highest, and after 20 mm away from the outer periphery of the substrate 100, the pits 300 reduce to none or almost none. Exemplarily, as Figure 5 shown, there may be a few pits 300 at a position 20 mm away from the outer periphery of the polysilicon layer 200.
[0096] On the other hand, while controlling the density of the silicon powder particles to decrease, the size of the silicon powder particles will also become smaller. That is to say, the size of the pits 300 will also become smaller, so that the size of the pits 300 in at least part of the central region 220 is less than or equal to the size of the pits 300 in at least part of the edge region 210. In some possible embodiments, the size of the pits 300 in the central region 220 is D1 microns, where 0 < D1 ≤ 5, and the size of the pits 300 in the edge region 210 is D2 microns, where 0 < D2 ≤ 10. For example, the size of the pits 300 in the central region 220 is 1 micron, 2 microns, 3 microns, or 4 microns, and the size of the pits 300 in the edge region 210 is 1 micron, 2 microns, 3 microns, 4 microns, 5 microns, 6 microns, 7 microns, 8 microns, 9 microns, or any value from 0 to 10 microns, without limitation.
[0097] During implementation, when the size of the pits 300 is too large, such as Figure 5 A2 in, where A2 is a pit 300 with an overly large diameter. The diameter of the pit 300 shown by A2 is greater than or equal to 1 um, and A2 will cause efficiency loss of the solar cell. When the size of the pit 300 is less than the critical value, such as Figure 5 A1 in, where the diameter of the pit 300 shown by A1 is less than or equal to 800 nm, the pit 300 shown by A1 will not cause efficiency loss of the solar cell.
[0098] After the subsequent process cleans the polysilicon layer 200, the silicon powder particles will be washed away, and the size of the formed pits 300 will also become smaller. Even in the central region 220, there are no pits 300 at all. Furthermore, when preparing the passivation layer 400 later, the passivation effect is ensured. At the same time, after the size of the pits 300 becomes smaller, the situation where the pits 300 penetrate through the polysilicon layer 200 will not occur, ensuring the safety of the solar cell.
[0099] This application controls the density of the pits 300 in the central region 220 to be less than the density of the pits 300 in the edge region 210, reduces the size and depth of the pits 300, ensures the surface flatness of the polysilicon layer 200, ensures the passivation effect, and further can avoid the situation of leakage caused by the pits 300 being too deep and penetrating through the polysilicon layer 200, ensuring the safety of the solar cell.
[0100] In some alternative embodiments, taking the solar cell provided by this application as a single-sided TOPCon cell as an example, the single-sided TOPCon cell includes a first passivation layer 410, a second passivation layer 420, an emitter layer 510, a tunneling passivation contact structure, a first electrode 610, and a second electrode 620;
[0101] The emitter layer 510 and the first passivation layer 410 are sequentially disposed on the front surface of the substrate 100, and the first electrode 610 passes through the first passivation layer 410 and contacts the emitter layer 510;
[0102] The tunneling passivation contact structure and the second passivation layer 420 are sequentially arranged on the back side of the substrate 100 . The tunneling passivation contact structure includes a tunneling layer 430 and a polysilicon layer 200 . The second electrode 620 passes through the second passivation layer 420 and contacts the polysilicon layer 200 .
[0103] During implementation, the first electrode 610, the first passivation layer 410, the emitter layer 510, the substrate 100, the tunneling layer 430, the polysilicon layer 200, the second passivation layer 420 and the second electrode 620 are sequentially arranged from top to bottom in the single-sided TOPCon cell. Figure 2 shown.
[0104] The first electrode 610 and the second electrode 620 are metal electrodes used to collect and conduct photogenerated carriers. The first passivation layer 410 and the second passivation layer 420 are thin passivation layer films used to improve the photoelectric conversion efficiency and stability of the solar cell, reduce surface damage and oxidation reactions of the solar cell, and extend the service life of the solar cell.
[0105] In some possible embodiments, the first passivation layer 410 and the second passivation layer 420 include silicon nitride, silicon oxynitride, titanium dioxide, aluminum oxide, ferric oxide, etc., without limitation.
[0106] In practice, the polysilicon layer 200 of the single-sided TOPCon cell is of a single doping type. Taking the substrate 100 as an n-type silicon wafer as an example, the tunneling layer 430 is a tunneling silicon oxide layer, the emitter layer 510 is a boron-doped emitter, and the polysilicon layer 200 is a phosphorus-doped polysilicon layer. The polysilicon layer 200 is of a single doping type. It is understandable that the boundary between the central region 220 and the edge region 210 can be elliptical, such as Figure 8 shown.
[0107] It should be noted that the oval shape of the boundary between the central area 220 and the edge area 210 is an example of an embodiment of the present application, and is not a specific limitation of the present application. In some other embodiments, the boundary between the central area 220 and the edge area 210 can also be other shapes, such as a circle or an irregular shape, etc., without limitation.
[0108] Optionally, taking the solar cell provided in this application as a double-sided TOPCon cell as an example, Figure 6 As shown, the bifacial TOPCon cell includes a first passivation layer 410, a second passivation layer 420, a first tunneling passivation contact structure, a second tunneling passivation contact structure, a first electrode 610 and a second electrode 620;
[0109] The first tunneling passivation contact structure and the first passivation layer 410 are sequentially disposed on the front surface of the substrate 100, and the second tunneling passivation contact structure and the second passivation layer 420 are sequentially disposed on the back surface of the substrate 100;
[0110] Both the first tunneling passivation contact structure and the second tunneling passivation contact structure include a tunneling layer 430 and a polysilicon layer 200;
[0111] The first electrode 610 passes through the first passivation layer 410 and contacts the polysilicon layer 200 of the first tunneling passivation contact structure;
[0112] The second electrode 620 passes through the second passivation layer 420 and contacts the polysilicon layer 200 of the second tunneling passivation contact structure.
[0113] The double-sided TOPCon cell is provided with tunneling passivation contact structures on both the front and back surfaces of the substrate 100. Among them, the polysilicon layer 200 on the front surface of the substrate 100 is of a single doping type, the polysilicon layer 200 on the back surface of the substrate 100 is of a single doping type, and the doping types of the polysilicon layer 200 on the front surface of the substrate 100 and the polysilicon layer 200 on the back surface of the substrate 100 are different.
[0114] During implementation, the structure of each side of the double-sided TOPCon cell can refer to the structure of the back surface of the above-mentioned single-sided TOPCon cell, which will not be elaborated here.
[0115] As a possible implementation manner, taking the solar cell provided in this application as a back-contact cell as an example, as Figure 7 shown, the back-contact cell includes a first polarity region 440, a second polarity region 450, a passivation layer, a first electrode 610, and a second electrode 620;
[0116] The first polarity region 440 and the second polarity region 450 are sequentially and alternately arranged at intervals on the back surface of the substrate 100, and the first polarity region 440 and the second polarity region 450 include polysilicon layers 200 of different doping types;
[0117] The passivation layer is disposed on the side surface of the first polarity region 440 and the second polarity region 450 away from the substrate 100;
[0118] The first electrode 610 passes through the passivation layer and contacts the first polarity region 440;
[0119] The second electrode 620 passes through the passivation layer and contacts the second polarity region 450.
[0120] In implementation, the first polarity region 440 and the second polarity region 450 can be regarded as the positive and negative electrode regions of the back-contact battery. For example, when the first polarity region 440 is the positive electrode region, the second polarity region 450 is the negative electrode region. Similarly, when the first polarity region 440 is the negative electrode region, the second polarity region 450 is the positive electrode region.
[0121] The passivation layer can refer to the above-mentioned second passivation layer 420 and will not be elaborated.
[0122] The first polarity region 440 and the second polarity region 450 have different polarities. That is to say, polysilicon layers 200 with different doping types are provided on the back surface of the substrate 100 of the back-contact battery. For the same type of polysilicon layer 200, the density of the pits 300 on the polysilicon layer 200 located in the central region 220 is less than or equal to the density of the pits 300 on the polysilicon layer 200 located in the edge region 210.
[0123] Exemplarily, taking the region where six polysilicon layers 200 are provided on the back surface of the substrate 100 as an example, as Figure 9 shown, from left to right are the first polarity region 440, the second polarity region 450, the first polarity region 440, the second polarity region 450, the first polarity region 440, and the second polarity region 450. That is to say, the first, third, and fifth regions from left to right are all the first polarity region 440, and the second, fourth, and sixth regions are all the second polarity region 45.
[0124] In implementation, both the third region and the fifth region are located in the central region, while the first region is located in the edge region. Then the density of the pits 300 in the third region and the fifth region is less than the density of the pits 300 in the first region.
[0125] As a possible implementation manner, the third region is located in the central region, while the first region and the fifth region are both located in the edge region. Then the density of the pits 300 in the third region is less than the density of the pits 300 in the first region and the fifth region.
[0126] In some possible embodiments, the density of the pits 300 in the first region, the fifth region, and the third region decreases in sequence.
[0127] Similarly, both the second region and the fourth region are located in the central region, while the sixth region is located in the edge region. Then the density of the pits 300 in the second region and the fourth region is less than the density of the pits 300 in the sixth region.
[0128] As a possible implementation manner, the fourth region is located in the central region, while the second region and the sixth region are both located in the edge region. Then the density of the pits 300 in the fourth region is less than the density of the pits 300 in the second region and the sixth region.
[0129] In some possible embodiments, the density of the pits 300 in the sixth region, the second region, and the fourth region decreases in sequence.
[0130] Embodiment 2
[0131] In some alternative embodiments, the present application provides a photovoltaic module, including the solar cell as described above.
[0132] Those skilled in the art can clearly understand that for the convenience and brevity of description, the structure and implementation principle of the photovoltaic module described above can refer to the corresponding structure and implementation principle in the foregoing Embodiment 1, and will not be elaborated herein.
[0133] The solar cell of the present application includes a substrate 100 having opposite front and back surfaces; and a polysilicon layer 200 disposed on the front and / or back surface. The surface of the polysilicon layer 200 away from the substrate 100 has a number of pits 300; one side surface of the substrate 100 where the polysilicon layer 200 is disposed includes an edge region 210 and a central region 220 located in the middle of the edge region 210; the polysilicon layer 200 includes: when the polysilicon layers 200 on the same surface of the substrate 100 are of the same doping type, the density of the pits 300 on the polysilicon layer 200 in the central region 220 is less than or equal to the density of the pits 300 on the polysilicon layer 200 in the edge region 210; when different doping types of polysilicon layers 200 are disposed on the same surface of the substrate 100, the density of the pits 300 on the polysilicon layer 200 in the central region 220 is less than or equal to the density of the pits 300 on the polysilicon layer 200 of the same doping type in the edge region 210. By controlling the density of the pits 300 in the central region 220 to be less than the density of the pits 300 in the edge region 210, reducing the size and depth of the pits 300, ensuring the surface flatness of the polysilicon layer, ensuring the passivation effect, and further avoiding the situation of leakage caused by the pits being too deep to penetrate the polysilicon layer, thus ensuring the safety of the solar cell.
[0134] Embodiment 3
[0135] In some alternative embodiments, the present application provides a photovoltaic system, including the photovoltaic module as described above.
[0136] Those skilled in the art can clearly understand that for the convenience and brevity of description, the structure and implementation principle of the photovoltaic system described above can refer to the corresponding structure and implementation principle in the foregoing Embodiments 1 and 2, and will not be elaborated herein.
[0137] The solar cell of the present application includes a substrate 100 having opposite front and back surfaces; and a polysilicon layer 200 disposed on the front and / or back surface. The surface of the polysilicon layer 200 away from the substrate 100 has a number of pits 300; one side of the substrate 100 where the polysilicon layer 200 is disposed includes an edge region 210 and a central region 220 located in the middle of the edge region 210; the polysilicon layer 200 includes: when the polysilicon layers 200 on the same side of the substrate 100 are of the same doping type, the density of the pits 300 on the polysilicon layer 200 in the central region 220 is less than or equal to the density of the pits 300 on the polysilicon layer 200 in the edge region 210; when polysilicon layers 200 of different doping types are disposed on the same side of the substrate 100, the density of the pits 300 on the polysilicon layer 200 in the central region 220 is less than or equal to the density of the pits 300 on the polysilicon layer 200 of the same doping type in the edge region 210. By controlling the density of the pits 300 in the central region 220 to be less than the density of the pits 300 in the edge region 210, reducing the size and depth of the pits 300, ensuring the surface flatness of the polysilicon layer, ensuring the passivation effect, and further avoiding the leakage caused by the pits penetrating the polysilicon layer due to too deep pits, and ensuring the safety of the solar cell.
[0138] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A solar cell, characterized in that, Comprising: A substrate having opposite front and back surfaces; And A polysilicon layer disposed on the front and / or the back surface, and a plurality of pits are formed on a surface of the polysilicon layer away from the substrate; A side surface of the substrate where the polysilicon layer is disposed includes an edge region and a central region located in the middle of the edge region; The polysilicon layer includes: When the polysilicon layers on the same surface of the substrate are of the same doping type, the density of pits on the polysilicon layer in the central region is less than or equal to the density of pits on the polysilicon layer in the edge region; or When polysilicon layers of different doping types are disposed on the same surface of the substrate, the density of pits on the polysilicon layer in the central region is less than or equal to the density of pits on the polysilicon layer of the same doping type in the edge region.
2. The solar cell according to claim 1, wherein, The density of the pits in the central region is M1 pits / mm 2 , where 0 < M1 ≤ 5, and the density of the pits in the edge region is M2 pits / mm 2 , where 0 < M2 ≤ 500.
3. The solar cell according to claim 1, wherein, The size of at least part of the pits in the central region is less than or equal to the size of at least part of the pits in the edge region.
4. The solar cell according to claim 3, characterized in that, The size of the pits in the central region is D1 microns, where 0 < D1 ≤ 5, and the size of the pits in the edge region is D2 microns, where 0 < D2 ≤ 10.
5. The solar cell according to claim 1, characterized in that, The edge region is a region extending 20 mm from the outer periphery of the substrate towards the geometric center of the substrate.
6. The solar cell according to claim 1, characterized in that, The number of the pits gradually decreases in a direction from the outer periphery of the substrate towards the geometric center of the substrate.
7. The solar cell according to claim 1, characterized in that, The solar cell is a single-sided TOPCon cell, and the single-sided TOPCon cell includes a first passivation layer, a second passivation layer, an emitter layer, a tunneling passivation contact structure, a first electrode, and a second electrode; The emitter layer and the first passivation layer are sequentially disposed on the front surface of the substrate, and the first electrode passes through the first passivation layer and contacts the emitter layer; The tunneling passivation contact structure and the second passivation layer are sequentially disposed on the back surface of the substrate, the tunneling passivation contact structure includes a tunneling layer and the polysilicon layer, and the second electrode passes through the second passivation layer and contacts the polysilicon layer.
8. The solar cell according to claim 1, characterized in that, The solar cell is a double-sided TOPCon cell, and the double-sided TOPCon cell includes a first passivation layer, a second passivation layer, a first tunneling passivation contact structure, a second tunneling passivation contact structure, a first electrode, and a second electrode; The first tunneling passivation contact structure and the first passivation layer are sequentially disposed on the front surface of the substrate, and the second tunneling passivation contact structure and the second passivation layer are sequentially disposed on the back surface of the substrate; Both the first tunneling passivation contact structure and the second tunneling passivation contact structure include a tunneling layer and the polysilicon layer; The first electrode passes through the first passivation layer and contacts the polysilicon layer of the first tunneling passivation contact structure; The second electrode passes through the second passivation layer and contacts the polysilicon layer of the second tunneling passivation contact structure.
9. The solar cell according to claim 1, wherein, The solar cell is a back contact cell, and the back contact cell includes a first polarity region, a second polarity region, a passivation layer, a first electrode, and a second electrode; The first polar region and the second polar region are alternately arranged at intervals on the back surface of the substrate in sequence, and the first polar region and the second polar region include the polysilicon layers of different doping types; The passivation layer is arranged on a side surface of the first polar region and the second polar region away from the substrate; The first electrode passes through the passivation layer and contacts the first polar region; The second electrode passes through the passivation layer and contacts the second polar region.
10. A photovoltaic module, characterized in that, It includes a solar cell adopting any one of claims 1 to 9.
11. A photovoltaic system, characterized in that, It includes a photovoltaic module as claimed in claim 10.