Driving circuit, display system and terminal equipment

Abstract

The utility model discloses a driving circuit, a display system and terminal equipment. The driving circuit comprises a display control module and a time sequence control module, the display control module is connected with the main chip so as to access audio and video signals, the display control module is provided with an EDP output interface, and the EDP output interface is connected with the EDP input interface of the time sequence control module through an FFC socket so as to output display port signals; the time sequence control module is connected with the display screen to output a driving signal to the display screen, and the driving signal is obtained according to the display port signal. The audio and video signals from the main chip are accessed through the display control module, then the configured EDP output interface is connected with the EDP input interface of the time sequence control module, transmission of display port signals is achieved, and then the time sequence control module outputs the driving signals to the display screen to drive the display screen to display. The method can be applied to a main chip without a VBO interface, so that the selection range of the main chip is greatly widened.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a driving circuit, a display system and a terminal device. Background Art

[0002] With the development of display technology, users have higher and higher requirements for display performance, and television (TV) main chip and display panel technology have also developed accordingly.

[0003] Currently, the 4K120Hz display products on the market have launched a dual-channel VBO (Video by One) interface with 4K120Hz output on the main chip side, a total of 16-channel TV main chip; on the display side, a dual-channel VBO interface supporting 4K120Hz input has been launched, a total of 16-channel timing controllers and display screens, which can effectively realize 4K120Hz display technology.

[0004] However, such a display solution requires the use of a main chip that supports dual-channel VBO interfaces, which limits the selection of the main chip. Utility Model Content

[0005] In view of the above problems, the present application provides a driving circuit, a display system and a terminal device to solve the above technical problems.

[0006] In a first aspect, the present application provides a driving circuit for use in a display system, the display system comprising a main chip and a display screen, the driving circuit comprising a display control module and a timing control module;

[0007] The display control module is connected to the main chip to access the audio and video signals output by the main chip. The display control module is configured with an EDP output interface, which is connected to the EDP input interface of the timing control module through an FFC socket to output a display port signal to the timing control module. The display port signal is obtained according to the audio and video signals;

[0008] The output interface of the timing control module is connected to the display screen to output a driving signal to the display screen, and the driving signal is obtained according to the display port signal.

[0009] In a possible implementation of the present application, the display control module is configured with an HDMI input interface, and the display control module is connected to the main chip through the HDMI input interface.

[0010] In a possible implementation of the present application, the audio and video signal includes an HDMI signal with a resolution of 4K120Hz.

[0011] In a possible implementation of the present application, the FFC socket includes a 51-pin FFC socket.

[0012] In a possible implementation of the present application, the display port signal includes an EDP signal, and the EDP output interface is configured with 8 data channels, and the bandwidth of each data channel is 5.4G.

[0013] In a possible implementation of the present application, the display control module is configured with a Type-C output interface, and the Type-C output interface is used to connect to an extended display screen.

[0014] In a possible implementation of the present application, the output signal of the Type-C output interface includes a signal with a resolution of 4K60Hz or 4K120Hz.

[0015] In a possible implementation of the present application, the timing control module includes a timing controller based on an embedded display port.

[0016] In a second aspect, the present application further provides a display system, comprising:

[0017] Main chip;

[0018] Display screen;

[0019] The driving circuit of the first aspect is connected to the main chip and the display screen respectively, and is used to convert the audio and video signals from the main chip into driving signals to drive the display screen.

[0020] In a third aspect, the present application further provides a terminal device, which includes a device body and a driving circuit such as the first aspect or the display system of the second aspect provided on the device body.

[0021] From the above content, it can be concluded that this application has the following beneficial effects:

[0022] In this application, the audio and video signals from the main chip are accessed through the display control module, and the display control module is then connected to the EDP input interface of the timing control module through the configured EDP output interface, and the display port signal obtained according to the audio and video signal is output to the timing control module. The output interface of the timing control module is connected to the display screen, thereby outputting the driving signal obtained according to the display port signal to the display screen, driving the display screen for display. It can be applicable to the main chip that is not configured with the VBO interface, thereby greatly broadening the selection range of the main chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0024] Figure 1 It is a structural diagram of the TV driver architecture in the related art;

[0025] Figure 2 is a structural diagram of a driving circuit provided in an embodiment of the present application;

[0026] Figure 3 is another structural schematic diagram of the driving circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0027] The embodiments of the present application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and are not to be construed as limiting the present application.

[0028] In order to enable those skilled in the art to better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0029] In the embodiments of the present application, it should be noted that, in this document, relational terms such as first and second, etc., are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

[0030] Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to encompass non-exclusive inclusion, such that an article or device comprising a list of elements includes not only those elements but also other elements not explicitly listed or inherent to such article or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not preclude the presence of additional identical elements in the article or device comprising the element.

[0031] In the description of the embodiments of this application, words such as "example" or "for example" are used to indicate an example, illustration, or description. Any embodiment or design described as "for example" or "for example" in the embodiments of this application is not to be construed as being preferred or having more advantages than another embodiment or design. The use of words such as "example" or "for example" is intended to clearly present relative concepts.

[0032] In addition, in the embodiments of the present application, "plurality" refers to two or more. In view of this, in the embodiments of the present application, "plurality" can also be understood as "at least two". "At least one" can be understood as one or more, for example, one, two, or more. For example, "including at least one" means including one, two, or more, and does not limit which ones are included. For example, "including at least one of A, B, and C" means including A, B, C, A and B, A and C, B and C, or A, B, and C.

[0033] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be either a direct connection between A and B or an indirect connection between A and B through one or more other electrical components.

[0034] Before introducing the driving circuit, display system and terminal device of the present application, relevant background information of the embodiments of the present application is first introduced.

[0035] like Figure 1 As shown, Figure 1 This is a structural diagram of the TV driver architecture in the related art, in which the system-level chip is connected to the VBO timing controller through two 8-channel VBO interfaces, and the output of the VBO timing controller is used to drive a 4K120Hz display with a specification of 16:9 for display.

[0036] Since the VBO interface is a mature hardware interface and has long been widely used in 4K60Hz display technology, the 4K120Hz display driver solution only needs to add a new VBO on the basis of the existing VBO, which is easy to implement.

[0037] However, such a display driver solution requires that the selected system-level chip must support or be configured with a dual-channel VBO interface, while tablet or mobile phone chips in related technologies generally drive the screen through an embedded display port (EDP). As a result, tablet or mobile phone chips cannot be applied to the TV industry. The two different types of chip markets cannot break through the barriers, resulting in many limitations in the overall solution selection.

[0038] Based on this, an embodiment of the present application provides a driving circuit, a display system and a terminal device. The display control module in the driving circuit receives the audio and video signals from the main chip, and is connected to the EDP input interface of the timing control module through the configured EDP output interface to realize the transmission of the display port signal. The timing control module then outputs a driving signal to the display screen, and the display screen is driven by the driving signal for display. It can be applicable to the main chip that is not configured with a VBO interface, thereby greatly broadening the selection range of the main chip.

[0039] The driving circuit, display system and terminal device provided in this application are respectively introduced in detail below.

[0040] First, an embodiment of the present application provides a driving circuit, which can be used in a display system or a terminal device integrated with the display system. The terminal device can be a television, a conference tablet, a commercial display tablet, etc.

[0041] See also Figure 2 , Figure 2 FIG. 1 is a schematic diagram of a driving circuit provided in an embodiment of the present application. The driving circuit 100 may include a display control module 110 and a timing control module 120 .

[0042] Among them, the display control module 110 can be connected to the main chip 200 to access the audio and video signals output by the main chip 200. The display control module 110 is configured with an EDP output interface 1101. The EDP output interface 1101 is connected to the EDP input interface 1201 of the timing control module 120 through the FFC socket 130 to output the display port signal to the timing control module 120. The display port signal is obtained based on the audio and video signal; the output interface of the timing control module 120 is connected to the display screen 300 to output the driving signal to the display screen 300. The driving signal is obtained based on the display port signal.

[0043] In the embodiment of the present application, the main chip 200 can be any existing system-on-chip (SOC) or system-on-chip used in mobile phones or tablet computers. The main chip 200 can be used to receive signals from a video source, process the signals according to user instructions, and generate audio and video signals to be sent to the display control module 110.

[0044] The display control module 110 can be connected to the main chip 200 through a corresponding interface, thereby receiving audio and video signals from the main chip 200. The display control module 110 can convert the received audio and video formats to obtain display port signals in a format that can be received by the timing control module 120 or supported by the timing control module 120.

[0045] That is, the display control module 110 may also be connected to the timing control module 120 through a corresponding interface, thereby outputting the display port signal obtained after format conversion to the timing control module 120 .

[0046] In the embodiment of the present application, the timing control module 120 can adopt any existing timing controller that supports the embedded display port EDP. Therefore, the timing control module 120 can be configured with an EDP input interface 1201. In order to enable the display port signal to be accessed by the EDP input interface 1201 of the timing control module 120, the display control module 110 in the embodiment of the present application can be correspondingly configured with an EDP output interface 1101, that is, the display control module 110 can support EDP interface output.

[0047] In the embodiment of the present application, the display port signal is transmitted through a flexible flat cable (FFC), so the EDP output interface 1101 of the display control module 110 and the EDP input interface 1201 of the timing control module 120 can be connected through the FFC socket 130.

[0048] After receiving the display port signal, the timing control module 120 can process the display port signal, convert the received display port signal into a driving signal that can drive the display screen 300, and output it to the display screen 300, so that the display screen 300 can respond to the driving signal after receiving the driving signal to light up the LCD screen to display the corresponding image.

[0049] In the embodiment of the present application, even if the main chip 200 is not configured with a VBO interface, the audio and video signals output by the main chip 200 can be converted into display port signals through the display control module 110, and output to the EDP input interface 1201 of the timing control module 120 through the EDP output interface 1101. The timing control module 120 then converts the display port signals into drive signals and outputs them to the display screen 300. The display screen 300 is driven by the drive signal to display. This is suitable for main chips that are not configured with a VBO interface, so that tablet computers or mobile phone chips can also be applied to the TV industry, opening up two different types of chip markets and solution selection in the mobile phone industry and the TV industry, greatly broadening the selection range of main chips, and enabling the overall solution of the TV industry to achieve an optimal solution.

[0050] Next, continue to Figure 2 Each unit module shown and the specific implementation methods that may be used in practical applications are described in detail.

[0051] like Figure 3As shown, in some embodiments of the present application, the display control module 110 may be configured with an HDMI input interface 1102 , and the display control module 110 is connected to the main chip 200 via the HDMI input interface 1102 .

[0052] It is understandable that current display chips are generally configured with a High Definition Multimedia Interface (HDMI), that is, the main chip 200 is usually configured with an HDMI output interface to output audio and video signals.

[0053] Therefore, in order to receive the audio and video signals output by the main chip 200, in an embodiment of the present application, the display control module 110 is configured with an HDMI input interface 1102 to match the HDMI output interface of the main chip 200, thereby achieving access to audio and video signals.

[0054] As an example, the HDMI input interface 1102 may be an HDMI 2.1 interface that complies with the HDMI 2.1 standard.

[0055] In some embodiments of the present application, the audio and video signal includes an HDMI signal with a resolution of 4K120Hz.

[0056] In the embodiment of the present application, the display screen 300 can be a 4K120Hz display screen with a specification of 16:9. Therefore, the audio and video signal output by the main chip 200 can be an HDMI signal with a resolution of 4K120Hz.

[0057] Please continue reading Figure 3 As an example, the audio and video signal may be an HDMI2.1 signal that complies with the HDMI2.1 standard.

[0058] In a specific implementation, the main chip 200 can use a chip model RK3588. In actual applications, the main chip 200 can be configured as a fixed rate channel (FRL) mode, so that the main chip 200 can output an HDMI2.1 signal with a resolution of 4K120Hz.

[0059] like Figure 3 As shown, as an example, the FFC socket 130 may include a first FFC socket 1301 connected to the EDP output interface 1101 and a second FFC socket 1302 connected to the EDP input interface 1201 of the timing control module 120, and the transmission of the display port signal is realized through the first FFC socket 1301 and the second FFC socket 1302.

[0060] In some embodiments of the present application, the FFC socket 130 may include a 51-pin FFC socket. Specifically, the first FFC socket 1301 and the second FFC socket 1302 may use a 51-pin FFC socket. As shown in the pin definition in Table 1, the 51-pin FFC socket can support 8-channel 4K120Hz EDP signals.

[0061] Table 1 Pin definition table of 51PIN FFC socket

[0062]

[0063]

[0064]

[0065] Traditional dual-channel VBO requires 16 channels of differential signaling. Therefore, six sockets, including two power supply sockets, two 51-pin VBO FFC sockets, and two 41-pin VBO FFC sockets, are usually required to connect the system-level chip and the VBO timing controller. However, these six sockets occupy a large amount of space on the printed circuit board (PCB), resulting in limited PCB layout space.

[0066] In the embodiment of the present application, only two 51-pin FFC sockets are needed to achieve the docking of the display control module 110 and the timing control module 120, which greatly reduces the socket's occupation of the PCB layout space and reduces the circuit area.

[0067] In some embodiments of the present application, the display port signal includes an EDP signal, and the EDP output interface 1101 is configured with 8 data channels, and the bandwidth of each data channel is 5.4G.

[0068] In an embodiment of the present application, the display port signal can be an EDP1.4b signal. The display control module 110 can use an LCD display control chip with model LT8668SXC. The LCD display control chip is configured with an EDP output interface 1101. The EDP output interface 1101 can include 8 data channels, and each data channel supports bandwidths of RBR (1.62 Gbps), HBR (2.7 Gbps), and HBR2 (5.4 Gbps).

[0069] In this embodiment, the effective row height of the 4K120Hz display screen 300 is 4400, the long effective height is 2250, the refresh rate is 120Hz, the color depth is 8bit, and the encoding is 10 / 8. Therefore, the total bandwidth is (4400*2250*120*3*8*10 / 8) / 1000000=35.64G.

[0070] If the EDP output interface 1101 is configured as HBR2 (5.4 Gbps), the total bandwidth of the 8 data channels is 5.4 Gbps*8=43.2 G, which is greater than the 35.64 G required for EDP signal transmission. Therefore, the EDP bandwidth capability of the EDP output interface 1101 is sufficient to drive the 4K120 Hz timing controller, also known as the timing control module 120.

[0071] Please continue reading Figure 3 In some embodiments of the present application, the display control module 110 may also be configured with a Type-C output interface 1103, which may be used to connect to an extended display screen 400.

[0072] In an embodiment of the present application, the display control module 110 can also be configured with a Type-C output interface 1103, through which an external expansion display screen 400 is connected, thereby further expanding the display function of the entire machine and broadening the application scenarios of the entire machine.

[0073] In some embodiments of the present application, the output signal of the Type-C output interface 1103 includes a signal with a resolution of 4K60Hz or 4K120Hz, and the display control module 110 can also be used to adjust the resolution of the display signal output to the extended display screen 400 according to the received configuration instructions.

[0074] As an example, the display control module 110 uses an LCD display control chip model LT8668SXC. The LT8668SXC chip can support Type-C, DP1.4a and HDMI2.1 inputs, as well as EDP1.4b, DP1.4a, HDMI2.1 and Type-C out outputs.

[0075] When outputting a display signal to the extended display screen 400 , the LT8668SXC chip can switch the resolution according to the received configuration instruction to adapt to the screen resolution of the extended display screen 400 .

[0076] The configuration instruction may be an instruction input by a user, and the user may adjust the resolution of the display signal output by the LT8668SXC chip according to the screen resolution of the extended display screen 400 , for example, switching between 4K60Hz and 4K120Hz.

[0077] In some embodiments of the present application, the timing control module 120 includes a timing controller based on an embedded display port.

[0078] In the embodiment of the present application, the LT8668SXC chip is connected to the embedded display port-based timing controller (TCON), also known as the EDP TCON, through a 51-pin FFC socket to realize the transmission of EDP signals. This not only reduces the socket's occupation of PCB layout space, but also expands the selection range of the main chip 200 and has a wider range of applications.

[0079] Based on the driving circuit in the above embodiment, on the basis of the above embodiment, the embodiment of the present application further provides a display system, which may include a main chip, a display screen and Figures 2 to 3 Corresponding to the driving circuit in any embodiment, the driving circuit is connected to the main chip and the display screen respectively, and is used to convert the audio and video signals from the main chip into driving signals to drive the display screen.

[0080] Since the display system includes the present application Figures 2 to 3 Corresponding to the driving circuit in any embodiment, therefore, the present application can be implemented as follows Figures 2 to 3 For all the beneficial effects that can be achieved by the driving circuit in any embodiment, please refer to the previous description in detail and will not be repeated here.

[0081] On the basis of the above embodiments, the embodiment of the present application further provides a terminal device, which may include a device body and a device provided on the device body. Figures 2 to 3 Corresponding to the driving circuit or display system in any embodiment.

[0082] The terminal device can be a display product such as a television, a conference tablet, or a commercial display tablet.

[0083] Since the terminal device includes the present application Figures 2 to 3 Corresponding to the driving circuit in any embodiment, therefore, the present application can be implemented as follows Figures 2 to 3 For all the beneficial effects that can be achieved by the driving circuit in any embodiment, please refer to the previous description in detail and will not be repeated here.

[0084] The above is only a preferred embodiment of the present application and does not constitute any form of limitation to the present application. Although the present application has been disclosed as above with preferred embodiments, it is not intended to limit the present application. Any person skilled in the art can make some changes or modifications to equivalent embodiments using the technical contents disclosed above without departing from the scope of the technical solution of the present application. However, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A driving circuit, applied to a display system, wherein the display system includes a main chip and a display screen, characterized in that: The driving circuit includes a display control module and a timing control module; The display control module is connected to the main chip to access the audio and video signals output by the main chip. The display control module is configured with an EDP output interface, and the EDP output interface is connected to the EDP input interface of the timing control module through an FFC socket to output a display port signal to the timing control module. The display port signal is obtained according to the audio and video signals; The output interface of the timing control module is connected to the display screen to output a driving signal to the display screen, and the driving signal is obtained according to the display port signal.

2. The driving circuit according to claim 1, wherein: The display control module is configured with an HDMI input interface, and the display control module is connected to the main chip through the HDMI input interface.

3. The driving circuit according to claim 1, wherein: The audio and video signal includes an HDMI signal with a resolution of 4K120Hz.

4. The driving circuit according to claim 1, wherein: The FFC socket includes a 51-pin FFC socket.

5. The driving circuit according to claim 1, wherein: The display port signal includes an EDP signal. The EDP output interface is configured with 8 data channels, and the bandwidth of each data channel is 5.4G.

6. The driving circuit according to claim 1, wherein: The display control module is configured with a Type-C output interface, and the Type-C output interface is used to connect to an expanded display screen.

7. The driving circuit according to claim 6, wherein: The output signal of the Type-C output interface includes a signal with a resolution of 4K60Hz or 4K120Hz.

8. The driving circuit according to any one of claims 1 to 7, characterized in that: The timing control module includes a timing controller based on an embedded display port.

9. A display system, characterized in that: include: Main chip; Display screen; The driving circuit according to any one of claims 1 to 8, wherein the driving circuit is connected to the main chip and the display screen, respectively, and is used to convert the audio and video signals from the main chip into driving signals to drive the display screen.

10. A terminal device, characterized in that: The device comprises a device body and a driving circuit according to any one of claims 1 to 8 or a display system according to claim 9, which is arranged on the device body.

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